1 /* Disassemble D30V instructions.
2 Copyright (C) 1997-2020 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
23 #include "opcode/d30v.h"
24 #include "disassemble.h"
26 #include "libiberty.h"
28 #define PC_MASK 0xFFFFFFFF
30 /* Return 0 if lookup fails,
31 1 if found and only one form,
32 2 if found and there are short and long forms. */
35 lookup_opcode (struct d30v_insn *insn, long num, int is_long)
38 struct d30v_format *f;
39 struct d30v_opcode *op = (struct d30v_opcode *) d30v_opcode_table;
40 int op1 = (num >> 25) & 0x7;
41 int op2 = (num >> 20) & 0x1f;
42 int mod = (num >> 18) & 0x3;
44 /* Find the opcode. */
47 if ((op->op1 == op1) && (op->op2 == op2))
56 while (op->op1 == op1 && op->op2 == op2)
58 /* Scan through all the formats for the opcode. */
59 op_index = op->format[i++];
62 f = (struct d30v_format *) &d30v_format_table[op_index];
63 while (f->form == op_index)
65 if ((!is_long || f->form >= LONG) && (f->modifier == mod))
75 while ((op_index = op->format[i++]) != 0);
81 if (insn->form == NULL)
85 insn->ecc = (num >> 28) & 0x7;
93 extract_value (uint64_t num, const struct d30v_operand *oper, int is_long)
96 int shift = 12 - oper->position;
97 unsigned int mask = (0xFFFFFFFF >> (32 - oper->bits));
101 if (oper->bits == 32)
102 /* Piece together 32-bit constant. */
103 val = ((num & 0x3FFFF)
104 | ((num & 0xFF00000) >> 2)
105 | ((num & 0x3F00000000LL) >> 6));
107 val = (num >> (32 + shift)) & mask;
110 val = (num >> shift) & mask;
112 if (oper->flags & OPERAND_SHIFT)
119 print_insn (struct disassemble_info *info,
122 struct d30v_insn *insn,
126 int val, opnum, need_comma = 0;
127 const struct d30v_operand *oper;
128 int i, match, need_paren = 0, found_control = 0;
129 unsigned int opind = 0;
131 (*info->fprintf_func) (info->stream, "%s", insn->op->name);
133 /* Check for CMP or CMPU. */
134 if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME)
139 &d30v_operand_table[insn->form->operands[0]],
141 (*info->fprintf_func) (info->stream, "%s", d30v_cc_names[val]);
144 /* Add in ".s" or ".l". */
148 (*info->fprintf_func) (info->stream, ".l");
150 (*info->fprintf_func) (info->stream, ".s");
154 (*info->fprintf_func) (info->stream, "/%s", d30v_ecc_names[insn->ecc]);
156 (*info->fprintf_func) (info->stream, "\t");
158 while (opind < ARRAY_SIZE (insn->form->operands)
159 && (opnum = insn->form->operands[opind++]) != 0)
163 oper = &d30v_operand_table[opnum];
165 if (oper->flags & OPERAND_SHIFT)
169 && oper->flags != OPERAND_PLUS
170 && oper->flags != OPERAND_MINUS)
173 (*info->fprintf_func) (info->stream, ", ");
176 if (oper->flags == OPERAND_ATMINUS)
178 (*info->fprintf_func) (info->stream, "@-");
181 if (oper->flags == OPERAND_MINUS)
183 (*info->fprintf_func) (info->stream, "-");
186 if (oper->flags == OPERAND_PLUS)
188 (*info->fprintf_func) (info->stream, "+");
191 if (oper->flags == OPERAND_ATSIGN)
193 (*info->fprintf_func) (info->stream, "@");
196 if (oper->flags == OPERAND_ATPAR)
198 (*info->fprintf_func) (info->stream, "@(");
203 if (oper->flags == OPERAND_SPECIAL)
206 val = extract_value (num, oper, is_long);
208 if (oper->flags & OPERAND_REG)
211 if (oper->flags & OPERAND_CONTROL)
213 const struct d30v_operand *oper3
214 = &d30v_operand_table[insn->form->operands[2]];
215 int id = extract_value (num, oper3, is_long);
221 val |= OPERAND_CONTROL;
225 val = OPERAND_CONTROL + MAX_CONTROL_REG + id;
231 /* xgettext: c-format */
232 opcodes_error_handler (_("illegal id (%d)"), id);
236 else if (oper->flags & OPERAND_ACC)
238 else if (oper->flags & OPERAND_FLAG)
240 for (i = 0; i < reg_name_cnt (); i++)
242 if (val == pre_defined_registers[i].value)
244 if (pre_defined_registers[i].pname)
245 (*info->fprintf_func)
246 (info->stream, "%s", pre_defined_registers[i].pname);
248 (*info->fprintf_func)
249 (info->stream, "%s", pre_defined_registers[i].name);
256 /* This would only get executed if a register was not in
257 the register table. */
258 (*info->fprintf_func)
259 (info->stream, _("<unknown register %d>"), val & 0x3F);
262 /* repeati has a relocation, but its first argument is a plain
263 immediate. OTOH instructions like djsri have a pc-relative
264 delay target, but an absolute jump target. Therefore, a test
265 of insn->op->reloc_flag is not specific enough; we must test
266 if the actual operand we are handling now is pc-relative. */
267 else if (oper->flags & OPERAND_PCREL)
271 /* IMM6S3 is unsigned. */
272 if (oper->flags & OPERAND_SIGNED || bits == 32)
274 unsigned int sign = 1u << (bits - 1);
277 val = -val & (sign + sign - 1);
283 (*info->fprintf_func) (info->stream, "-%x\t(", val);
284 (*info->print_address_func) ((memaddr - val) & PC_MASK, info);
285 (*info->fprintf_func) (info->stream, ")");
289 (*info->fprintf_func) (info->stream, "%x\t(", val);
290 (*info->print_address_func) ((memaddr + val) & PC_MASK, info);
291 (*info->fprintf_func) (info->stream, ")");
294 else if (insn->op->reloc_flag == RELOC_ABS)
296 (*info->print_address_func) (val, info);
300 if (oper->flags & OPERAND_SIGNED)
302 unsigned int sign = 1u << (bits - 1);
306 val = -val & (sign + sign - 1);
307 (*info->fprintf_func) (info->stream, "-");
310 (*info->fprintf_func) (info->stream, "0x%x", val);
312 /* If there is another operand, then write a comma and space. */
313 if (opind < ARRAY_SIZE (insn->form->operands)
314 && insn->form->operands[opind]
315 && !(found_control && opind == 2))
319 (*info->fprintf_func) (info->stream, ")");
323 print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info)
328 struct d30v_insn insn;
333 info->bytes_per_line = 8;
334 info->bytes_per_chunk = 4;
335 info->display_endian = BFD_ENDIAN_BIG;
337 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
340 (*info->memory_error_func) (status, memaddr, info);
343 in1 = bfd_getb32 (buffer);
345 status = (*info->read_memory_func) (memaddr + 4, buffer, 4, info);
348 info->bytes_per_line = 8;
349 if (!(result = lookup_opcode (&insn, in1, 0)))
350 (*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
352 print_insn (info, memaddr, (uint64_t) in1, &insn, 0, result);
355 in2 = bfd_getb32 (buffer);
357 if (in1 & in2 & FM01)
359 /* LONG instruction. */
360 if (!(result = lookup_opcode (&insn, in1, 1)))
362 (*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x", in1, in2);
365 num = (uint64_t) in1 << 32 | in2;
366 print_insn (info, memaddr, num, &insn, 1, result);
371 if (!(result = lookup_opcode (&insn, in1, 0)))
372 (*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
374 print_insn (info, memaddr, num, &insn, 0, result);
376 switch (((in1 >> 31) << 1) | (in2 >> 31))
379 (*info->fprintf_func) (info->stream, "\t||\t");
382 (*info->fprintf_func) (info->stream, "\t->\t");
385 (*info->fprintf_func) (info->stream, "\t<-\t");
392 if (!(result = lookup_opcode (&insn, in2, 0)))
393 (*info->fprintf_func) (info->stream, ".long\t0x%x", in2);
395 print_insn (info, memaddr, num, &insn, 0, result);