3 * config/tc-arm.c (asm_opcode): operands type
5 (BAD_PC_ADDRESSING): New macro message.
6 (BAD_PC_WRITEBACK): Likewise.
7 (MIX_ARM_THUMB_OPERANDS): New macro.
8 (operand_parse_code): Added enum values.
9 (parse_operands): Added thumb/arm distinction,
10 plus new enum values handling.
11 (encode_arm_addr_mode_2): Validations enhanced.
12 (encode_arm_addr_mode_3): Likewise.
13 (do_rm_rd_rn): Likewise.
14 (encode_thumb32_addr_mode): Likewise.
15 (do_t_ldrex): Likewise.
16 (do_t_ldst): Likewise.
17 (do_t_strex): Likewise.
18 (md_assemble): Call parse_operands with
26 (insns): Updated insns operands.
31 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
32 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
33 (pseudo_func): Add an entry for slotcount.
34 (md_begin): Initialize slotcount pseudo symbol.
35 (ia64_parse_name): Handle @slotcount parameter.
36 (ia64_gen_real_reloc_type): Handle slotcount.
37 (md_apply_fix): Ditto.
38 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
42 * config/tc-xtensa.c (istack_init): Don't call memset.
46 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
51 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
55 * config/tc-i386.c (build_modrm_byte): Reformat.
59 * config/tc-i386.c: Update copyright.
64 * config/tc-i386.c (vec_imm4) New operand type.
66 (VEX_check_operands): New.
67 (check_reverse): Call VEX_check_operands.
68 (build_modrm_byte): Reintroduce code for 5
69 operand insns. Fix whitespace.
73 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
78 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
79 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
80 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
84 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
85 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
86 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
87 BFD_RELOC_ARM_PCREL_CALL)
91 * config/tc-xtensa.c (frag_format_size): Generalize logic to
92 handle more instruction sizes and fetch widths.
93 (branch_align_power): Likewise.
94 (text_align_power): Likewise.
95 (bytes_to_stretch): Likewise.
99 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
100 (ppc_mach): Handle titan.
101 * doc/c-ppc.texi: Mention -mtitan.
105 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
107 (xtensa_fetch_width) ...this.
111 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
112 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
113 * Makefile.in: Regenerate.
117 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
118 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
119 * config/tc-i386.h (processor_type): Same.
120 * doc/c-i386.texi: Change amdfam15 to bdver1.
125 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
130 * NEWS: Mention new feature.
131 * config/obj-coff.c (obj_coff_section): Accept digits and use
132 to override default section alignment power if specified.
133 * doc/as.texinfo (.section directive): Update documentation.
137 * config/tc-i386.c (avxscalar): New.
138 (OPTION_MAVXSCALAR): Likewise.
139 (build_vex_prefix): Select vector_length for scalar instructions
141 (md_longopts): Add OPTION_MAVXSCALAR.
142 (md_parse_option): Handle OPTION_MAVXSCALAR.
143 (md_show_usage): Add -mavxscalar=.
145 * doc/c-i386.texi: Document -mavxscalar=.
149 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
154 * write.h (fix_at_start): Declare.
155 * write.c (fix_new_internal): Add at_beginning parameter.
156 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
157 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
158 (fix_new, fix_new_exp): Update accordingly.
159 (fix_at_start): New function.
160 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
161 (ppc_ref): New function, for OBJ_XCOFF.
162 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
163 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
167 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
168 on 64-bit Solaris/x86.
169 Include obj-format.h earlier.
173 * config/tc-s390.c (s390_elf_final_processing): New function.
174 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
175 (s390_elf_final_processing): Added prototype.
181 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
182 code to handle round-to-zero for VCVT conversions.
183 (do_neon_cvt): New. Call do_neon_cvt_1.
184 (do_neon_cvtr): New. Call do_neon_cvt_1.
185 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
190 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
194 * config/tc-i386.c (md_assemble): Before accessing the IMM field
195 check that it's not an XOP insn.
199 * config/bfin-aux.h: Remove argument names in function
201 * config/bfin-lex.l (parse_int): Fix shadowed variable name
203 * config/bfin-parse.y (value_match): Remove argument names
205 (notethat): Likewise.
210 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
214 * config/tc-h8300.c (h8300_elf_section): New function - issue a
215 warning message if a new section is created without setting any
217 (md_pseudo_table): Intercept section creation pseudos.
218 (md_pcrel_from): Replace abort with an error message.
219 * config/obj-elf.c (obj_elf_section_name): Export this function.
220 * config/obj-elf.h (obj_elf_section_name): Prototype.
225 * listing.c (print_source): Add one to line number.
229 * Makefile.in: Regenerate.
230 * configure: Regenerate.
231 * doc/Makefile.in: Regenerate.
235 * version.c (parse_args): Change to "Copyright 2010".
239 * config/tc-i386.c (cpu_arch): Add amdfam15.
240 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
241 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
242 * doc/c-i386.texi: Add amdfam15.
246 * config/tc-arm.c (do_neon_logic): Accept imm value
247 in the third operand too.
248 (operand_parse_code): OP_RNDQ_IMVNb renamed to
250 (parse_operands): OP_NILO case removed, applied renaming.
251 (insns): Neon shape changed for some logic instructions.
255 * config/tc-arm.c (do_neon_ldx_stx): Added
256 validation for vector load/store insns.
260 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
264 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
265 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
266 (NEON_ENCODE): New macro.
267 (check_neon_suffixes): New macro.
268 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
269 (do_vfp_nsyn_opcode): Likewise.
270 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
271 (do_vfp_nsyn_cmp): Likewise.
272 (do_neon_shl_imm): Likewise.
273 (do_neon_qshl_imm): Likewise.
274 (neon_dyadic_misc): Likewise.
275 (do_neon_mac_maybe_scalar): Likewise.
276 (do_neon_qdmulh): Likewise.
277 (do_neon_qmovn): Likewise.
278 (do_neon_qmovun): Likewise.
279 (do_neon_movn): Likewise.
280 (neon_mac_reg_scalar_long): Likewise.
281 (do_neon_vmull): Likewise.
282 (do_neon_trn): Likewise.
283 (do_neon_ldx_stx): Likewise.
284 (neon_dp_fixup): Changed signature and set the flag.
285 (neon_three_same): Call the above with new signature.
286 (neon_two_same): Likewise.
287 (neon_imm_shift): Likewise.
288 (neon_mul_mac): Likewise.
289 (do_neon_abs_neg): Likewise.
290 (neon_mixed_length): Likewise.
291 (do_neon_ext): Likewise.
292 (do_neon_mov): Likewise.
293 (do_neon_tbl_tbx): Likewise.
294 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
295 (neon_compare): Likewise.
296 (do_neon_shll): Likewise.
297 (do_neon_cvt): Likewise.
298 (do_neon_mvn): Likewise.
299 (do_neon_dup): Likewise.
300 (md_assemble): Call check_neon_suffixes ().
302 For older changes see ChangeLog-2009
308 version-control: never