3 * i386-gen.c (output_i386_opcode): Don't get operand count. Look
4 for {} instead of {0}. Don't look for '0'.
5 * i386-opc.tbl: Drop operand count field. Drop redundant operand
11 * riscv-dis.c (print_insn_args): Updated encoding macros.
12 * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM.
13 (match_c_addi16sp): Updated encoding macros.
14 (match_c_lui): Likewise.
15 (match_c_lui_with_hint): Likewise.
16 (match_c_addi4spn): Likewise.
17 (match_c_slli): Likewise.
18 (match_slli_as_c_slli): Likewise.
19 (match_c_slli64): Likewise.
20 (match_srxi_as_c_srxi): Likewise.
21 (riscv_insn_types): Added .insn css/cl/cs.
25 * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h.
26 (default_priv_spec): Updated type to riscv_spec_class.
27 (parse_riscv_dis_option): Updated.
28 * riscv-opc.c: Moved stuff and make the file tidy.
32 * wasm32-dis.c: Include limits.h.
33 (CHAR_BIT): Provide backup define.
34 (wasm_read_leb128): Use CHAR_BIT to size "result" in bits.
35 Correct signed overflow checking.
39 * i386-opc.tbl: Split CVTPI2PD template. Add SSE2AVX variant.
40 * i386-tbl.h: Re-generate.
44 * i386-gen.c (set_bitfield): Don't look for CpuFP, Mmword, nor
46 * i386-opc.tbl (CpuFP, Mmword, Oword): Define.
50 * s390-mkopc.c (main): Accept arch14 as cpu string.
51 * s390-opc.txt: Add new arch14 instructions.
55 * configure.ac (SHARED_LIBADD): Remove explicit -lintl population in
57 * configure: Regenerated.
61 * tic54x-dis.c (sprint_mmr): Change to tic54x_mmregs.
62 * tic54x-opc.c (regs): Rename to ...
63 (tic54x_regs): ... this.
64 (mmregs): Rename to ...
65 (tic54x_mmregs): ... this.
66 (condition_codes): Rename to ...
67 (tic54x_condition_codes): ... this.
68 (cc2_codes): Rename to ...
69 (tic54x_cc2_codes): ... this.
70 (cc3_codes): Rename to ...
71 (tic54x_cc3_codes): ... this.
72 (status_bits): Rename to ...
73 (tic54x_status_bits): ... this.
74 (misc_symbols): Rename to ...
75 (tic54x_misc_symbols): ... this.
79 * riscv-opc.c (MASK_RVB_IMM): Removed.
80 (riscv_opcodes): Removed zb* instructions.
81 (riscv_ext_version_table): Removed versions for zb*.
85 * i386-gen.c (parse_template): Ensure entire template_instance
90 * riscv-opc.c (riscv_gpr_names_abi): Aligned the code.
91 (riscv_fpr_names_abi): Likewise.
92 (riscv_opcodes): Likewise.
93 (riscv_insn_types): Likewise.
97 * riscv-dis.c (parse_riscv_dis_option): Fix typos of message.
101 * riscv-dis.c: Comments tidy and improvement.
102 * riscv-opc.c: Likewise.
106 * Makefile.in: Regenerate.
111 * configure.ac: Use GNU_MAKE_JOBSERVER.
112 * aclocal.m4: Regenerated.
113 * configure: Likewise.
117 * po/sr.po: Updated Serbian translation.
122 * configure: Regenerated.
126 * aarch64-asm-2.c: Regenerate.
127 * aarch64-dis-2.c: Likewise.
128 * aarch64-opc-2.c: Likewise.
129 * aarch64-opc.c (aarch64_print_operand):
130 Delete handling of AARCH64_OPND_CSRE_CSR.
131 * aarch64-tbl.h (aarch64_feature_csre): Delete.
133 (_CSRE_INSN): Likewise.
134 (aarch64_opcode_table): Delete csr.
138 * po/de.po: Updated German translation.
139 * po/fr.po: Updated French translation.
140 * po/pt_BR.po: Updated Brazilian Portuguese translation.
141 * po/sv.po: Updated Swedish translation.
142 * po/uk.po: Updated Ukranian translation.
146 * configure: Regenerated.
150 * configure: Regenerate.
151 * po/opcodes.pot: Regenerate.
155 * 2.36 release branch crated.
159 * ppc-opc.c (insert_dw, (extract_dw): New functions.
160 (DW, (XRC_MASK): Define.
161 (powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
165 * configure: Regenerate.
169 * po/sv.po: Updated Swedish translation.
174 * aarch64-dis.c (determine_disassembling_preference): Move call to
175 aarch64_match_operands_constraint outside of the assertion.
176 * aarch64-asm.c (aarch64_ins_limm_1): Remove call to assert.
177 Replace with a return of FALSE.
180 * aarch64-opc.c (aarch64_sys_regs): Treat id_aa64mmfr2_el1 as a
181 core system register.
185 * configure: Regenerate.
189 * po/fr.po: Updated French translation.
193 * m68k-opc.c (chkl): Change minimum architecture requirement to
198 * riscv-opc.c (riscv_opcodes): Add pause hint instruction.
207 * riscv-opc.c (riscv_opcodes): Add ZBA/ZBB/ZBC instructions.
208 (MASK_RVB_IMM): Used for rev8 and orc.b encoding.
212 Update year range in copyright notice of all files.
214 For older changes see ChangeLog-2020
216 Copyright (C) 2021 Free Software Foundation, Inc.
218 Copying and distribution of this file, with or without modification,
219 are permitted in any medium without royalty provided the copyright
220 notice and this notice are preserved.
226 version-control: never