1 /* Print Acorn Risc Machine instructions for GDB, the GNU debugger.
2 Copyright 1986, 1989, 1991, 1992 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "opcode/arm.h"
27 static char *shift_names[] = {
28 "lsl", "lsr", "asr", "ror",
31 static char *cond_names[] = {
32 "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
33 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"
36 static char float_precision[] = "sdep";
37 static char float_rounding[] = " pmz";
38 static float float_immed[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 0.5, 10.0 };
40 static void print_ldr_str_offset();
41 static void print_ldc_stc_offset();
42 static long immediate_value();
44 /* Print the ARM instruction at address MEMADDR in debugged memory,
45 on STREAM. Returns length of the instruction, in bytes. */
48 print_insn (memaddr, stream)
53 register struct opcode *op;
58 ins = read_memory_integer(memaddr, 4);
59 for (i = 0, op = opcodes; i < N_OPCODES; i++, op++)
60 if ((ins & op->mask) == op->value) break;
61 assert(i != N_OPCODES);
63 for (p = op->assembler; *p;) {
68 s = s*10 + (*p++ - '0');
72 e = e*10 + (*p++ - '0');
75 assert(s >= 0 && s <= 31 && e >= 0 && e <= 31);
76 val = (ins >> s) & ((1 << (e + 1 - s)) - 1);
82 fprintf(stream, "%d", val);
85 fprintf(stream, "%x", val);
88 assert(val >= 0 && val <= 15);
89 fprintf(stream, "%s", reg_names[val]);
92 fprintf(stream, "%s", cond_names[ins >> 28]);
117 if (((ins >> 12) & 0xf) == 0xf)
122 int immed = immediate_value(ins & 0xfff);
123 fprintf (stream, "#%d (0x%x)", immed, immed);
125 int operand2 = ins & 0xfff;
127 bits 0-3 are the base register
128 bits 5-6 are the shift (0=lsl, 1=lsr, 2=asr, 3=ror)
129 if bit 4 is zero then bits 7-11 are an immediate shift count
130 else bit 7 must be zero and bits 8-11 are the register
131 to be used as a shift count.
132 Note: no shift at all is encoded as "reg lsl #0" */
133 fprintf (stream, "%s", reg_names[operand2 & 0xf]);
134 if (operand2 & 0xff0) {
135 /* ror #0 is really rrx (rotate right extend) */
136 if ((operand2 & 0xff0) == 0x060)
137 fprintf (stream, ", rrx");
139 fprintf (stream, ", %s ",
140 shift_names[(operand2 >> 5) & 3]);
141 if (operand2 & (1<<4)) /* register shift */
142 fprintf (stream, "%s",
143 reg_names[operand2 >> 8]);
144 else /* immediate shift */
145 fprintf (stream, "#%d",
152 fprintf (stream, "[%s", reg_names[(ins >> 16) & 0xf]);
154 fprintf (stream, ", ");
155 print_ldr_str_offset (ins, stream);
157 if (ins & (1<<21)) putc('!', stream);
158 /* If it is a pc relative load, then it is probably
159 a constant so print it */
160 if (((ins >> 16) & 0xf) == 15 &&
161 (ins & (1<<25)) == 0 &&
163 int addr = memaddr + 8 +
164 (ins & 0xfff) * ((ins & (1<<23)) ? 1 : -1);
165 fprintf (stream, " (contents=");
166 print_address (read_memory_integer(addr, 4), stream);
167 fprintf (stream, ")");
170 fprintf (stream, "]," );
171 print_ldr_str_offset (ins, stream);
175 print_address (memaddr + 8 + (((int)ins << 8) >> 6), stream);
178 fprintf (stream, "[%s", reg_names[(ins >> 16) & 0xf]);
180 fprintf (stream, ", ");
181 print_ldc_stc_offset (ins, stream);
186 fprintf (stream, "], ");
187 print_ldc_stc_offset (ins, stream);
192 int regnum, first = 1;
194 for (regnum = 0; regnum < 16; regnum++)
195 if (ins & (1<<regnum)) {
199 fprintf (stream, "%s", reg_names[regnum]);
205 val = ((ins >> 18) & 2) | ((ins >> 7) & 1);
206 putc(float_precision[val], stream);
209 val = ((ins >> 21) & 2) | ((ins >> 15) & 1);
210 putc(float_precision[val], stream);
213 val = ((ins >> 5) & 3);
214 if (val) putc(float_rounding[val], stream);
217 assert(val >= 0 && val <= 15);
219 fprintf (stream, "#%3.1f", float_immed[val - 8]);
221 fprintf (stream, "f%d", val);
233 immediate_value(operand)
236 int val = operand & 0xff;
237 int shift = 2*(operand >> 8);
238 /* immediate value is (val ror shift) */
239 return (val >> shift) | (val << (32 - shift));
243 print_ldr_str_offset(ins, stream)
247 if ((ins & (1<<25)) == 0)
248 fprintf (stream, "#%d",
249 (ins & 0xfff) * ((ins & (1<<23)) ? 1 : -1));
251 fprintf (stream, "%s%s", reg_names[ins & 0xf],
252 (ins & (1<<23)) ? "" : "-");
254 fprintf (stream, ", %s #%d",
255 shift_names[(ins >> 5) & 3],
261 print_ldc_stc_offset(ins, stream)
265 fprintf (stream, "#%d",
266 4 * (ins & 0xff) * ((ins & (1<<23)) ? 1 : -1));