1 /* tc-i860.c -- Assemble for the I860
2 Copyright (C) 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 #include "opcode/i860.h"
26 void md_number_to_chars ();
29 void md_convert_frag ();
30 void md_create_short_jump ();
31 void md_create_long_jump ();
32 int md_estimate_size_before_relax ();
33 void md_number_to_imm ();
34 void md_number_to_disp ();
35 void md_number_to_field ();
36 void md_ri_to_chars ();
37 static void i860_ip ();
38 /* void emit_machine_reloc(); */
40 const int md_reloc_size = sizeof (struct relocation_info);
42 /* void (*md_emit_relocations)() = emit_machine_reloc; */
44 const relax_typeS md_relax_table[] =
47 /* handle of the OPCODE hash table */
48 static struct hash_control *op_hash = NULL;
50 static void s_dual (), s_enddual ();
51 static void s_atmp ();
57 {"enddual", s_enddual, 4},
62 int md_short_jump_size = 4;
63 int md_long_jump_size = 4;
65 /* This array holds the chars that always start a comment. If the
66 pre-processor is disabled, these aren't very useful */
67 const char comment_chars[] = "!/"; /* JF removed '|' from comment_chars */
69 /* This array holds the chars that only start a comment at the beginning of
70 a line. If the line seems to have the form '# 123 filename'
71 .line and .file directives will appear in the pre-processed output */
72 /* Note that input_file.c hand checks for '#' at the beginning of the
73 first line of the input file. This is because the compiler outputs
74 #NO_APP at the beginning of its output. */
75 /* Also note that comments like this one will always work. */
76 const char line_comment_chars[] = "#/";
78 const char line_separator_chars[] = "";
80 /* Chars that can be used to separate mant from exp in floating point nums */
81 const char EXP_CHARS[] = "eE";
83 /* Chars that mean this number is a floating point constant */
86 const char FLT_CHARS[] = "rRsSfFdDxXpP";
88 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
89 changed in read.c . Ideally it shouldn't have to know about it at all,
90 but nothing is ideal around here.
92 int size_reloc_info = sizeof (struct relocation_info);
94 static unsigned char octal[256];
95 #define isoctal(c) octal[c]
96 static unsigned char toHex[256];
101 unsigned long opcode;
102 struct nlist *nlistp;
105 enum expand_type expand;
106 enum highlow_type highlow;
107 enum reloc_type reloc;
112 static void print_insn (struct i860_it *insn);
113 static int getExpression (char *str);
115 #else /* not __STDC__ */
117 static void print_insn ();
118 static int getExpression ();
120 #endif /* not __STDC__ */
122 static char *expr_end;
123 static char last_expand; /* error if expansion after branch */
127 DUAL_OFF = 0, DUAL_ON, DUAL_DDOT, DUAL_ONDDOT,
129 static enum dual dual_mode = DUAL_OFF; /* dual-instruction mode */
132 s_dual () /* floating point instructions have dual set */
138 s_enddual () /* floating point instructions have dual set */
140 dual_mode = DUAL_OFF;
143 static int atmp = 31; /* temporary register for pseudo's */
149 if (strncmp (input_line_pointer, "sp", 2) == 0)
151 input_line_pointer += 2;
154 else if (strncmp (input_line_pointer, "fp", 2) == 0)
156 input_line_pointer += 2;
159 else if (strncmp (input_line_pointer, "r", 1) == 0)
161 input_line_pointer += 1;
162 temp = get_absolute_expression ();
163 if (temp >= 0 && temp <= 31)
166 as_bad ("Unknown temporary pseudo register");
170 as_bad ("Unknown temporary pseudo register");
172 demand_empty_rest_of_line ();
176 /* This function is called once, at assembler startup time. It should
177 set up all the tables, etc. that the MD part of the assembler will need. */
181 register char *retval = NULL;
183 register unsigned int i = 0;
185 op_hash = hash_new ();
187 as_fatal ("Virtual memory exhausted");
189 while (i < NUMOPCODES)
191 const char *name = i860_opcodes[i].name;
192 retval = hash_insert (op_hash, name, &i860_opcodes[i]);
193 if (retval != NULL && *retval != '\0')
195 fprintf (stderr, "internal error: can't hash `%s': %s\n",
196 i860_opcodes[i].name, retval);
201 if (i860_opcodes[i].match & i860_opcodes[i].lose)
203 fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n",
204 i860_opcodes[i].name, i860_opcodes[i].args);
209 while (i < NUMOPCODES
210 && !strcmp (i860_opcodes[i].name, name));
214 as_fatal ("Broken assembler. No assembly attempted.");
216 for (i = '0'; i < '8'; ++i)
218 for (i = '0'; i <= '9'; ++i)
220 for (i = 'a'; i <= 'f'; ++i)
221 toHex[i] = i + 10 - 'a';
222 for (i = 'A'; i <= 'F'; ++i)
223 toHex[i] = i + 10 - 'A';
240 struct i860_it pseudo[3];
245 /* check for expandable flag to produce pseudo-instructions */
246 if (the_insn.expand != 0 && the_insn.highlow == NO_SPEC)
248 for (i = 0; i < 3; i++)
249 pseudo[i] = the_insn;
251 switch (the_insn.expand)
259 if (the_insn.exp.X_add_symbol == NULL &&
260 the_insn.exp.X_subtract_symbol == NULL &&
261 (the_insn.exp.X_add_number < (1 << 15) &&
262 the_insn.exp.X_add_number >= -(1 << 15)))
264 /* or l%const,r0,ireg_dest */
265 pseudo[0].opcode = (the_insn.opcode & 0x001f0000) | 0xe4000000;
266 pseudo[0].highlow = PAIR;
267 /* orh h%const,ireg_dest,ireg_dest */
268 pseudo[1].opcode = (the_insn.opcode & 0x03ffffff) | 0xec000000 |
269 ((the_insn.opcode & 0x001f0000) << 5);
270 pseudo[1].highlow = HIGH;
275 if (the_insn.exp.X_add_symbol == NULL &&
276 the_insn.exp.X_subtract_symbol == NULL)
278 /* orh ha%addr_expr,r0,r31 */
279 pseudo[0].opcode = 0xec000000 | (atmp << 16);
280 pseudo[0].highlow = HIGHADJ;
281 pseudo[0].reloc = LOW0; /* must overwrite */
282 /* l%addr_expr(r31),ireg_dest */
283 pseudo[1].opcode = (the_insn.opcode & ~0x003e0000) | (atmp << 21);
284 pseudo[1].highlow = PAIR;
288 case E_U32: /* 2nd version emulates Intel as, not doc. */
289 if (the_insn.exp.X_add_symbol == NULL &&
290 the_insn.exp.X_subtract_symbol == NULL &&
291 (the_insn.exp.X_add_number < (1 << 16) &&
292 the_insn.exp.X_add_number >= 0))
294 /* $(opcode)h h%const,ireg_src2,ireg_dest
295 pseudo[0].opcode = (the_insn.opcode & 0xf3ffffff) | 0x0c000000; */
296 /* $(opcode)h h%const,ireg_src2,r31 */
297 pseudo[0].opcode = (the_insn.opcode & 0xf3e0ffff) | 0x0c000000 |
299 pseudo[0].highlow = HIGH;
300 /* $(opcode) l%const,ireg_dest,ireg_dest
301 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
302 ((the_insn.opcode & 0x001f0000) << 5); */
303 /* $(opcode) l%const,r31,ireg_dest */
304 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
306 pseudo[1].highlow = PAIR;
310 case E_AND: /* 2nd version emulates Intel as, not doc. */
311 if (the_insn.exp.X_add_symbol == NULL &&
312 the_insn.exp.X_subtract_symbol == NULL &&
313 (the_insn.exp.X_add_number < (1 << 16) &&
314 the_insn.exp.X_add_number >= 0))
316 /* andnot h%const,ireg_src2,ireg_dest
317 pseudo[0].opcode = (the_insn.opcode & 0x03ffffff) | 0xd4000000; */
318 /* andnot h%const,ireg_src2,r31 */
319 pseudo[0].opcode = (the_insn.opcode & 0x03e0ffff) | 0xd4000000 |
321 pseudo[0].highlow = HIGH;
322 pseudo[0].exp.X_add_number = -1 - the_insn.exp.X_add_number;
323 /* andnot l%const,ireg_dest,ireg_dest
324 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
325 ((the_insn.opcode & 0x001f0000) << 5); */
326 /* andnot l%const,r31,ireg_dest */
327 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
329 pseudo[1].highlow = PAIR;
330 pseudo[1].exp.X_add_number = -1 - the_insn.exp.X_add_number;
335 if (the_insn.exp.X_add_symbol == NULL &&
336 the_insn.exp.X_subtract_symbol == NULL &&
337 (the_insn.exp.X_add_number < (1 << 15) &&
338 the_insn.exp.X_add_number >= -(1 << 15)))
340 /* orh h%const,r0,r31 */
341 pseudo[0].opcode = 0xec000000 | (atmp << 16);
342 pseudo[0].highlow = HIGH;
343 /* or l%const,r31,r31 */
344 pseudo[1].opcode = 0xe4000000 | (atmp << 21) | (atmp << 16);
345 pseudo[1].highlow = PAIR;
346 /* r31,ireg_src2,ireg_dest */
347 pseudo[2].opcode = (the_insn.opcode & ~0x0400ffff) | (atmp << 11);
348 pseudo[2].reloc = NO_RELOC;
353 as_fatal ("failed sanity check.");
356 the_insn = pseudo[0];
357 /* check for expanded opcode after branch or in dual */
358 if (no_opcodes > 1 && last_expand == 1)
359 as_warn ("Expanded opcode after delayed branch: `%s'", str);
360 if (no_opcodes > 1 && dual_mode != DUAL_OFF)
361 as_warn ("Expanded opcode in dual mode: `%s'", str);
366 { /* always produce at least one opcode */
368 /* put out the opcode */
369 md_number_to_chars (toP, the_insn.opcode, 4);
371 /* check for expanded opcode after branch or in dual */
372 last_expand = the_insn.pcrel;
374 /* put out the symbol-dependent stuff */
375 if (the_insn.reloc != NO_RELOC)
377 fix_new (frag_now, /* which frag */
378 (toP - frag_now->fr_literal), /* where */
380 the_insn.exp.X_add_symbol,
381 the_insn.exp.X_subtract_symbol,
382 the_insn.exp.X_add_number,
384 /* merge bit fields into one argument */
385 (int) (((the_insn.highlow & 0x3) << 4) | (the_insn.reloc & 0xf)));
387 the_insn = pseudo[++i];
389 while (--no_opcodes > 0);
401 struct i860_opcode *insn;
403 unsigned long opcode;
409 for (s = str; islower (*s) || *s == '.' || *s == '3'; ++s)
427 as_bad ("Unknown opcode: `%s'", str);
431 if (strncmp (str, "d.", 2) == 0)
432 { /* check for d. opcode prefix */
433 if (dual_mode == DUAL_ON)
434 dual_mode = DUAL_ONDDOT;
436 dual_mode = DUAL_DDOT;
440 if ((insn = (struct i860_opcode *) hash_find (op_hash, str)) == NULL)
442 if (dual_mode == DUAL_DDOT || dual_mode == DUAL_ONDDOT)
444 as_bad ("Unknown opcode: `%s'", str);
454 opcode = insn->match;
455 memset (&the_insn, '\0', sizeof (the_insn));
456 the_insn.reloc = NO_RELOC;
459 * Build the opcode, checking as we go to make
460 * sure that the operands match
462 for (args = insn->args;; ++args)
467 case '\0': /* end of args */
475 case '(': /* these must match exactly */
483 case '#': /* must be at least one digit */
494 case '1': /* next operand must be a register */
500 case 'f': /* frame pointer */
509 case 's': /* stack pointer */
518 case 'r': /* any register */
520 if (!isdigit (c = *s++))
526 if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
538 default: /* not this opcode */
542 * Got the register, now figure out where
543 * it goes in the opcode.
549 opcode |= mask << 11;
553 opcode |= mask << 21;
557 opcode |= mask << 16;
563 case 'e': /* next operand is a floating point register */
566 if (*s++ == 'f' && isdigit (*s))
571 mask = 10 * (mask - '0') + (*s++ - '0');
585 opcode |= mask << 11;
589 opcode |= mask << 21;
593 opcode |= mask << 16;
594 if (dual_mode != DUAL_OFF)
595 opcode |= (1 << 9); /* dual mode instruction */
596 if (dual_mode == DUAL_DDOT)
597 dual_mode = DUAL_OFF;
598 if (dual_mode == DUAL_ONDDOT)
600 if ((opcode & (1 << 10)) && (mask == ((opcode >> 11) & 0x1f)))
601 as_warn ("Fsr1 equals fdest with Pipelining");
607 case 'c': /* next operand must be a control register */
608 if (strncmp (s, "fir", 3) == 0)
614 if (strncmp (s, "psr", 3) == 0)
620 if (strncmp (s, "dirbase", 7) == 0)
626 if (strncmp (s, "db", 2) == 0)
632 if (strncmp (s, "fsr", 3) == 0)
638 if (strncmp (s, "epsr", 4) == 0)
646 case '5': /* 5 bit immediate in src1 */
647 memset (&the_insn, '\0', sizeof (the_insn));
648 if (!getExpression (s))
651 if (the_insn.exp.X_add_number & ~0x1f)
652 as_bad ("5-bit immediate too large");
653 opcode |= (the_insn.exp.X_add_number & 0x1f) << 11;
654 memset (&the_insn, '\0', sizeof (the_insn));
655 the_insn.reloc = NO_RELOC;
660 case 'l': /* 26 bit immediate, relative branch */
661 the_insn.reloc = BRADDR;
665 case 's': /* 16 bit immediate, split relative branch */
666 /* upper 5 bits of offset in dest field */
668 the_insn.reloc = SPLIT0;
671 case 'S': /* 16 bit immediate, split (st), aligned */
672 if (opcode & (1 << 28))
674 the_insn.reloc = SPLIT2;
676 the_insn.reloc = SPLIT1;
678 the_insn.reloc = SPLIT0;
681 case 'I': /* 16 bit immediate, aligned */
682 if (opcode & (1 << 28))
684 the_insn.reloc = LOW2;
686 the_insn.reloc = LOW1;
688 the_insn.reloc = LOW0;
691 case 'i': /* 16 bit immediate */
692 the_insn.reloc = LOW0;
699 if (strncmp (s, "ha%", 3) == 0)
701 the_insn.highlow = HIGHADJ;
704 else if (strncmp (s, "h%", 2) == 0)
706 the_insn.highlow = HIGH;
709 else if (strncmp (s, "l%", 2) == 0)
711 the_insn.highlow = PAIR;
714 the_insn.expand = insn->expand;
716 /* Note that if the getExpression() fails, we will still have
717 created U entries in the symbol table for the 'symbols'
718 in the input string. Try not to create U symbols for
721 if (!getExpression (s))
729 as_fatal ("failed sanity check.");
736 /* Args don't match. */
737 if (&insn[1] - i860_opcodes < NUMOPCODES
738 && !strcmp (insn->name, insn[1].name))
746 as_bad ("Illegal operands");
753 the_insn.opcode = opcode;
764 save_in = input_line_pointer;
765 input_line_pointer = str;
766 switch (seg = expression (&the_insn.exp))
780 the_insn.error = "bad segment";
781 expr_end = input_line_pointer;
782 input_line_pointer = save_in;
785 expr_end = input_line_pointer;
786 input_line_pointer = save_in;
792 This is identical to the md_atof in m68k.c. I think this is right,
795 Turn a string in input_line_pointer into a floating point constant of type
796 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
797 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
800 /* Equal to MAX_PRECISION in atof-ieee.c */
801 #define MAX_LITTLENUMS 6
804 md_atof (type, litP, sizeP)
810 LITTLENUM_TYPE words[MAX_LITTLENUMS];
811 LITTLENUM_TYPE *wordP;
844 return "Bad call to MD_ATOF()";
846 t = atof_ieee (input_line_pointer, type, words);
848 input_line_pointer = t;
849 *sizeP = prec * sizeof (LITTLENUM_TYPE);
850 for (wordP = words; prec--;)
852 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
853 litP += sizeof (LITTLENUM_TYPE);
855 return ""; /* Someone should teach Dean about null pointers */
859 * Write out big-endian.
862 md_number_to_chars (buf, val, n)
880 as_fatal ("failed sanity check.");
886 md_number_to_imm (buf, val, n, fixP)
892 enum reloc_type reloc = fixP->fx_r_type & 0xf;
893 enum highlow_type highlow = (fixP->fx_r_type >> 4) & 0x3;
896 assert (n == 4); /* always on i860 */
901 case HIGHADJ: /* adjusts the high-order 16-bits */
907 case HIGH: /* selects the high-order 16-bits */
911 case PAIR: /* selects the low-order 16-bits */
922 case BRADDR: /* br,call,bc,bc.t,bnc,bnc.t w/26-bit immediate */
923 if (fixP->fx_pcrel != 1)
924 as_bad ("26-bit branch w/o pc relative set: 0x%08x", val);
925 val >>= 2; /* align pcrel offset, see manual */
927 if (val >= (1 << 25) || val < -(1 << 25)) /* check for overflow */
928 as_bad ("26-bit branch offset overflow: 0x%08x", val);
929 buf[0] = (buf[0] & 0xfc) | ((val >> 24) & 0x3);
935 case SPLIT2: /* 16 bit immediate, 4-byte aligned */
937 as_bad ("16-bit immediate 4-byte alignment error: 0x%08x", val);
938 val &= ~0x3; /* 4-byte align value */
940 case SPLIT1: /* 16 bit immediate, 2-byte aligned */
942 as_bad ("16-bit immediate 2-byte alignment error: 0x%08x", val);
943 val &= ~0x1; /* 2-byte align value */
945 case SPLIT0: /* st,bla,bte,btne w/16-bit immediate */
946 if (fixP->fx_pcrel == 1)
947 val >>= 2; /* align pcrel offset, see manual */
948 /* check for bounds */
949 if (highlow != PAIR && (val >= (1 << 16) || val < -(1 << 15)))
950 as_bad ("16-bit branch offset overflow: 0x%08x", val);
951 buf[1] = (buf[1] & ~0x1f) | ((val >> 11) & 0x1f);
952 buf[2] = (buf[2] & ~0x7) | ((val >> 8) & 0x7);
953 buf[3] |= val; /* perserve bottom opcode bits */
956 case LOW4: /* fld,pfld,pst,flush 16-byte aligned */
958 as_bad ("16-bit immediate 16-byte alignment error: 0x%08x", val);
959 val &= ~0xf; /* 16-byte align value */
961 case LOW3: /* fld,pfld,pst,flush 8-byte aligned */
963 as_bad ("16-bit immediate 8-byte alignment error: 0x%08x", val);
964 val &= ~0x7; /* 8-byte align value */
966 case LOW2: /* 16 bit immediate, 4-byte aligned */
968 as_bad ("16-bit immediate 4-byte alignment error: 0x%08x", val);
969 val &= ~0x3; /* 4-byte align value */
971 case LOW1: /* 16 bit immediate, 2-byte aligned */
973 as_bad ("16-bit immediate 2-byte alignment error: 0x%08x", val);
974 val &= ~0x1; /* 2-byte align value */
976 case LOW0: /* 16 bit immediate, byte aligned */
977 /* check for bounds */
978 if (highlow != PAIR && (val >= (1 << 16) || val < -(1 << 15)))
979 as_bad ("16-bit immediate overflow: 0x%08x", val);
981 buf[3] |= val; /* perserve bottom opcode bits */
986 as_bad ("bad relocation type: 0x%02x", reloc);
992 /* should never be called for i860 */
994 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
996 addressT from_addr, to_addr;
1000 as_fatal ("i860_create_short_jmp\n");
1003 /* should never be called for i860 */
1005 md_number_to_disp (buf, val, n)
1009 as_fatal ("md_number_to_disp\n");
1012 /* should never be called for i860 */
1014 md_number_to_field (buf, val, fix)
1019 as_fatal ("i860_number_to_field\n");
1022 /* the bit-field entries in the relocation_info struct plays hell
1023 with the byte-order problems of cross-assembly. So as a hack,
1024 I added this mach. dependent ri twiddler. Ugly, but it gets
1026 /* on i860: first 4 bytes are normal unsigned long address, next three
1027 bytes are index, most sig. byte first. Byte 7 is broken up with
1028 bit 7 as pcrel, bit 6 as extern, and the lower six bits as
1029 relocation type (highlow 5-4). Next 4 bytes are long addend. */
1032 md_ri_to_chars (ri_p, ri)
1033 struct relocation_info *ri_p, ri;
1036 unsigned char the_bytes[sizeof (*ri_p)];
1039 md_number_to_chars (the_bytes, ri.r_address, sizeof (ri.r_address));
1040 /* now the fun stuff */
1041 the_bytes[4] = (ri.r_index >> 16) & 0x0ff;
1042 the_bytes[5] = (ri.r_index >> 8) & 0x0ff;
1043 the_bytes[6] = ri.r_index & 0x0ff;
1044 the_bytes[7] = ((ri.r_extern << 7) & 0x80) | (0 & 0x60) | (ri.r_type & 0x1F);
1046 md_number_to_chars (&the_bytes[8], ri.r_addend, sizeof (ri.r_addend));
1047 /* now put it back where you found it, Junior... */
1048 memcpy ((char *) ri_p, the_bytes, sizeof (*ri_p));
1052 /* should never be called for i860 */
1054 md_convert_frag (headers, fragP)
1055 object_headers *headers;
1056 register fragS *fragP;
1058 as_fatal ("i860_convert_frag\n");
1061 /* should never be called for i860 */
1063 md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
1065 addressT from_addr, to_addr;
1069 as_fatal ("i860_create_long_jump\n");
1072 /* should never be called for i860 */
1074 md_estimate_size_before_relax (fragP, segtype)
1075 register fragS *fragP;
1078 as_fatal ("i860_estimate_size_before_relax\n");
1081 /* for debugging only, must match enum reloc_type */
1082 static char *Reloc[] =
1096 static char *Highlow[] =
1105 struct i860_it *insn;
1109 fprintf (stderr, "ERROR: %s\n");
1111 fprintf (stderr, "opcode=0x%08x\t", insn->opcode);
1112 fprintf (stderr, "expand=0x%08x\t", insn->expand);
1113 fprintf (stderr, "reloc = %s\t", Reloc[insn->reloc]);
1114 fprintf (stderr, "highlow = %s\n", Highlow[insn->highlow]);
1115 fprintf (stderr, "exp = {\n");
1116 fprintf (stderr, "\t\tX_add_symbol = %s\n",
1117 insn->exp.X_add_symbol ?
1118 (S_GET_NAME (insn->exp.X_add_symbol) ?
1119 S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0");
1120 fprintf (stderr, "\t\tX_sub_symbol = %s\n",
1121 insn->exp.X_subtract_symbol ?
1122 (S_GET_NAME (insn->exp.X_subtract_symbol) ?
1123 S_GET_NAME (insn->exp.X_subtract_symbol) : "???") : "0");
1124 fprintf (stderr, "\t\tX_add_number = %d\n",
1125 insn->exp.X_add_number);
1126 fprintf (stderr, "}\n");
1131 md_parse_option (argP, cntP, vecP)
1141 * I860 relocations are completely different, so it needs
1142 * this machine dependent routine to emit them.
1145 emit_machine_reloc (fixP, segment_address_in_file)
1146 register fixS *fixP;
1147 relax_addressT segment_address_in_file;
1149 struct reloc_info_i860 ri;
1150 register symbolS *symbolP;
1151 extern char *next_object_file_charP;
1154 memset ((char *) &ri, '\0', sizeof (ri));
1155 for (; fixP; fixP = fixP->fx_next)
1158 if (fixP->fx_r_type & ~0x3f)
1160 as_fatal ("fixP->fx_r_type = %d\n", fixP->fx_r_type);
1162 ri.r_pcrel = fixP->fx_pcrel;
1163 ri.r_type = fixP->fx_r_type;
1165 if ((symbolP = fixP->fx_addsy) != NULL)
1167 ri.r_address = fixP->fx_frag->fr_address +
1168 fixP->fx_where - segment_address_in_file;
1169 if (!S_IS_DEFINED (symbolP))
1172 ri.r_symbolnum = symbolP->sy_number;
1177 ri.r_symbolnum = S_GET_TYPE (symbolP);
1179 if (symbolP && symbolP->sy_frag)
1181 ri.r_addend = symbolP->sy_frag->fr_address;
1183 ri.r_type = fixP->fx_r_type;
1186 /* preserve actual offset vs. pc + 4 */
1187 ri.r_addend -= (ri.r_address + 4);
1191 ri.r_addend = fixP->fx_addnumber;
1194 md_ri_to_chars ((char *) &ri, ri);
1195 append (&next_object_file_charP, (char *) &ri, sizeof (ri));
1201 #endif /* comment */
1205 /* on i860: first 4 bytes are normal unsigned long address, next three
1206 bytes are index, most sig. byte first. Byte 7 is broken up with
1207 bit 7 as pcrel, bit 6 as extern, and the lower six bits as
1208 relocation type (highlow 5-4). Next 4 bytes are long addend. */
1211 tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
1214 relax_addressT segment_address_in_file;
1221 know (fixP->fx_addsy);
1222 know (!(fixP->fx_r_type & ~0x3f));
1224 if (!S_IS_DEFINED (fixP->fx_addsy))
1227 r_index = fixP->fx_addsy->sy_number;
1232 r_index = S_GET_TYPE (fixP->fx_addsy);
1235 md_number_to_chars (where,
1236 r_address = fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1239 where[4] = (r_index >> 16) & 0x0ff;
1240 where[5] = (r_index >> 8) & 0x0ff;
1241 where[6] = r_index & 0x0ff;
1242 where[7] = (((fixP->fx_pcrel << 7) & 0x80)
1243 | ((r_extern << 6) & 0x40)
1244 | (fixP->fx_r_type & 0x3F));
1246 if (fixP->fx_addsy->sy_frag)
1248 r_addend = fixP->fx_addsy->sy_frag->fr_address;
1253 /* preserve actual offset vs. pc + 4 */
1254 r_addend -= (r_address + 4);
1258 r_addend = fixP->fx_addnumber;
1261 md_number_to_chars (&where[8], r_addend, 4);
1264 } /* tc_aout_fix_to_chars() */
1266 #endif /* OBJ_AOUT */
1268 /* Parse an operand that is machine-specific.
1269 We just return without modifying the expression if we have nothing
1274 md_operand (expressionP)
1275 expressionS *expressionP;
1279 /* We have no need to default values of symbols. */
1283 md_undefined_symbol (name)
1289 /* Round up a section size to the appropriate boundary. */
1291 md_section_align (segment, size)
1295 return size; /* Byte alignment is fine */
1298 /* Exactly what point is a PC-relative offset relative TO?
1299 On the i860, they're relative to the address of the offset, plus
1300 its size. (??? Is this right? FIXME-SOON!) */
1302 md_pcrel_from (fixP)
1305 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
1309 md_apply_fix (fixP, val)
1313 char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
1315 /* looks to me like i860 never has bit fixes. Let's see. xoxorich. */
1316 know (fixP->fx_bit_fixP == NULL);
1317 if (!fixP->fx_bit_fixP)
1320 /* also looks like fx_im_disp is always 0. Let's see. xoxorich. */
1321 know (fixP->fx_im_disp == 0);
1322 switch (fixP->fx_im_disp)
1325 fixP->fx_addnumber = val;
1326 md_number_to_imm (place, val, fixP->fx_size, fixP);
1329 md_number_to_disp (place,
1330 fixP->fx_pcrel ? val + fixP->fx_pcrel_adjust : val,
1333 case 2: /* fix requested for .long .word etc */
1334 md_number_to_chars (place, val, fixP->fx_size);
1337 as_fatal ("Internal error in md_apply_fix() in file \"%s\"", __FILE__);
1338 } /* OVE: maybe one ought to put _imm _disp _chars in one md-func */
1342 md_number_to_field (place, val, fixP->fx_bit_fixP);
1346 } /* md_apply_fix() */
1355 /* end of tc-i860.c */