3 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
4 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
5 (print_insn_little_arm): Likewise.
10 * i386-dis.c (fetch_data): Add prototype.
11 * m68k-dis.c (fetch_data): Add prototype.
12 (dummy_print_address): Add prototype. Make static.
13 * ppc-opc.c (valid_bo): Add prototype.
14 * sparc-dis.c (build_hash_table): Add prototype.
15 (is_delayed_branch, compute_arch_mask): Add prototypes.
16 (print_insn_sparc): Make several local variables const.
17 (compare_opcodes): Change arguments to const PTR. Add prototype.
18 * sparc-opc.c (arg): Change name field to be const.
19 (lookup_name, lookup_value): Add prototypes. Change table and
20 name parameters to be const.
21 (sparc_encode_asi): Change name parameter to be const.
22 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
23 (sparc_encode_sparclet_cpreg): Likewise.
24 (sparc_decode_asi): Change return type to be const.
25 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
26 (sparc_decode_sparclet_cpreg): Likewise.
30 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
31 Solaris doesn't like the combined options, and the -f is
33 (stamp-tshlink, install): Likewise.
37 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
42 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
46 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
51 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
56 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
60 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
65 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
66 floatformat_to_double to make portable.
67 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
72 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
73 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
77 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
78 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
83 * tic80-opc.c (LSI_SCALED): Renamed from this ...
84 (OFF_SL_BR_SCALED): ... to this, and added the flag
85 TIC80_OPERAND_BASEREL to the flags word.
86 (tic80_opcodes): Replace all occurances of LSI_SCALED with
92 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
93 Change mips_opcodes from const array to a pointer,
94 and change bfd_mips_num_opcodes from const int to int,
95 so that we can increase the size of the mips opcodes table
101 * tic80-opc.c (tic80_predefined_symbols): Revert change to
102 store BITNUM values in the table in one's complement form
103 to match behavior when assembler is given a raw numeric
104 value for a BITNUM operand.
105 * tic80-dis.c (print_operand_bitnum): Ditto.
111 * d30v-opc.c: Removed references to FLAG_X.
116 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
121 * Makefile.in: Added d30v object files.
122 * configure: (bfd_d30v_arch) Rebuilt.
123 * configure.in: (bfd_d30v_arch) Added new case.
124 * d30v-dis.c: New file.
125 * d30v-opc.c: New file.
126 * disassemble.c (disassembler) Add entry for d30v.
132 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
133 representations for the floating point BITNUM values.
137 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
138 in the table in one's complement form, as they appear in the
140 (tic80_symbol_to_value): Use macros to access predefined
142 (tic80_value_to_symbol): Ditto.
143 (tic80_next_predefined_symbol): New function.
144 * tic80-dis.c (print_operand_bitnum): Remove code that did
145 one's complement for BITNUM values.
151 * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
156 * makefile.vms: Remove 8 bit characters. Update to latest
161 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
165 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
166 (IMM24_PCREL): Likewise.
170 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
171 address for an extended PC relative instruction that is not a
176 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
182 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
183 (tic80_opcodes): Sort entries so that long immediate forms
184 come after short immediate forms, making it easier for
185 assembler to select the right one for a given operand.
190 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
192 (print_insn_mips16): Likewise.
197 * mips-opc.c: add r5900.
203 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
204 a symbol class that restricts translation to just that
205 class (general register, condition code, etc).
209 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
210 and REG_DEST_E for register operands that have to be
211 an even numbered register. Add REG_FPA for operands that
212 are one of the floating point accumulator registers.
213 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
214 (tic80_opcodes): Change entries that need even numbered
215 register operands to use the new operand table entries.
216 Add "or" entries that are identical to "or.tt" entries.
221 * mips16-opc.c: Add new cases of exit instruction for
223 * mips-dis.c (print_mips16_insn_arg): Display floating point
224 registers in operands of exit instruction. Print `$' before
225 register names in operands of entry and exit instructions.
230 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
231 pairs for all predefined symbols recognized by the assembler.
232 Also used by the disassembling routines.
233 (tic80_symbol_to_value): New function.
234 (tic80_value_to_symbol): New function.
235 * tic80-dis.c (print_operand_control_register,
236 print_operand_condition_code, print_operand_bitnum):
237 Remove private tables and use tic80_value_to_symbol function.
242 * d10v-dis.c (print_operand): Change address printing
243 to correctly handle PC wrapping. Fixes PR11490.
247 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
252 * mips-dis.c (print_insn_mips16): Set insn_info information.
253 (print_mips16_insn_arg): Likewise.
255 * mips-dis.c (print_insn_mips16): Better handling of an extend
256 opcode followed by an instruction which can not be extended.
260 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
261 coldfire moveb instruction to not allow an address register as
262 destination. Although the documentation does not indicate that
263 this is invalid, experiments uncovered unexpected behavior.
264 Added a comment explaining the situation. Thanks to Andreas
265 Schwab for pointing this out to me.
270 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
271 entries are presorted so that entries with the same mnemonic are
272 adjacent to each other in the table. Sort the entries for each
273 instruction so that this is true.
278 * m68k-dis.c: Include <libiberty.h>.
279 (print_insn_m68k): Sort the opcode table on the most significant
280 nibble of the opcode.
285 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
286 "vsub", "vst", "xnor", and "xor" instructions.
287 (V_a1): Renamed from V_a, msb of accumulator reg number.
288 (V_a0): Add macro, lsb of accumulator reg number.
292 * tic80-dis.c (print_insn_tic80): Broke excessively long
293 function up into several smaller ones and arranged for
294 the instruction printing function to be callable recursively
295 to print vector instructions that have both a load and a
296 math instruction packed into a single opcode.
297 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
298 to explain why it comes after the other vector opcodes.
303 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
304 move insns to handle immediate operands.
308 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
309 fix operand mask in the "moveml" entries for the coldfire.
314 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
315 New macros for building vector instruction opcodes.
316 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
317 FMT_LI, which were unused. The field is now a flags field.
318 Remove some opcodes that are possible, but illegal, such
319 as long immediate instructions with doubles for immediate
320 values. Add "vadd" and "vld" instructions.
324 * tic80-opc.c (tic80_operands): Reorder some table entries to make
325 the order more logical. Move the shift alias instructions ("rotl",
326 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
327 interspersed with the regular sr.x and sl.x instructions. Add
328 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
329 "sub", "subu", "swcr", and "trap".
333 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
334 (OFF_SL_PC): Renamed from OFF_SL.
335 (OFF_SS_BR): New operand type for base relative operand.
336 (OFF_SL_BR): New operand type for base relative operand.
337 (REG_BASE): New operand type for base register operand.
338 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
339 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
340 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
342 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
343 10 char field, padded with spaces on rhs, rather than a string
344 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
345 than old TIC80_OPERAND_RELATIVE. Add support for new
346 TIC80_OPERAND_BASEREL flag bit.
350 * tic80-dis.c (print_insn_tic80): Print floating point operands
352 * tic80-opc.c (SPFI): Add single precision floating point
353 immediate operand type.
354 (ROTATE): Add rotate operand type for shifts.
355 (ENDMASK): Add for shifts.
356 (n): Macro for the 'n' bit.
357 (i): Macro for the 'i' bit.
358 (PD): Macro for the 'PD' field.
359 (P2): Macro for the 'P2' field.
360 (P1): Macro for the 'P1' field.
361 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
367 * mn10200-dis.c (disassemble): Mask off unwanted bits after
368 adding in current address for pc-relative operands.
373 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
374 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
375 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
376 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
377 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
378 REG_BASE_M_SI, REG_BASE_M_LI respectively.
379 (REG_SCALED, LSI_SCALED): New operand types.
380 (E): New macro for 'E' bit at bit 27.
381 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
382 opcodes, including the various size flavors (b,h,w,d) for
383 the direct load and store instructions.
387 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
389 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
390 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
391 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
392 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
393 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
394 masks with "MASK_* & ~M_*" to get the M bit reset.
395 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
399 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
400 correctly. Add support for printing TIC80_OPERAND_BITNUM and
401 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
403 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
404 CC, SICR, and LICR table entries.
405 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
406 "bcnd", and "brcr" opcodes.
411 * ppc-opc.c (powerpc_operands): Make comment match the
412 actual fields (no shift field).
413 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
415 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
416 partial implementation, work in progress.
417 * tic80-opc.c (tic80_operands): Begin construction operands table.
418 (tic80_opcodes): Continue populating opcodes table and start
419 filling in the operand indices.
420 (tic80_num_opcodes): Add this.
425 * m68k-opc.c: Add #B case for moveq.
429 * mn10300-dis.c (disassemble): Make sure all variables are initialized
430 before they are used.
435 * v850-opc.c (v850_opcodes): Put curly-braces around operands
436 for "breakpoint" instruction.
441 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
442 (dep): Use ALL_CFLAGS rather than CFLAGS.
447 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
453 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
455 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
460 * mips16-opc.c: Add "abs".
465 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
466 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
467 (disassembler): Add bfd_arch_tic80 support to set disassemble
469 * tic80-dis.c (print_insn_tic80): Add stub.
473 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
474 * configure: Regenerate with autoconf.
475 * tic80-dis.c: Add file.
476 * tic80-opc.c: Add file.
481 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
485 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
486 (mn10200_opcodes): Use it for some logicals and btst insns.
487 Add "break" and "trap" instructions.
489 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
491 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
495 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
496 relative load or add now depends upon whether the instruction is
501 * mn10200-dis.c: Finish writing disassembler.
502 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
503 Fix mask for "jmp (an)".
505 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
506 handle endianness issues for mn10300.
508 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
512 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
513 instruction. Fix opcode field for "movb (imm24),dn".
515 * mn10200-opc.c (mn10200_operands): Fix insertion position
520 * mn10200-opc.c: Create mn10200 opcode table.
521 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
522 but moving along nicely.
526 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
530 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
531 specifiers for fmovem* instructions.
535 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
539 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
544 * mn10300-opc.c: Add some comments explaining the various
547 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
551 * m68k-dis.c (print_insn_arg): Handle new < and > operand
554 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
555 operand specifiers in fmovm* instructions.
559 * ppc-opc.c (insert_li): Give an error if the offset has the two
560 least significant bits set.
564 * mips-dis.c (print_insn_mips16): Separate the instruction from
565 the arguments with a tab, not a space.
569 * mn10300-dis.c (disasemble): Finish conversion to '$' as
572 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
577 * configure: Rebuild with autoconf 2.12.
579 Add support for mips16 (16 bit MIPS implementation):
580 * mips16-opc.c: New file.
581 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
582 (mips16_reg_names): New static array.
583 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
584 after seeing a 16 bit symbol.
585 (print_insn_little_mips): Likewise.
586 (print_insn_mips16): New static function.
587 (print_mips16_insn_arg): New static function.
588 * mips-opc.c: Add jalx instruction.
589 * Makefile.in (mips16-opc.o): New target.
590 * configure.in: Use mips16-opc.o for bfd_mips_arch.
591 * configure: Rebuild.
595 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
596 operand specifiers in *save, *restore and movem* instructions.
598 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
601 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
602 register operands for immediate arithmetic, not, neg, negx, and
603 set according to condition instructions.
605 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
606 specifier of the effective-address operand in immediate forms of
607 arithmetic instructions. The specifier for the immediate operand
608 notes how and where the constant will be stored.
612 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
615 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
618 * mn10300-dis.c (disassemble): Prefix registers with '%'.
622 * mn10300-dis.c (disassemble): Handle register lists.
624 * mn10300-opc.c: Fix handling of register list operand for
625 "call", "ret", and "rets" instructions.
627 * mn10300-dis.c (disassemble): Print PC-relative and memory
628 addresses symbolically if possible.
629 * mn10300-opc.c: Distinguish between absolute memory addresses,
630 pc-relative offsets & random immediates.
632 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
634 (disassemble): Handle SPLIT and EXTENDED operands.
638 * mn10300-dis.c: Rough cut at printing some operands.
640 * mn10300-dis.c: Start working on disassembler support.
641 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
643 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
645 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
649 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
653 * mn10300-opc.c (mn10300_opcodes): Demand parens around
654 register argument is calls and jmp instructions.
658 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
659 getx operand. Fix opcode for mulqu imm,dn.
663 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
664 in MN10300_OPERAND_SPLIT operands for how many bits
665 appear in the basic insn word. Add IMM32_HIGH24,
666 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
667 (mn10300_opcodes): Use new operands as needed.
669 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
670 for bset, bclr, btst instructions.
671 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
673 * mn10300-opc.c (mn10300_operands): Remove many redundant
674 operands. Update opcode table as appropriate.
675 (IMM32): Add MN10300_OPERAND_SPLIT flag.
676 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
680 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
681 operands (for indexed load/stores). Fix bitpos for DI
682 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
683 few instructions that insert immediates/displacements in the
684 middle of the instruction. Add IMM8E for 8 bit immediate in
685 the extended part of an instruction.
686 (mn10300_operands): Use new opcodes as appropriate.
690 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
691 sequential so the assembler never parallelizes it with
696 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
697 a data/address register that appears in register field 0
698 and register field 1.
699 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
703 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
704 standard disassembly.
706 * alpha-opc.c (alpha_operands): Rearrange flags slot.
707 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
708 Recategorize PALcode instructions.
713 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
718 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
719 there are no operand types.
724 * v850-opc.c (D9_RELAX): Renamed from D9, all references
726 (v850_operands): Make sure D22 immediately follows D9_RELAX.
731 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
736 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
737 and sst.w instructions.
739 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
745 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
750 * ppc-opc.c (PPCPWR2): Define.
751 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
756 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
757 field for movhu instruction.
760 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
761 cast value to "long" not "signed long" to keep hpux10
767 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
770 * mn10300-opc.c (FMT*): Remove definitions.
772 * mn10300-opc.c (mn10300_opcodes): Fix destination register
773 for shift-by-register opcodes.
775 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
776 into [AD][MN][01] for encoding the position of the register
781 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
782 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
786 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
787 Fix various typos. Add "PAREN" operand.
789 (mn10300_opcodes): Surround all memory addresses with "PAREN"
790 operands. Fix several typos.
792 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
797 * mn10300-opc.c (FMT_XX): Renumber starting at one.
798 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
800 (mn10300_opcodes): Break opcode format out into its own field.
801 Update many operand fields to deal with signed vs unsigned
802 issues. Fix one or two typos in the "mov" instruction
803 opcode, mask and/or operand fields.
807 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
812 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
813 all opcodes. Very rough cut at operands for all opcodes.
815 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
820 * mn10200-opc.c, mn10300-opc.c: New files.
821 * mn10200-dis.c, mn10300-dis.c: New files.
822 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
823 * disassemble.c: Break mn10x00 support into 10200 and 10300
825 * configure.in: Likewise.
826 * configure: Rebuilt.
830 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
834 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
836 * disassemble (ARCH_mn10x00): Define.
837 (disassembler): Handle bfd_arch_mn10x00.
838 * configure.in: Recognize bfd_mn10x00_arch.
839 * configure: Rebuilt.
843 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
844 accordingly. Don't declare functions using op_rtn.
849 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
850 params to be more standard.
851 * (disassemble): Print absolute addresses and symbolic names for
852 branch and jump targets.
853 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
855 * (v850_opcodes): Add breakpoint insn.
860 * m68k-opc.c: Move the fmovemx data register cases before the
861 other cases, so that they get recognized before the data register
862 does gets treated as a degenerate register list.
866 * mips-opc.c: Add a case for "div" and "divu" with two registers
867 and a destination of $0.
871 * mips-dis.c (print_insn_arg): Add prototype.
872 (_print_insn_mips): Ditto.
876 * mips-dis.c (print_insn_arg): Print condition code registers as
881 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
886 * v850-dis.c (disassemble): Make static. Provide prototype.
890 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
895 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
896 ']' characters into the output stream.
897 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
898 Add "memop" field to all opcodes (for the disassembler).
899 Reorder opcodes so that "nop" comes before "mov" and "jr"
902 * v850-dis.c (print_insn_v850): Fix typo in last change.
904 * v850-dis.c (print_insn_v850): Properly handle disassembling
905 a two byte insn at the end of a memory region when the memory
906 region's size is only two byte aligned.
908 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
910 * v850-dis.c (v850_reg_names): Define.
911 (v850_sreg_names, v850_cc_names): Likewise.
912 (disassemble): Very rough cut at printing operands (unformatted).
914 * v850-opc.c (BOP_MASK): Fix.
915 (v850_opcodes): Fix mask for jarl and jr.
917 * v850-dis.c: New file. Skeleton for disassembler support.
918 * Makefile.in Remove v850 references, they're not needed here
919 and they weren't being sanitized away.
920 * configure.in: Add v850-dis.o when building v850 toolchains.
921 * configure: Rebuilt.
922 * disassemble.c (disassembler): Call v850 disassembler.
924 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
925 (insert_d8_6, extract_d8_6): New functions.
926 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
927 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
929 (IF4A, IF4B): Use "D7" instead of "D7S".
930 (IF4C, IF4D): Use "D8_7" instead of "D8".
931 (IF4E, IF4F): New. Use "D8_6".
932 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
933 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
935 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
936 (v850_operands): Change D16 to D16_15, use special insert/extract
937 routines. New new D16 that uses the generic insert/extract code.
938 (IF7A, IF7B): Use D16_15.
939 (IF7C, IF7D): New. Use D16.
940 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
942 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
943 message. Issue an error if the branch offset is odd.
945 * v850-opc.c: Add notes about needing special insert/extract
946 for all the load/store insns, except "ld.b" and "st.b".
948 * v850-opc.c (insert_d22, extract_d22): New functions.
949 (v850_operands): Use insert_d22 and extract_d22 for
951 (insert_d9): Fix range check.
955 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
956 and set bits field to D9 and D22 operands.
960 * v850-opc.c (v850_operands): Define SR2 operand.
961 (v850_opcodes): "ldsr" uses R1,SR2.
963 * v850-opc.c (v850_opcodes): Fix opcode specs for
964 sld.w, sst.b, sst.h, sst.w, and nop.
968 * v850-opc.c (v850_opcodes): Add null opcode to mark the
969 end of the opcode table.
974 * d10v-opc.c (pre_defined_registers): Added register pairs,
975 "r0-r1", "r2-r3", etc.
980 * v850-opc.c (v850_operands): Make I16 be a signed operand.
981 Create I16U for an unsigned 16bit mmediate operand.
982 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
984 * v850-opc.c (v850_operands): Define EP operand.
985 (IF4A, IF4B, IF4C, IF4D): Use EP.
987 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
988 with immediate operand, "movhi". Tweak "ldsr".
990 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
991 correct. Get sld.[bhw] and sst.[bhw] closer.
993 * v850-opc.c (v850_operands): "not" is a two byte insn
995 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
997 * v850-opc.c (v850_operands): D16 inserts at offset 16!
999 * v850-opc.c (two): Get order of words correct.
1001 * v850-opc.c (v850_operands): I16 inserts at offset 16!
1003 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
1004 register source and destination operands.
1005 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
1007 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
1008 same thinko in "trap" opcode.
1010 * v850-opc.c (v850_opcodes): Add initializer for size field
1013 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
1014 Add D8 for 8-bit unsigned field in short load/store insns.
1015 (IF4A, IF4D): These both need two registers.
1016 (IF4C, IF4D): Define. Use 8-bit unsigned field.
1017 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
1018 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
1019 for "ldsr" and "stsr".
1020 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
1023 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
1024 short store word (sst.w).
1028 * v850-opc.c (v850_operands): Added insert and extract fields,
1029 pointers to functions that handle unusual operand encodings.
1033 * v850-opc.c (v850_opcodes): Enable "trap".
1035 * v850-opc.c (v850_opcodes): Fix order of displacement
1036 and register for "set1", "clr1", "not1", and "tst1".
1040 * v850-opc.c (v850_operands): Add "B3" support.
1041 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
1044 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
1046 * v850-opc.c: Close unterminated comment.
1050 * v850-opc.c (v850_operands): Add flags field.
1051 (v850_opcodes): add move opcodes.
1055 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
1056 * configure: (bfd_v850v_arch) Add new case.
1057 * configure.in: (bfd_v850_arch) Add new case.
1058 * v850-opc.c: New file.
1063 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
1067 * d10v-opc.c: Add additional information to the opcode
1068 table to help determinine which instructions can be done
1073 * mpw-make.sed: Update editing of include pathnames to be
1078 * arm-opc.h: Added "bx" instruction definition.
1082 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
1086 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
1090 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
1094 * makefile.vms: Update for alpha-opc changes.
1098 * i386-dis.c (print_insn_i386): Actually return the correct value.
1099 (ONE, OP_ONE): #ifdef out; not used.
1103 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
1104 Changed subi operand type to treat 0 as 16.
1108 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
1113 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
1114 memory transfer instructions. Add new format string entries %h and %s.
1115 * arm-dis.c: (print_insn_arm): Provide decoding of the new
1120 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
1121 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
1125 * alpha-dis.c (print_insn_alpha_osf): Remove.
1126 (print_insn_alpha_vms): Remove.
1127 (print_insn_alpha): Make globally visible. Chose the register
1128 names based on info->flavour.
1129 * disassemble.c: Always return print_insn_alpha for the alpha.
1133 * d10v-dis.c (dis_long): Handle unknown opcodes.
1137 * d10v-opc.c: Changes to support signed and unsigned numbers.
1138 All instructions with the same name that have long and short forms
1139 now end in ".l" or ".s". Divs added.
1140 * d10v-dis.c: Changes to support signed and unsigned numbers.
1144 * d10v-dis.c: Change all functions to use info->print_address_func.
1148 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
1149 move ccr/sr insns more strict so that the disassembler only
1150 selects them when the addressing mode is data register.
1153 * d10v-opc.c (pre_defined_registers): Declare.
1154 * d10v-dis.c (print_operand): Now uses pre_defined_registers
1155 to pick a better name for the registers.
1159 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
1160 operands for fexpand and fpmerge. From Christian Kuehnke
1165 * alpha-dis.c (print_insn_alpha): No longer the user-visible
1166 print routine. Take new regnames and cpumask arguments.
1167 Kill the environment variable nonsense.
1168 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
1169 (print_insn_alpha_vms): New function. Do VMS style regnames.
1170 * disassemble.c (disassembler): Test bfd flavour to pick
1171 between OSF and VMS routines. Default to OSF.
1175 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
1176 * configure: Rebuild.
1177 * Makefile.in (install): Use @INSTALL_SHLIB@.
1181 * configure: (bfd_d10v_arch) Add new case.
1182 * configure.in: (bfd_d10v_arch) Add new case.
1183 * d10v-dis.c: New file.
1184 * d10v-opc.c: New file.
1185 * disassemble.c (disassembler) Add entry for d10v.
1189 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
1190 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
1194 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
1195 distinguish between variants of the instruction set.
1196 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
1197 distinguish between variants of the instruction set.
1201 * i386-dis.c (print_insn_i8086): New routine to disassemble using
1202 the 8086 instruction set.
1203 * i386-dis.c: General cleanups. Make most things static. Add
1204 prototypes. Get rid of static variables aflags and dflags. Pass
1205 them as args (to almost everything).
1209 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
1211 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
1213 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
1214 if the next arg is marked with SRC_IN_DST. Gross.
1216 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
1217 we're looking for and find EXR.
1219 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
1220 if we're looking for KBIT and we don't find it.
1222 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
1225 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
1226 3bit immediate operands.
1230 * Released binutils 2.7.
1232 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
1237 * alpha-opc.c: Correct second case of "mov" to use OPRL.
1241 * sparc-dis.c (print_insn_sparclite): New routine to print
1242 sparclite instructions.
1246 * m68k-opc.c (m68k_opcodes): Add coldfire support.
1250 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
1251 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
1252 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
1256 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
1257 Use autoconf-set values.
1258 (docdir, oldincludedir): Removed.
1259 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1263 * alpha-opc.c: New file.
1264 * alpha-opc.h: Remove.
1265 * alpha-dis.c: Complete rewrite to use new opcode table.
1266 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
1267 * configure: Rebuild with autoconf 2.10.
1268 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
1269 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
1271 (alpha-opc.o): New target.
1275 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
1276 Set imm_added_to_rs1 even if the source and destination register
1279 * sparc-opc.c: Add some two operand forms of the wr instruction.
1283 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
1286 * disassemble.c (disassembler): Handle H8/S.
1287 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
1291 * sparc-opc.c: Add beq/teq as aliases for be/te.
1293 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
1298 * makefile.vms: New file.
1300 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
1304 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
1309 * i386-dis.c (OP_OFF): Call append_prefix.
1313 * ppc-opc.c (instruction encoding macros): Add explicit casts to
1314 unsigned long to silence a warning from the Solaris PowerPC
1319 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
1323 * sparc-dis.c (X_IMM,X_SIMM): New macros.
1325 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
1326 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
1327 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
1328 cpush, cpusha, cpull sparclet insns.
1332 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
1336 * sparc-opc.c: Set F_FBR on floating point branch instructions.
1337 Set F_FLOAT on other floating point instructions.
1341 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
1343 (powerpc_opcodes): Add 860/821 specific SPRs.
1347 * configure.in: Permit --enable-shared to specify a list of
1348 directories. Set and substitute BFD_PICLIST.
1349 * configure: Rebuild.
1350 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
1351 uses. Set to @BFD_PICLIST@.
1355 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
1356 not "abs", which may be needed for the absolute in something
1357 like btst #0,@10:8. Print L_3 immediates separately from other
1358 immediates. Change ABSMOV reference to ABS8MEM.
1362 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
1363 (current_arch_mask): New static global.
1364 (compute_arch_mask): New static function.
1365 (print_insn_sparc): Delete sparc_v9_p. New static local
1366 current_mach. Resort opcode table if current_mach changes.
1367 Generalize "insn not supported" test.
1368 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
1369 Delete test for v9/!v9.
1370 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
1372 (brfc): Split into CBR and FBR for coprocessor/fp branches.
1373 (brfcx): Renamed to FBRX.
1374 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
1375 coprocessor mnemonics are not supported on the sparclet).
1376 (condf): Renamed to CONDF.
1377 (SLCBCC2): Delete F_ALIAS flag.
1381 * sparc-opc.c (sparc_opcodes): rd must be 0 for
1382 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
1386 * Makefile.in (config.status): Depend upon BFD VERSION file, so
1387 that the shared library version number is set correctly.
1391 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
1393 * configure: Rebuild.
1397 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
1402 * configure: Rebuild with autoconf 2.8.
1406 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
1407 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
1411 * configure.in: Don't set SHLIB or SHLINK to an empty string,
1412 since they appear as targets in Makefile.in.
1413 * configure: Rebuild.
1417 * mpw-make.sed: Edit out shared library support bits.
1421 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
1422 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
1423 (sparc_opcodes): Add sparclet insns.
1424 (sparclet_cpreg_table): New static local.
1425 (sparc_{encode,decode}_sparclet_cpreg): New functions.
1426 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
1430 * i386-dis.c (index16): New static variable.
1431 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
1433 (OP_indirE): Return result of OP_E.
1434 (OP_E): Check for 16 bit addressing mode, and disassemble
1435 correctly. Optimised 32 bit case a little. Don't print
1436 "(base,index,scale)" when sib specifies only an offset.
1440 * configure.in: Set and substitute SHLIB_DEP.
1441 * configure: Rebuild.
1442 * Makefile.in (SHLIB_DEP): New variable.
1443 (LIBIBERTY_LISTS, BFD_LIST): New variables.
1444 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
1445 COMMON_SHLIB, add them to piclist with appropriate modifications.
1446 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
1447 here: just use piclist.
1451 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
1452 (print_insn_sparc): Rewrite v9/not-v9 tests.
1453 (compare_opcodes): Likewise.
1454 * sparc-opc.c (MASK_<ARCH>): Define.
1455 (v6,v7,v8,sparclite,v9,v9a): Redefine.
1456 (sparclet,v6notv9): Define.
1457 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
1458 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
1462 * configure.in: Call AC_PROG_CC before configure.host.
1463 * configure: Rebuild.
1465 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
1469 * i386-dis.c (onebyte_has_modrm): New static array.
1470 (twobyte_has_modrm): New static array.
1471 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
1475 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
1480 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
1485 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
1486 m68010up, not just m68020up | cpu32.
1488 * Makefile.in (SONAME): New variable.
1489 ($(SHLINK)): Make a link to the transformed name, as well.
1490 (stamp-tshlink): New target.
1491 (install): Skip stamp-tshlink during install.
1495 * configure.in: Call AC_ARG_PROGRAM.
1496 * configure: Rebuild.
1497 * Makefile.in (program_transform_name): New variable.
1498 (install): Transform library name before installing it.
1502 * i960-dis.c (mem): Add HX dcinva instruction.
1504 Support for building as a shared library, based on patches from
1506 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
1507 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
1508 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
1509 * configure: Rebuild.
1510 * Makefile.in (ALLLIBS): New variable.
1511 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
1512 (COMMON_SHLIB, SHLINK): New variables.
1513 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
1514 (STAGESTUFF): Remove variable.
1515 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
1516 (stamp-piclist, piclist): New targets.
1517 ($(SHLIB), $(SHLINK)): New targets.
1518 ($(OFILES)): Depend upon stamp-picdir.
1519 (disassemble.o): Build twice if PICFLAG is set.
1520 (MOSTLYCLEAN): Add pic/*.o.
1521 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
1522 (distclean): Remove pic and stamp-picdir.
1523 (install): Install shared libraries.
1524 (stamp-picdir): New target.
1528 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
1529 Print unknown instruction as "unknown", rather than in hex.
1533 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
1537 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
1541 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
1542 when necessary. From Ulrich Drepper
1547 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
1548 sparc_num_opcodes. Update architecture enum values.
1549 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
1550 (sparc_opcode_lookup_arch): New function.
1551 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
1552 (sparc_opcodes): Add v9a shutdown insn.
1556 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
1557 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
1559 (print_insn_sparc64): Deleted.
1560 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
1563 * sparc-opc.c (architecture_pname): Add v9a.
1567 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
1568 incorrectly defined as 0x16 when it should be 0x15.
1569 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
1570 (alpha_insn_set): added cvtst and cvttq float ops. Also added
1571 excb (exception barrier) which is defined in the Alpha
1572 Architecture Handbook version 2.
1573 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
1574 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
1575 disassembled as or, for example.
1579 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
1580 (_print_insn_mips): Change i from int to unsigned int.
1584 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
1585 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
1589 * i386-dis.c: Added Pentium Pro instructions.
1593 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
1598 * sh-opc.h (sh_nibble_type): Added REG_B.
1599 (sh_arg_type): Added A_REG_B.
1600 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
1602 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
1606 * disassemble.c (disassembler): Use new bfd_big_endian macro.
1610 * Makefile.in (distclean): Remove stamp-h. From Ronald
1616 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
1621 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
1622 (sh_table): Added many SH3 opcodes.
1623 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
1627 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
1628 (subco,subco.): Mark this PPC, not PPCCOM.
1632 * configure: Rebuild with autoconf 2.7.
1636 * configure: Rebuild with autoconf 2.6.
1640 * configure.in: Sort list of architectures. Accept but do nothing
1641 for alliant, convex, pyramid, romp, and tahoe.
1645 * a29k-dis.c (print_special): Change num to unsigned int.
1649 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
1654 * configure.in: Call AC_CHECK_PROG to find and cache AR.
1655 * configure: Rebuilt.
1659 * configure.in: Add case for bfd_i860_arch.
1660 * configure: Rebuild.
1664 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
1665 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
1666 (NEXTDOUBLE): Likewise.
1667 (print_insn_m68k): Don't match fmoveml if there is more than one
1668 register in the list.
1669 (print_insn_arg): Handle a place of '8' for a type of 'L'.
1673 * m68k-opc.c: Use #W rather than #w.
1674 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
1678 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
1679 and likewise for all the dbxx opcodes.
1683 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
1687 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
1688 the VR4100 specific instructions to the mips_opcodes structure.
1692 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
1693 ugly Metrowerks bug in CW6, is fixed in CW7.
1697 * ppc-opc.c (whole file): Add flags for common/any support.
1701 * Makefile.in (BISON): Remove macro.
1702 (FLAGS_TO_PASS): Remove BISON.
1708 * m68k-dis.c (print_insn_m68k): Recognize all two-word
1709 instructions that take no args by looking at the match mask.
1710 (print_insn_arg): Always print "%" before register names.
1711 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
1712 [case '_']: Don't print "@#" before address.
1713 [case 'J']: Use "%s" as format string, not register name.
1714 [case 'B']: Treat place == 'C' like 'l' and 'L'.
1718 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
1725 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
1726 (alpha_insn_set): added definitions for VAX floating point
1727 instructions (Unix compilers don't generate these, but handcoded
1728 assembly might still use them).
1730 * alpha-dis.c (print_insn_alpha): added support for disassembling
1731 the miscellaneous instructions in the Alpha instruction set.
1735 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
1736 no longer create sysdep.h, sed ppc-opc.c to work around a
1737 serious Metrowerks C bug.
1738 * mpw-make.in: Remove.
1739 * mpw-make.sed: New file, used by mpw-configure to edit
1740 Makefile.in into an MPW makefile.
1744 * Makefile.in (maintainer-clean): New synonym for realclean.
1748 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
1749 which use '0', '1', and '2' instead. Specify the proper size for
1750 a pmove immediate operand. Correct the pmovefd patterns to be
1751 moves to a register, not from a register.
1752 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
1756 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
1757 %psr, %wim, %tbr as F_NOTV9.
1761 * Makefile.in (Makefile): Just rebuild Makefile when running
1763 (config.h, stamp-h): New targets.
1764 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
1765 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
1766 rebuilding config.h.
1767 * configure: Rebuild.
1769 * mips-opc.c: Change unaligned loads and stores with "t,A"
1770 operands to use "t,A(b)".
1774 * sh-dis.c (print_insn_shx): Add F_FR0 support.
1778 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
1779 until 3 instead of until 2.
1783 * Makefile.in (ALL_CFLAGS): Define.
1784 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
1785 (MOSTLYCLEAN): Add config.log.
1786 (distclean): Don't remove config.log.
1787 * configure.in: Substitute HDEFINES.
1788 * configure: Rebuild.
1792 * sh-opc.h (sh_arg_type): Add F_FR0.
1793 (sh_table, case fmac): Add F_FR0 as first argument.
1797 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
1801 * sparc-dis.c: Remove all references to NO_V9.
1805 * aclocal.m4: Just include ../bfd/aclocal.m4.
1806 * configure: Rebuild.
1810 * sparc-dis.c (X_DISP19): Define.
1811 (print_insn, case 'G'): Use it.
1812 (print_insn, case 'L'): Sign extend displacement.
1816 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
1817 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
1818 host_makefile_frag or frags.
1819 * aclocal.m4: New file.
1820 * configure: Rebuild.
1821 * Makefile.in (INSTALL): Set to @INSTALL@.
1822 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
1823 (INSTALL_DATA): Set to @INSTALL_DATA@.
1825 (AR_FLAGS): Set to rc rather than qc.
1826 (CC): Define as @CC@.
1827 (CFLAGS): Set to @CFLAGS@.
1828 (@host_makefile_frag@): Remove.
1829 (config.status): Remove dependency upon @frags@.
1831 * configure.in: ../bfd/config.bfd now just sets shell variables.
1832 Use them rather than looking through target Makefile fragments.
1833 * configure: Rebuild.
1837 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
1841 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
1842 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
1845 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
1846 (lookup_{name,value}): New functions.
1847 (prefetch_table): New static local.
1848 (sparc_{encode,decode}_prefetch): New functions.
1849 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
1853 * sh-opc.h: Add blank lines to improve readabililty of sh3e
1858 * sh-dis.c: Correct comment on first line of file.
1862 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
1864 * sparc-opc.c (asi, membar): New static locals.
1865 (sparc_{encode,decode}_{asi,membar}): New functions.
1866 (sparc_opcodes, membar insn): Fix.
1867 * sparc-dis.c (print_insn): Call sparc_decode_asi.
1868 Support decoding of membar masks.
1873 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
1877 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
1878 and likewise for the other branches. Add bhs as an alias for bcc,
1879 and likewise for the size variants. Add dbhs as an alias for
1884 * sh-opc.h (FP sts instructions): Update to match reality.
1888 * m68k-dis.c: (fpcr_names): Add % before all register names.
1889 (reg_names): Likewise.
1890 (print_insn_arg): Don't explicitly print % before register names.
1891 Add % before register names in static array names. In case 'r',
1892 print data registers as `@(Dn)', not `Dn@'. When printing a
1893 memory address, don't print @# before it.
1894 (print_indexed): Change base_disp and outer_disp from int to
1895 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
1896 syntax. Sign extend 8 byte displacement correctly.
1897 (print_base): Print using MIT syntax. Print zpc when appropriate.
1898 Change parameter disp from int to bfd_vma.
1900 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
1905 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
1906 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
1907 * sh-opc.h (sh_arg_type): Add new operand types.
1908 (sh_table): Add new opcodes from SH3E Floating Point ISA.
1912 * Makefile.in (distclean): Remove generated file config.h.
1916 * Makefile.in (distclean): Remove generated file config.h.
1920 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
1922 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
1924 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
1925 rather than numopcodes. Use m68k_opcodes rather than removed
1926 opcode function. Don't check F_ALIAS.
1927 (print_insn_arg): Change first parameter to be const char *.
1928 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
1929 (m68k-opc.o): New target.
1930 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
1931 * configure: Rebuild.
1935 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
1936 (opcode_bits, opcode_hash_table): New variables.
1937 (opcodes_initialized): Renamed from opcodes_sorted.
1938 (build_hash_table): New function.
1939 (is_delayed_branch): Use hash table.
1940 (print_insn): Renamed from print_insn_sparc, made static.
1941 Build and use hash table. If !sparc64, ignore sparc64 insns,
1942 and vice-versa if sparc64.
1943 (print_insn_sparc, print_insn_sparc64): New functions.
1944 (compare_opcodes): Move sparc64 opcodes to end.
1945 Print commutative insns with constant second.
1946 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
1950 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
1951 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
1952 avoids printing a delay slot in a delay slot.
1953 * sh-opc.h (sh_table): Fully bracket last entry.
1957 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
1961 * configure.in: Get host_makefile_frag from ${srcdir}.
1963 * configure.in: Autoconfiscated. Check for string[s].h. Create
1964 config.h from config.in. Don't set up sysdep.h link.
1965 * sysdep.h: New file.
1966 * configure, config.in: New files, generated from configure.in.
1967 * Makefile.in: Updated to be processed autoconf-style.
1968 (distclean): Keep sysdep.h. Remove config.log and config.cache.
1969 (Makefile): Depend on config.status.
1970 (config.status): New rule.
1971 * configure.bat: Update Makefile substitutions.
1975 * mips-opc.c (L1): Define.
1976 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
1977 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
1982 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
1983 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
1984 have multiple add units but only a single logical unit.
1986 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
1987 shifted by 18, without any insertion or extraction function.
1988 (insert_cr, extract_cr): Remove.
1993 * Makefile.in (ALL_MACHINES): Add arc-dis.o and arc-opc.o.
1998 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
2003 * mpw-config.in: Add sh and i386 configs, remove sparc config.
2004 * sh-opc.h: Add copyright.
2008 * Makefile.in (crunch-m68k): Delete extra target accidentally
2009 checked in a while ago.
2013 * sh-opc.h (sh_table): Add SH3 support.
2017 * sh-opc.h: Added bsrf and braf.
2021 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
2022 bogus [ls]fm{ea,fd} patterns.
2024 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
2025 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
2026 initialize it from memory. Make function static.
2027 (print_insn_{big,little}_arm): New functions.
2028 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
2029 the correct endianness.
2034 * arc-opc.c (arc_opcodes): Add ARC_OPCODE_CONDITIONAL_BRANCH flag.
2035 (arc_suffixes): Use ARC_DELAY_{NONE,NORMAL,JUMP}.
2040 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
2045 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
2046 17th, so that it builds again using GCC as the compiler.
2050 * mips-dis.c (print_insn_little_mips): Cast return value from
2051 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
2052 expects an unsigned long, and that might be fewer words of
2053 argument storage (e.g., if bfd_vma is long long on a 32-bit
2055 (print_insn_big_mips): Likewise with bfd_getb32 value.
2056 (_print_insn_mips): Now static.
2060 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
2061 gcc memory hog problem with initializer is fixed.
2066 * arc-opc.c (NULL): Define.
2067 (arc_operands, insn fields u,s): Delete.
2068 (arc_operands, insn fields a,b,c): Mark as signed.
2069 (arc_opcodes): No longer const, links computed at run-time.
2070 (arc_opcodes, mac/mul insns): Breakout suffixes as we don't handle
2071 suffixes that affect the insn code.
2072 (arc_opcodes): Resort table to macros are first.
2073 (arc_opcodes, ld [b,c] entry): Add %Q to prevent shimms.
2074 (arc_opcodes, st [b] entry): Likewise.
2075 (arc_opcodes, st [b,d] entry): Fix mask, value.
2076 (arc_reg_names): Add entries for r29, r30, r31, r60.
2077 (opcode_map, icode_map): New static globals.
2078 (arc_opcode_init_tables): Initialize them.
2079 (arc_opcode_lookup_asm, arc_opcode_lookup_dis): New functions.
2080 (insert_shimmoffset): Signal error if register present.
2082 * arc-dis.c (print_insn): Call arc_opcode_lookup_dis.
2087 Merge in support for Mac MPW as a host.
2088 (Old change descriptions retained for informational value.)
2090 * mpw-config.in (archname): Compute from the config.
2091 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
2093 * mpw-config.in (target_arch): Compute from canonical target.
2094 (m68k, mips, powerpc, sparc): Add architectures.
2095 * mpw-make.in (disassemble.c.o): Add.
2096 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
2098 * mpw-config.in (BFD_MACHINES): Set to a default value.
2099 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
2101 * mpw-make.in (CSEARCH): Add extra-include to search path.
2103 * mpw-config.in (varargs.h): Don't create.
2104 (sysdep.h): Create using forward-include.
2105 * mpw-make.in (CSEARCH): Add include/mpw to search path.
2107 * mpw-config.in: New file, MPW version of configure.in.
2108 * mpw-make.in: New file, MPW version of Makefile.in.
2113 * arc-dis.c (print_insn): New parameter `big_p'. Callers updated.
2114 Call arc_get_opcode_mach to map bfd mach number to opcode value.
2115 (print_insn_*): Pass bfd mach number, not opcode version.
2116 * arc-opc.c (arc_get_opcode_mach): New function.
2121 * alpha-dis.c (print_insn_alpha): Put empty statement after
2126 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
2127 (low_sign_extend): Likewise.
2128 (get_field): Delete unused function.
2129 (set_field, deposit_14, deposit_21): Likewise.
2133 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
2140 * alpha-opc.h (OSF_ASMCODE): define
2141 print pal-code names as defined in App C of the
2142 Alpha Architecture Reference Manual
2144 * alpha-dis.c: cleaned up output
2145 print stylized code forms as defined in App A.4.3 of the
2146 Alpha Architecture Reference Manual
2150 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
2152 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
2157 * m68k-dis.c (opcode): New function. Returns address of opcode
2158 table entry given index, even if the opcode table was split to
2159 work around gcc bugs.
2160 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
2162 (BREAK_UP_BIG_DECL): Make secondary array static and const.
2163 (reg_names): Now const.
2164 (print_insn_arg): Arrays cacheFieldName and names now const.
2165 (print_indexed): Array scales now const.
2170 * arc-dis.c (print_insn_arc_base): Split into big and little fns.
2171 (print_insn_arc_{host,graphics,audio}): Likewise.
2172 (print_insn): Add prototype.
2173 (arc_get_disassembler): New arg `big_p'. Return little or big
2174 print fn accordingly.
2175 * arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once.
2176 (arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order.
2177 (arc_opval_supported): Likewise.
2178 * disassemble.c (disassembler): Pass big endian flag to
2179 arc_get_disassembler.
2184 * ppc-opc.c: Sort recently added instructions by minor opcode
2185 number within major opcode number.
2189 * hppa-dis.c: Include libhppa.h.
2193 * mips-opc.c: Change dli to use M_DLI, and add dla.
2197 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
2202 * arc-dis.c (arc_get_disassembler): Change argument to int,
2203 one of bfd_mach_arc_xxx. All callers updated.
2208 * mips-opc.c: Add r4650 mul instruction.
2212 * mips-opc.c: Add uld and usd macros for unaligned double load and
2217 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
2218 mfdcr, mtdcr, icbt, iccci.
2223 * arc-dis.c (print_insn): Handle ARC_OPERAND_ADDRESS.
2224 * arc-opc.c (arc_operands): New operand 'J' for jump addresses.
2225 ('L' operand): Mark as ARC_OPERAND_ADDRESS.
2226 (arc_opcodes, j insn): Use 'J' operand type, not 'L'.
2227 (arc_opcodes, ld/st insns): Fix address writeback operand letter.
2228 (insert_absaddr): New function.
2232 * arc-dis.c (print_insn_arc): Rename to print_insn and make static.
2233 New argument `cpu', pass it to arc_opcode_init_tables.
2234 Document byte order dependencies. Ignore unsupported insns.
2235 (arc_get_disassembler): New function.
2236 (print_insn_arc_base, print_insn_arc_host, print_insn_arc_graphics,
2237 print_insn_arc_audio): New functions.
2238 * arc-opc.c (MULTSHIFT operand): Delete.
2239 (UNSIGNED, SATURATION): New operands.
2240 (mac, mul, mul64, mulu64): New insns.
2241 (ext. asl, asr, lsr, ror): Only available on host and graphics cpus.
2242 (padc, padd, pmov, pand, psbc, psub, swap): New insns.
2243 (host,graphics,audio extended and auxiliary regs): Define.
2244 (ss, sc, mh, ml): New suffixes.
2245 (arc_opcode_supported, arc_opval_supported): New functions.
2246 (insert_multshift, extract_multshift): Deleted.
2247 * disassemble.c (disassembler, case bfd_arch_arc): Call
2248 arc_get_disassembler to get disassembler routine.
2253 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
2254 signed char fields to shorts, more portable.
2258 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
2259 char fields as signed chars, since they may have negative values.
2263 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
2269 * ppc-opc.c (extract_bdm): Correct parenthezisation.
2270 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
2275 * ppc-opc.c: Changes based on patch from David Edelsohn
2277 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
2280 (insert_tbr): New static function.
2281 (extract_tbr): New static function.
2282 (XFXFXM_MASK, XFXM): Define.
2283 (XSPRBAT_MASK, XSPRG_MASK): Define.
2284 (powerpc_opcodes): Add instructions to access special registers by
2285 name. Add mtcr and mftbu.
2289 * mips-opc.c (P3): Define.
2290 (mips_opcodes): Add mad and madu.
2292 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
2294 * configure.in: Add W65 support.
2295 * disassemble.c: Likewise.
2296 * w65-opc.h, w65-dis.c: New files.
2300 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
2306 * arc-dis.c (print_insn_arc): Branch offsets are relative to delay
2308 * arc-opc.c (extract_reladdr): New function.
2309 (insert_reladdr): Store address right-shifted by 2.
2314 * mips-opc.c: Add dli as a synonym for li.
2319 * arc-opc.c (insertion fns): Pass pointer to value's table entry.
2321 (extraction fns): Insn argument now array of two words. Return pointer
2322 to value's table entry. All uses changed.
2323 (arc_opcode_lookup_suffix): Exported for arc-dis.c.
2324 (insert_multshift, extract_multshift): New fns.
2325 (arc_operands): Add support for cache bypass suffix. Add support for
2326 predefined aux regs. Modifier bits moved to flags field.
2327 (arc_opcodes): Likewise.
2328 Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed.
2329 New insn rlc. Update to syntax in programmer's manual.
2330 (arc_reg_names): Fix typo in lp_count. Add predefined aux regs.
2331 (arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache
2333 (arc_opcode_init_tables): New argument to indicate cpu type.
2334 (insert_reg): Handle predefined aux regs.
2335 (extract_reg): Likewise.
2336 (lookup_register): New fn.
2337 * arc-dis.c (arc_condition_codes): Deleted.
2338 (print_insn_arc): Handle insns with 32 bit immediate constants better.
2339 Clean up modifier handling. Handle predefined aux regs.
2344 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
2345 print something for reserved opcode values, even if it won't
2348 * mips-dis.c (_print_insn_mips): When initializing, shift right
2349 and mask, to avoid sign extension problems on the Alpha.
2351 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
2357 * configure.in: Add ARC support.
2358 * disassemble.c: Likewise.
2359 * arc-dis.c, arc-opc.c: New files.
2364 * sh-opc.h (mov.l gbr): Get direction right.
2365 * sh-dis.c (print_insn_shx): New function.
2366 (print_insn_shl, print_insn_sh): Call print_insn_shx to
2367 print opcodes with right byte order.
2371 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
2372 to avoid conflicts with getopt.
2376 * hppa-dis.c (print_insn_hppa): Read the instruction using
2377 bfd_getb32, so that it works on a little endian or 64 bit host.
2378 Remove unused local variable op.
2382 * mips-opc.c: Use or instead of addu for pseudo-op move, since
2383 addu does not work correctly if -mips3.
2387 * a29k-dis.c (print_special): Add special register names defined
2388 on 29030, 29040 and 29050.
2389 (print_insn): Handle new operand type 'I'.
2393 * Makefile.in (INSTALL): Use top level install.sh script.
2397 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
2398 that it works on a little endian host.
2402 * configure.in: Use ${config_shell} when running config.bfd.
2406 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
2410 * a29k-dis.c (print_insn): Print the opcode.
2414 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
2418 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
2422 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
2423 which store a value into memory.
2427 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
2428 * arm-dis.c, arm-opc.h: New files.
2432 * Makefile.in (ns32k-dis.o): Add dependency.
2433 * ns32k-dis.c (print_insn_arg): Declare initialized local as
2434 string, not as array of chars.
2438 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
2440 * sparc-opc.c: Added sparclite extended FP operations, and
2441 versions of v9 impdep* instructions permitting specification of
2446 * i960-dis.c (reg_names): Now const.
2447 (struct sparse_tabent): New type, copied from array type in mem
2449 (ctrl): Local static array ctrl_tab now const.
2450 (cobr): Local static array cobr_tab now const.
2451 (mem): Local variables reg1, reg2, reg3 now point to const. Local
2452 static variable mem_tab no longer explicitly initialized. Changed
2453 mem_init to const array of struct sparse_tabent.
2454 (reg): Local static variable reg_tab no longer explicitly
2455 initialized. Changed reg_init to const array of struct
2457 (ea): Local static array scale_tab now const.
2459 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
2464 * configure.bat: the disassember needs to be enabled for
2465 "objdump -d" to work in djgpp.
2469 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
2470 (invalid_float): Enabled general version, doesn't require running
2471 on ns32k host. Changed to take char* argument, and test for
2472 explicitly specified sizes, instead of using sizeof() on host CPU
2474 (INVALID_FLOAT): Cast first argument.
2475 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
2476 list_P032, list_M032): Now const.
2477 (optlist, list_search): Made appropriate arguments now point to
2479 (print_insn_arg): Changed static array of one-character-string
2480 pointers into a static const array of characters; fixed sprintf
2481 statement accordingly.
2485 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
2486 from distribution. A ns32k-dis.c from a previous distribution has
2487 been brought up to date and supports the new interface.
2489 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
2491 * configure.in: add bfd_ns32k_arch target support.
2493 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
2494 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
2498 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
2503 * h8300-dis.c, mips-dis.c: Don't use true and false.
2507 * configure.in: Change --with-targets to --enable-targets.
2511 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
2512 opcodes to the first instruction with that opcode, to speed
2518 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
2522 * configure.bat: update to latest makefile.in
2526 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
2527 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
2528 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
2529 slot insn is in a delay slot.
2530 * z8k-opc.h: (resflg): Fix patterns.
2531 * h8500-opc.h Fix CR insn patterns.
2535 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
2536 "cmpl" before POWER versions, so that gas -many uses them.
2540 * disassemble.c: New file.
2541 * Makefile.in (OFILES): Add disassemble.o.
2542 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
2543 * configure.in: Define ARCHDEFS in Makefile. Code taken from
2544 binutils/configure.in.
2546 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
2547 opcode being examined.
2551 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
2552 (insert_ral, insert_ram, insert_ras): New functions.
2553 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
2554 RAS for store with update.
2558 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
2563 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
2568 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
2572 * ppc-opc.c (powerpc_operands): The signedp field has been
2573 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
2574 instead. Add new operand SISIGNOPT.
2575 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
2577 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
2582 * i386-dis.c (struct private): Renamed to dis_private. `private'
2583 is a reserved word for dynix cc.
2587 * configure.in: Change error message to refer to bfd/config.bfd
2588 rather than bfd/configure.in.
2592 * ppc-opc.c: Define POWER2 as short alias flag.
2593 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
2598 * i960-dis.c (print_insn_i960): Don't read a second word for
2599 opcodes 0, 1, 2 and 3.
2603 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
2607 * m68881-ext.c: Removed; no longer used.
2608 * Makefile.in: Changed accordingly.
2610 * m68k-dis.c (ext_format_68881): Don't declare.
2611 (print_insn_m68k): If an instruction uses place 'i', it uses at
2612 least four fixed bytes.
2613 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
2614 extended float, convert to double using floatformat_to_double, not
2615 ieee_extended_to_double, and fetch the data before converting it.
2619 * mips-opc.c: It's sqrt.s, not sqrt.w. From
2624 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
2625 PowerPC uses bdnz[l][a].
2629 * dis-buf.c, i386-dis.c: Include sysdep.h.
2633 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
2635 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
2636 by Motorola PowerPC 601 with PPC_OPCODE_601.
2637 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
2638 Disassemble Motorola PowerPC 601 instructions as well as normal
2639 PowerPC instructions.
2643 * i960-dis.c (reg, mem): Just use a static array instead of
2648 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
2649 condition name index if this is for a negated condition.
2651 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
2652 Floating point format for 'H' operand is backwards from normal
2653 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
2654 operands (fmpyadd and fmpysub), handle bizarre register
2655 translation correctly for single precision format.
2657 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
2658 or 'I' operands if the next format specifier is 'M' (fcmp
2659 condition completer).
2663 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
2664 single number giving a bitmask for the MB and ME fields of an M
2665 form instruction. Change NB to accept 32, and turn it into 0;
2666 also turn 0 into 32 when disassembling. Seperated SH from NB.
2667 (insert_mbe, extract_mbe): New functions.
2668 (insert_nb, extract_nb): New functions.
2669 (SC_MASK): Mask out SA and LK bits.
2670 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
2671 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
2672 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
2673 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
2674 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
2675 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
2676 (powerpc_macros): Define table of macro definitions.
2677 (powerpc_num_macros): Define.
2679 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
2680 if PPC_OPERAND_NEXT is set.
2684 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
2685 char. Retrieve contents using bfd_getl32 instead of shifting.
2689 * ppc-opc.c: New file. Opcode table for PowerPC, including
2690 opcodes for POWER (RS/6000).
2691 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
2692 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
2693 (CFILES): Add ppc-dis.c.
2694 (ppc-dis.o, ppc-opc.o): New targets.
2695 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
2699 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
2700 No space before 'u', 'f', or 'N'.
2704 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
2705 farther than we should.
2707 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
2711 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
2715 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
2716 needs it, to prevent reading past the end of a section.
2720 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
2721 Removed t,A case for la; always use t,A(b) case.
2726 * mips-dis.c (print_insn_arg): Handle 'k'.
2727 * mips-opc.c: Make cache use k, not t.
2731 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
2732 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
2733 FLOAT_FORMAT_CODE to put out floating point register names.
2737 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
2741 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
2745 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
2746 larger than 32. Moved dsxx32 variants first for disassembler.
2750 * z8kgen.c, z8k-opc.h: Add full lda information.
2754 * hppa-dis.c (print_insn_hppa): Do not emit a space after
2755 movb instructions. Any necessary space will be emitted by
2756 the code to handle nullification completers.
2760 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
2764 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
2765 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
2769 * mips-opc.c: Correct lwu opcode value (book had it wrong).
2773 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
2774 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
2778 * m88k-dis.c (m88kdis): comment change. Remove space after
2780 (printop): handle new arg types DEC and XREG for m88110.
2784 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
2785 type for absolute branch addresses. Delete special
2786 "ble" and "be" code in 'W' operand code.
2790 * mips-opc.c: Set hazard information correctly for branch
2791 likely instructions.
2795 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
2796 info->fprintf_func for printing and info->print_address_func for
2801 * mips-opc.c: Set INSN_TRAP for tXX instructions.
2806 Corrected second case of "b" for disassembler.
2810 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
2811 to BFD swapping routines to correspond to BFD name changes.
2815 * mips-opc.c: Change div machine instruction to be z,s,t rather
2816 than s,t. Change div macro to be d,v,t rather than d,s,t.
2817 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
2818 rem and remu which generates only the corresponding div
2819 instruction. This is for compatibility with the MIPS assembler,
2820 which only generates the simple machine instruction when an
2821 explicit destination of $0 is used.
2822 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
2827 WR_31 hazard for bal, bgezal, bltzal.
2831 * hppa-dis.c (print_insn_hppa): Use print function
2832 from within the disassemble_info, not fprintf_filtered.
2836 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
2841 * mips-opc.c ("absu"): Removed.
2846 * mips-opc.c: Added r6000 and r4000 instructions and macros.
2847 Changed hazard information to distinguish between memory load
2848 delays and coprocessor load delays.
2852 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
2856 * configure.in: Don't pass cpu to config.bfd.
2860 * m88k-dis.c (m88kdis): Make class unsigned.
2864 * alpha-dis.c (print_insn_alpha): One branch format case was
2865 missing the instruction name.
2869 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
2870 Add the arch-specific auxiliary files.
2871 (OFILES): Remove the arch-specific auxiliary files
2872 and use BFD_MACHINES instead of DIS_LIBS.
2873 * configure.in: Set BFD_MACHINES based on --with-targets option.
2877 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
2882 * sparc-opc.c: Change CONST to const to deal with gcc
2883 -Dconst=__const -traditional.
2888 coprocessor instructions out of #if 0, and made them use new
2893 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
2897 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
2898 instruction, for use by the disassembler.
2900 * sparc-dis.c (SEX): Add sign extension macro. Replace many
2901 hand-coded sign extensions that depended on 32-bit host ints.
2902 FIXME, we still depend on big-endian host bitfield ordering.
2903 (sparc_print_insn): Set the insn_info_valid field, and the
2904 other fields that describe the instruction being printed.
2908 * sparc-opc.c (call): Accept all 6 addressing modes valid for
2909 `jmp' instead of just one of them.
2913 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
2914 (fput_fp_reg_r): Renamed from fput_reg_r.
2915 (fput_fp_reg): New function.
2916 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
2918 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
2920 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
2924 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
2926 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
2927 don't output a space.
2929 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
2933 * mips-opc.c: New file, containing opcode table from
2934 ../include/opcode/mips.h.
2935 * Makefile.in: Add it.
2939 * m88k-dis.c: New file, moved in from gdb and changed to use the
2940 new dis-asm.h disassembler interface.
2941 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
2942 (m88k-dis.o): New target.
2946 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
2947 argument string const char * to correspond to opcode/mips.h.
2951 * mips-dis.c: Updated to account for name changes in new version
2953 * Makefile.in: Added header file dependencies.
2957 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
2961 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
2962 extend, rather than shifts.
2966 * Makefile.in: Undo 15 June change.
2970 * m68k-dis.c (print_insn_arg): Change return value to byte count
2972 * m68k-dis.c: Re-write to detect invalid operands before
2973 printing anything, so we can handle this the same way we
2974 handle invalid opcodes.
2978 * sh-dis.c, sh-opc.h: Understand some more opcodes.
2982 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
2987 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
2989 * configure.in: Do make sysdep.h link.
2990 * Makefile.in: Search ../include. Don't search ../bfd.
2995 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
2996 Do not print a space before the completers specified by
3001 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
3002 defined, since gdb has been fixed.
3005 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
3006 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
3007 be a *disassemble_info, not a *FILE.
3008 * hppa-dis.c: Support 'd', '!', and 'a'.
3009 * hppa-dis.c: Support 's' to extract a 2 bit space register.
3010 * hppa-dis.c: Delete cases which are no longer needed.
3014 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
3018 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
3023 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
3024 * configure.in: No longer need to configure to get sysdep.h.
3029 * hppa-dis.c: Support 'I', 'J', and 'K' in output
3030 templates for 1.1 FP computational instructions.
3034 * h8500-dis.c (print_insn_h8500): Address argument is type
3036 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
3039 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
3040 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
3042 * sparc-dis.c (compare_opcodes): Move static declaration to
3047 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
3048 instruction, remove unimp hack from 'l' argument.
3052 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
3058 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
3063 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
3064 arrays of string pointers to 2-d arrays of chars, to save
3069 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
3070 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
3074 * hppa-dis.c: New file from Utah, adapted to new disassembler
3076 * Makefile.in: Include it.
3080 * sh-dis.c, sh-opc.h: New files.
3084 * alpha-dis.c, alpha-opc.h: New files.
3088 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
3093 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
3097 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
3102 * sparc-dis.c: Use fprintf_func a few places where I forgot,
3103 and double percent signs a few places.
3105 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
3107 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
3108 Use info->print_address_func not print_address.
3110 * dis-buf.c (generic_print_address): New function.
3114 * Makefile.in: Add sparc-dis.c.
3115 sparc-dis.c: New file, merges binutils and gdb versions as follows:
3117 Add `add' instruction to the set that get checked
3118 for a preceding `sethi' in order to print an absolute address.
3119 * (print_insn): Disassembly prefers real instructions.
3120 (is_delayed_branch): Speed up.
3121 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
3122 Still missing some float ops, and needs testing.
3123 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
3124 F_ALIAS. Use printf, not fprintf, when not passing a file
3126 (compare_opcodes): Check that identical instructions have
3127 identical opcodes, complain otherwise.
3130 * Include reg_names.
3132 Use dis-asm.h/read_memory_func interface.
3136 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
3137 deliberately return non-zero to setjmp from longjmp. Otherwise
3138 this code fails to compile.
3142 * m68k-dis.c: Fix prototype for fetch_arg().
3146 * dis-buf.c: New file, for new read_memory_func interface.
3147 Makefile.in (OFILES): Include it.
3148 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
3149 Use new read_memory_func interface.
3153 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
3154 * h8500-opc.h: Fix couple of opcodes.
3156 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
3158 * Makefile.in: add dvi & installcheck targets
3162 * Makefile.in: Update for h8500-dis.c.
3166 * h8500-dis.c, h8500-opc.h: New files
3170 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
3171 ../include/dis-asm.h.
3172 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
3173 and ../gdb/m68k-pinsn.c).
3174 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
3175 and ../gdb/i386-pinsn.c).
3176 * m68881-ext.c: New file. Moved definition of
3177 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
3178 * Makefile.in: Adjust for new files.
3180 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
3181 can be dis-assembled.
3185 * mips-dis.c (print_insn_arg): Now returns void.
3189 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
3190 files that use the macros.
3194 * mips-dis.c: New file, from gdb/mips-pinsn.c.
3195 * Makefile.in (DIS_LIBS): Added mips-dis.o.
3196 (CFILES): Added mips-dis.c.
3200 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
3201 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
3205 * Makefile.in: Improve *clean rules.
3206 * configure.in: Allow a default host.
3208 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
3210 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
3211 files include other sysdep files
3215 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
3219 * configure.in: For host support, use ../bfd/configure.host
3220 so it stays in sync with the ../bfd/hosts database.
3222 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
3224 * configure.in: use cpu-vendor-os triple instead of nested cases
3228 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
3229 *always* the wrong one.
3233 * z8kgen.c: added copyright info
3237 * z8k-dis.c (unparse_instr): prettier tabs
3238 * z8kgen.c -> z8k-opc.h: bug fixes in tables
3240 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
3242 * configure.in: Add ncr* configuration.
3243 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
3244 picayune ANSI compilers happy.
3248 * configure.in (i386): Make i386 and i486 synonymous for now.
3249 * configure.in (i[34]86-*-sysv4): Add my_host definition.
3253 * Makefile.in (install): Fix typo.
3257 * Makefile.in (make): Remove obsolete crud.
3258 (sparc-opc.o): Avoid Sun Make VPATH bug.
3262 * Makefile.in: since there are no SUBDIRS, remove rule and
3263 references of subdir_do.
3267 * Makefile.in (install): Get the library name right here too.
3268 Don't install bfd.h, since it's unrelated to this library. No
3269 subdirs to recurse into, either.
3270 (CFILES): The source file has a .c suffix, not .o.
3272 * sparc-opc.c: New file, moved from BFD.
3273 * Makefile.in (OFILES): Build it.
3277 * z8k-dis.c: fixed forward refferences of some declarations.
3281 * Makefile.in: get the name of the library right
3285 * z8k-dis.c: knows how to disassemble z8k stuff
3286 * z8k-opc.h: new file full of z8000 opcodes
3290 version-control: never