3 * mips-opc.c: Fix file header comment.
7 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
8 print_insn_cris_with_register_prefix.
12 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
16 * cgen-dis.in (print_insn): All insns which can fit into insn_value
17 must be loaded there in their entirety.
21 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
22 (compute_arch_mask): Add v8plusb and v9b machines.
23 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
24 * opcodes/sparc-opc.c: Support for Cheetah instruction set.
25 (prefetch_table): Add #invalidate.
29 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
33 * fr30-desc.h: Regenerate.
34 * m32r-desc.h: Regenerate.
35 * m32r-ibld.c: Regenerate.
39 * ia64-ic.tbl: Update from Intel.
40 * ia64-asmtab.c: Regenerate.
44 * ia64-gen.c: Convert C++-style comments to C-style comments.
45 * tic54x-dis.c: Likewise.
49 Changes to add dollar prefix to registers for files where user symbols
50 don't have a leading underscore. Fix formatting.
51 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
52 (format_reg): Add parameter with_reg_prefix. All callers changed.
53 (print_with_operands): Ditto.
54 (print_insn_cris_generic): Renamed from print_insn_cris, add
55 parameter with_reg_prefix.
56 (print_insn_cris_with_register_prefix,
57 print_insn_cris_without_register_prefix, cris_get_disassembler):
59 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
63 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
65 * ia64-asmtab.c: Regenerate.
67 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
68 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
69 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
70 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
71 * ia64-asmtab.c: Regnerate.
75 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
76 Add mfc0 and mtc0 with sub-selection values.
77 Add clo and clz opcodes.
78 Add msub and msubu instructions for MIPS32.
79 Add madd/maddu aliases for mad/madu for MIPS32.
80 Support wait, deret, eret, movn, pref for MIPS32.
81 Support tlbp, tlbr, tlbwi, tlbwr.
84 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
85 (print_insn_arg): Handle 'H' args.
86 (set_mips_isa_type): Recognize 4K.
87 Use CPU_* defines instead of hardcoded numbers.
91 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
92 (d30v_format_tab): Use Rb2 for modinc and moddec.
96 * d30v-opc.c (d30v_format_tab): Use format Ra for
101 * configure: Rebuilt with new libtool.m4.
105 * configure: Regenerate.
106 * po/opcodes.pot: Regenerate.
110 * acinclude.m4: Include libtool and gettext macros from the
112 * aclocal.m4, configure: Rebuilt.
116 * tic80-dis.c: Fix formatting.
120 * w65-dis.c: Fix formatting.
124 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
125 (powerpc_opcodes): Add table entries for PPC 405 instructions.
126 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
127 instructions. Added extended mnemonic mftbl as defined in the
128 405GP manual for all PPCs.
132 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
133 call. Change last goto to use failed instead of done.
137 * cgen-ibld.in (cgen_put_insn_int_value): New function.
138 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
139 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
140 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
141 * cgen-dis.in (read_insn): New static function.
142 (print_insn): Use read_insn to read the insn into the buffer and set
144 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
146 * fr30-asm.c: Regenerated.
147 * fr30-desc.c: Regenerated.
148 * fr30-desc.h Regenerated.
149 * fr30-dis.c: Regenerated.
150 * fr30-ibld.c: Regenerated.
151 * fr30-opc.c: Regenerated.
152 * fr30-opc.h Regenerated.
153 * m32r-asm.c: Regenerated.
154 * m32r-desc.c: Regenerated.
155 * m32r-desc.h Regenerated.
156 * m32r-dis.c: Regenerated.
157 * m32r-ibld.c: Regenerated.
158 * m32r-opc.c: Regenerated.
162 * tic30-dis.c: Fix formatting.
166 * sh-dis.c: Fix formatting.
170 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
174 * z8k-dis.c: Fix formatting.
178 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
179 break, mov-immediate, nop.
180 * ia64-opc-f.c: Delete fpsub instructions.
181 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
182 address operand. Rewrite using macros to avoid long lines.
183 * ia64-opc.h (POSTINC): Define.
184 * ia64-asmtab.c: Regenerate.
188 * ia64-ic.tbl: Add missing entries.
192 * i860-dis.c (print_br_address): Change third argument from int
197 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
198 for MLI templates. Handle IA64_OPND_TGT64.
202 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
207 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
211 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
212 Change return type from void to int. Check the combination
213 of operands, return 1 if valid. Fix to avoid BUF overflow.
214 Report undefined combinations of operands in COMMENT.
215 Report internal errors to stderr. Output the adiw/sbiw
216 constant operand in both decimal and hex.
217 (print_insn_avr): Disassemble ldd/std with displacement of 0
218 as ld/st. Check avr_operand () return value, handle invalid
219 combinations of operands like unknown opcodes.
223 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
224 (run-cgen, stamp-m32r, stamp-fr30): New targets.
225 * Makefile.in: Regenerate.
226 * configure.in: Add --enable-cgen-maint option.
227 * configure: Regenerate.
231 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
232 (cgen_hw_lookup_by_num): Ditto.
233 (cgen_operand_lookup_by_name): Ditto.
234 (print_address): Ditto.
235 (print_keyword): Ditto.
236 * cgen-dis.c (hash_insn_array): Mark unused parameters with
238 * cgen-asm.c (hash_insn_array): Mark unused parameters with
240 (cgen_parse_keyword): Ditto.
244 * i860-dis.c: New file.
245 (print_insn_i860): New function.
246 (print_br_address): New function.
247 (sign_extend): New function.
248 (BITWISE_OP): New macro.
249 (I860_REG_PREFIX): New macro.
250 (grnames, frnames, crnames): New structures.
252 * disassemble.c (ARCH_i860): Define.
253 (disassembler): Add check for bfd_arch_i860 to set disassemble
254 function to print_insn_i860.
256 * Makefile.in (CFILES): Added i860-dis.c.
257 (ALL_MACHINES): Added i860-dis.lo.
258 (i860-dis.lo): New dependences.
260 * configure.in: New bits for bfd_i860_arch.
262 * configure: Regenerated.
266 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
267 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
268 (cris-dis.lo, cris-opc.lo): New rules.
269 * Makefile.in: Rebuild.
270 * configure.in (bfd_cris_arch): New target.
271 * configure: Rebuild.
272 * disassemble.c (ARCH_cris): Define.
273 (disassembler): Support ARCH_cris.
274 * cris-dis.c, cris-opc.c: New files.
275 * po/POTFILES.in, po/opcodes.pot: Regenerate.
279 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
284 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
289 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
290 fput_const, extract_3, extract_5_load, extract_5_store,
291 extract_5r_store, extract_5R_store, extract_10U_store,
292 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
293 extract_12, extract_17, extract_22): Prototype.
294 (print_insn_hppa): Rename inner block opcode -> opc to avoid
295 shadowing outer block.
304 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
308 * avr-dis.c (avr_operand): Change _ () to _() around all strings
309 marked for translation (exception from the usual coding style).
310 (print_insn_avr): Initialize insn2 to avoid warnings.
314 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
315 * h8500-dis.c: Fix formatting.
319 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
320 (CLEANFILES): Add DEPA.
321 * Makefile.in: Regenerate.
325 * arm-dis.c (regnames): Add an additional register set to match
326 the set used by GCC. Make it the default.
330 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
332 * Makefile.in: Regenerate.
336 * Makefile.am: Rebuild dependency.
337 * Makefile.in: Rebuild.
341 * Makefile.in, configure: regenerate
342 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
344 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
346 * configure.in: Recognize m68hc12 and m68hc11.
347 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
348 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
349 and opcode generation for m68hc11 and m68hc12.
353 * disassemble.c (disassembler): Refer to the PowerPC 620 using
354 bfd_mach_ppc_620 instead of 620.
358 * h8300-dis.c: Fix formatting.
359 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
364 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
368 * avr-dis.c: completely rewritten.
372 * h8300-dis.c: Follow the GNU coding style.
373 (bfd_h8_disassemble) Fix a typo.
377 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
378 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
379 correctly. Fix a typo.
383 * opintl.h (_(String)): Explain why dgettext is used instead of
388 * opintl.h (gettext, dgettext, dcgettext, textdomain,
389 bindtextdomain): Replace defines with those from intl/libgettext.h
390 to quieten gcc warnings.
394 * Makefile.am: Update dependencies with "make dep-am"
395 * Makefile.in: Regenerate.
399 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
400 sign-extending operands.
404 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
409 * Makefile.am (LIBIBERTY): Define.
413 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
414 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
415 (reg_names): Rename to std_reg_names. Change it to a char **
417 (std_reg_names): New name for reg_names.
418 (set_mips_isa_type): Set reg_names to point to std_reg_names by
423 * fr30-desc.h: Partially regenerated to account for changed
424 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
425 * m32r-desc.h: Ditto.
429 * arm-opc.h: Use upper case for flasg in MSR and MRS
430 instructions. Allow any bit to be set in the field_mask of
433 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
434 field_mask of an MSR instruction.
438 * arm-opc.c: Disassembly of thumb ldsb/ldsh
439 instructions changed to ldrsb/ldrsh.
443 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
444 target addresses for 'jal' and 'j'.
448 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
449 also available in common mode when powerpc syntax is being used.
453 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
454 (dummy_print_address): Ditto.
460 * disassemble.c (disassembler): Add ARCH_tic54x.
461 * configure.in: Added tic54x target.
463 * Makefile.am: Add tic54x dependencies.
464 * Makefile.in: Ditto.
468 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
469 vector unit operands.
470 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
471 unit instruction formats.
472 (PPCVEC): New macro, mask for vector instructions.
473 (powerpc_operands): Add table entries for above operand types.
474 (powerpc_opcodes): Add table entries for vector instructions.
476 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
477 (print_insn_little_powerpc): Likewise.
478 (print_insn_powerpc): Prepend 'v' when printing vector registers.
482 * configure.in: Add bfd_powerpc_64_arch.
483 * disassemble.c (disassembler): Use print_insn_big_powerpc for
488 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
493 * avr-dis.c (reg_fmul_d): New. Extract destination register from
495 (reg_fmul_r): New. Extract source register from FMUL instruction.
496 (reg_muls_d): New. Extract destination register from MULS instruction.
497 (reg_muls_r): New. Extract source register from MULS instruction.
498 (reg_movw_d): New. Extract destination register from MOVW instruction.
499 (reg_movw_r): New. Extract source register from MOVW instruction.
500 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
501 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
505 * ia64-gen.c (general): Add an ordered table of primary
506 opcode names, as well as priority fields to disassembly data
507 structures to enforce a preferred disassembly format based on the
508 ordering of the opcode tables.
509 (load_insn_classes): Show a useful message if IC tables are missing.
510 (load_depfile): Ditto.
511 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
512 distinguish preferred disassembly.
513 * ia64-opc-f.c: Reorder some insn for preferred disassembly
514 format. Fix incorrect flag on fma.s/fma.s.s0.
515 * ia64-opc.c: Scan *all* disassembly matches and use the one with
516 the highest priority.
517 * ia64-opc-b.c: Use more abbreviations.
518 * ia64-asmtab.c: Regenerate.
522 * hppa-dis.c (extract_16): New function.
523 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
524 new operand types l,y,&,fe,fE,fx.
532 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
533 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
534 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
536 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
537 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
538 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
539 * Makefile.in: Rebuild.
541 * configure.in (bfd_ia64_arch): New target.
542 * disassemble.c (ARCH_ia64): Define.
543 (disassembler): Support ARCH_ia64.
544 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
545 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
546 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
547 ia64-war.tbl, ia64-waw.tbl): New files.
551 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
552 (disassemble): Use them.
556 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
557 * Makefile.am: Update dependencies.
558 * Makefile.in: Regenerate.
562 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
563 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
564 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
565 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
566 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
567 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
568 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
569 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
570 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
571 ansidecl.h as sysdep.h includes it.
575 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
576 --enable-build-warnings option.
577 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
578 * Makefile.in, configure: Re-generate.
582 * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
583 stc GBR,@-<REG_N> is available for arch_sh1_up.
584 Group parallel processing insn with identical mnemonics together.
585 Make three-operand psha / pshl come first.
589 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
590 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
591 (sh_arg_type): Add A_PC.
592 (sh_table): Update entries using immediates. Add repeat.
593 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
594 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
598 * po/opcodes.pot: Regenerate.
600 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
601 (DEP): Quote when passing vars to sub-make. Add warning message
603 (DEP1): Rewrite for "gcc -MM".
604 (CLEANFILES): Add DEP2.
606 * Makefile.in: Regenerate.
610 * avr-dis.c: Syntax cleanup.
611 (add0fff): Print the pc relative address as a signed number.
616 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
617 the parameter ATTRIBUTE_UNUSED.
618 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
622 * m10300-opc.c: SP-based offsets are always unsigned.
626 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
627 [branch always] instead of "undefined".
631 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
632 short instructions, from end of list of long instructions.
636 * Makefile.am (CFILES): Add avr-dis.c.
637 (ALL_MACHINES): Add avr-dis.lo.
641 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
643 (print_insn_avr): Call function via pointer in K&R compatible way.
644 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
645 add0fff, add03f8): Convert to old style function declaration and
647 (avrdis_opcode): Add prototype.
651 * avr-dis.c: New file. AVR disassembler.
652 * configure.in (bfd_avr_arch): New architecture support.
653 * disassemble.c: Likewise.
654 * configure: Regenerate.
658 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
662 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
663 flag to determine if operand is pc-relative.
666 (REL6S3): Renamed from IMM6S3.
667 Added flag OPERAND_PCREL.
668 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
669 added flag OPERAND_PCREL.
670 (IMM12S3U): Replaced with REL12S3.
671 (SHORT_D2, LONG_D): Delay target is pc-relative.
672 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
673 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
674 using the REL* operands.
675 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
676 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
677 LONG_Db, using REL* operands.
678 (SHORT_U, SHORT_A5S): Removed stray alternatives.
679 (d30v_opcode_table): Use new *r formats.
683 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
684 'signed_overflow_ok_p'.
688 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
689 name of the libtool directory.
690 * Makefile.in: Rebuild.
694 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
695 (cgen_clear_signed_overflow_ok): New function.
696 (cgen_signed_overflow_ok_p): New function.
700 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
701 m32r-ibld.c,m32r-opc.h: Rebuild.
705 * i370-dis.c, i370-opc.c: New.
707 * disassemble.c (ARCH_i370): Define.
708 (disassembler): Handle it.
710 * Makefile.am: Add support for Linux/IBM 370.
711 * configure.in: Likewise.
713 * Makefile.in: Regenerate.
714 * configure: Likewise.
718 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
719 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
724 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
726 * mips-opc.c (G6): New define.
727 (mips_builtin_op): Add "move" definition for -gp32.
732 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
736 * dis-buf.c (buffer_read_memory): Change `length' param and all int
741 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
742 (print_insn_ppi): Likewise.
743 (print_insn_shx): Use info->mach to select appropriate insn set.
744 Add support for sh-dsp. Remove FD_REG_N support.
745 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
746 (sh_arg_type): Likewise. Remove FD_REG_N.
747 (sh_dsp_reg_nums): New enum.
748 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
749 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
750 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
751 (arch_sh3_dsp_up): Likewise.
752 (sh_opcode_info): New field: arch.
753 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
754 D_REG_N. Fill in arch field. Add sh-dsp insns.
758 * arm-dis.c: Change flavor name from atpcs-special to
759 special-atpcs to prevent name conflict in gdb.
760 (get_arm_regname_num_options, set_arm_regname_option,
761 get_arm_regnames): New functions. API to access the several
762 flavor of register names. Note: Used by gdb.
763 (print_insn_thumb): Use the register name entry from the currently
764 selected flavor for LR and PC.
768 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
770 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
771 "mulsh.h" instructions.
772 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
774 (print_insn_mcore): Add support for little endian targets.
775 Add support for MULSH and OPSR classes.
779 * arm-dis.c (parse_arm_diassembler_option): Rename again.
780 Previous delat did not take.
784 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
785 to adjust target address bounds checking and calculate the
786 appropriate octet offset into data.
790 * arm-dis.c: (parse_disassembler_option): Rename to
791 parse_arm_disassembler_option and allow to be exported.
793 * disassemble.c (disassembler_usage): New function: Print out any
794 target specific disassembler options.
795 Call arm_disassembler_options() if the ARM architecture is being
798 * arm-dis.c (NUM_ELEM): Define this macro if not already
800 (arm_regname): New struct type for ARM register names.
801 (arm_toggle_regnames): Delete.
802 (parse_disassembler_option): Use register name structure.
803 (print_insn): New function: Combines duplicate code found in
804 print_insn_big_arm and print_insn_little_arm.
805 (print_insn_big_arm): Call print_insn.
806 (print_insn_little_arm): Call print_insn.
807 (print_arm_disassembler_options): Display list of supported,
808 ARM specific disassembler options.
812 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
813 ARM_STT_16BIT flag as Thumb code symbols.
815 * arm-dis.c (printf_insn_little_arm): Ditto.
819 * arm-dis.c (printf_insn_thumb): Prevent double dumping
820 of raw thumb instructions.
824 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
828 * arm-dis.c (streq): New macro.
830 (force_thumb): ew local variable.
831 (parse_disassembler_option): New function: Parse a single, ARM
832 specific disassembler command line switch.
833 (parse_disassembler_option): Call parse_disassembler_option to
834 parse individual command line switches.
835 (print_insn_big_arm): Check force_thumb.
836 (print_insn_little_arm): Check force_thumb.
840 * i386-dis.c (grps[]): Correct GRP5 FF/3 from "call" to "lcall".
844 * m10300-opc.c, m10300-dis.c: Add am33 support.
848 * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.
849 (print_insn_hppa): Handle 'B' operand.
853 * d10v-opc.c: Fix pattern for "cpfg,f{0|1},c" instruction.
857 * mips-opc.c (I5): New.
858 (abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s
859 madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps,
860 pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
864 * arm-dis.c (print_insn_arm): Added general purpose 'X' format.
865 * arm-opc.h (print_insn_arm): Added comment documenting
866 the 'X' format just added to arm-dis.c.
870 * mips-opc.c (la): Create a version that just uses addiu directly.
871 (dla): Expand to daddiu if possible.
875 * mips-opc.c: Add ssnop pattern.
879 * mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
883 * d30v-opc.c (mvtacc): Use format SHORT_AR not SHORT_AA
884 (d30v_format_tab): Define the SHORT_AR format.
888 * mcore-dis.c: Remove spurious code introduced in previous delta.
892 * arm-dis.c: Include sysdep.h to prevent compile time warnings.
896 * alpha-opc.c (alpha_operands): Fill in missing initializer.
897 (alpha_num_operands): Convert to unsigned.
898 (alpha_num_opcodes): Ditto.
899 (insert_rba): Declare unused arguments ATTRIBUTE_UNUSED.
904 (extract_bdisp): Ditto.
905 (extract_jhint): Ditto.
906 (extract_ev6hwjhint): Ditto.
910 * hppa-dis.c (print_insn_hppa): Add new codes 'cc', 'cd', 'cC',
913 * hppa-dis.c (print_insn_hppa): Removed unused args. Fix '?W'.
915 * hppa-dis.c (print_insn_hppa): Implement codes "?N", "?Q".
919 * d10v-opc.c (d10v_operands): Add RESTRICTED_NUM3 flag for
920 rac/rachi instructions.
921 (d10v_opcodes): Added seven new instructions ld, ld2w, sac, sachi,
926 * fr30-asm.c,fr30-desc.h: Rebuild.
927 * m32r-asm.c,m32r-desc.c,m32r-desc.h: Rebuild. Add m32rx support.
928 * m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h,m32r-opinst.c: Ditto.
932 * sh-opc.h: Fix bit patterns for several load and store
937 * hppa-dis.c (print_insn_hppa): Replace 'B', 'M', 'g' and 'l' with
938 cleaner code using completer prefixes. Add 'Y'.
942 * hppa-dis.c: (print_insn_hppa): Correct 'cJ', 'cc'.
944 * hppa-dis.c (extract_22): New function.
946 * hppa-dis.c (print_insn_hppa): Handle 'J', 'K', and 'cc'.
948 * hppa-dis.c (print_insn_hppa): Handle 'fe' and 'cJ'.
950 * hppa-dis.c (print_insn_hppa): Handle '#', 'd', and 'cq'.
952 * hppa-dis.c (print_insn_hppa): Handle 'm', 'h', '='.
954 * hppa-dis.c (print_insn_hppa): Handle 'X' operand.
956 * hppa-dis.c (print_insn_hppa): Handle 'B' operand.
958 * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands.
960 * hppa-dis.c (print_insn_hppa): Handle 'l' operand.
962 * hppa-dis.c (print_insn_hppa): Handle 'g' operand.
966 * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer.
968 * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
971 * hppa-dis.c: (print_insn_hppa): Handle 'fX'.
973 * hppa-dis.c: (print_insn_hppa): Add missing break after
976 * hppa-dis.c: Finish constifying various completers, register
981 * configure.in (Canonicalization of target names): Remove adding
982 ${CONFIG_SHELL} in front of $ac_config_sub, since autoconfig 2.14
983 generates $ac_config_sub with a ${CONFIG_SHELL} already.
984 * configure: Regenerate.
988 * hppa-dis.c (print_insn_hppa): Escape '%' in output strings.
990 * hppa-dis.c (print_insn_hppa): Handle 'Z' argument.
994 * sh-opc.h: Add mulu.w and muls.w patterns. These are the correct
995 names for the mulu and muls patterns.
999 * pj-opc.c: New file.
1000 * pj-dis.c: New file.
1001 * disassemble.c (disassembler): Handle bfd_arch_pj.
1002 * configure.in: Handle bfd_pj_arch.
1003 * Makefile.am: Rebuild dependencies.
1004 (CFILES): Add pj-dis.c and pj-opc.c.
1005 (ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
1006 * configure, Makefile.in: Rebuild.
1010 * i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
1014 * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31.
1018 * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1019 * m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1020 * m32r-opinst.c: Rebuild.
1024 * hppa-dis.c (print_insn_hppa): Replace 'f' by 'v'. Prefix float
1025 register args by 'f'.
1027 * hppa-dis.c (print_insn_hppa): Add args q, %, !, and |.
1029 * hppa-dis.c (MASK_10, read_write_names, add_compl_names,
1030 extract_10U_store): New.
1031 (print_insn_hppa): Add new completers.
1033 * hppa-dis.c (signed_unsigned_names,mix_half_names,
1034 saturation_names): New.
1035 (print_insn_hppa): Add completer codes 'a', 'ch', 'cH', 'cS', and 'c*'.
1037 * hppa-dis.c (print_insn_hppa): Place completers behind prefix 'c'.
1039 * hppa-dis.c (print_insn_hppa): Add cases for '.', '~'. '$'. and '!'
1041 * hppa-dis.c (print_insn_hppa): Look at next arg instead of bits
1042 to decide to print a space.
1046 * i386-dis.c: Add AMD athlon instruction support.
1051 * dis-buf.c (buffer_read_memory): Rewrite expression to avoid
1052 overflow at end of address space.
1053 (generic_print_address): Use sprintf_vma.
1057 * Makefile.am: Rename .dep* files to DEP*. Change DEP variable to
1058 MKDEP. Rebuild dependencies.
1059 * Makefile.in: Rebuild.
1063 * hppa-dis.c (compare_cond_64_names, cmpib_cond_64_names,
1064 add_cond_64_names, wide_add_cond_names, logical_cond_64_names,
1065 unit_cond_64_names, shift_cond_64_names, bb_cond_64_names): New.
1066 (print_insn_hppa): Add 64 bit condition completers.
1070 * hppa-dis.c (print_insn_hppa): Change condition args to use
1075 * hppa-dis.c (print_insn_hppa): Remove unnecessary test in 'E'
1081 * configure.bat: Remove; obsolete.
1085 * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.
1086 (generic_strcat_address): Add cast to avoid warning.
1087 * i386-dis.c: Initialize all structure fields to avoid warnings.
1088 Add ATTRIBUTE_UNUSED as appropriate.
1092 * sparc-dis.c (print_insn_sparc): Differentiate between
1093 addition and oring when guessing symbol for comment.
1097 * arm-dis.c (print_insn_arm): Display hex equivalent of rotated
1102 * i386-dis.c: Mention intel mode specials in macro char comment.
1106 * alpha-dis.c: Don't include <stdlib.h>.
1107 * arm-dis.c: Include "sysdep.h".
1108 * tic30-dis.c: Don't include <stdlib.h> or <string.h>. Include
1110 * Makefile.am: Rebuild dependencies.
1111 * Makefile.in: Rebuild.
1115 * arm-dis.c (print_insn_arm): Add detection of IMB and IMBRange
1120 * arm-dis.c (arm_regnames): Turn into a pointer to a register
1122 (arm_regnames_standard): New variable: Array of ARM register
1123 names according to ARM instruction set nomenclature.
1124 (arm_regnames_apcs): New variable: Array of ARM register names
1125 according to ARM Procedure Call Standard.
1126 (arm_regnames_raw): New variable: Array of ARM register names
1127 using just 'r' and the register number.
1128 (arm_toggle_regnames): New function: Toggle the chosen register set
1130 (parse_disassembler_options): New function: Parse any target
1131 disassembler command line options.
1132 (print_insn_big_arm): Call parse_disassembler_options if any
1134 (print_insn_little_arm): Call parse_disassembler_options if any
1139 * i386-dis.c (FWAIT_OPCODE): Define.
1140 (used_prefixes): New static variable.
1141 (fetch_data): Don't print an error message if we have already
1142 fetched some bytes successfully.
1143 (ckprefix): Clear used_prefixes. Use FWAIT_OPCODE, not 0x9b.
1144 (prefix_name): New static function.
1145 (print_insn_i386): If setjmp fails, indicating a data error, but
1146 we have managed to fetch some bytes, print the first one as a
1147 prefix or a .byte pseudo-op. If fwait is followed by a non
1148 floating point instruction, print the first prefix. Set
1149 used_prefixes when prefixes are used. If any prefixes were not
1150 used after disassembling the instruction, print the first prefix
1151 instead of printing the instruction.
1152 (putop): Set used_prefixes when prefixes are used.
1153 (append_seg, OP_E, OP_G, OP_REG, OP_I, OP_sI, OP_J): Likewise.
1154 (OP_DIR, OP_SIMD_Suffix): Likewise.
1158 * sparc-opc.c: Fix up set, setsw, setuw operand kinds.
1159 Support signx %reg, clruw %reg.
1163 * sparc-opc.c: Add aliases Solaris as supports.
1167 * Makefile.am (CFILES): Add arc-{dis,opc}.c and v850-{dis,opc}.c.
1168 * Makefile.in: Regenerated.
1172 * arm-dis.c (print_insn_arm): Make LDRH/LDRB consistent with LDR
1173 when target is PC-relative.
1177 * m68k-opc.c: Rename MACL/MSACL to MAC/MSAC. Add MACM/MSACM. Add
1180 * m68k-dis.c (fetch_arg): Add places `n', `o'.
1182 * m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
1183 Add mcf5206e to appropriate instructions.
1184 Add alias for MAC, MSAC.
1186 * m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
1189 * m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
1190 macw, remsl, remul for mcf5307. Change mcf5200 --> mcf.
1192 * m68k-dis.c: Add format `u' and places `h', `m', `M'.
1196 * i386-dis.c (Ed): Define.
1197 (dis386_twobyte_att, dis386_twobyte_intel): Use Ed for movd.
1199 (OP_rm): Rename to OP_Rd.
1202 (putop): Add const to template and p.
1203 (print_insn_x86): Delete.
1204 (print_insn_i386): Merge old function print_insn_x86. Add const
1206 (struct dis386): Add const to name.
1207 (dis386_att, dis386_intel): Add const.
1208 (dis386_twobyte_att, dis386_twobyte_intel): Add const.
1209 (names32, names16, names8, names_seg, index16): Add const.
1210 (grps, prefix_user_table, float_reg): Add const.
1211 (float_mem_att, float_mem_intel): Add const.
1212 (oappend): Add const to s.
1213 (OP_REG): Add const to s.
1214 (ptr_reg): Add const to s.
1215 (dofloat): Add const to dp.
1216 (OP_C): Don't skip modrm, it's now done in OP_Rd.
1219 (OP_Rd): Check for valid mod. Call Op_E to print.
1220 (OP_E): Handle d_mode arg. Check for bad sfence,lea,lds etc.
1221 (OP_MS): Check for valid mod. Call Op_EM to print.
1222 (OP_3DNowSuffix): Set obufp and use oappend rather than
1223 strcat. Call BadOp() for errors.
1224 (OP_SIMD_Suffix): Likewise.
1225 (BadOp): New function.
1229 * i386-dis.c (dis386_intel): Remove macro chars, except for
1230 jEcxz. Change cWtR and cRtd to cW and cR.
1231 (dis386_twobyte_intel): Remove macro chars here too.
1232 (putop): Handle R and W macros for intel mode.
1234 * i386-dis.c (SIMD_Fixup): New function.
1235 (dis386_twobyte_att): Use it on movlps and movhps, and change
1236 Ev to EX on these insns. Change movmskps Ev, XM to Gv, EX.
1237 (dis386_twobyte_intel): Same here.
1239 * i386-dis.c (Av): Remove.
1243 (OP_SIMD_Suffix): New function.
1244 (OP_DIR): Remove dead code.
1245 (eAX_reg..eDI_reg): Renumber.
1246 (onebyte_has_modrm): Table numbering comments.
1247 (INTERNAL_DISASSEMBLER_ERROR): Move to before print_insn_x86.
1248 (print_insn_x86): Move all prefix oappends to after uses_f3_prefix
1249 checks. Print error on invalid dp->bytemode2. Remove simd_cmp,
1250 and handle SIMD cmp insns in OP_SIMD_Suffix.
1251 (info->bytes_per_line): Bump from 5 to 6.
1253 (OP_E): Use INTERNAL_DISASSEMBLER_ERROR. Handle sfence.
1254 (OP_3DNowSuffix): Ensure mnemonic index unsigned.
1257 * i386-dis.c (XM, EX, None): Define.
1258 (OP_XMM, OP_EX, OP_None): New functions.
1259 (USE_GROUPS, USE_PREFIX_USER_TABLE): Define.
1260 (GRP14): Rename to GRPAMD.
1261 (GRP*): Add USE_GROUPS flag.
1263 (dis386_twobyte_att, dis386_twobyte_intel): Add SIMD insns.
1264 (twobyte_has_modrm): Add SIMD entries.
1265 (twobyte_uses_f3_prefix, simd_cmp_op, prefix_user_table): New.
1266 (grps): Add SIMD insns.
1267 (print_insn_x86): New vars uses_f3_prefix and simd_cmp. Don't
1268 oappend repz if uses_f3_prefix. Add code to handle new groups for
1272 * i386-dis.c (dis386_att, dis386_intel): Change 0xE8 call insn
1273 operand from Av to Jv.
1277 * mcore-dis.c (print_insn_mcore): Use .short to display
1278 unidentified instructions, not .word.
1282 * aclocal.m4, configure: Updated for new version of libtool.
1286 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1287 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1291 * hppa-dis.c (print_insn_hppa, case '3'): New case for PA2.0
1296 * fr30-desc.c,fr30-desc.h,fr30-ibld.c: Rebuild.
1297 * m32r-desc.c,m32r-desc.h,m32r-opinst.c: Rebuild.
1301 * opintl.h (LC_MESSAGES): Never define.
1305 * i386-dis.c (intel_syntax, open_char, close_char): Make static.
1306 (separator_char, scale_char): Likewise.
1307 (print_insn_x86): Likewise.
1308 (print_insn_i386): Likewise. Add declaration.
1312 * fr30-dis.c: Rebuild.
1313 * m32r-dis.c: Rebuild.
1317 * m68k-opc.c: Change compare instructions to use "@s" rather than
1318 ";s" when used with an immediate operand.
1322 * cgen-opc.c (cgen_set_cpu): Delete.
1323 (cgen_lookup_insn): max_insn_size renamed to max_insn_bitsize.
1324 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c,fr30-opc.h:
1326 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h:
1328 * po/opcodes.pot: Rebuild.
1332 * d30v-opc.c (mvtsys): Remove FLAG_LKR.
1336 * cgen-opc.c (cgen_set_cpu): New arg `isa'. All callers updated.
1337 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): New fns.
1338 (cgen_get_insn_operands): Rewrite test for hardcoded/operand index.
1339 * fr30-asm.c,fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c: Rebuild.
1340 * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c: Rebuild.
1341 * m32r-opinst.c: Rebuild.
1345 * cgen-opc.c (cgen_hw_lookup_by_name): Rewrite.
1346 (cgen_hw_lookup_by_num): Rewrite.
1347 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1348 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1349 * m32r-opinst.c: Rebuild.
1353 * alpha-opc.c: Add sqrt+flags patterns. Add EV6 PALcode insns.
1354 (insert_jhint): Fix insertion mask.
1355 * alpha-dis.c (print_insn_alpha): Disassemble EV6 PALcode insns.
1359 * Makefile.in: Rebuild.
1363 * i960c-asm.c,i960c-dis.c,i960c-opc.c,i960c-opc.h: Delete.
1364 * i960-dis.c (print_insn_i960): Rename from print_insn_i960_orig.
1365 * Makefile.am: Remove references to them.
1366 (HFILES): Add fr30-desc.h,m32r-desc.h.
1367 (CFILES): Add fr30-desc.c,fr30-ibld.c,m32r-desc.c,m32r-ibld.c,
1369 (ALL_MACHINES): Update.
1370 * configure.in: Redo handling of cgen_files.
1371 (bfd_i960_arch): Delete i960c-*.lo files.
1372 * configure: Regenerate.
1373 * cgen-asm.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1374 (hash_insn_array): Rewrite.
1375 * cgen-dis.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1376 (hash_insn_array): Rewrite.
1377 * cgen-opc.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1378 (cgen_lookup_insn,cgen_get_insn_operands): Define here.
1379 (cgen_lookup_get_insn_operands): Ditto.
1380 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
1381 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1382 * po/POTFILES.in: Rebuild.
1383 * po/opcodes.pot: Rebuild.
1387 * Makefile.am: Rebuild dependencies.
1388 (HFILES): Add fr30-opc.h.
1389 (CFILES): Add fr30-asm.c, fr30-dis.c, fr30-opc.c.
1390 * Makefile.in: Rebuild.
1392 * configure.in: Change AC_PREREQ to 2.13. Remove AM_CYGWIN32.
1393 Change AM_EXEEXT to AC_EXEEXT and AM_PROG_INSTALL to
1395 * acconfig.h: Remove.
1396 * configure: Rebuild with current autoconf/automake.
1397 * aclocal.m4: Likewise.
1398 * config.in: Likewise.
1399 * Makefile.in: Likewise.
1403 * m68k-opc.c: Correct move (not movew) to status word on 5200.
1407 * disassemble.c (disassembler): Handle bfd_mach_i386_i386_intel_syntax.
1408 * i386-dis.c (x_mode): Define.
1411 (dis386_intel): New.
1412 (dis386_twobyte): Remove.
1413 (dis386_twobyte_att): New.
1414 (dis386_twobyte_intel): New.
1415 (print_insn_x86): Use new arrays.
1416 (float_mem): Remove.
1417 (float_mem_intel): New.
1418 (float_mem_att): New.
1419 (dofloat): Use new float_mem arrays.
1420 (print_insn_i386_att): New.
1421 (print_insn_i386_intel): New.
1422 (print_insn_i386): Handle bfd_mach_i386_i386_intel_syntax.
1423 (putop): Handle intel syntax.
1424 (OP_indirE): Handle intel syntax.
1425 (OP_E): Handle intel syntax.
1426 (OP_I): Handle intel syntax.
1427 (OP_sI): Handle intel syntax.
1428 (OP_OFF): Handle intel syntax.
1432 * fr30-opc.h,fr30-opc.c: Rebuild.
1433 * i960c-opc.h,i960c-opc.c: Rebuild.
1434 * m32r-opc.c: Rebuild.
1438 * hppa-dis.c: revert HP merge changes until HP gives us
1443 * arm-dis.c (print_insn_arm): Display ARM syntax for PC relative
1444 offsets as well as symbloic address.
1448 * hppa-dis.c: fix comments and some indentation.
1452 * fr30-opc.c,i960c-opc.c: Regenerate.
1456 * fr30-opc.c: Regenerate.
1460 * m32r-dis.c: Regenerate.
1464 * fr30-asm.c,fr30-dis.c,fr30-opc.h,fr30-opc.c: Regenerate.
1465 * i960c-asm.c,i960c-dis.c,i960c-opc.h,i960c-opc.c: Regenerate.
1466 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
1470 * configure.in: Require autoconf 2.12.1 or higher.
1474 * mips16-opc.c: Mark branch insns with MIPS16_INSN_BRANCH.
1478 * fr30-opc.c: Regenerated.
1482 * mips-dis.c (set_mips_isa_type): Handle bfd_mach_mips4111.
1486 * fr30-opc.c,fr30-opc.h: Regenerated.
1490 * fr30-opc.c,fr30-opc.h: Regenerated.
1494 * fr30-opc.c,fr30-opc.h: Regenerated.
1498 * m32r-opc.c: Regenerate.
1502 * dis-buf.c (generic_strcat_address): reformat to GNU coding
1503 conventions. change sprintf call to an sprintf_vma call.
1507 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1511 The following changes were made by
1515 merge in changes by HP; HP did not create ChangeLog entries.
1517 * dis-buf.c (generic_strcat_address): new function.
1519 * hppa-dis.c: Changes to improve hppa disassembly.
1520 Changed formatting in : reg_names, fp_reg_names,control_reg,
1521 New variables : sign_extension_names, deposit_names, conversion_names
1522 float_test_names, compare_cond_names_double, add_cond_names_double,
1523 logical_cond_names_double, unit_cond_names_double,
1524 branch_push_pop_names, saturation_names, shift_names, mix_names,
1525 New Macros : GET_COMPL_O, GET_PUSH_POP,MERGED_REG
1526 Move some definitions to libhppa.h: GET_FIELD, GET_BIT
1527 (fput_const): renamed as fput_hex_const
1529 - use the macros fputs_filtered and
1530 fput_decimal_const whenever possible; calls to sign_extend require
1531 2 params -- add a missing second param of 0.
1532 - Some new code ifdefed for LOCAL_ONLY, all related to figuring out
1533 architecture version number of current machine. HP folks are
1534 trying to handle situation where the target program was compiled
1535 for PA 1.x (32-bit), but is running on a PA 2.0 machine and
1537 - added new cases : 'g', 'B', 'm'
1538 - added cases specifically for PA 2.0
1539 - changed the following cases : '"', 'n', 'N', 'p', 'Z',
1540 - calls to fput_const become calls to fput_hex_const
1544 * Makefile.am (CFILES): Add i960c-asm, i960c-dis.c, i960c-opc.c.
1545 (ALL_MACHINES): Add i960c-asm.lo, i960c-dis.lo, i960-opc.lo.
1546 (i960-asm.lo, i960c-dis.lo, i960c-opc.lo): New Makefile rules.
1547 * Makefile.in: Rebuilt.
1548 * configure.in (bfd_i960_arch): Add i960c-opc.lo, i960-asm.o,
1550 * i960-dis.c (print_insn_i960): Rename to print_insn_i960_orig.
1551 * i960c-asm.c, i960c-dis.c, i960c-opc.c, i960c-opc.h: New files.
1555 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1559 * mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
1561 * ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions.
1566 * fr30-opc.c: Regenerate.
1570 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1574 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1578 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
1582 * cgen-dis.c (hash_insn_array): CGEN_INSN_VALUE ->
1583 CGEN_INSN_BASE_VALUE.
1584 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
1585 * fr30-opc.c,fr30-opc.h,fr30-asm.c,fr30-dis.c: Regenerate.
1589 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Regenerated.
1593 * fr30-asm.c,fr30-dis.c: Regenerated.
1597 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1601 * fr30-opc.c: Regenerated.
1605 * fr30-opc.c: Regenerated.
1606 * fr30-opc.h: Regenerated.
1607 * fr30-dis.c: Regenerated.
1608 * fr30-asm.c: Regenerated.
1612 * mips-opc.c (sync.p,sync.l): Swap insn values.
1616 * fr30-opc.c: Regenerate.
1620 * fr30-opc.c: Regenerated.
1621 * fr30-opc.h: Regenerated.
1625 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Rebuild.
1626 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Rebuild.
1630 * fr30-opc.c: Regenerated.
1634 * fr30-opc.c: Regenerated.
1635 * fr30-opc.h: Regenerated.
1636 * fr30-dis.c: Regenerated.
1637 * fr30-asm.c: Regenerated.
1641 * po/opcodes.pot: Regenerated.
1642 * fr30-opc.c: Regenerated.
1643 * fr30-opc.h: Regenerated.
1644 * fr30-dis.c: Regenerated.
1645 * fr30-asm.c: Regenerated.
1649 * disassemble.c (disassembler): Add support for FR30 target.
1653 * m32r-dis.c,m32r-opc.c,m32r-opc.h: Rebuild.
1654 * fr30-dis.c,fr30-opc.c,fr30-opc.h: Rebuild.
1658 * po/opcodes.pot: Regenerate.
1659 * po/POTFILES.in: Regenerate.
1660 * fr30-opc.c: Regenerate.
1661 * fr30-opc.h: Regenerate.
1665 * m32r-asm.c: Regenerate.
1669 * configure.in: Added case for bfd_fr30_arch.
1670 * Makefile.am (CFILES): Added fr30-asm.c, fr30-dis.c, fr30-opc.c.
1671 (ALL_MACHINES): Added fr30-asm.lo, fr30-dis.lo, fr30-opc.lo.
1672 (CLEANFILES): Added stamp-fr30.
1674 * fr30-asm.c: New file.
1675 * fr30-dis.c: New file.
1676 * fr30-opc.c: New file.
1677 * fr30-opc.h: New file.
1678 * po/POTFILES.in: Regenerated
1679 * po/opcodes.pot: Regenerated
1683 * configure.in: detect cygwin* instead of cygwin32*
1684 * configure: regenerate
1688 * mips-opc.c (IS_M): Added.
1692 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
1696 * m32r-opc.h,m32r-opc.c: Regenerate.
1700 * i386-dis.c (OP_3DNowSuffix): New static function.
1703 (dis386_twobyte): Add GRP14, femms, and 3DNow entries.
1704 (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow.
1705 (insn_codep): New static variable.
1706 (print_insn_x86): Init insn_codep after prefixes.
1707 (grps): Add GRP14 entries for prefetch, prefetchw.
1711 * i386-dis.c (Suffix3DNow): New table.
1715 * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
1719 * d10v-dis.c (print_operand): If num is nonzero, then
1720 add OPERAND_ACC1, not OPERAND_ACC0.
1724 * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
1729 * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit
1734 * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.
1738 * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move
1743 * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf
1745 (print_insn_little_arm): Detect Thumb symbols in elf object
1750 * alpha-dis.c (print_insn_alpha): Use the machine type to
1751 decide which PALcode set to include.
1755 * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.
1759 * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS,
1760 MSUB and MSUBS instructions.
1764 * ppc-opc.c (powerpc_operands): Omit parens around additions in
1765 operand name macros.
1770 * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a,
1771 +, -, and d for ColdFire.
1774 * ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
1775 (extract_mbe): Likewise.
1779 * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes.
1781 * m10300-opc.c: First cut at UDF instructions.
1785 * m32r-opc.c: Regenerate (remove semantic descriptions).
1789 * arm-dis.c (print_insn_big_arm): Fix indentation.
1790 (print_insn_little_arm): Likewise.
1794 * arm-dis.c (print_insn_big_arm): Check for thumb symbol
1796 (print_insn_little_arm): Likewise.
1800 Move all global state data into opcode table struct, and treat
1801 opcode table as something that is "opened/closed".
1802 * cgen-asm.c (all fns): New first arg of opcode table descriptor.
1803 (cgen_asm_init): Delete.
1804 (cgen_set_parse_operand_fn): New function.
1805 * cgen-dis.c (all fns): New first arg of opcode table descriptor.
1806 (cgen_dis_init): Delete.
1807 * cgen-opc.c (all fns): New first arg of opcode table descriptor.
1808 (cgen_current_{opcode_table_mach,endian}): Delete.
1809 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1813 * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
1818 * m10300-opc.c: Add entries for "no_match_operands" field in
1823 * m32r-asm.c,m32r-opc.c: Regenerate (-Wall cleanups).
1827 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
1831 * i386-dis.c (ckprefix): Handle fwait specially only when it isn't
1833 (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
1835 (OP_J): Remove unnecessary subtraction when 16-bit displacement
1836 will be masked later.
1840 * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.
1844 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1848 * m10300-dis.c: Only recognize instructions from the currently
1850 * m10300-opc.c: Add field indicating the particular variant of
1851 the mn10300 each instruction is available on.
1855 * configure.in: For bfd_vax_arch, build vax-dis.lo.
1856 * Makefile.am: Rebuild dependencies.
1857 (CFILES): Add vax-dis.c.
1858 (ALL_MACHINES): Add vax-dis.lo.
1859 * aclocal.m4: Rebuild with current libtool.
1860 * configure, Makefile.in: Rebuild.
1864 * vax-dis.c: New file, from work by Pauline Middelink
1866 * disassemble.c (ARCH_vax): Define if ARCH_all.
1867 (disassembler): Add case for ARCH_vax.
1868 * makefile.vms: Support compilation on vms/vax.
1872 * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities
1873 related to sign extension and the size of ints.
1877 * m10300-opc.c: Support one operand "asr", "lsr" and "asl"
1878 instructions. Support (sp) addressing mode by expanding it into
1883 * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
1887 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
1891 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
1896 * mips-dis.c (print_insn_little_mips): Previously, instruction
1897 printing references the symbol table to determine whether the
1898 instruction resides in a block regular instructions or mips16
1899 instructions. However, when the disassembler gets used in other
1900 environments where the symbol table is not present, we no longer
1901 rely in the symbol table, rather, use the low bit of the
1902 instructions address to guess. There should be no change for usage
1903 of the disassembler in host based programs, gdb, objdump.
1904 (print_insn_big_mips): ditto.
1905 (print_insn_mips): ditto
1909 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
1913 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
1917 * i386-dis.c (index16): Add '%' to register names. Use ','
1922 * i386-dis.c: Don't print opcode suffix when we can figure out the
1923 size (and gas can!) by register operands, or from the default
1925 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
1927 (dis386, dis386_twobyte, grps): Use new suffix macros.
1928 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
1929 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
1930 order of cmps operands to agree with Intel docs. Correct operand
1931 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
1932 agree with Intel docs.
1933 (print_insn_x86): Print orphan fwait before other prefixes.
1934 Return correct byte count for orphan fwait with prefixes. Don't
1935 print `bound' operands in reverse order.
1936 (ckprefix): Stop accumulating prefixes if we get fwait.
1937 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
1941 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
1942 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
1946 Fix problems when bfd_vma is wider than long.
1947 * i386-dis.c: Make op_address and start_pc unsigned.
1948 (set_op): Make parameter unsigned.
1949 (print_insn_x86): Cast to bfd_vma when passing a value to
1951 * ns32k-dis.c (CORE_ADDR): Don't define.
1952 (print_insn_ns32k): Change type of addr to bfd_vma. Use
1953 bfd_scan_vma to read back address.
1954 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
1956 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
1957 (NEXTULONG): New definition.
1958 (print_insn_m68k): Avoid overflow when computing third argument of
1960 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
1961 Use disp instead of val to store offset values.
1962 (print_indexed): Use base_disp instead of word to store base
1963 displacement, to avoid overflow.
1964 * m10300-dis.c (disassemble): Cast value to long when computing
1965 pc-relative address, to get correct sign extension.
1969 * m32r-opc.c: Regenerate.
1973 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
1978 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
1982 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
1984 (OP_DSreg): Rename from OP_DSSI.
1985 (OP_ESreg): Rename from OP_ESDI.
1986 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
1988 (append_seg): Rename from append_prefix.
1989 (ptr_reg): New function.
1990 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
1992 (PREFIX_ADDR): Rename from PREFIX_ADR.
1993 (float_reg): Add non-broken opcodes for people who don't want
1998 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
2003 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
2007 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
2008 0; produce error message for shifts of size 32 (or 64 for 64-bit
2009 shifts), because the hardware doesn't support them.
2013 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
2014 LONG_2, LONG_2b formats to use this new operand.
2018 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
2022 * sparc-dis.c (print_insn_sparc): big endian instruction / little
2023 endian data support.
2027 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
2028 and SHORT_B3b formats to use Rb instead of Ra.
2030 Add FLAG_MUL16 to MUL2XH opcode.
2032 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
2033 to existing 1.1.1 parallelisation prohibition procedure.
2037 * m32r-asm.c,m32r-dis.c: Regenerate.
2041 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
2042 with a shift count of 0.
2046 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
2047 (cgen_hw_lookup_by_num): New function.
2051 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
2055 * sparc-dis.c (print_insn_sparc): Always fetch instructions
2056 as big-endian on SPARClite.
2060 * d30v-opc.c (pre_defined_register): Remove alias for r0.
2064 * po/Make-in (install-info): New target.
2068 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
2069 * configure: Rebuild.
2073 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
2074 variety of ISA2 instructions to set bottom ten bits of trap code.
2078 * Makefile.am (config.status): Add explicit target so that
2079 config.status depends upon bfd/configure.in.
2080 * Makefile.in: Rebuild.
2084 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
2085 instructions to set bottom ten bits of break code.
2086 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
2087 for above optional argument.
2091 * makefile.vms: Run dec c with /nodebug.
2095 * Makefile.in: Rebuilt.
2096 * Makefile.am: Regenerated dependencies with mkdep.
2098 * opintl.h (_): Define as dgettext.
2102 * cgen-asm.c: Internationalised.
2103 * m32r-asm.c: Internationalised.
2104 * m32r-dis.c: Internationalised.
2105 * m32r-opc.c: Internationalised.
2107 * aclocal.m4: Regenerated.
2108 * configure: Regenerated.
2109 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
2110 * Makefile.in: Rebuild.
2111 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
2112 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
2116 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
2118 * aclocal.m4, configure: Rebuild with current tools.
2122 * opintl.h: New file - contains internationalisation macros used
2123 by source files in this directory.
2124 * po/: New subdirectory - contains internationalisation files.
2125 * po/Make-in: New file - Makefile constructor.
2126 * po/POTFILES.in: New file - list of files in opcodes directory
2127 that should be scan for internationalisation macros.
2128 * po/opcodes.pot: New file - list of internationisation strings
2129 found in files mentioned in po/POTFILES.in.
2130 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
2131 entry. Add intl directory to include paths.
2132 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
2133 HAVE_STRCPY, HAVE_LC_MESSAGES
2134 * configure.in: Add rule to build Makefile in po subdirectory.
2135 * Makefile.in: Rebuilt.
2136 * aclocal.m4: Rebuilt.
2137 * config.in: Rebuilt.
2138 * configure: Rebuilt.
2139 * alpha-opc.c: Internationalised.
2140 * arc-dis.c: Internationalised.
2141 * arc-opc.c: Internationalised.
2142 * arm-dis.c: Internationalised.
2143 * cgen-asm.c: Internationalised.
2144 * d30v-dis.c: Internationalised.
2145 * dis-buf.c: Internationalised.
2146 * h8300-dis.c: Internationalised.
2147 * h8500-dis.c: Internationalised.
2148 * i386-dis.c: Internationalised.
2149 * m10200-dis.c: Internationalised.
2150 * m10300-dis.c: Internationalised.
2151 * m68k-dis.c: Internationalised.
2152 * m88k-dis.c: Internationalised.
2153 * mips-dis.c: Internationalised.
2154 * ns32k-dis.c: Internationalised.
2155 * opintl.h: Internationalised.
2156 * ppc-opc.c: Internationalised.
2157 * sparc-dis.c: Internationalised.
2158 * v850-dis.c: Internationalised.
2159 * v850-opc.c: Internationalised.
2163 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
2164 (asm_hash_table_entries): New variable.
2165 (cgen_asm_init): Free asm_hash_table_entries.
2166 (hash_insn_array,hash_insn_list): New functions.
2167 (build_asm_hash_table): Use them. Hash macro insns as well.
2168 (cgen_asm_lookup_insn): Update.
2169 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
2170 (dis_hash_table_entries): New variable.
2171 (cgen_dis_init): Free dis_hash_table_entries.
2172 (hash_insn_array,hash_insn_list): New functions.
2173 (build_dis_hash_table): Use them. Hash macro insns as well.
2174 (cgen_dis_lookup_insn): Update.
2175 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
2176 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
2177 (cgen_macro_insn_count): New function.
2178 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
2182 * i386-dis.c (OP_DSSI): Print segment override.
2186 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
2191 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
2192 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
2193 * configure.in: Define and substitute WIN32LDFLAGS and
2195 * aclocal.m4: Rebuild with new libtool.
2196 * configure, Makefile.in: Rebuild.
2200 * m32r-opc.c: Regenerate.
2204 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
2205 before trying to copy it.
2206 * Makefile.in: Rebuild.
2210 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
2214 * ns32k-dis.c (bit_extract_simple): New function to extract bits
2215 from an arbitrary valid buffer instead of fetching them on demand
2217 (invalid_float): use bit_extract_simple() instead of bit_extract().
2222 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
2227 * Branched binutils 2.9.
2231 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
2232 disassembling last 4 bytes of a section.
2236 Fix some gcc -Wall warnings:
2237 * arc-dis.c (print_insn): Add casts to avoid warnings.
2238 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
2239 * d10v-dis.c (dis_long, dis_2_short): Likewise.
2240 * m10200-dis.c (disassemble): Likewise.
2241 * m10300-dis.c (disassemble): Likewise.
2242 * ns32k-dis.c (print_insn_ns32k): Likewise.
2243 * ppc-opc.c (insert_ral, insert_ram): Likewise.
2244 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
2245 * cgen-opc.c (cgen_keyword_search_next): Likewise.
2246 * d10v-dis.c (dis_long, dis_2_short): Likewise.
2247 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
2248 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
2249 * tic80-dis.c (print_one_instruction): Likewise.
2250 * w65-dis.c (print_operand): Likewise.
2251 * z8k-dis.c (fetch_data): Likewise.
2252 * a29k-dis.c: Add return type for find_byte_func_type.
2253 * arc-opc.c: Include <stdio.h>. Remove declarations of
2254 insert_multshift and extract_multshift.
2255 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
2257 (extract_value): Fully parenthesize expression.
2258 * h8500-dis.c (print_insn_h8500): Initialize local variables.
2259 * h8500-opc.h (h8500_table): Fully bracket initializer.
2260 * w65-opc.h (optable): Likewise.
2261 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
2262 * i386-dis.c (OP_E): Initialize local variables.
2263 * m10200-dis.c (print_insn_mn10200): Likewise.
2264 * mips-dis.c (print_insn_mips16): Likewise.
2265 * sh-dis.c (print_insn_shx): Likewise.
2266 * v850-dis.c (print_insn_v850): Likewise.
2267 * ns32k-dis.c (print_insn_arg): Declare.
2268 (get_displacement, invalid_float): Declare.
2269 (list_search, sign_extend, flip_bytes): Declare return type.
2270 (get_displacement): Likewise.
2271 (print_insn_arg): Likewise. Make d int. Fix sprintf format
2273 (print_insn_ns32k): Make i unsigned.
2274 (invalid_float): Make static. Declare type of val.
2275 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
2276 on each for iteration.
2277 * tic30-dis.c (get_indirect_operand): Likewise.
2278 * z8k-dis.c (print_insn_z8001): Declare return type.
2279 (print_insn_z8002): Likewise.
2280 (unparse_instr): Fix sprintf format strings.
2284 * mips-opc.c: Add "sync.l" and "sync.p".
2288 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
2289 default m68k variant to recognize.
2291 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
2292 (ctrl, cobr, mem, ea): Likewise.
2293 (print_addr): Likewise. Remove cast.
2294 (ea): Cast argument of print_addr to bfd_vma.
2296 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
2298 (cgen_parse_unsigned_integer): Likewise.
2299 (cgen_parse_address): Likewise.
2303 * i960-dis.c (ctrl): Add full braces to structure initialization.
2304 (cobr, mem, reg): Likewise.
2305 (ea): Correct parenthesization in expression.
2307 * cgen-asm.c: Include <ctype.h>.
2308 (build_asm_hash_table): Remove unused local variable i.
2309 (cgen_parse_keyword): Add casts to avoid warnings.
2311 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
2312 symbol. Fix indentation.
2313 (print_insn_little_arm): Likewise.
2317 * configure.in: Use AM_DISABLE_SHARED.
2318 * aclocal.m4, configure: Rebuild with libtool 1.2.
2322 These patches are courtesy of Jonathan Walton and Tony Thompson
2325 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
2328 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
2329 both the offset and the label closest to the destination.
2333 * m32r-opc.h: Regenerate.
2337 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
2341 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
2342 assume that info->symbols is non-empty.
2346 * alpha-opc.c (cvtqs) There is no such thing.
2347 (cvttq): Missing most of the /*d variants.
2351 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
2352 delayed branches or jumps.
2356 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
2358 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
2359 * tic30-dis.c (print_branch): Likewise.
2363 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
2364 saved_symbol code as it is no longer needed.
2368 * cgen-asm.c: Include symcat.h.
2369 * cgen-dis.c,cgen-opc.c: Ditto.
2370 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
2374 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
2378 * m32r-opc.[ch]: Regenerate.
2382 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
2383 arguments. Don't perform validation here.
2384 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
2388 * m32r-opc.c: Regenerate.
2392 * Makefile.am (AUTOMAKE_OPTIONS): Define.
2393 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
2397 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
2401 * configure.in: Get the version number from BFD.
2402 * configure: Rebuild.
2405 * Makefile.am (libopcodes_la_LDFLAGS): Define.
2406 * Makefile.in: Rebuild.
2410 * m32r-opc.c: Regenerate.
2411 * m32r-opc.h: Regenerate.
2415 * m32r-opc.c: Regenerate.
2419 Fix rac to accept only a0:
2420 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
2421 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
2422 Introduce OPERAND_GPR.
2423 * d10v-dis.c (print_operand): Likewise.
2427 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
2428 (cgen_hw_lookup): Make result const.
2429 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
2433 * configure, aclocal.m4: Rebuild with new libtool.
2437 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
2438 instructions use a PC relative branch, not absolute.
2442 * configure.in: Set libtool_enable_shared rather than
2443 libtool_shared. Remove diversion hack.
2444 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
2448 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
2449 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
2453 * tic30-dis.c: New file.
2454 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
2455 * configure.in: Handle bfd_tic30_arch.
2456 * Makefile.am: Rebuild dependencies.
2457 (CFILES): Add tic30-dis.c
2458 (ALL_MACHINES): Add tic30-dis.lo.
2459 * configure, Makefile.in: Rebuild.
2463 * m32r-opc.h (HAVE_CPU_M32R): Define.
2467 * v850-opc.c (insertion routines): If both alignment and size is
2468 wrong then report this.
2472 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
2473 Only recognize instructions for the current target_processor.
2477 * d10v-dis.c (PC_MASK): Correct value.
2478 (print_operand): If there's a reloc, don't calculate the
2479 address because they could be in different sections.
2483 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
2484 instruction after the 4650's "mul" instruction; nobody's using the
2485 4010 these days. If object files someday indicate which processor
2486 variant they're intended for, we can do a better job at this.
2490 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
2491 table provided entry size. Use CGEN_INSN_MNEMONIC.
2492 (cgen_parse_keyword): Rewrite.
2493 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
2494 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
2495 * cgen-opc.c: Clean up pass over `struct foo' usage.
2496 (cgen_keyword_lookup_value): Handle "" entry.
2497 (cgen_keyword_add): Likewise.
2501 * mips-opc.c: Add FP_D to s.d instruction flags.
2505 * m68k-opc.c (halt, pulse): Enable them on the 68060.
2509 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
2510 PC relative offset forms before the 15 bit forms. An assembler command
2511 line option now chooses the default.
2515 * d30v-opc.c (d30v_opcode_table): Set new flags bits
2516 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
2520 * configure: Only build libopcodes shared if --enable-shared's value
2521 was `yes', or was set to `*opcodes*'.
2522 * aclocal.m4: Likewise.
2523 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
2524 original source of this bit of code. It's not clear what the best fix
2529 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
2530 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
2531 offset forms before the 15 bit forms, to default to the long forms.
2535 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
2539 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
2540 symbol if none is present.
2541 (print_insn_big_arm): Prevent examination of stored symbol if
2546 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
2550 * disassemble.c: Remove disasm_symaddr() function.
2552 * arm-dis.c: Use info->symbol instead of info->flags to determine
2553 if disassmbly should be in Thumb or Arm mode.
2557 * arm-dis.c: Add support for disassembling Thumb opcodes.
2558 (print_insn_thumb): New function.
2560 * disassemble.c (disasm_symaddr): New function.
2562 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
2563 (thumb_opcodes): Table of Thumb opcodes.
2567 * m68k-opc.c (btst): Change Dd@s to Dd;b.
2569 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
2570 and 'v' as operand types.
2574 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
2576 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
2577 which has a two word opcode with a one word argument.
2581 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
2582 unsigned, not signed.
2583 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
2587 * d10v-dis.c (print_operand):
2588 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
2592 * d10v-opc.c (OPERAND_FLAG): Split into:
2593 (OPERAND_FFLAG, OPERAND_CFLAG) .
2599 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
2600 field for all INSN_MACRO's.
2601 * mips16-opc.c: same
2605 * mips-opc.c (sync,cache): These are 3900 insns.
2609 sh-opc.h (sh_table): Remove ftst/nan.
2613 * mips-opc.c (ffc, ffs): Fix mask.
2617 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
2622 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2623 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2627 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2628 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2632 * v850-dis.c (disassemble): Replace // with /* ... */
2636 * sparc-opc.c: Add wr & rd for v9a asr's.
2637 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
2638 (v9a_asr_reg_names): New variable.
2643 * sparc-opc.c (v9notv9a): New insn type.
2644 (IMPDEP): Move to the end to not conflict with edge8 et al.
2649 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
2653 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
2657 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
2658 of disassemble_info structure to determine if an overlay address
2659 has a matching symbol in low memory.
2661 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
2662 new symbol_at_address_func field in disassemble_info structure.
2666 * v850-opc.c (extract_d22): Use signed arithmatic.
2670 * mips-opc.c: Three op mult is not an ISA insn.
2674 * mips-opc.c: Fix formatting.
2678 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
2679 than assuming that char is signed. Explicitly sign extend 16 bit
2680 values, rather than assuming that short is 16 bits.
2681 (OP_sI, OP_J, OP_DIR): Likewise.
2685 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
2690 * v850-opc.c: Fix typo in comment.
2692 * v850-dis.c (disassemble): Add test of processor type when
2693 determining opcodes.
2697 * configure.in: Use a diversion to set enable_shared before the
2698 arguments are parsed.
2699 * configure: Rebuild.
2703 * m68k-opc.c (TBL1): Use ! rather than `.
2704 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
2708 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
2710 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
2712 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
2715 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
2716 * aclocal.m4: Rebuild with new libtool.
2717 * configure: Rebuild.
2721 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
2725 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
2729 * v850-opc.c (v850_opcodes): Further rearrangements.
2733 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
2737 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
2742 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
2746 * v850-opc.c: Initialise processors field of v850_opcode structure.
2750 Merge changes from Martin Hunt:
2752 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
2754 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
2755 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
2756 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
2758 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
2760 * d30v-dis.c (print_insn): First operand of d*i (delayed
2761 branch) instructions is relative.
2763 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
2764 (d30v_operand_table): Add IMM6S3 type.
2765 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
2767 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
2768 and cmp instructions.
2770 * d30v-opc.c: Correct entries for repeat*, and sat*.
2771 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
2772 types. Correct several formats.
2774 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
2776 * d30v-opc.c (pre_defined_registers): Change control registers.
2778 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
2779 SHORT_C2. Manual was incorrect.
2781 * d30v-dis.c (lookup_opcode): Return value now indicates
2782 if an opcode has a short and a long form. Used for deciding
2783 to append a ".s" or ".l".
2784 (print_insn): Append a ".s" to an instruction if it is
2785 the short form and ".l" if it is a long form. Do not append
2786 anything if the instruction has only one possible size.
2788 * d30v-opc.c: Change mulx2h to require an even register.
2789 New form: SHORT_A2; a SHORT_A form that needs an even
2790 register as the first operand.
2792 * d30v-dis.c (print_insn_d30v): Fix problem where the last
2793 instruction was not being disassembled if there were an odd
2794 number of instructions.
2796 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
2800 * v850-dis.c (disassemble): Improved display of register lists.
2804 * sparc-opc.c (sparc_opcodes): Fix assembler args to
2805 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
2806 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
2807 fandnot1s, fandnot2s.
2811 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
2815 * cgen-asm.c (cgen_parse_address): New argument resultp.
2816 All callers updated.
2817 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
2821 * mn10200-dis.c (disassemble): PC relative instructions are
2822 relative to the next instruction, not the current instruction.
2826 * v850-dis.c (disassemble): Only signed extend values that are not
2827 returned by extract functions.
2828 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
2832 * v850-opc.c: Update comments. Remove use of
2833 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
2837 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
2841 * configure: Rebuilt with latest devo autoconf for NT support.
2845 * v850-dis.c (disassemble): Use curly brace syntax for register
2848 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
2849 where r0 is being used as a destination register.
2853 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
2857 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
2861 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
2862 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
2867 * configure (cgen_files): Add support for v850e target.
2868 * configure.in (cgen_files): Add support for v850e target.
2872 * configure (cgen_files): Add support for v850ea target.
2873 * configure.in (cgen_files): Add support for v850ea target.
2877 * configure.in (bfd_arc_arch): Add.
2878 * configure: Rebuild.
2879 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
2880 * Makefile.in: Rebuild.
2881 * arc-dis.c, arc-opc.c: New files.
2882 * disassemble.c (ARCH_all): Define ARCH_arc.
2883 (disassembler): Add ARC support.
2887 * v850-dis.c (disassemble): Add support for v850EA instructions.
2889 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
2890 (v850_opcodes): Add v850EA instructions.
2892 * v850-dis.c (disassemble): Add support for v850E instructions.
2894 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
2895 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
2896 insert_spe, extract_spe): New Functions.
2897 (v850_opcodes): Add v850E instructions.
2899 * v850-opc.c: Reorganised and re-layed out to improve readability
2904 * configure: Rebuild with autoconf 2.12.1.
2908 * aclocal.m4, configure: Rebuild with new automake patches.
2912 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
2913 * acinclude.m4: Just include acinclude.m4 from BFD.
2914 * aclocal.m4, configure: Rebuild.
2918 * Makefile.am: New file, based on old Makefile.in.
2919 * acconfig.h: New file.
2920 * acinclude.m4: New file.
2921 * stamp-h.in: New file.
2922 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
2923 Removed shared library handling; now handled by libtool. Replace
2924 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
2925 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
2926 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
2927 handling in AC_OUTPUT.
2928 * dep-in.sed: Change .o to .lo.
2929 * Makefile.in: Now built with automake.
2930 * aclocal.m4: Now built with aclocal.
2931 * config.in, configure: Rebuild.
2935 * mips-opc.c: Fix typo/thinko in "eret" instruction.
2939 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
2941 * sparc-dis.c (sorted_opcodes): New static local.
2942 (struct opcode_hash): `opcode' is pointer to const element.
2943 (build_hash): First arg is now table of sorted pointers.
2944 (print_insn_sparc): Sort opcodes by sorting table of pointers.
2945 (compare_opcodes): Update.
2949 * cgen-opc.c: #include <ctype.h>.
2950 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
2951 Handle case insensitive hashing.
2952 (hash_keyword_value): Change type of `value' to unsigned int.
2956 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
2957 precision FP, mark it as such. Likewise for double precision
2958 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
2963 * ppc-opc.c (extract_nsi): make unsigned expression signed before
2965 (UNUSED): remove one level of parens, so MSVC doesn't choke on
2966 nesting depth when all the macros are expanded.
2970 * sparc-opc.c: The fcmp v9a instructions take an integer register
2971 as a destination, not a floating point register. From Christian
2976 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
2977 syntax. From Roman Hodek
2980 * i386-dis.c (twobyte_has_modrm): Fix pand.
2984 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
2988 * arm-dis.c: Add prototypes for arm_decode_shift and
2993 * mips-opc.c: Add r3900 insns.
2997 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
2998 print delay slot instructions on the same line. When using a PC
2999 relative load, add a comment with the value being loaded if it can
3004 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
3005 to pushS/popS for segment regs and byte constant so that
3006 pushw/popw printed when in 16 bit data mode.
3008 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
3009 print cbtw, cwtd in 16 bit data mode.
3010 * i386-dis.c (putop): extra case W to support above.
3012 * i386-dis.c (print_insn_x86): print addr32 prefix when given
3013 address size prefix in 16 bit address mode.
3017 * sh-dis.c: Reindent. Rename local variable fprintf to
3022 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
3026 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
3028 * mips16-opc.c (mip16_opcodes): same.
3032 * m68k-opc.c (moveb): Change $d to %d.
3036 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
3037 (twobyte_has_modrm): Likewise.
3039 (OP_MMX, OP_EM, OP_MS): New static functions.
3041 * i386-dis.c: Revert patch of April 4. The output now matches
3046 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
3051 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
3055 * Makefile.in (install): Depend upon installdirs.
3056 (installdirs): New target.
3061 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
3062 * configure: Rebuild.
3066 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
3067 Delete string{,s}.h support.
3071 * cgen-asm.c (cgen_parse_operand_fn): New global.
3072 (cgen_parse_{{,un}signed_integer,address}): Update call to
3073 cgen_parse_operand_fn.
3074 (cgen_init_parse_operand): New function.
3075 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
3076 from cgen_asm_init_parse.
3077 (m32r_cgen_assemble_insn): New operand `errmsg'.
3078 Delete call to as_bad, return error message to caller.
3079 (m32r_cgen_asm_hash_keywords): #if 0 out.
3083 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
3085 [case 'J']: Fix typo in register name.
3089 * configure.in: Substitute SHLIB_LIBS.
3090 * configure: Rebuild.
3091 * Makefile.in (SHLIB_LIBS): New variable.
3092 ($(SHLIB)): Use $(SHLIB_LIBS).
3096 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
3098 * cgen-opc.c (hash_keyword_name): Improve algorithm.
3100 * disassemble.c (disassembler): Handle m32r.
3104 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
3105 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
3106 * Makefile.in (CFILES): Add them.
3107 (ALL_MACHINES): Add them.
3108 (dependencies): Regenerate.
3109 * configure.in (cgen_files): New variable.
3110 (bfd_m32r_arch): Add entry.
3111 * configure: Regenerate.
3115 * configure.in: Correct file names for bfd_mn10[23]00_arch.
3116 * configure: Rebuild.
3118 * Makefile.in: Rebuild dependencies.
3120 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
3122 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
3127 * Branched binutils 2.8.
3131 * m10200-dis.c: Rename from mn10200-dis.c.
3132 * m10200-opc.c: Rename from mn10200-opc.c.
3133 * m10300-dis.c: Rename from mn10300-dis.c
3134 * m10300-opc.c: Rename from mn10300-opc.c.
3135 * Makefile.in: Update accordingly.
3137 * mips16-opc.c: Add mul and dmul macros.
3141 * makefile.vms: Update CFLAGS, add clean target.
3145 * mips-opc.c: Add "wait". From Ralf Baechle
3148 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
3149 * configure, config.in: Rebuild.
3150 * sysdep.h: Include <stdlib.h> if it exists.
3151 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
3153 * Makefile.in: Rebuild dependencies.
3157 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
3160 * mips-opc.c: Add cast when setting mips_opcodes.
3164 * v850-dis.c (disassemble): Fix sign extension problem.
3165 * v850-opc.c (extract_d*): Fix sign extension problems to make
3166 disassembly calculate branch offsets correctly.
3170 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
3172 * mips-opc.c: Add dctr and dctw.
3176 * d30v-dis.c (print_insn): Change the way signed constants
3181 * Makefile.in (BFD_H): New variable.
3182 (HFILES): New variable.
3183 (CFILES): Add all C files.
3184 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
3185 Delete old dependencies, and build new ones.
3186 * dep-in.sed: New file.
3190 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
3194 * mn10200-opc.c: Change "trap" to "syscall".
3195 * mn10300-opc.c: Add new "syscall" instruction.
3199 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
3200 mulul insns on the coldfire.
3204 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
3205 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
3206 (print_insn_little_arm): Likewise.
3211 * i386-dis.c (fetch_data): Add prototype.
3212 * m68k-dis.c (fetch_data): Add prototype.
3213 (dummy_print_address): Add prototype. Make static.
3214 * ppc-opc.c (valid_bo): Add prototype.
3215 * sparc-dis.c (build_hash_table): Add prototype.
3216 (is_delayed_branch, compute_arch_mask): Add prototypes.
3217 (print_insn_sparc): Make several local variables const.
3218 (compare_opcodes): Change arguments to const PTR. Add prototype.
3219 * sparc-opc.c (arg): Change name field to be const.
3220 (lookup_name, lookup_value): Add prototypes. Change table and
3221 name parameters to be const.
3222 (sparc_encode_asi): Change name parameter to be const.
3223 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
3224 (sparc_encode_sparclet_cpreg): Likewise.
3225 (sparc_decode_asi): Change return type to be const.
3226 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
3227 (sparc_decode_sparclet_cpreg): Likewise.
3231 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
3232 Solaris doesn't like the combined options, and the -f is
3234 (stamp-tshlink, install): Likewise.
3238 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
3243 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
3247 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
3252 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
3256 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
3260 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
3264 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
3265 floatformat_to_double to make portable.
3266 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
3271 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
3272 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
3276 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
3277 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
3281 * tic80-opc.c (LSI_SCALED): Renamed from this ...
3282 (OFF_SL_BR_SCALED): ... to this, and added the flag
3283 TIC80_OPERAND_BASEREL to the flags word.
3284 (tic80_opcodes): Replace all occurances of LSI_SCALED with
3289 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
3290 Change mips_opcodes from const array to a pointer,
3291 and change bfd_mips_num_opcodes from const int to int,
3292 so that we can increase the size of the mips opcodes table
3297 * tic80-opc.c (tic80_predefined_symbols): Revert change to
3298 store BITNUM values in the table in one's complement form
3299 to match behavior when assembler is given a raw numeric
3300 value for a BITNUM operand.
3301 * tic80-dis.c (print_operand_bitnum): Ditto.
3305 * d30v-opc.c: Removed references to FLAG_X.
3309 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
3313 * Makefile.in: Added d30v object files.
3314 * configure: (bfd_d30v_arch) Rebuilt.
3315 * configure.in: (bfd_d30v_arch) Added new case.
3316 * d30v-dis.c: New file.
3317 * d30v-opc.c: New file.
3318 * disassemble.c (disassembler) Add entry for d30v.
3322 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
3323 representations for the floating point BITNUM values.
3327 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
3328 in the table in one's complement form, as they appear in the
3330 (tic80_symbol_to_value): Use macros to access predefined
3332 (tic80_value_to_symbol): Ditto.
3333 (tic80_next_predefined_symbol): New function.
3334 * tic80-dis.c (print_operand_bitnum): Remove code that did
3335 one's complement for BITNUM values.
3339 * makefile.vms: Remove 8 bit characters. Update to latest
3344 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
3348 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
3349 (IMM24_PCREL): Likewise.
3353 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
3354 address for an extended PC relative instruction that is not a
3359 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
3364 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
3365 (tic80_opcodes): Sort entries so that long immediate forms
3366 come after short immediate forms, making it easier for
3367 assembler to select the right one for a given operand.
3371 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
3373 (print_insn_mips16): Likewise.
3377 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
3378 a symbol class that restricts translation to just that
3379 class (general register, condition code, etc).
3383 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
3384 and REG_DEST_E for register operands that have to be
3385 an even numbered register. Add REG_FPA for operands that
3386 are one of the floating point accumulator registers.
3387 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
3388 (tic80_opcodes): Change entries that need even numbered
3389 register operands to use the new operand table entries.
3390 Add "or" entries that are identical to "or.tt" entries.
3394 * mips16-opc.c: Add new cases of exit instruction for
3396 * mips-dis.c (print_mips16_insn_arg): Display floating point
3397 registers in operands of exit instruction. Print `$' before
3398 register names in operands of entry and exit instructions.
3402 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
3403 pairs for all predefined symbols recognized by the assembler.
3404 Also used by the disassembling routines.
3405 (tic80_symbol_to_value): New function.
3406 (tic80_value_to_symbol): New function.
3407 * tic80-dis.c (print_operand_control_register,
3408 print_operand_condition_code, print_operand_bitnum):
3409 Remove private tables and use tic80_value_to_symbol function.
3413 * d10v-dis.c (print_operand): Change address printing
3414 to correctly handle PC wrapping. Fixes PR11490.
3418 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
3423 * mips-dis.c (print_insn_mips16): Set insn_info information.
3424 (print_mips16_insn_arg): Likewise.
3426 * mips-dis.c (print_insn_mips16): Better handling of an extend
3427 opcode followed by an instruction which can not be extended.
3431 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
3432 coldfire moveb instruction to not allow an address register as
3433 destination. Although the documentation does not indicate that
3434 this is invalid, experiments uncovered unexpected behavior.
3435 Added a comment explaining the situation. Thanks to Andreas
3436 Schwab for pointing this out to me.
3440 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
3441 entries are presorted so that entries with the same mnemonic are
3442 adjacent to each other in the table. Sort the entries for each
3443 instruction so that this is true.
3447 * m68k-dis.c: Include <libiberty.h>.
3448 (print_insn_m68k): Sort the opcode table on the most significant
3449 nibble of the opcode.
3453 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
3454 "vsub", "vst", "xnor", and "xor" instructions.
3455 (V_a1): Renamed from V_a, msb of accumulator reg number.
3456 (V_a0): Add macro, lsb of accumulator reg number.
3460 * tic80-dis.c (print_insn_tic80): Broke excessively long
3461 function up into several smaller ones and arranged for
3462 the instruction printing function to be callable recursively
3463 to print vector instructions that have both a load and a
3464 math instruction packed into a single opcode.
3465 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
3466 to explain why it comes after the other vector opcodes.
3470 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
3471 move insns to handle immediate operands.
3475 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
3476 fix operand mask in the "moveml" entries for the coldfire.
3480 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
3481 New macros for building vector instruction opcodes.
3482 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
3483 FMT_LI, which were unused. The field is now a flags field.
3484 Remove some opcodes that are possible, but illegal, such
3485 as long immediate instructions with doubles for immediate
3486 values. Add "vadd" and "vld" instructions.
3490 * tic80-opc.c (tic80_operands): Reorder some table entries to make
3491 the order more logical. Move the shift alias instructions ("rotl",
3492 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
3493 interspersed with the regular sr.x and sl.x instructions. Add
3494 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
3495 "sub", "subu", "swcr", and "trap".
3499 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
3500 (OFF_SL_PC): Renamed from OFF_SL.
3501 (OFF_SS_BR): New operand type for base relative operand.
3502 (OFF_SL_BR): New operand type for base relative operand.
3503 (REG_BASE): New operand type for base register operand.
3504 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
3505 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
3506 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
3508 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
3509 10 char field, padded with spaces on rhs, rather than a string
3510 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
3511 than old TIC80_OPERAND_RELATIVE. Add support for new
3512 TIC80_OPERAND_BASEREL flag bit.
3516 * tic80-dis.c (print_insn_tic80): Print floating point operands
3518 * tic80-opc.c (SPFI): Add single precision floating point
3519 immediate operand type.
3520 (ROTATE): Add rotate operand type for shifts.
3521 (ENDMASK): Add for shifts.
3522 (n): Macro for the 'n' bit.
3523 (i): Macro for the 'i' bit.
3524 (PD): Macro for the 'PD' field.
3525 (P2): Macro for the 'P2' field.
3526 (P1): Macro for the 'P1' field.
3527 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
3532 * mn10200-dis.c (disassemble): Mask off unwanted bits after
3533 adding in current address for pc-relative operands.
3537 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
3538 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
3539 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
3540 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
3541 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
3542 REG_BASE_M_SI, REG_BASE_M_LI respectively.
3543 (REG_SCALED, LSI_SCALED): New operand types.
3544 (E): New macro for 'E' bit at bit 27.
3545 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
3546 opcodes, including the various size flavors (b,h,w,d) for
3547 the direct load and store instructions.
3551 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
3553 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
3554 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
3555 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
3556 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
3557 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
3558 masks with "MASK_* & ~M_*" to get the M bit reset.
3559 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
3563 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
3564 correctly. Add support for printing TIC80_OPERAND_BITNUM and
3565 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
3567 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
3568 CC, SICR, and LICR table entries.
3569 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
3570 "bcnd", and "brcr" opcodes.
3574 * ppc-opc.c (powerpc_operands): Make comment match the
3575 actual fields (no shift field).
3576 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
3577 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
3578 partial implementation, work in progress.
3579 * tic80-opc.c (tic80_operands): Begin construction operands table.
3580 (tic80_opcodes): Continue populating opcodes table and start
3581 filling in the operand indices.
3582 (tic80_num_opcodes): Add this.
3586 * m68k-opc.c: Add #B case for moveq.
3590 * mn10300-dis.c (disassemble): Make sure all variables are initialized
3591 before they are used.
3595 * v850-opc.c (v850_opcodes): Put curly-braces around operands
3596 for "breakpoint" instruction.
3600 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
3601 (dep): Use ALL_CFLAGS rather than CFLAGS.
3605 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
3610 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
3611 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
3615 * mips16-opc.c: Add "abs".
3619 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
3620 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
3621 (disassembler): Add bfd_arch_tic80 support to set disassemble
3622 to print_insn_tic80.
3623 * tic80-dis.c (print_insn_tic80): Add stub.
3627 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
3628 * configure: Regenerate with autoconf.
3629 * tic80-dis.c: Add file.
3630 * tic80-opc.c: Add file.
3634 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
3638 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
3639 (mn10200_opcodes): Use it for some logicals and btst insns.
3640 Add "break" and "trap" instructions.
3642 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
3644 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
3648 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
3649 relative load or add now depends upon whether the instruction is
3654 * mn10200-dis.c: Finish writing disassembler.
3655 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
3656 Fix mask for "jmp (an)".
3658 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
3659 handle endianness issues for mn10300.
3661 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
3665 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
3666 instruction. Fix opcode field for "movb (imm24),dn".
3668 * mn10200-opc.c (mn10200_operands): Fix insertion position
3673 * mn10200-opc.c: Create mn10200 opcode table.
3674 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
3675 but moving along nicely.
3679 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
3683 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
3684 specifiers for fmovem* instructions.
3688 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
3692 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
3697 * mn10300-opc.c: Add some comments explaining the various
3700 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
3704 * m68k-dis.c (print_insn_arg): Handle new < and > operand
3707 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3708 operand specifiers in fmovm* instructions.
3712 * ppc-opc.c (insert_li): Give an error if the offset has the two
3713 least significant bits set.
3717 * mips-dis.c (print_insn_mips16): Separate the instruction from
3718 the arguments with a tab, not a space.
3722 * mn10300-dis.c (disasemble): Finish conversion to '$' as
3725 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
3730 * configure: Rebuild with autoconf 2.12.
3732 Add support for mips16 (16 bit MIPS implementation):
3733 * mips16-opc.c: New file.
3734 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
3735 (mips16_reg_names): New static array.
3736 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
3737 after seeing a 16 bit symbol.
3738 (print_insn_little_mips): Likewise.
3739 (print_insn_mips16): New static function.
3740 (print_mips16_insn_arg): New static function.
3741 * mips-opc.c: Add jalx instruction.
3742 * Makefile.in (mips16-opc.o): New target.
3743 * configure.in: Use mips16-opc.o for bfd_mips_arch.
3744 * configure: Rebuild.
3748 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3749 operand specifiers in *save, *restore and movem* instructions.
3751 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
3754 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
3755 register operands for immediate arithmetic, not, neg, negx, and
3756 set according to condition instructions.
3758 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
3759 specifier of the effective-address operand in immediate forms of
3760 arithmetic instructions. The specifier for the immediate operand
3761 notes how and where the constant will be stored.
3765 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
3768 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
3771 * mn10300-dis.c (disassemble): Prefix registers with '%'.
3775 * mn10300-dis.c (disassemble): Handle register lists.
3777 * mn10300-opc.c: Fix handling of register list operand for
3778 "call", "ret", and "rets" instructions.
3780 * mn10300-dis.c (disassemble): Print PC-relative and memory
3781 addresses symbolically if possible.
3782 * mn10300-opc.c: Distinguish between absolute memory addresses,
3783 pc-relative offsets & random immediates.
3785 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
3787 (disassemble): Handle SPLIT and EXTENDED operands.
3791 * mn10300-dis.c: Rough cut at printing some operands.
3793 * mn10300-dis.c: Start working on disassembler support.
3794 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
3796 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
3798 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
3802 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
3806 * mn10300-opc.c (mn10300_opcodes): Demand parens around
3807 register argument is calls and jmp instructions.
3811 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
3812 getx operand. Fix opcode for mulqu imm,dn.
3816 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
3817 in MN10300_OPERAND_SPLIT operands for how many bits
3818 appear in the basic insn word. Add IMM32_HIGH24,
3819 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
3820 (mn10300_opcodes): Use new operands as needed.
3822 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
3823 for bset, bclr, btst instructions.
3824 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
3826 * mn10300-opc.c (mn10300_operands): Remove many redundant
3827 operands. Update opcode table as appropriate.
3828 (IMM32): Add MN10300_OPERAND_SPLIT flag.
3829 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
3833 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
3834 operands (for indexed load/stores). Fix bitpos for DI
3835 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
3836 few instructions that insert immediates/displacements in the
3837 middle of the instruction. Add IMM8E for 8 bit immediate in
3838 the extended part of an instruction.
3839 (mn10300_operands): Use new opcodes as appropriate.
3843 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
3844 sequential so the assembler never parallelizes it with
3849 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
3850 a data/address register that appears in register field 0
3851 and register field 1.
3852 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
3856 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
3857 standard disassembly.
3859 * alpha-opc.c (alpha_operands): Rearrange flags slot.
3860 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
3861 Recategorize PALcode instructions.
3865 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
3869 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
3870 there are no operand types.
3874 * v850-opc.c (D9_RELAX): Renamed from D9, all references
3876 (v850_operands): Make sure D22 immediately follows D9_RELAX.
3880 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
3884 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
3885 and sst.w instructions.
3887 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
3892 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
3897 * ppc-opc.c (PPCPWR2): Define.
3898 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
3903 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
3904 field for movhu instruction.
3906 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
3907 cast value to "long" not "signed long" to keep hpux10
3912 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
3915 * mn10300-opc.c (FMT*): Remove definitions.
3917 * mn10300-opc.c (mn10300_opcodes): Fix destination register
3918 for shift-by-register opcodes.
3920 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
3921 into [AD][MN][01] for encoding the position of the register
3926 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
3927 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
3931 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
3932 Fix various typos. Add "PAREN" operand.
3933 (MEM, MEM2): Define.
3934 (mn10300_opcodes): Surround all memory addresses with "PAREN"
3935 operands. Fix several typos.
3937 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
3942 * mn10300-opc.c (FMT_XX): Renumber starting at one.
3943 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
3945 (mn10300_opcodes): Break opcode format out into its own field.
3946 Update many operand fields to deal with signed vs unsigned
3947 issues. Fix one or two typos in the "mov" instruction
3948 opcode, mask and/or operand fields.
3952 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
3953 m68851 wasn't reset.
3957 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
3958 all opcodes. Very rough cut at operands for all opcodes.
3960 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
3965 * mn10200-opc.c, mn10300-opc.c: New files.
3966 * mn10200-dis.c, mn10300-dis.c: New files.
3967 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
3968 * disassemble.c: Break mn10x00 support into 10200 and 10300
3970 * configure.in: Likewise.
3971 * configure: Rebuilt.
3975 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
3979 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
3981 * disassemble (ARCH_mn10x00): Define.
3982 (disassembler): Handle bfd_arch_mn10x00.
3983 * configure.in: Recognize bfd_mn10x00_arch.
3984 * configure: Rebuilt.
3988 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
3989 accordingly. Don't declare functions using op_rtn.
3993 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
3994 params to be more standard.
3995 * (disassemble): Print absolute addresses and symbolic names for
3996 branch and jump targets.
3997 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
3999 * (v850_opcodes): Add breakpoint insn.
4003 * m68k-opc.c: Move the fmovemx data register cases before the
4004 other cases, so that they get recognized before the data register
4005 does gets treated as a degenerate register list.
4009 * mips-opc.c: Add a case for "div" and "divu" with two registers
4010 and a destination of $0.
4014 * mips-dis.c (print_insn_arg): Add prototype.
4015 (_print_insn_mips): Ditto.
4019 * mips-dis.c (print_insn_arg): Print condition code registers as
4024 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
4028 * v850-dis.c (disassemble): Make static. Provide prototype.
4032 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
4037 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
4038 ']' characters into the output stream.
4039 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
4040 Add "memop" field to all opcodes (for the disassembler).
4041 Reorder opcodes so that "nop" comes before "mov" and "jr"
4042 comes before "jarl".
4044 * v850-dis.c (print_insn_v850): Fix typo in last change.
4046 * v850-dis.c (print_insn_v850): Properly handle disassembling
4047 a two byte insn at the end of a memory region when the memory
4048 region's size is only two byte aligned.
4050 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
4052 * v850-dis.c (v850_reg_names): Define.
4053 (v850_sreg_names, v850_cc_names): Likewise.
4054 (disassemble): Very rough cut at printing operands (unformatted).
4056 * v850-opc.c (BOP_MASK): Fix.
4057 (v850_opcodes): Fix mask for jarl and jr.
4059 * v850-dis.c: New file. Skeleton for disassembler support.
4060 * Makefile.in Remove v850 references, they're not needed here.
4061 * configure.in: Add v850-dis.o when building v850 toolchains.
4062 * configure: Rebuilt.
4063 * disassemble.c (disassembler): Call v850 disassembler.
4065 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
4066 (insert_d8_6, extract_d8_6): New functions.
4067 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
4068 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
4070 (IF4A, IF4B): Use "D7" instead of "D7S".
4071 (IF4C, IF4D): Use "D8_7" instead of "D8".
4072 (IF4E, IF4F): New. Use "D8_6".
4073 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
4074 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
4076 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
4077 (v850_operands): Change D16 to D16_15, use special insert/extract
4078 routines. New new D16 that uses the generic insert/extract code.
4079 (IF7A, IF7B): Use D16_15.
4080 (IF7C, IF7D): New. Use D16.
4081 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
4083 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
4084 message. Issue an error if the branch offset is odd.
4086 * v850-opc.c: Add notes about needing special insert/extract
4087 for all the load/store insns, except "ld.b" and "st.b".
4089 * v850-opc.c (insert_d22, extract_d22): New functions.
4090 (v850_operands): Use insert_d22 and extract_d22 for
4092 (insert_d9): Fix range check.
4096 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
4097 and set bits field to D9 and D22 operands.
4101 * v850-opc.c (v850_operands): Define SR2 operand.
4102 (v850_opcodes): "ldsr" uses R1,SR2.
4104 * v850-opc.c (v850_opcodes): Fix opcode specs for
4105 sld.w, sst.b, sst.h, sst.w, and nop.
4109 * v850-opc.c (v850_opcodes): Add null opcode to mark the
4110 end of the opcode table.
4114 * d10v-opc.c (pre_defined_registers): Added register pairs,
4115 "r0-r1", "r2-r3", etc.
4119 * v850-opc.c (v850_operands): Make I16 be a signed operand.
4120 Create I16U for an unsigned 16bit mmediate operand.
4121 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
4123 * v850-opc.c (v850_operands): Define EP operand.
4124 (IF4A, IF4B, IF4C, IF4D): Use EP.
4126 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
4127 with immediate operand, "movhi". Tweak "ldsr".
4129 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
4130 correct. Get sld.[bhw] and sst.[bhw] closer.
4132 * v850-opc.c (v850_operands): "not" is a two byte insn
4134 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
4136 * v850-opc.c (v850_operands): D16 inserts at offset 16!
4138 * v850-opc.c (two): Get order of words correct.
4140 * v850-opc.c (v850_operands): I16 inserts at offset 16!
4142 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
4143 register source and destination operands.
4144 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
4146 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
4147 same thinko in "trap" opcode.
4149 * v850-opc.c (v850_opcodes): Add initializer for size field
4152 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
4153 Add D8 for 8-bit unsigned field in short load/store insns.
4154 (IF4A, IF4D): These both need two registers.
4155 (IF4C, IF4D): Define. Use 8-bit unsigned field.
4156 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
4157 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
4158 for "ldsr" and "stsr".
4159 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
4162 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
4163 short store word (sst.w).
4167 * v850-opc.c (v850_operands): Added insert and extract fields,
4168 pointers to functions that handle unusual operand encodings.
4172 * v850-opc.c (v850_opcodes): Enable "trap".
4174 * v850-opc.c (v850_opcodes): Fix order of displacement
4175 and register for "set1", "clr1", "not1", and "tst1".
4179 * v850-opc.c (v850_operands): Add "B3" support.
4180 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
4183 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
4185 * v850-opc.c: Close unterminated comment.
4189 * v850-opc.c (v850_operands): Add flags field.
4190 (v850_opcodes): add move opcodes.
4194 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
4195 * configure: (bfd_v850v_arch) Add new case.
4196 * configure.in: (bfd_v850_arch) Add new case.
4197 * v850-opc.c: New file.
4201 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
4205 * d10v-opc.c: Add additional information to the opcode
4206 table to help determinine which instructions can be done
4211 * mpw-make.sed: Update editing of include pathnames to be
4216 * arm-opc.h: Added "bx" instruction definition.
4220 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
4224 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
4228 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
4232 * makefile.vms: Update for alpha-opc changes.
4236 * i386-dis.c (print_insn_i386): Actually return the correct value.
4237 (ONE, OP_ONE): #ifdef out; not used.
4241 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
4242 Changed subi operand type to treat 0 as 16.
4246 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
4251 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
4252 memory transfer instructions. Add new format string entries %h and %s.
4253 * arm-dis.c: (print_insn_arm): Provide decoding of the new
4258 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
4259 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
4263 * alpha-dis.c (print_insn_alpha_osf): Remove.
4264 (print_insn_alpha_vms): Remove.
4265 (print_insn_alpha): Make globally visible. Chose the register
4266 names based on info->flavour.
4267 * disassemble.c: Always return print_insn_alpha for the alpha.
4271 * d10v-dis.c (dis_long): Handle unknown opcodes.
4275 * d10v-opc.c: Changes to support signed and unsigned numbers.
4276 All instructions with the same name that have long and short forms
4277 now end in ".l" or ".s". Divs added.
4278 * d10v-dis.c: Changes to support signed and unsigned numbers.
4282 * d10v-dis.c: Change all functions to use info->print_address_func.
4286 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
4287 move ccr/sr insns more strict so that the disassembler only
4288 selects them when the addressing mode is data register.
4291 * d10v-opc.c (pre_defined_registers): Declare.
4292 * d10v-dis.c (print_operand): Now uses pre_defined_registers
4293 to pick a better name for the registers.
4297 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
4298 operands for fexpand and fpmerge. From Christian Kuehnke
4303 * alpha-dis.c (print_insn_alpha): No longer the user-visible
4304 print routine. Take new regnames and cpumask arguments.
4305 Kill the environment variable nonsense.
4306 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
4307 (print_insn_alpha_vms): New function. Do VMS style regnames.
4308 * disassemble.c (disassembler): Test bfd flavour to pick
4309 between OSF and VMS routines. Default to OSF.
4313 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
4314 * configure: Rebuild.
4315 * Makefile.in (install): Use @INSTALL_SHLIB@.
4319 * configure: (bfd_d10v_arch) Add new case.
4320 * configure.in: (bfd_d10v_arch) Add new case.
4321 * d10v-dis.c: New file.
4322 * d10v-opc.c: New file.
4323 * disassemble.c (disassembler) Add entry for d10v.
4327 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
4328 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
4332 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
4333 distinguish between variants of the instruction set.
4334 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
4335 distinguish between variants of the instruction set.
4339 * i386-dis.c (print_insn_i8086): New routine to disassemble using
4340 the 8086 instruction set.
4341 * i386-dis.c: General cleanups. Make most things static. Add
4342 prototypes. Get rid of static variables aflags and dflags. Pass
4343 them as args (to almost everything).
4347 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
4349 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
4351 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
4352 if the next arg is marked with SRC_IN_DST. Gross.
4354 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
4355 we're looking for and find EXR.
4357 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
4358 if we're looking for KBIT and we don't find it.
4360 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
4363 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
4364 3bit immediate operands.
4368 * Released binutils 2.7.
4370 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
4375 * alpha-opc.c: Correct second case of "mov" to use OPRL.
4379 * sparc-dis.c (print_insn_sparclite): New routine to print
4380 sparclite instructions.
4384 * m68k-opc.c (m68k_opcodes): Add coldfire support.
4388 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
4389 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
4390 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
4394 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
4395 Use autoconf-set values.
4396 (docdir, oldincludedir): Removed.
4397 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
4401 * alpha-opc.c: New file.
4402 * alpha-opc.h: Remove.
4403 * alpha-dis.c: Complete rewrite to use new opcode table.
4404 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
4405 * configure: Rebuild with autoconf 2.10.
4406 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
4407 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
4409 (alpha-opc.o): New target.
4413 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
4414 Set imm_added_to_rs1 even if the source and destination register
4417 * sparc-opc.c: Add some two operand forms of the wr instruction.
4421 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
4424 * disassemble.c (disassembler): Handle H8/S.
4425 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
4429 * sparc-opc.c: Add beq/teq as aliases for be/te.
4431 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
4436 * makefile.vms: New file.
4438 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
4442 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
4447 * i386-dis.c (OP_OFF): Call append_prefix.
4451 * ppc-opc.c (instruction encoding macros): Add explicit casts to
4452 unsigned long to silence a warning from the Solaris PowerPC
4457 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
4461 * sparc-dis.c (X_IMM,X_SIMM): New macros.
4463 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
4464 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
4465 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
4466 cpush, cpusha, cpull sparclet insns.
4470 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
4474 * sparc-opc.c: Set F_FBR on floating point branch instructions.
4475 Set F_FLOAT on other floating point instructions.
4479 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
4481 (powerpc_opcodes): Add 860/821 specific SPRs.
4485 * configure.in: Permit --enable-shared to specify a list of
4486 directories. Set and substitute BFD_PICLIST.
4487 * configure: Rebuild.
4488 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
4489 uses. Set to @BFD_PICLIST@.
4493 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
4494 not "abs", which may be needed for the absolute in something
4495 like btst #0,@10:8. Print L_3 immediates separately from other
4496 immediates. Change ABSMOV reference to ABS8MEM.
4500 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
4501 (current_arch_mask): New static global.
4502 (compute_arch_mask): New static function.
4503 (print_insn_sparc): Delete sparc_v9_p. New static local
4504 current_mach. Resort opcode table if current_mach changes.
4505 Generalize "insn not supported" test.
4506 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
4507 Delete test for v9/!v9.
4508 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
4510 (brfc): Split into CBR and FBR for coprocessor/fp branches.
4511 (brfcx): Renamed to FBRX.
4512 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
4513 coprocessor mnemonics are not supported on the sparclet).
4514 (condf): Renamed to CONDF.
4515 (SLCBCC2): Delete F_ALIAS flag.
4519 * sparc-opc.c (sparc_opcodes): rd must be 0 for
4520 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
4524 * Makefile.in (config.status): Depend upon BFD VERSION file, so
4525 that the shared library version number is set correctly.
4529 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
4531 * configure: Rebuild.
4535 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
4540 * configure: Rebuild with autoconf 2.8.
4544 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
4545 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
4549 * configure.in: Don't set SHLIB or SHLINK to an empty string,
4550 since they appear as targets in Makefile.in.
4551 * configure: Rebuild.
4555 * mpw-make.sed: Edit out shared library support bits.
4559 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
4560 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
4561 (sparc_opcodes): Add sparclet insns.
4562 (sparclet_cpreg_table): New static local.
4563 (sparc_{encode,decode}_sparclet_cpreg): New functions.
4564 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
4568 * i386-dis.c (index16): New static variable.
4569 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
4571 (OP_indirE): Return result of OP_E.
4572 (OP_E): Check for 16 bit addressing mode, and disassemble
4573 correctly. Optimised 32 bit case a little. Don't print
4574 "(base,index,scale)" when sib specifies only an offset.
4578 * configure.in: Set and substitute SHLIB_DEP.
4579 * configure: Rebuild.
4580 * Makefile.in (SHLIB_DEP): New variable.
4581 (LIBIBERTY_LISTS, BFD_LIST): New variables.
4582 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
4583 COMMON_SHLIB, add them to piclist with appropriate modifications.
4584 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
4585 here: just use piclist.
4589 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
4590 (print_insn_sparc): Rewrite v9/not-v9 tests.
4591 (compare_opcodes): Likewise.
4592 * sparc-opc.c (MASK_<ARCH>): Define.
4593 (v6,v7,v8,sparclite,v9,v9a): Redefine.
4594 (sparclet,v6notv9): Define.
4595 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
4596 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
4600 * configure.in: Call AC_PROG_CC before configure.host.
4601 * configure: Rebuild.
4603 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
4607 * i386-dis.c (onebyte_has_modrm): New static array.
4608 (twobyte_has_modrm): New static array.
4609 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
4613 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
4618 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
4623 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
4624 m68010up, not just m68020up | cpu32.
4626 * Makefile.in (SONAME): New variable.
4627 ($(SHLINK)): Make a link to the transformed name, as well.
4628 (stamp-tshlink): New target.
4629 (install): Skip stamp-tshlink during install.
4633 * configure.in: Call AC_ARG_PROGRAM.
4634 * configure: Rebuild.
4635 * Makefile.in (program_transform_name): New variable.
4636 (install): Transform library name before installing it.
4640 * i960-dis.c (mem): Add HX dcinva instruction.
4642 Support for building as a shared library, based on patches from
4644 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
4645 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
4646 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
4647 * configure: Rebuild.
4648 * Makefile.in (ALLLIBS): New variable.
4649 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
4650 (COMMON_SHLIB, SHLINK): New variables.
4651 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
4652 (STAGESTUFF): Remove variable.
4653 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
4654 (stamp-piclist, piclist): New targets.
4655 ($(SHLIB), $(SHLINK)): New targets.
4656 ($(OFILES)): Depend upon stamp-picdir.
4657 (disassemble.o): Build twice if PICFLAG is set.
4658 (MOSTLYCLEAN): Add pic/*.o.
4659 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
4660 (distclean): Remove pic and stamp-picdir.
4661 (install): Install shared libraries.
4662 (stamp-picdir): New target.
4666 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
4667 Print unknown instruction as "unknown", rather than in hex.
4671 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
4675 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
4679 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
4680 when necessary. From Ulrich Drepper
4685 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
4686 sparc_num_opcodes. Update architecture enum values.
4687 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
4688 (sparc_opcode_lookup_arch): New function.
4689 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
4690 (sparc_opcodes): Add v9a shutdown insn.
4694 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
4695 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
4697 (print_insn_sparc64): Deleted.
4698 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
4701 * sparc-opc.c (architecture_pname): Add v9a.
4705 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
4706 incorrectly defined as 0x16 when it should be 0x15.
4707 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
4708 (alpha_insn_set): added cvtst and cvttq float ops. Also added
4709 excb (exception barrier) which is defined in the Alpha
4710 Architecture Handbook version 2.
4711 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
4712 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
4713 disassembled as or, for example.
4717 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
4718 (_print_insn_mips): Change i from int to unsigned int.
4722 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
4723 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
4727 * i386-dis.c: Added Pentium Pro instructions.
4731 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
4736 * sh-opc.h (sh_nibble_type): Added REG_B.
4737 (sh_arg_type): Added A_REG_B.
4738 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
4740 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
4744 * disassemble.c (disassembler): Use new bfd_big_endian macro.
4748 * Makefile.in (distclean): Remove stamp-h. From Ronald
4754 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
4759 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
4760 (sh_table): Added many SH3 opcodes.
4761 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
4765 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
4766 (subco,subco.): Mark this PPC, not PPCCOM.
4770 * configure: Rebuild with autoconf 2.7.
4774 * configure: Rebuild with autoconf 2.6.
4778 * configure.in: Sort list of architectures. Accept but do nothing
4779 for alliant, convex, pyramid, romp, and tahoe.
4783 * a29k-dis.c (print_special): Change num to unsigned int.
4787 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
4792 * configure.in: Call AC_CHECK_PROG to find and cache AR.
4793 * configure: Rebuilt.
4797 * configure.in: Add case for bfd_i860_arch.
4798 * configure: Rebuild.
4802 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
4803 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
4804 (NEXTDOUBLE): Likewise.
4805 (print_insn_m68k): Don't match fmoveml if there is more than one
4806 register in the list.
4807 (print_insn_arg): Handle a place of '8' for a type of 'L'.
4811 * m68k-opc.c: Use #W rather than #w.
4812 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
4816 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
4817 and likewise for all the dbxx opcodes.
4821 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
4825 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
4826 the VR4100 specific instructions to the mips_opcodes structure.
4830 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
4831 ugly Metrowerks bug in CW6, is fixed in CW7.
4835 * ppc-opc.c (whole file): Add flags for common/any support.
4839 * Makefile.in (BISON): Remove macro.
4840 (FLAGS_TO_PASS): Remove BISON.
4846 * m68k-dis.c (print_insn_m68k): Recognize all two-word
4847 instructions that take no args by looking at the match mask.
4848 (print_insn_arg): Always print "%" before register names.
4849 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
4850 [case '_']: Don't print "@#" before address.
4851 [case 'J']: Use "%s" as format string, not register name.
4852 [case 'B']: Treat place == 'C' like 'l' and 'L'.
4856 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
4863 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
4864 (alpha_insn_set): added definitions for VAX floating point
4865 instructions (Unix compilers don't generate these, but handcoded
4866 assembly might still use them).
4868 * alpha-dis.c (print_insn_alpha): added support for disassembling
4869 the miscellaneous instructions in the Alpha instruction set.
4873 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
4874 no longer create sysdep.h, sed ppc-opc.c to work around a
4875 serious Metrowerks C bug.
4876 * mpw-make.in: Remove.
4877 * mpw-make.sed: New file, used by mpw-configure to edit
4878 Makefile.in into an MPW makefile.
4882 * Makefile.in (maintainer-clean): New synonym for realclean.
4886 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
4887 which use '0', '1', and '2' instead. Specify the proper size for
4888 a pmove immediate operand. Correct the pmovefd patterns to be
4889 moves to a register, not from a register.
4890 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
4894 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
4895 %psr, %wim, %tbr as F_NOTV9.
4899 * Makefile.in (Makefile): Just rebuild Makefile when running
4901 (config.h, stamp-h): New targets.
4902 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
4903 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
4904 rebuilding config.h.
4905 * configure: Rebuild.
4907 * mips-opc.c: Change unaligned loads and stores with "t,A"
4908 operands to use "t,A(b)".
4912 * sh-dis.c (print_insn_shx): Add F_FR0 support.
4916 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
4917 until 3 instead of until 2.
4921 * Makefile.in (ALL_CFLAGS): Define.
4922 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
4923 (MOSTLYCLEAN): Add config.log.
4924 (distclean): Don't remove config.log.
4925 * configure.in: Substitute HDEFINES.
4926 * configure: Rebuild.
4930 * sh-opc.h (sh_arg_type): Add F_FR0.
4931 (sh_table, case fmac): Add F_FR0 as first argument.
4935 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
4939 * sparc-dis.c: Remove all references to NO_V9.
4943 * aclocal.m4: Just include ../bfd/aclocal.m4.
4944 * configure: Rebuild.
4948 * sparc-dis.c (X_DISP19): Define.
4949 (print_insn, case 'G'): Use it.
4950 (print_insn, case 'L'): Sign extend displacement.
4954 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
4955 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
4956 host_makefile_frag or frags.
4957 * aclocal.m4: New file.
4958 * configure: Rebuild.
4959 * Makefile.in (INSTALL): Set to @INSTALL@.
4960 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
4961 (INSTALL_DATA): Set to @INSTALL_DATA@.
4963 (AR_FLAGS): Set to rc rather than qc.
4964 (CC): Define as @CC@.
4965 (CFLAGS): Set to @CFLAGS@.
4966 (@host_makefile_frag@): Remove.
4967 (config.status): Remove dependency upon @frags@.
4969 * configure.in: ../bfd/config.bfd now just sets shell variables.
4970 Use them rather than looking through target Makefile fragments.
4971 * configure: Rebuild.
4975 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
4979 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
4980 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
4983 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
4984 (lookup_{name,value}): New functions.
4985 (prefetch_table): New static local.
4986 (sparc_{encode,decode}_prefetch): New functions.
4987 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
4991 * sh-opc.h: Add blank lines to improve readabililty of sh3e
4996 * sh-dis.c: Correct comment on first line of file.
5000 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
5002 * sparc-opc.c (asi, membar): New static locals.
5003 (sparc_{encode,decode}_{asi,membar}): New functions.
5004 (sparc_opcodes, membar insn): Fix.
5005 * sparc-dis.c (print_insn): Call sparc_decode_asi.
5006 Support decoding of membar masks.
5011 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
5015 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
5016 and likewise for the other branches. Add bhs as an alias for bcc,
5017 and likewise for the size variants. Add dbhs as an alias for
5022 * sh-opc.h (FP sts instructions): Update to match reality.
5026 * m68k-dis.c: (fpcr_names): Add % before all register names.
5027 (reg_names): Likewise.
5028 (print_insn_arg): Don't explicitly print % before register names.
5029 Add % before register names in static array names. In case 'r',
5030 print data registers as `@(Dn)', not `Dn@'. When printing a
5031 memory address, don't print @# before it.
5032 (print_indexed): Change base_disp and outer_disp from int to
5033 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
5034 syntax. Sign extend 8 byte displacement correctly.
5035 (print_base): Print using MIT syntax. Print zpc when appropriate.
5036 Change parameter disp from int to bfd_vma.
5038 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
5043 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
5044 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
5045 * sh-opc.h (sh_arg_type): Add new operand types.
5046 (sh_table): Add new opcodes from SH3E Floating Point ISA.
5050 * Makefile.in (distclean): Remove generated file config.h.
5054 * Makefile.in (distclean): Remove generated file config.h.
5058 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
5060 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
5062 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
5063 rather than numopcodes. Use m68k_opcodes rather than removed
5064 opcode function. Don't check F_ALIAS.
5065 (print_insn_arg): Change first parameter to be const char *.
5066 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
5067 (m68k-opc.o): New target.
5068 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
5069 * configure: Rebuild.
5073 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
5074 (opcode_bits, opcode_hash_table): New variables.
5075 (opcodes_initialized): Renamed from opcodes_sorted.
5076 (build_hash_table): New function.
5077 (is_delayed_branch): Use hash table.
5078 (print_insn): Renamed from print_insn_sparc, made static.
5079 Build and use hash table. If !sparc64, ignore sparc64 insns,
5080 and vice-versa if sparc64.
5081 (print_insn_sparc, print_insn_sparc64): New functions.
5082 (compare_opcodes): Move sparc64 opcodes to end.
5083 Print commutative insns with constant second.
5084 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
5088 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
5089 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
5090 avoids printing a delay slot in a delay slot.
5091 * sh-opc.h (sh_table): Fully bracket last entry.
5095 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
5099 * configure.in: Get host_makefile_frag from ${srcdir}.
5101 * configure.in: Autoconfiscated. Check for string[s].h. Create
5102 config.h from config.in. Don't set up sysdep.h link.
5103 * sysdep.h: New file.
5104 * configure, config.in: New files, generated from configure.in.
5105 * Makefile.in: Updated to be processed autoconf-style.
5106 (distclean): Keep sysdep.h. Remove config.log and config.cache.
5107 (Makefile): Depend on config.status.
5108 (config.status): New rule.
5109 * configure.bat: Update Makefile substitutions.
5113 * mips-opc.c (L1): Define.
5114 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
5115 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
5120 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
5121 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
5122 have multiple add units but only a single logical unit.
5124 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
5125 shifted by 18, without any insertion or extraction function.
5126 (insert_cr, extract_cr): Remove.
5130 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
5135 * mpw-config.in: Add sh and i386 configs, remove sparc config.
5136 * sh-opc.h: Add copyright.
5140 * Makefile.in (crunch-m68k): Delete extra target accidentally
5141 checked in a while ago.
5145 * sh-opc.h (sh_table): Add SH3 support.
5149 * sh-opc.h: Added bsrf and braf.
5153 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
5154 bogus [ls]fm{ea,fd} patterns.
5156 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
5157 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
5158 initialize it from memory. Make function static.
5159 (print_insn_{big,little}_arm): New functions.
5160 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
5161 the correct endianness.
5165 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
5170 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
5171 17th, so that it builds again using GCC as the compiler.
5175 * mips-dis.c (print_insn_little_mips): Cast return value from
5176 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
5177 expects an unsigned long, and that might be fewer words of
5178 argument storage (e.g., if bfd_vma is long long on a 32-bit
5180 (print_insn_big_mips): Likewise with bfd_getb32 value.
5181 (_print_insn_mips): Now static.
5185 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
5186 gcc memory hog problem with initializer is fixed.
5190 Merge in support for Mac MPW as a host.
5191 (Old change descriptions retained for informational value.)
5193 * mpw-config.in (archname): Compute from the config.
5194 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
5196 * mpw-config.in (target_arch): Compute from canonical target.
5197 (m68k, mips, powerpc, sparc): Add architectures.
5198 * mpw-make.in (disassemble.c.o): Add.
5199 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
5201 * mpw-config.in (BFD_MACHINES): Set to a default value.
5202 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
5204 * mpw-make.in (CSEARCH): Add extra-include to search path.
5206 * mpw-config.in (varargs.h): Don't create.
5207 (sysdep.h): Create using forward-include.
5208 * mpw-make.in (CSEARCH): Add include/mpw to search path.
5210 * mpw-config.in: New file, MPW version of configure.in.
5211 * mpw-make.in: New file, MPW version of Makefile.in.
5215 * alpha-dis.c (print_insn_alpha): Put empty statement after
5220 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
5221 (low_sign_extend): Likewise.
5222 (get_field): Delete unused function.
5223 (set_field, deposit_14, deposit_21): Likewise.
5227 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
5234 * alpha-opc.h (OSF_ASMCODE): define
5235 print pal-code names as defined in App C of the
5236 Alpha Architecture Reference Manual
5238 * alpha-dis.c: cleaned up output
5239 print stylized code forms as defined in App A.4.3 of the
5240 Alpha Architecture Reference Manual
5244 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
5246 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
5251 * m68k-dis.c (opcode): New function. Returns address of opcode
5252 table entry given index, even if the opcode table was split to
5253 work around gcc bugs.
5254 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
5256 (BREAK_UP_BIG_DECL): Make secondary array static and const.
5257 (reg_names): Now const.
5258 (print_insn_arg): Arrays cacheFieldName and names now const.
5259 (print_indexed): Array scales now const.
5263 * ppc-opc.c: Sort recently added instructions by minor opcode
5264 number within major opcode number.
5268 * hppa-dis.c: Include libhppa.h.
5272 * mips-opc.c: Change dli to use M_DLI, and add dla.
5276 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
5280 * mips-opc.c: Add r4650 mul instruction.
5284 * mips-opc.c: Add uld and usd macros for unaligned double load and
5289 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
5290 mfdcr, mtdcr, icbt, iccci.
5294 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
5295 signed char fields to shorts, more portable.
5299 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
5300 char fields as signed chars, since they may have negative values.
5304 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
5310 * ppc-opc.c (extract_bdm): Correct parenthezisation.
5311 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
5316 * ppc-opc.c: Changes based on patch from David Edelsohn
5318 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
5321 (insert_tbr): New static function.
5322 (extract_tbr): New static function.
5323 (XFXFXM_MASK, XFXM): Define.
5324 (XSPRBAT_MASK, XSPRG_MASK): Define.
5325 (powerpc_opcodes): Add instructions to access special registers by
5326 name. Add mtcr and mftbu.
5330 * mips-opc.c (P3): Define.
5331 (mips_opcodes): Add mad and madu.
5333 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
5335 * configure.in: Add W65 support.
5336 * disassemble.c: Likewise.
5337 * w65-opc.h, w65-dis.c: New files.
5341 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
5346 * mips-opc.c: Add dli as a synonym for li.
5350 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
5351 print something for reserved opcode values, even if it won't
5354 * mips-dis.c (_print_insn_mips): When initializing, shift right
5355 and mask, to avoid sign extension problems on the Alpha.
5357 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
5362 * sh-opc.h (mov.l gbr): Get direction right.
5363 * sh-dis.c (print_insn_shx): New function.
5364 (print_insn_shl, print_insn_sh): Call print_insn_shx to
5365 print opcodes with right byte order.
5369 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
5370 to avoid conflicts with getopt.
5374 * hppa-dis.c (print_insn_hppa): Read the instruction using
5375 bfd_getb32, so that it works on a little endian or 64 bit host.
5376 Remove unused local variable op.
5380 * mips-opc.c: Use or instead of addu for pseudo-op move, since
5381 addu does not work correctly if -mips3.
5385 * a29k-dis.c (print_special): Add special register names defined
5386 on 29030, 29040 and 29050.
5387 (print_insn): Handle new operand type 'I'.
5391 * Makefile.in (INSTALL): Use top level install.sh script.
5395 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
5396 that it works on a little endian host.
5400 * configure.in: Use ${config_shell} when running config.bfd.
5404 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
5408 * a29k-dis.c (print_insn): Print the opcode.
5412 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
5416 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
5420 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
5421 which store a value into memory.
5425 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
5426 * arm-dis.c, arm-opc.h: New files.
5430 * Makefile.in (ns32k-dis.o): Add dependency.
5431 * ns32k-dis.c (print_insn_arg): Declare initialized local as
5432 string, not as array of chars.
5436 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
5438 * sparc-opc.c: Added sparclite extended FP operations, and
5439 versions of v9 impdep* instructions permitting specification of
5444 * i960-dis.c (reg_names): Now const.
5445 (struct sparse_tabent): New type, copied from array type in mem
5447 (ctrl): Local static array ctrl_tab now const.
5448 (cobr): Local static array cobr_tab now const.
5449 (mem): Local variables reg1, reg2, reg3 now point to const. Local
5450 static variable mem_tab no longer explicitly initialized. Changed
5451 mem_init to const array of struct sparse_tabent.
5452 (reg): Local static variable reg_tab no longer explicitly
5453 initialized. Changed reg_init to const array of struct
5455 (ea): Local static array scale_tab now const.
5457 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
5462 * configure.bat: the disassember needs to be enabled for
5463 "objdump -d" to work in djgpp.
5467 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
5468 (invalid_float): Enabled general version, doesn't require running
5469 on ns32k host. Changed to take char* argument, and test for
5470 explicitly specified sizes, instead of using sizeof() on host CPU
5472 (INVALID_FLOAT): Cast first argument.
5473 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
5474 list_P032, list_M032): Now const.
5475 (optlist, list_search): Made appropriate arguments now point to
5477 (print_insn_arg): Changed static array of one-character-string
5478 pointers into a static const array of characters; fixed sprintf
5479 statement accordingly.
5483 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
5484 from distribution. A ns32k-dis.c from a previous distribution has
5485 been brought up to date and supports the new interface.
5487 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
5489 * configure.in: add bfd_ns32k_arch target support.
5491 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
5492 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
5496 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
5501 * h8300-dis.c, mips-dis.c: Don't use true and false.
5505 * configure.in: Change --with-targets to --enable-targets.
5509 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
5510 opcodes to the first instruction with that opcode, to speed
5516 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
5520 * configure.bat: update to latest makefile.in
5524 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
5525 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
5526 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
5527 slot insn is in a delay slot.
5528 * z8k-opc.h: (resflg): Fix patterns.
5529 * h8500-opc.h Fix CR insn patterns.
5533 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
5534 "cmpl" before POWER versions, so that gas -many uses them.
5538 * disassemble.c: New file.
5539 * Makefile.in (OFILES): Add disassemble.o.
5540 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
5541 * configure.in: Define ARCHDEFS in Makefile. Code taken from
5542 binutils/configure.in.
5544 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
5545 opcode being examined.
5549 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
5550 (insert_ral, insert_ram, insert_ras): New functions.
5551 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
5552 RAS for store with update.
5556 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
5561 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
5566 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
5570 * ppc-opc.c (powerpc_operands): The signedp field has been
5571 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
5572 instead. Add new operand SISIGNOPT.
5573 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
5575 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
5580 * i386-dis.c (struct private): Renamed to dis_private. `private'
5581 is a reserved word for dynix cc.
5585 * configure.in: Change error message to refer to bfd/config.bfd
5586 rather than bfd/configure.in.
5590 * ppc-opc.c: Define POWER2 as short alias flag.
5591 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
5596 * i960-dis.c (print_insn_i960): Don't read a second word for
5597 opcodes 0, 1, 2 and 3.
5601 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
5605 * m68881-ext.c: Removed; no longer used.
5606 * Makefile.in: Changed accordingly.
5608 * m68k-dis.c (ext_format_68881): Don't declare.
5609 (print_insn_m68k): If an instruction uses place 'i', it uses at
5610 least four fixed bytes.
5611 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
5612 extended float, convert to double using floatformat_to_double, not
5613 ieee_extended_to_double, and fetch the data before converting it.
5617 * mips-opc.c: It's sqrt.s, not sqrt.w. From
5622 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
5623 PowerPC uses bdnz[l][a].
5627 * dis-buf.c, i386-dis.c: Include sysdep.h.
5631 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
5633 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
5634 by Motorola PowerPC 601 with PPC_OPCODE_601.
5635 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
5636 Disassemble Motorola PowerPC 601 instructions as well as normal
5637 PowerPC instructions.
5641 * i960-dis.c (reg, mem): Just use a static array instead of
5646 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
5647 condition name index if this is for a negated condition.
5649 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
5650 Floating point format for 'H' operand is backwards from normal
5651 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
5652 operands (fmpyadd and fmpysub), handle bizarre register
5653 translation correctly for single precision format.
5655 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
5656 or 'I' operands if the next format specifier is 'M' (fcmp
5657 condition completer).
5661 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
5662 single number giving a bitmask for the MB and ME fields of an M
5663 form instruction. Change NB to accept 32, and turn it into 0;
5664 also turn 0 into 32 when disassembling. Seperated SH from NB.
5665 (insert_mbe, extract_mbe): New functions.
5666 (insert_nb, extract_nb): New functions.
5667 (SC_MASK): Mask out SA and LK bits.
5668 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
5669 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
5670 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
5671 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
5672 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
5673 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
5674 (powerpc_macros): Define table of macro definitions.
5675 (powerpc_num_macros): Define.
5677 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
5678 if PPC_OPERAND_NEXT is set.
5682 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
5683 char. Retrieve contents using bfd_getl32 instead of shifting.
5687 * ppc-opc.c: New file. Opcode table for PowerPC, including
5688 opcodes for POWER (RS/6000).
5689 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
5690 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
5691 (CFILES): Add ppc-dis.c.
5692 (ppc-dis.o, ppc-opc.o): New targets.
5693 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
5697 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
5698 No space before 'u', 'f', or 'N'.
5702 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
5703 farther than we should.
5705 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
5709 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
5713 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
5714 needs it, to prevent reading past the end of a section.
5718 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
5719 Removed t,A case for la; always use t,A(b) case.
5724 * mips-dis.c (print_insn_arg): Handle 'k'.
5725 * mips-opc.c: Make cache use k, not t.
5729 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
5730 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
5731 FLOAT_FORMAT_CODE to put out floating point register names.
5735 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
5739 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
5743 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
5744 larger than 32. Moved dsxx32 variants first for disassembler.
5748 * z8kgen.c, z8k-opc.h: Add full lda information.
5752 * hppa-dis.c (print_insn_hppa): Do not emit a space after
5753 movb instructions. Any necessary space will be emitted by
5754 the code to handle nullification completers.
5758 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
5762 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
5763 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
5767 * mips-opc.c: Correct lwu opcode value (book had it wrong).
5771 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
5772 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
5776 * m88k-dis.c (m88kdis): comment change. Remove space after
5778 (printop): handle new arg types DEC and XREG for m88110.
5782 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
5783 type for absolute branch addresses. Delete special
5784 "ble" and "be" code in 'W' operand code.
5788 * mips-opc.c: Set hazard information correctly for branch
5789 likely instructions.
5793 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
5794 info->fprintf_func for printing and info->print_address_func for
5799 * mips-opc.c: Set INSN_TRAP for tXX instructions.
5804 Corrected second case of "b" for disassembler.
5808 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
5809 to BFD swapping routines to correspond to BFD name changes.
5813 * mips-opc.c: Change div machine instruction to be z,s,t rather
5814 than s,t. Change div macro to be d,v,t rather than d,s,t.
5815 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
5816 rem and remu which generates only the corresponding div
5817 instruction. This is for compatibility with the MIPS assembler,
5818 which only generates the simple machine instruction when an
5819 explicit destination of $0 is used.
5820 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
5825 WR_31 hazard for bal, bgezal, bltzal.
5829 * hppa-dis.c (print_insn_hppa): Use print function
5830 from within the disassemble_info, not fprintf_filtered.
5834 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
5839 * mips-opc.c ("absu"): Removed.
5844 * mips-opc.c: Added r6000 and r4000 instructions and macros.
5845 Changed hazard information to distinguish between memory load
5846 delays and coprocessor load delays.
5850 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
5854 * configure.in: Don't pass cpu to config.bfd.
5858 * m88k-dis.c (m88kdis): Make class unsigned.
5862 * alpha-dis.c (print_insn_alpha): One branch format case was
5863 missing the instruction name.
5867 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
5868 Add the arch-specific auxiliary files.
5869 (OFILES): Remove the arch-specific auxiliary files
5870 and use BFD_MACHINES instead of DIS_LIBS.
5871 * configure.in: Set BFD_MACHINES based on --with-targets option.
5875 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
5880 * sparc-opc.c: Change CONST to const to deal with gcc
5881 -Dconst=__const -traditional.
5886 coprocessor instructions out of #if 0, and made them use new
5891 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
5895 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
5896 instruction, for use by the disassembler.
5898 * sparc-dis.c (SEX): Add sign extension macro. Replace many
5899 hand-coded sign extensions that depended on 32-bit host ints.
5900 FIXME, we still depend on big-endian host bitfield ordering.
5901 (sparc_print_insn): Set the insn_info_valid field, and the
5902 other fields that describe the instruction being printed.
5906 * sparc-opc.c (call): Accept all 6 addressing modes valid for
5907 `jmp' instead of just one of them.
5911 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
5912 (fput_fp_reg_r): Renamed from fput_reg_r.
5913 (fput_fp_reg): New function.
5914 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
5916 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
5918 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
5922 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
5924 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
5925 don't output a space.
5927 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
5931 * mips-opc.c: New file, containing opcode table from
5932 ../include/opcode/mips.h.
5933 * Makefile.in: Add it.
5937 * m88k-dis.c: New file, moved in from gdb and changed to use the
5938 new dis-asm.h disassembler interface.
5939 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
5940 (m88k-dis.o): New target.
5944 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
5945 argument string const char * to correspond to opcode/mips.h.
5949 * mips-dis.c: Updated to account for name changes in new version
5951 * Makefile.in: Added header file dependencies.
5955 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
5959 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
5960 extend, rather than shifts.
5964 * Makefile.in: Undo 15 June change.
5968 * m68k-dis.c (print_insn_arg): Change return value to byte count
5970 * m68k-dis.c: Re-write to detect invalid operands before
5971 printing anything, so we can handle this the same way we
5972 handle invalid opcodes.
5976 * sh-dis.c, sh-opc.h: Understand some more opcodes.
5980 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
5985 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
5987 * configure.in: Do make sysdep.h link.
5988 * Makefile.in: Search ../include. Don't search ../bfd.
5993 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
5994 Do not print a space before the completers specified by
5999 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
6000 defined, since gdb has been fixed.
6003 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
6004 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
6005 be a *disassemble_info, not a *FILE.
6006 * hppa-dis.c: Support 'd', '!', and 'a'.
6007 * hppa-dis.c: Support 's' to extract a 2 bit space register.
6008 * hppa-dis.c: Delete cases which are no longer needed.
6012 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
6016 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
6021 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
6022 * configure.in: No longer need to configure to get sysdep.h.
6027 * hppa-dis.c: Support 'I', 'J', and 'K' in output
6028 templates for 1.1 FP computational instructions.
6032 * h8500-dis.c (print_insn_h8500): Address argument is type
6034 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
6037 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
6038 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
6040 * sparc-dis.c (compare_opcodes): Move static declaration to
6045 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
6046 instruction, remove unimp hack from 'l' argument.
6050 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
6056 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
6061 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
6062 arrays of string pointers to 2-d arrays of chars, to save
6067 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
6068 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
6072 * hppa-dis.c: New file from Utah, adapted to new disassembler
6074 * Makefile.in: Include it.
6078 * sh-dis.c, sh-opc.h: New files.
6082 * alpha-dis.c, alpha-opc.h: New files.
6086 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
6091 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
6095 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
6100 * sparc-dis.c: Use fprintf_func a few places where I forgot,
6101 and double percent signs a few places.
6103 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
6105 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
6106 Use info->print_address_func not print_address.
6108 * dis-buf.c (generic_print_address): New function.
6112 * Makefile.in: Add sparc-dis.c.
6113 sparc-dis.c: New file, merges binutils and gdb versions as follows:
6115 Add `add' instruction to the set that get checked
6116 for a preceding `sethi' in order to print an absolute address.
6117 * (print_insn): Disassembly prefers real instructions.
6118 (is_delayed_branch): Speed up.
6119 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
6120 Still missing some float ops, and needs testing.
6121 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
6122 F_ALIAS. Use printf, not fprintf, when not passing a file
6124 (compare_opcodes): Check that identical instructions have
6125 identical opcodes, complain otherwise.
6128 * Include reg_names.
6130 Use dis-asm.h/read_memory_func interface.
6134 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
6135 deliberately return non-zero to setjmp from longjmp. Otherwise
6136 this code fails to compile.
6140 * m68k-dis.c: Fix prototype for fetch_arg().
6144 * dis-buf.c: New file, for new read_memory_func interface.
6145 Makefile.in (OFILES): Include it.
6146 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
6147 Use new read_memory_func interface.
6151 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
6152 * h8500-opc.h: Fix couple of opcodes.
6154 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
6156 * Makefile.in: add dvi & installcheck targets
6160 * Makefile.in: Update for h8500-dis.c.
6164 * h8500-dis.c, h8500-opc.h: New files
6168 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
6169 ../include/dis-asm.h.
6170 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
6171 and ../gdb/m68k-pinsn.c).
6172 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
6173 and ../gdb/i386-pinsn.c).
6174 * m68881-ext.c: New file. Moved definition of
6175 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
6176 * Makefile.in: Adjust for new files.
6178 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
6179 can be dis-assembled.
6183 * mips-dis.c (print_insn_arg): Now returns void.
6187 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
6188 files that use the macros.
6192 * mips-dis.c: New file, from gdb/mips-pinsn.c.
6193 * Makefile.in (DIS_LIBS): Added mips-dis.o.
6194 (CFILES): Added mips-dis.c.
6198 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
6199 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
6203 * Makefile.in: Improve *clean rules.
6204 * configure.in: Allow a default host.
6206 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
6208 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
6209 files include other sysdep files
6213 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
6217 * configure.in: For host support, use ../bfd/configure.host
6218 so it stays in sync with the ../bfd/hosts database.
6220 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
6222 * configure.in: use cpu-vendor-os triple instead of nested cases
6226 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
6227 *always* the wrong one.
6231 * z8kgen.c: added copyright info
6235 * z8k-dis.c (unparse_instr): prettier tabs
6236 * z8kgen.c -> z8k-opc.h: bug fixes in tables
6238 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
6240 * configure.in: Add ncr* configuration.
6241 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
6242 picayune ANSI compilers happy.
6246 * configure.in (i386): Make i386 and i486 synonymous for now.
6247 * configure.in (i[34]86-*-sysv4): Add my_host definition.
6251 * Makefile.in (install): Fix typo.
6255 * Makefile.in (make): Remove obsolete crud.
6256 (sparc-opc.o): Avoid Sun Make VPATH bug.
6260 * Makefile.in: since there are no SUBDIRS, remove rule and
6261 references of subdir_do.
6265 * Makefile.in (install): Get the library name right here too.
6266 Don't install bfd.h, since it's unrelated to this library. No
6267 subdirs to recurse into, either.
6268 (CFILES): The source file has a .c suffix, not .o.
6270 * sparc-opc.c: New file, moved from BFD.
6271 * Makefile.in (OFILES): Build it.
6275 * z8k-dis.c: fixed forward refferences of some declarations.
6279 * Makefile.in: get the name of the library right
6283 * z8k-dis.c: knows how to disassemble z8k stuff
6284 * z8k-opc.h: new file full of z8000 opcodes
6288 version-control: never