3 * configure: Regenerate.
7 * configure: Regenerate.
8 * configure.ac (BFIN_SIM_EXTRA_OBJS): Delete.
9 * Makefile.in (SIM_OBJS): Delete @BFIN_SIM_EXTRA_OBJS@.
13 * dv-bfin_uart.c [!HAVE_DV_SOCKSER] (dv_sockser_status,
14 dv_sockser_write, dv_sockser_read): Delete.
18 * sim-main.h: Delete run-sim.h include.
22 * aclocal.m4, config.in, configure: Regenerate.
23 * tconfig.in: Rename file ...
24 * tconfig.h: ... here.
28 * tconfig.in: Delete includes.
29 [HAVE_DV_SOCKSER]: Delete.
33 * bfin-sim.c (decode_dsp32alu_0): Change v to bu32.
37 * Makefile.in (SIM_RUN_OBJS): Delete.
42 * Makefile.in ($(srcdir)/linux-fixed-code.h): Put a ; after the
43 print sed command for BSD compatibility.
48 * Makefile.in ($(srcdir)/linux-fixed-code.h): Specify the asm input
49 directly rather than use $<. Move the file name to the end of the
50 sed command to be POSIX compliant.
54 * configure: Regenerate.
58 * configure: Regenerate.
59 * config.in: Regenerate.
63 * configure: Regenerate.
67 * configure: Regenerate.
71 * bfin-sim.c (decode_dsp32alu_0): Add note about broken handling of
72 SEARCH with parallel insns.
76 * bfin-sim.c (decode_dsp32shift_0): Make sure HLs is 0 after last
78 (decode_dsp32shiftimm_0): Likewise.
79 Require HLs be less than 2 for accumulator shift insns.
83 * bfin-sim.c (decode_dsp32alu_0): Check more opcode fields before
84 decoding various insns.
88 * TODO: Add more notes.
92 * Makefile.in ($(srcdir)/linux-fixed-code.h): Add
93 @MAINTAINER_MODE_TRUE@ as the first item in the dependency list.
97 * aclocal.m4, configure: Regenerate.
101 * configure: Rebuild.
105 * aclocal.m4, configure: Regenerate.
109 * configure.ac: Use $SIM_DV_SOCKSER_O.
110 * configure: Regenerated.
114 * aclocal.m4: Revert the previous change changing
115 the license from GPL v2 or later to GPL v3 or later
116 (this file was generated).
120 * linux-fixed-code.s: Revert the previous change changing
121 the license from GPL v2 or later to GPL v3 or later.
125 * machs.c (bf54x_roms): Pass 0x1000 to alias field of BFROM, and
126 0x10000 to the alias field of BFROMA.
127 (bf561_roms): Pass 0x1000 to alias field of BFROM.
128 (bf59x_roms): Pass 0x10000 to alias field of BFROMA.
132 * machs.c (bfin_reg_fetch): Change return 0 to return -1, and
133 return -1 to return 4.
134 (bfin_reg_store): Likewise.
138 * config.in, configure: Regenerate.
142 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pint.
143 * configure: Regenerate.
144 * dv-bfin_pint.c, dv-bfin_pint.h: New device model.
145 * machs.c (bf542_dev): Add PINT register blocks.
146 (bf544_dev, bf547_dev): Likewise.
148 (bf54x_port): Add pint/gpio routing.
149 * machs.h (BFIN_MMR_PINT_SIZE): Define.
153 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio2.
154 * configure: Regenerate.
155 * dv-bfin_gpio2.c, dv-bfin_gpio2.h: New device model.
156 * machs.c (bf54x_mem): Delete GPIO mem stub.
157 (bf542_dev): Add GPIO register blocks.
158 (bf544_dev, bf547_dev): Likewise.
159 * machs.h (BFIN_MMR_GPIO2_SIZE): Define.
163 * bfin-sim.c (decode_dsp32shift_0): Extract the sign for ASHIFT
164 and LSHIFT, and set ASTAT based on the before/after values.
165 Rename "val" to "acc" to be consistent with other code branches.
169 * bfin-sim.c (sgn_extend): New helper.
170 (decode_dsp32shiftimm_0): Call lshift when newimmag is more
171 than 16, otherwise call ashiftrt. Set ASTAT fields as needed.
172 For accumulator shifts, call new sgn_extend helper.
176 * bfin-sim.c (illegal_instruction_or_combination): New helper.
177 (decode_ProgCtrl_0): Call illegal_instruction_or_combination instead
178 of illegal_instruction.
179 (decode_PushPopReg_0, decode_CCflag_0, decode_CC2dreg_0,
180 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
181 decode_dspLDST_0, decode_LDST_0, _interp_insn_bfin): Likewise.
182 (decode_PushPopMultiple_0): Call illegal_instruction_combination when
183 PARALLEL_GROUP is not BFIN_PARALLEL_NONE.
184 (decode_CCflag_0, decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0,
185 decode_COMPI2opD_0, decode_COMPI2opP_0): Likewise.
186 (decode_CC2stat_0): Check PARALLEL_GROUP before cbit.
187 (decode_LDSTpmod_0): Call illegal_instruction_combination when
188 PARALLEL_GROUP is BFIN_PARALLEL_GROUP2.
189 (decode_dagMODim_0, decode_dagMODik_0, decode_LDST_0,
190 decode_LDSTiiFP_0, decode_LDSTii_0): Likewise.
194 * bfin-sim.h (bfin_parallel_group): New enum.
195 (bfin_cpu_state): Add new "group" member.
196 (PARALLEL_GROUP): Define.
197 * bfin-sim.c (decode_ProgCtrl_0): Change INSN_LEN check to
199 (decode_CaCTRL_0, decode_PushPopReg_0, decode_ccMV_0, decode_CCflag_0,
200 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
201 decode_LOGI2op_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
202 decode_CALLa_0, decode_linkage_0): Likewise.
203 (_interp_insn_bfin): Set PARALLEL_GROUP.
204 (interp_insn_bfin): Likewise.
208 * bfin-sim.c (decode_dsp32alu_0): Delete extra space in TRACE_INSN.
212 * bfin-sim.c (_interp_insn_bfin): Call illegal_instruction_combination
213 when INSN_LEN is non-zero before 32bit decode.
217 * bfin-dis.c (fmtconst): Replace decimal handling with a single
218 sprintf call and the '*' field width.
222 * machs.c (bfin_model_map_bfrom): Return when mnum is 535.
226 * interp.c (bfin_user_init): Move auxvt_size decl from top to
227 inside of auxvt check.
231 * dv-bfin_sic.c (bfin_sic_finish): Change iwr1 to iwr2.
235 * devices.c: Include devices.h.
239 * aclocal.m4, config.in, configure: Regenerate.
244 * bfin-sim.c (lshift): Add an overflow flag. Delete now unused
245 i, j, and tmp vars. Add a new v_i var. Split the overflow logic
246 out from the saturate logic. Do not set V ASTAT bits when working
248 (decode_ALU2op_0): Add new argument to lshift call.
249 (decode_LOGI2op_0, decode_dsp32shift_0, decode_dsp32shiftimm_0):
254 * dv-bfin_ebiu_amc.c (struct bfin_ebiu_amc): Add bank_base.
255 (bfin_ebiu_amc_write_amgctl): Replace BFIN_EBIU_AMC_BASE with
257 (bfin_ebiu_amc_finish): Assign BFIN_EBIU_AMC_BASE to amc->bank_base.
261 * dv-bfin_ebiu_amc.c (bfin_ebiu_amc_attach_address_callback): Use
262 ARRAY_SIZE rather than hardcoded constant.
266 * config.in: Regenerate.
267 * configure: Likewise.
268 * configure.ac: Add linux/types.h to AC_CHECK_HEADERS.
269 * dv-eth_phy.c: Check for HAVE_LINUX_TYPES_H, and delete __u16 and
270 _LINUX_TYPES_H defines.
274 * interp.c (bfin_syscall): Increase _tbuf storage. Declare new local
275 tstr buffer. Call cb_get_string on tstr when handling CB_SYS_stat64,
276 CB_SYS_lstat64, CB_SYS_open, CB_SYS_write, CB_SYS_unlink,
277 CB_SYS_truncate, CB_SYS_rename, CB_SYS_stat, CB_SYS_lstat. Include
278 tstr in the tbuf output.
282 * Makefile.in: Delete all dependency rules.
283 * aclocal.m4, configure: Regenerate.
287 * configure: Regenerate after common/acinclude.m4 update.
291 * configure.ac: Change include to common/acinclude.m4.
292 * aclocal.m4, configure: Regenerate.
296 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
297 call. Replace common.m4 include with SIM_AC_COMMON.
298 * configure: Regenerate.
302 * bfin-sim.c (decode_dsp32shift_0): Use STORE() for VIT_MAX insns.
306 * interp.c (sim_do_command): Delete.
310 * interp.c (cb_linux_stat_map_32, cb_linux_stat_map_64): Rename from
311 stat_map_32 and stat_map_64.
312 (cb_libgloss_stat_map_32): New stat map.
313 (stat_map_32, stat_map_64): New stat map pointers.
314 (bfin_user_init): Assign stat_map_32 to cb_linux_stat_map_32 and
315 stat_map_64 to cb_linux_stat_map_64.
316 (bfin_virtual_init): New function.
317 (sim_create_inferior): Call bfin_virtual_init for all other envs.
321 * interp.c (bfin_syscall): Delete old comment. Set dreg 1 to
322 sc.result2 and dreg 2 to sc.errcode.
326 * bfin-sim.c (decode_dsp32shift_0): Clear ASTAT[AV] if val is 0,
327 else set it. Set ASTAT[AVS] if val is 0. Do this for LSHIFT and
328 ASHIFT accumulator insns.
332 * bfin-sim.c (ashiftrt): If size is 40, do not call SET_ASTATREG.
333 (lshiftrt): Likewise.
337 * bfin-sim.c (decode_dsp32shift_0): Use get_unextended_acc
338 rather than get_extended_acc in LSHIFT insns.
342 * bfin-sim.c (decode_macfunc): Handle MM when mmod is M_TFU.
343 Check MM once when mmod is M_FU to match M_TFU better.
347 * bfin-sim.c (decode_dsp32shiftimm_0): When shift is greater than
348 32, perform a left shift. Update the corresponding AV bit. Set
349 AZ when the low 32bits are also zero.
353 * bfin-sim.c (decode_dsp32shiftimm_0): With left shift vector insns,
354 call lshift only when count is positive. Otherwise, call ashiftrt.
355 With arithmetic right shift insns, call ashiftrt when the value is
356 small enough, otherwise call lshift.
360 * bfin-sim.c (extract_mult): Call saturate_s16 directly when
361 mmod is M_IH rather than computing the result by hand.
365 * bfin-sim.c (decode_macfunc): Add nosat_acc to track acc value
366 before saturation, set sat when more cases saturate, and set the
367 overflow bit based on these results. For M_TFU, M_IU, M_FU, and
368 M_W32, change the max values compared against.
369 (decode_dsp32mac_0): Delete v_i and add v_0 and v_1. Pass v_1
370 when processing MAC1 and pass v_0 when processing MAC0. Combine
371 the results into the V/VS ASTAT bits.
375 * bfin-sim.c (extract_mult): Call saturate_s32 when MM is set
376 and mmod is M_IU. Call saturate_s16 when MM is set and mmod
381 * bfin-sim.c (decode_multfunc): Call new is_macmod_signed, and
382 allow MM to sign extend all the time.
383 (decode_macfunc): Likewise. Drop sign extension of unsigned
388 * bfin-sim.c (saturate_s40_astat): Change ">=" to ">".
389 (decode_macfunc): Likewise when mmod is M_IH.
393 * interp.c (sim_create_inferior): Change free to freeargv.
397 * machs.c (bf534_dev, bf537_dev): Add glue-or devices.
398 (bf537_port): Define applicable devices with PORT to the glue-or
399 devices instead of SIC.
400 (bfin_model_hw_tree_init): Drop old sim_hw_parse call for bfin_sic.
401 Only parse reg/type when the device has an address. Move the call
402 to dv_bfin_hw_port_parse up before slash check.
406 * dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Move above the
407 BFIN_SIC_TO_CEC_PORTS definition.
408 (SIC_PORTS): New define.
409 (bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
410 bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
411 bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
413 (bfin_sic1_ports, bfin_sic2_ports, bfin_sic3_ports,
414 bfin_sic_561_ports): Define new layouts with SIC_PORTS().
415 (bfin_sic_finish): Change reference to bfin_sic_50x_ports,
416 bfin_sic_51x_ports, bfin_sic_52x_ports, and bfin_sic_538_ports
417 to bfin_sic2_ports. Change reference to bfin_sic_533_ports,
418 bfin_sic_537_ports, and bfin_sic_59x_ports to bfin_sic1_ports.
419 Change reference to bfin_sic_54x_ports to bfin_sic3_ports.
420 * machs.c (bfin_port_layout): New structure.
421 (bfin_model_data): Add new "port" and "port_count" members.
422 (PORT, SIC): New defines.
423 (bf000_port, bf50x_port, bf51x_port, bf52x_port, bf533_port,
424 bf537_port, bf538_port, bf54x_port, bf561_port, bf592_port):
425 Move and redefine port layout from dv-bfin_sic.c to here.
426 (bf504_port, bf506_port, bf512_port, bf514_port, bf516_port,
427 bf518_port, bf522_port, bf523_port, bf524_port, bf525_port,
428 bf526_port, bf527_port, bf531_port, bf532_port, bf534_port,
429 bf536_port, bf539_port, bf542_port, bf544_port, bf547_port,
430 bf548_port, bf549_port): New defines.
431 (bfin_model_data): Link in new bfin_port_layout.port member.
432 (dv_bfin_hw_port_parse): New function.
433 (dv_bfin_hw_parse): Call new dv_bfin_hw_port_parse function.
434 (bfin_model_hw_tree_init): Replace calls to sim_hw_parse for
435 bfin_sic links with new dv_bfin_hw_port_parse function.
439 * dv-bfin_dma.c (bfin_dma_io_write_buffer): Fix indentation.
443 * sim-main.h (TRACE_SYSCALL): Change EVENTS to SYSCALL.
447 * dv-bfin_cec.h (BFIN_COREMMR_CEC_{BASE,SIZE}): Move to ...
448 * dv-bfin_ctimer.h (BFIN_COREMMR_CTIMER_{BASE,SIZE}): Move to ...
449 * dv-bfin_dma.h (BFIN_MMR_DMA_SIZE): Move to ...
450 * dv-bfin_dmac.h (BFIN_MMR_DMAC{0,1}_BASE): Move to ...
451 * dv-bfin_ebiu_amc.h (BF{IN,50X,54X}_MMR_EBIU_AMC_SIZE): Move to ...
452 * dv-bfin_ebiu_ddrc.h (BFIN_MMR_EBIU_DDRC_SIZE): Move to ...
453 * dv-bfin_ebiu_sdc.h (BFIN_MMR_EBIU_SDC_SIZE): Move to ...
454 * dv-bfin_emac.h (BFIN_MMR_EMAC_{BASE,SIZE}): Move to ...
455 * dv-bfin_eppi.h (BFIN_MMR_EPPI_SIZE): Move to ...
456 * dv-bfin_evt.h (BFIN_COREMMR_EVT_{BASE,SIZE}): Move to ...
457 * dv-bfin_gpio.h (BFIN_MMR_GPIO_SIZE): Move to ...
458 * dv-bfin_gptimer.h (BFIN_MMR_GPTIMER_SIZE): Move to ...
459 * dv-bfin_jtag.h (BFIN_COREMMR_JTAG_{BASE,SIZE}): Move to ...
460 * dv-bfin_mmu.h (BFIN_COREMMR_MMU_{BASE,SIZE}): Move to ...
461 * dv-bfin_nfc.h (BFIN_MMR_NFC_SIZE): Move to ...
462 * dv-bfin_otp.h (BFIN_MMR_OTP_SIZE): Move to ...
463 * dv-bfin_pfmon.h (BFIN_COREMMR_PFMON_{BASE,SIZE}): Move to ...
464 * dv-bfin_pll.h (BFIN_MMR_PLL_{BASE,SIZE}): Move to ...
465 * dv-bfin_ppi.h (BFIN_MMR_PPI_SIZE): Move to ...
466 * dv-bfin_rtc.h (BFIN_MMR_RTC_SIZE): Move to ...
467 * dv-bfin_sic.h (BFIN_MMR_SIC_{BASE,SIZE}): Move to ...
468 * dv-bfin_spi.h (BFIN_MMR_SPI_SIZE): Move to ...
469 * dv-bfin_trace.h (BFIN_COREMMR_TRACE_{BASE,SIZE}): Move to ...
470 * dv-bfin_twi.h (BFIN_MMR_TWI_SIZE): Move to ...
471 * dv-bfin_uart.h (BFIN_MMR_UART_SIZE): Move to ...
472 * dv-bfin_uart2.h (BFIN_MMR_UART2_SIZE): Move to ...
473 * dv-bfin_wdog.h (BFIN_MMR_WDOG_SIZE): Move to ...
474 * dv-bfin_wp.h (BFIN_COREMMR_WP_{BASE,SIZE}): Move to ...
476 * machs.c: Delete all dv-bfin_*.h includes except for cec/dmac.
480 * Makefile.in (dv-bfin_pfmon.o): New target.
481 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pfmon.
482 * configure: Regenerated.
483 * dv-bfin_pfmon.c, dv-bfin_pfmon.h: New files.
484 * machs.c: Add include new bfin_pfmon.h.
485 (bfin_core_dev): Add pfmon.
489 * machs.c (bf526_roms): Add a region with rev of 2.
490 (bf54x_roms): Add regions with rev of 4.
491 * bfroms/all.h: Include new bf526-0.2.h, bf54x-0.4.h, and
492 bf54x_l1-0.4.h headers.
493 * bfroms/bf526-0.2.h, bfroms/bf54x-0.4.h, bfroms/bf54x_l1-0.4.h:
498 * bfin-sim.c (decode_PushPopReg_0): Delete (grp == 1 && reg == 6)
503 * dv-bfin_uart.c (bfin_uart_write_byte): Add a mcr arg. Declare a
504 local uart. When LOOP_ENA is set in mcr, write to the saved byte
505 and count fields of the uart.
506 (bfin_uart_io_write_buffer): Pass uart->mcr to bfin_uart_write_byte
507 and bfin_uart_get_next_byte.
508 (bfin_uart_get_next_byte): Add a mcr arg. Move uart->saved_count
509 check first, and skip the remaining code when LOOP_ENA is set in mcr.
510 * dv-bfin_uart.h (bfin_uart_write_byte): Add an mcr argument.
511 (bfin_uart_get_next_byte): Likewise.
512 (XOFF, MRTS, RFIT, RFRT, LOOP_ENA, FCPOL, ARTS, ACTS): Define.
513 * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Padd uart->mcr when
514 calling bfin_uart_write_byte and bfin_uart_get_next_byte.
518 * dv-bfin_uart2.c (bfin_uart_io_read_buffer): Clear DR/THRE/TEMT bits
519 from uart->lsr before setting them.
523 * dv-bfin_dmac.c (bfin_dmac): Constify pmap array.
524 (bfin_dmac_50x_pmap, bfin_dmac_51x_pmap, bfin_dmac_52x_pmap,
525 bfin_dmac_533_pmap, bfin_dmac_537_pmap, bfin_dmac0_538_pmap,
526 bfin_dmac1_538_pmap, bfin_dmac0_54x_pmap, bfin_dmac1_54x_pmap,
527 bfin_dmac0_561_pmap, bfin_dmac1_561_pmap, bfin_dmac_59x_pmap):
532 * dv-bfin_gpio.c (bfin_gpio_forward_ouput): New function.
533 (bfin_gpio_io_write_buffer): Store the current port state into
534 "data", and call bfin_gpio_forward_ouput when the data or dir
536 (bfin_gpio_ports): Change p0..p15 to bidirect_port.
540 * dv-bfin_gpio.c (bfin_gpio): Add "int_state" member.
541 (bfin_gpio_forward_int, bfin_gpio_forward_ints): New functions.
542 (bfin_gpio_io_write_buffer): Call bfin_gpio_forward_int when the
543 mask a or mask b MMRs are written.
544 (bfin_gpio_port_event): When handling edge gpios, set the bit in
545 int_state, call bfin_gpio_forward_ints, and then clear the bit.
546 When handling level gpios, clear/set the bit in int_state rather
547 than returning immediately. Call bfin_gpio_forward_ints instead
548 of checking mask[ab] and calling HW_TRACE/hw_port_event directly.
552 * bfin-sim.c (decode_dsp32alu_0): Call STORE instead of SET_DREG for
553 BYTEOP2P, BYTEOP3P, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK, and
555 (decode_dsp32shift_0): Call STORE instead of SET_DREG for PACK,
556 BITMUX, EXTRACT, DEPOSIT, ALIGN8, ALIGN16, and ALIGN24.
560 * bfin-sim.c (decode_dsp32alu_0): Set DIS_ALGN_EXPT when handling
561 BYTEOP2P, BYTEOP3P, SAA, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK,
562 and BYTEUNPACK insns.
566 * dv-bfin_sic.c (bfin_sic_port_event): New helper function.
567 (bfin_sic_52x_port_event, bfin_sic_537_port_event,
568 bfin_sic_54x_port_event, bfin_sic_561_port_event): Include level
569 in the trace output, and call the new bfin_sic_port_event func.
573 * dv-bfin_gpio.c (bfin_gpio_ports): Add p15.
577 * dv-bfin_otp.c (bfin_otp_ports): Declare.
578 (bfin_otp_finish): Call set_hw_ports with bfin_otp_ports.
582 * configure: Regenerate after common/aclocal.m4 changes.
586 * bfin-sim.c (decode_dsp32alu_0): Cast high 16bits of A0.W to bs16
587 and add to casted low 16bits of A0.L and store in val0. Cast high
588 16bits of A1.W to bs16 and add to casted low 16bits of A1.L and
589 store in val1. Delete bit checks of val0 and val1.
593 * bfin-sim.c (decode_dsp32alu_0): Set result to 0x7FFFFFFF when
594 the result was 0x80000000 for RND12 subtraction.
598 * bfin-sim.c (decode_dsp32alu_0): Set VS when V is set.
602 * dv-bfin_gpio.c (bfin_gpio_port_event): Call HW_TRACE at every
603 major code flow point.
604 * dv-bfin_sic.c (bfin_sic_forward_interrupts): Call HW_TRACE just
605 before calling hw_port_event on ourselves.
606 (bfin_sic_52x_port_event, bfin_sic_537_port_event,
607 bfin_sic_54x_port_event, bfin_sic_561_port_event): Call HW_TRACE
608 at the start of the function.
612 * dv-bfin_gpio.c (bfin_gpio_port_event): Split dir/inen bit checking.
613 Normalize "level" to 0/1 values. Shift "level" over by "my_port".
614 Invert port->both bit check.
618 * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Subtract 2 from the
619 valuep pointer for clear MMRs, 4 for set MMRs, and 6 for toggle MMRs.
623 * TODO: Document some known SIC issues.
627 * devices.h (dv_w1c): Fix typos in documentation of "bits" arg.
628 * dv-bfin_cec.c (bfin_cec_io_write_buffer): Pass 0xffee to dv_w1c_4.
629 * dv-bfin_emac.c (bfin_emac_io_write_buffer): Pass 0xe1 to dv_w1c_4
630 for systat MMR and -1 to dv_w1c_4 for [rt]x_stky/mmc_[rt]irqs MMRs.
631 * dv-bfin_eppi.c (bfin_eppi_io_write_buffer): Pass 0x1ff to dv_w1c_2.
632 * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Invert bits to dv_w1c_2.
633 * dv-bfin_jtag.c (bfin_jtag_io_write_buffer): Invert bits to dv_w1c_4.
634 * dv-bfin_nfc.c (bfin_nfc_io_write_buffer): Invert bits to dv_w1c_2.
635 * dv-bfin_otp.c (bfin_otp_io_write_buffer): Invert bits to dv_w1c_2.
636 * dv-bfin_ppi.c (bfin_ppi_io_write_buffer): Invert bits to dv_w1c_2.
637 * dv-bfin_rtc.c (bfin_rtc_io_write_buffer): Invert bits to dv_w1c_2.
638 * dv-bfin_spi.c (bfin_spi_io_write_buffer): Invert bits to dv_w1c_2.
639 * dv-bfin_twi.c (bfin_twi_io_write_buffer): Invert bits to dv_w1c_2.
640 * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Invert bits to dv_w1c_2.
644 * dv-bfin_uart.h (TFI, BI, FE, PE, OE): Define.
648 * dv-bfin_twi.h (LOSTARB): Rename from LOSTARG.
652 * bfin-sim.c (decode_dsp32shift_0): Set acc0 to the unextended
653 value for the VIT_MAX insn, and mask off the result when done.
657 * bfin-sim.c (decode_dsp32alu_0): Set A1 to a1_lo when up_hi is false,
658 and set A0 to a0_lo when up_lo is false.
662 * bfin-sim.c (decode_dsp32alu_0): Call saturate_s40_astat instead of
663 saturate_s40, and use the v parameter to update the AV bit. Set the
664 AC bit only when the final result is 0.
668 * dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Define.
669 (bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
670 bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
671 bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
672 Encode ids with the ENC macro.
673 (bfin_sic_52x_port_event, bfin_sic_537_port_event,
674 bfin_sic_54x_port_event, bfin_sic_561_port_event): Set idx
675 from my_port with DEC_SIC, and set bit from my_port with DEC_PIN.
676 (bfin_sic_533_port_event): Delete.
677 (bfin_sic_finish): Call set_hw_port_event with
678 bfin_sic_537_port_event for BF533 and BF59x targets.
682 * bfin-sim.c (decode_dsp32alu_0): Drop the src0/src1 check for
683 BYTEOP1P, BYTEOP2P, and BYTEOP3P insns.
687 * machs.c (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev,
688 bf533_dev, bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev):
689 Change bfin_gpio addresses from f/g/h to 5/6/7.
690 (bfin_model_hw_tree_init): Add the bfin_gpio address base to 'a'.
694 * configure.ac (AC_CHECK_FUNCS): Check for kill and pread.
695 * configure: Regenerate.
696 * config.in: Regenerate.
697 * interp.c (bfin_syscall): Check for HAVE_{KILL,PREAD} before using
702 * Makefile.in (dv-bfin_gpio.o): New target.
703 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio.
704 * configure: Regenerate.
705 * dv-bfin_gpio.c, dv-bfin_gpio.h: New files.
706 * machs.c: Include dv-bfin_gpio.h.
707 (bf50x_mem, bf51x_mem, bf52x_mem, bf531_mem, bf532_mem, bf533_mem,
708 bf534_mem, bf536_mem, bf537_mem, bf538_mem, bf561_mem, bf592_mem):
709 Delete GPIO memory stubs.
710 (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev, bf533_dev,
711 bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev): Add GPIO
713 (bfin_model_hw_tree_init): Hook up GPIO interrupts to SIC.
717 * bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h, bfroms/bf51x-0.1.h,
718 bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h, bfroms/bf526-0.1.h,
719 bfroms/bf527-0.0.h, bfroms/bf527-0.1.h, bfroms/bf527-0.2.h,
720 bfroms/bf533-0.1.h, bfroms/bf533-0.2.h, bfroms/bf533-0.3.h,
721 bfroms/bf537-0.0.h, bfroms/bf537-0.1.h, bfroms/bf537-0.3.h,
722 bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h, bfroms/bf54x-0.1.h,
723 bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h, bfroms/bf54x_l1-0.1.h,
724 bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h, bfroms/bf59x-0.0.h,
725 bfroms/bf59x_l1-0.1.h, dv-bfin_cec.c, dv-bfin_ctimer.c,
726 dv-bfin_dma.c, dv-bfin_dmac.c, dv-bfin_ebiu_amc.c,
727 dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_sdc.c, dv-bfin_emac.c,
728 dv-bfin_eppi.c, dv-bfin_evt.c, dv-bfin_gptimer.c, dv-bfin_jtag.c,
729 dv-bfin_mmu.c, dv-bfin_nfc.c, dv-bfin_otp.c, dv-bfin_pll.c,
730 dv-bfin_ppi.c, dv-bfin_rtc.c, dv-bfin_sic.c, dv-bfin_spi.c,
731 dv-bfin_trace.c, dv-bfin_twi.c, dv-bfin_uart.c, dv-bfin_uart2.c,
732 dv-bfin_wdog.c, dv-bfin_wp.c, dv-eth_phy.c, gui.c,
733 linux-fixed-code.h, linux-targ-map.h, machs.c, Makefile.in: Fix style.
737 * bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds
742 * bfin-sim.c (decode_macfunc): Move acc STOREs behind op != 3 check.
746 * bfin-sim.c (decode_macfunc): New neg parameter. Set when the
747 high bit is set after extract_mult.
748 (decode_dsp32mac_0): Declare n_1 and n_0. Pass to the decode_macfunc
749 functions. Use these to update the AN bit.
753 * bfin-sim.c (decode_dsp32mult_0): Declare v_i0 and v_i1. Pass to
754 the extract_mult functions. Include these when updating the V, VS,
759 * bfin-sim.c (astat_names): New global bit array.
760 (decode_CC2stat_0): Delete local astat_name and astat_names.
761 (decode_psedodbg_assert_0): Move hardcoded offset into a variable.
762 Print out ASTAT bit values when checking an ASTAT register.
766 * bfin-sim.c (extract_mult): Handle M_IU.
770 * Makefile.in, TODO, aclocal.m4, bfin-sim.c, bfin-sim.h,
771 bfroms/all.h, bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h,
772 bfroms/bf51x-0.1.h, bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h,
773 bfroms/bf526-0.1.h, bfroms/bf527-0.0.h, bfroms/bf527-0.1.h,
774 bfroms/bf527-0.2.h, bfroms/bf533-0.1.h, bfroms/bf533-0.2.h,
775 bfroms/bf533-0.3.h, bfroms/bf537-0.0.h, bfroms/bf537-0.1.h,
776 bfroms/bf537-0.3.h, bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h,
777 bfroms/bf54x-0.1.h, bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h,
778 bfroms/bf54x_l1-0.1.h, bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h,
779 bfroms/bf59x-0.0.h, bfroms/bf59x_l1-0.1.h, config.in, configure,
780 configure.ac, devices.c, devices.h, dv-bfin_cec.c, dv-bfin_cec.h,
781 dv-bfin_ctimer.c, dv-bfin_ctimer.h, dv-bfin_dma.c, dv-bfin_dma.h,
782 dv-bfin_dmac.c, dv-bfin_dmac.h, dv-bfin_ebiu_amc.c, dv-bfin_ebiu_amc.h,
783 dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_ddrc.h, dv-bfin_ebiu_sdc.c,
784 dv-bfin_ebiu_sdc.h, dv-bfin_emac.c, dv-bfin_emac.h, dv-bfin_eppi.c,
785 dv-bfin_eppi.h, dv-bfin_evt.c, dv-bfin_evt.h, dv-bfin_gptimer.c,
786 dv-bfin_gptimer.h, dv-bfin_jtag.c, dv-bfin_jtag.h, dv-bfin_mmu.c,
787 dv-bfin_mmu.h, dv-bfin_nfc.c, dv-bfin_nfc.h, dv-bfin_otp.c,
788 dv-bfin_otp.h, dv-bfin_pll.c, dv-bfin_pll.h, dv-bfin_ppi.c,
789 dv-bfin_ppi.h, dv-bfin_rtc.c, dv-bfin_rtc.h, dv-bfin_sic.c,
790 dv-bfin_sic.h, dv-bfin_spi.c, dv-bfin_spi.h, dv-bfin_trace.c,
791 dv-bfin_trace.h, dv-bfin_twi.c, dv-bfin_twi.h, dv-bfin_uart.c,
792 dv-bfin_uart.h, dv-bfin_uart2.c, dv-bfin_uart2.h, dv-bfin_wdog.c,
793 dv-bfin_wdog.h, dv-bfin_wp.c, dv-bfin_wp.h, dv-eth_phy.c, gui.c,
794 gui.h, insn_list.def, interp.c, linux-fixed-code.h, linux-fixed-code.s,
795 linux-targ-map.h, machs.c, machs.h, proc_list.def, sim-main.h,
796 tconfig.in: New Blackfin port.