2 * This file is part of SIS.
4 * SIS, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, European
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 675
19 * Mass Ave, Cambridge, MA 02139, USA.
38 #define VAL(x) strtol(x,(char *)NULL,0)
40 extern char *readline(char *prompt); /* GNU readline function */
42 /* Command history buffer length - MUST be binary */
45 extern struct disassemble_info dinfo;
46 extern struct pstate sregs;
47 extern struct estate ebase;
51 extern int sis_verbose;
52 extern char *sis_version;
53 extern struct estate ebase;
54 extern struct evcell evbuf[];
55 extern struct irqcell irqarr[];
56 extern int irqpend, ext_irl;
57 extern char uart_dev1[];
58 extern char uart_dev2[];
68 run_sim(sregs, go, icount, dis)
76 sregs->starttime = time(NULL);
77 while (!sregs->err_mode & (go || (icount > 0))) {
78 if (sregs->bptnum && check_bpt(sregs))
85 sregs->asi = 9 - ((sregs->psr & 0x080) >> 7);
88 if (iurev0 && sregs->rett_err) {
90 sregs->asi |= ((sregs->psr & 0x040) >> 6);
94 mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst, &sregs->hold);
99 sregs->pc = sregs->npc;
100 sregs->npc = sregs->npc + 4;
101 mexc = 0; /* Traps ignored during annul */
103 check_interrupts(sregs);
105 sregs->err_mode = execute_trap(sregs);
108 sregs->trap = I_ACC_EXC;
110 if (sregs->histlen) {
111 sregs->histbuf[sregs->histind].addr = sregs->pc;
112 sregs->histbuf[sregs->histind].time = ebase.simtime;
114 if (sregs->histind >= sregs->histlen)
118 printf(" %8u ", ebase.simtime);
119 dis_mem(sregs->pc, 1, &dinfo);
121 dispatch_instruction(sregs);
126 sregs->err_mode = execute_trap(sregs);
134 sregs->tottime += time(NULL) - sregs->starttime;
136 error_mode(sregs->pc);
156 char lastcmd[128] = "reg";
157 char *cmd, *cfile, *bacmd;
158 char *cmdq[HIST_LEN];
162 for (i = 0; i < 64; i++)
164 printf("\n SIS - SPARC intruction simulator %s, copyright Jiri Gaisler 1995\n", sis_version);
166 while (stat < argc) {
167 if (argv[stat][0] == '-') {
168 if (strcmp(argv[stat], "-v") == 0) {
170 } else if (strcmp(argv[stat], "-c") == 0) {
171 if ((stat + 1) < argc) {
173 cfile = argv[++stat];
175 } else if (strcmp(argv[stat], "-nfp") == 0)
178 else if (strcmp(argv[stat], "-iurev0") == 0)
182 else if (strcmp(argv[stat], "-mecrev0") == 0)
185 else if (strcmp(argv[stat], "-uart1") == 0) {
186 if ((stat + 1) < argc)
187 strcpy(uart_dev1, argv[++stat]);
188 } else if (strcmp(argv[stat], "-uart2") == 0) {
189 if ((stat + 1) < argc)
190 strcpy(uart_dev2, argv[++stat]);
191 } else if (strcmp(argv[stat], "-freq") == 0) {
192 if ((stat + 1) < argc)
193 freq = VAL(argv[++stat]);
195 printf("unknown option %s\n", argv[stat]);
200 bfd_load(argv[stat]);
206 printf(" simulating IU rev.0 jmpl/restore bug\n");
210 printf(" simulating MEC rev.0 timer and uart interrupt bug\n");
213 printf("FPU disabled\n");
216 INIT_DISASSEMBLE_INFO(dinfo, stdout, (fprintf_ftype) fprintf);
229 bacmd = (char *) malloc(256);
230 strcpy(bacmd, "batch ");
231 strcat(bacmd, cfile);
232 exec_cmd(&sregs, bacmd);
236 if (cmdq[cmdi] != 0) {
237 remove_history(cmdq[cmdi]);
241 cmdq[cmdi] = readline("sis> ");
242 if (cmdq[cmdi] && *cmdq[cmdi])
243 add_history(cmdq[cmdi]);
245 stat = exec_cmd(&sregs, cmdq[cmdi]);
254 printf("\b\bInterrupt!\n");
256 printf(" Stopped at time %d\n", ebase.simtime);
259 printf("breakpoint at 0x%08x reached\n", sregs.pc);
263 printf("IU in error mode (%d)\n", sregs.trap);
265 printf(" %8d ", ebase.simtime);
266 dis_mem(sregs.pc, 1, &dinfo);
274 cmdi = (cmdi + 1) & (HIST_LEN - 1);