3 * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
4 (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
5 (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
6 (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
7 (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
8 (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
9 (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
10 (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
11 (R_PPC64_D28, R_PPC64_PCREL28): Define.
16 * dis-asm.h (WIDE_OUTPUT): Define.
17 * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
18 (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
19 (PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
23 * elf/bpf.h: New file.
27 * elf/arm.h (Tag_MVE_arch): Define new enum value.
28 * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
32 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
37 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
42 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
46 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
51 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
53 (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
57 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
61 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
65 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
69 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
73 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
77 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
81 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
85 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
86 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
87 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
93 * opcode/mips.h (ASE_EVA_R6): New macro.
94 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
98 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
99 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
104 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
105 (M_SCWP_AB, M_SCDP_AB): Likewise.
109 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
113 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
117 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
121 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
125 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
126 (MAX_TAG_CPU_ARCH): Set value to above macro.
127 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
128 (ARM_AEXT_V8_1M_MAIN): Likewise.
129 (ARM_AEXT2_V8_1M_MAIN): Likewise.
130 (ARM_ARCH_V8_1M_MAIN): Likewise.
134 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
138 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
145 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
146 (sub_ddmmss): Likewise.
150 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
154 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
155 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
156 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
157 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
158 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
159 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
160 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
161 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
166 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
170 * dis-asm.h (struct disassemble_info): Add stop_offset.
174 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
179 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
183 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
184 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
185 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
189 * elf/common.h (NT_ARM_PAC_MASK): Add define.
193 * mach-o/loader.h: Use new OS names in comments.
197 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
198 (splay_tree_delete_value_fn): Likewise.
202 * opcode/s390.h (enum s390_opcode_cpu_val): Add
208 * opcode/aarch64.h (enum aarch64_opnd): Remove
209 AARCH64_OPND_ADDR_SIMPLE_2.
210 (enum aarch64_insn_class): Remove ldstgv_indexed.
214 * coff/ecoff.h: Include coff/sym.h.
222 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
223 (Tag_RISCV_arch): Likewise.
224 (Tag_RISCV_priv_spec): Likewise.
225 (Tag_RISCV_priv_spec_minor): Likewise.
226 (Tag_RISCV_priv_spec_revision): Likewise.
227 (Tag_RISCV_unaligned_access): Likewise.
228 (Tag_RISCV_stack_align): Likewise.
232 * dis-asm.h: include <string.h>
239 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
240 ARM, HP, and EDG demangling styles.
247 * libiberty.h: Mechanically replace "can not" with "cannot".
248 * plugin-api.h: Likewise.
252 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
253 (E_FLAG_RX_V3): New RXv3 type.
254 * opcode/rx.h (RX_Size): Add double size.
255 (RX_Operand_Type): Add double FPU registers.
256 (RX_Opcode_ID): Add new instuctions.
260 Update year range in copyright notice of all files.
262 For older changes see ChangeLog-2018
264 Copyright (C) 2019 Free Software Foundation, Inc.
266 Copying and distribution of this file, with or without modification,
267 are permitted in any medium without royalty provided the copyright
268 notice and this notice are preserved.
274 version-control: never