3 * Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from
4 $(srcdir)/../cpu temporarily when regenerating source files.
5 * Makefile.in: Regenerated.
9 * arm-dis.c (print_insn_arm: case 'A'): Add code to
10 disassemble unindexed form of Addressing Mode 5.
14 * ppc-opc.c (PPC440): Define.
15 (powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci,
16 icread instructions when PPC440. Add dlmzb instruction.
20 * dep-in.sed: Remove libintl.h.
21 * Makefile.am (POTFILES.in): Unset LC_COLLATE.
23 * Makefile.in: Regenerate.
27 * cgen-asm.c (hash_insn_array): Remove PARAMS macro.
28 (hash_insn_list): Ditto.
29 (build_asm_hash_table): Ditto.
30 (cgen_set_parse_operand_fn): Prototype definition.
31 (cgen_init_parse_operand): Ditto.
32 (hash_insn_array): Ditto.
33 (hash_insn_list): Ditto.
34 (build_asm_hash_table): Ditto.
35 (cgen_asm_lookup_insn): Ditto.
36 (cgen_parse_keyword): Ditto.
37 (cgen_parse_signed_integer): Ditto.
38 (cgen_parse_unsigned_integer): Ditto.
39 (cgen_parse_address): Ditto.
40 (cgen_validate_signed_integer): Ditto.
41 (cgen_validate_unsigned_integer): Ditto.
43 * cgen-opc.c (hash_keyword_name): Remove PARAMS macro.
44 (hash_keyword_value): Ditto.
45 (build_keyword_hash_tables): Ditto.
46 (cgen_keyword_lookup_name): Prototype definition.
47 (cgen_keyword_lookup_value): Ditto.
48 (cgen_keyword_add): Ditto.
49 (cgen_keyword_search_init): Ditto.
50 (cgen_keyword_search_next): Ditto.
51 (hash_keyword_name): Ditto.
52 (hash_keyword_value): Ditto.
53 (build_keyword_hash_tables): Ditto.
54 (cgen_hw_lookup_by_name): Ditto.
55 (cgen_hw_lookup_by_num): Ditto.
56 (cgen_operand_lookup_by_name): Ditto.
57 (cgen_operand_lookup_by_num): Ditto.
58 (cgen_insn_count): Ditto.
59 (cgen_macro_insn_count): Ditto.
60 (cgen_get_insn_value): Ditto.
61 (cgen_put_insn_value): Ditto.
62 (cgen_lookup_insn): Ditto.
63 (cgen_get_insn_operands): Ditto.
64 (cgen_lookup_get_insn_operands): Ditto.
65 (cgen_set_signed_overflow_ok): Ditto.
66 (cgen_clear_signed_overflow_ok): Ditto.
67 (cgen_signed_overflow_ok_p): Ditto.
69 * cgen-dis.c (hash_insn_array): Remove PARAMS macro.
70 (hash_insn_list): Ditto.
71 (build_dis_hash_table): Ditto.
72 (count_decodable_bits): Ditto.
73 (add_insn_to_hash_chain): Ditto.
74 (count_decodable_bits): Prototype definition.
75 (add_insn_to_hash_chain): Ditto.
76 (hash_insn_array): Ditto.
77 (hash_insn_list): Ditto.
78 (build_dis_hash_table): Ditto.
79 (cgen_dis_lookup_insn): Ditto.
81 * cgen-asm.in (parse_insn_normal): Remove PARAMS macro.
82 (@arch@_cgen_build_insn_regex): Prototype definition.
83 (parse_insn_normal): Ditto.
84 (@arch@_cgen_assemble_insn): Ditto.
85 (@arch@_cgen_asm_hash_keywords): Ditto.
87 * cgen-dis.in (print_normal): Remove PARAMS macro. Use void *
89 (print_address): Ditto.
90 (print_keyword): Ditto.
91 (print_insn_normal): Ditto.
93 (default_print_insn): Ditto.
95 (print_normal): Prototype definition. Use void * instead of PTR.
96 (print_address): Ditto.
97 (print_keyword): Ditto.
98 (print_insn_normal): Ditto.
101 (default_print_insn): Ditto.
102 (print_insn_@arch@): Ditto.
104 * cgen-ibld.in (insert_normal): Remove PARAMS macro.
105 (insn_insn_normal): Ditto.
106 (extract_normal): Ditto.
107 (extract_insn_normal): Ditto.
108 (put_insn_int_value): Ditto.
112 (insert_1): Prototype definition.
113 (insert_normal): Ditto.
114 (insert_insn_normal): Ditto.
115 (put_insn_int_value): Ditto.
118 (extract_normal): Ditto.
119 (extract_insn_normal): Ditto.
121 * fr30-asm.c: Regenerate.
123 * fr30-ibld.c: Ditto.
129 * ip2k-ibld.c: Ditto.
130 * iq2000-asm.c: Ditto.
131 * iq2000-dis.c: Ditto.
132 * iq2000-ibld.c: Ditto.
135 * m32r-ibld.c: Ditto.
136 * openrisc-asm.c: Ditto.
137 * openrisc-dis.c: Ditto.
138 * openrisc-ibld.c: Ditto.
139 * xstormy16-asm.c: Ditto.
140 * xstormy16-dis.c: Ditto.
141 * xstormy16-ibld.c: Ditto.
145 * po/fr.po: Updated French translation.
149 * configure.in (ALL_LINGUAS): Add nl.
150 * configure: Regenerate.
151 * po/nl.po: New Dutch translation.
155 * i860-dis.c: Convert to ISO C90. Remove superflous prototypes.
159 * po/ro.po: Updated Romanian translation.
163 * ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up.
167 * po/fr.po: Updated French translation.
171 * arm-dis.c (parse_arm_disassembler_option): Do not expect
172 option string to be NUL terminated.
173 (parse_disassembler_options): Allow options to be space or
178 * po/es.po: New Spanish translation.
179 * po/sv.po: New Swedish translation.
180 * po/opcodes.pot: Regenerate.
184 * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
188 * po/tr.po: Update with latest version.
189 * po/POTFILES.in: Regenerate.
190 * Makefile.in: Regenerate.
194 * po/opcodes.pot: Regenerate.
199 * m10300-dis.c (disassemble): Negate negative accumulator's shift.
201 * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
202 32-bit longs when sign-extending operands.
204 * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
205 * m10300-dis.c (HAVE_AM33_2): Define.
206 (disassemble): Use it.
207 (HAVE_AM33): Redefine.
208 (print_insn_mn10300): Fix mask for 5-byte extended insns.
210 * m10300-opc.c: Renamed AM332 to AM33_2.
212 * m10300-opc.c: Defined AM33 2.0 register operands. Added support
213 for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
214 bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
215 * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
216 insn code of AM33 2.0.
217 (disassemble): Recognize FMT_D3. Print out FP register names.
221 * mips-dis.c (set_default_mips_dis_options): Get BFD from
222 the disassembler_info's section, rather than from the
223 disassembler_info's symbols pointer.
227 * ppc-opc.c: Remove NULL pointer checks. Formatting. Remove
228 extraneous ATTRIBUTE_UNUSED.
229 * ppc-dis.c (print_insn_powerpc): Always pass a valid address to
234 * ppc-opc.c: Convert to C90, removing unnecessary prototypes and
237 * ppc-opc.c: Remove PARAMS from prototypes.
239 (insert_fxm): New function, used by both FXM and FXM4.
240 (extract_fxm): Likewise.
241 (XFXFXM_MASK): Remove 1 << 20 term.
242 (powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
246 * s390-dis.c (s390_extract_operand): Add support for long displacements.
247 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
248 * s390-opc.c (D20_20): Add define for 20 bit displacements.
249 (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
250 INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
251 new instruction formats.
252 (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
253 MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
254 (s390_opformats): Likewise.
255 * s390-opc.txt: Add new instructions for cpu type z990. Add missing
256 hfp instructions. Add missing instructions pgin, pgout and xsch.
260 * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
261 Intel Precott New Instructions.
262 (PREGRP27): New. Added for "addsubpd" and "addsubps".
263 (PREGRP28): New. Added for "haddpd" and "haddps".
264 (PREGRP29): New. Added for "hsubpd" and "hsubps".
265 (PREGRP30): New. Added for "movsldup" and "movddup".
266 (PREGRP31): New. Added for "movshdup" and "movhpd".
267 (PREGRP32): New. Added for "lddqu".
268 (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
269 Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
270 entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
271 entry 0xd0. Use PREGRP32 for entry 0xf0.
272 (twobyte_has_modrm): Updated.
273 (twobyte_uses_SSE_prefix): Likewise.
274 (grps): Use PNI_Fixup in the "sidtQ" entry.
275 (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
276 PREGRP31 and PREGRP32.
277 (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
278 Use "fisttpll" in entry 1 in opcode 0xdd.
279 Use "fisttp" in entry 1 in opcode 0xdf.
283 * z8k-dis.c (instr_data_s): Change tabl_index from long to int.
284 (print_insn_z8k): Correctly check return value from
285 z8k_lookup_instr call.
286 (unparse_instr): Handle CLASS_IRO case.
287 * z8kgen.c: Fix function definitions. Fix formatting.
288 (opt): Add brk opcode alias for non-simulator breakpoint. Add
289 missing and fix existing in/out and sin/sout opcode definitions.
290 (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
292 (internal): Check p->flags for non-zero before dereferencing it.
293 (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added
294 opcodes and renumber the remaining lines repectively.
295 (main): Remove "-d" command line switch.
296 * z8k-opc.h: Regenerate with new z8kgen.c.
300 * po/Make-in (DESTDIR): New.
301 (install-data-yes): Support $(DESTDIR).
302 (uninstall): Likewise.
306 * Makefile.am: Run "make dep-am".
307 * Makefile.in: Regenerate.
308 * po/POTFILES.in: Regenerate.
312 * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
314 * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
315 * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
316 * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
317 * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
318 * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
319 * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
320 * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
325 * ppc-opc.c (DQ, RAQ, RSQ, RTQ): Define.
326 (insert_dq, extract_dq, insert_raq, insert_rtq, insert_rsq): New.
327 (powerpc_opcodes): Add "attn", "lq" and "stq".
331 * h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
332 rts/l and rte/l register lists.
336 * frv-desc.c: Regenerate.
337 * frv-opc.c: Regenerate.
338 * frv-asm.c: Regenerate.
339 * frv-desc.h: Regenerate.
340 * frv-dis.c: Regenerate.
341 * frv-ibld.c: Regenerate.
342 * frv-opc.h: Regenerate.
343 * po/opcodes.pot: Regenerate.
349 * disassemble.c (disassembler): Add support for h8300sx.
350 * h8300-dis.c: Ditto.
354 * frv-desc.c: Regenerate.
355 * frv-opc.c: Regenerate.
357 * aclocal.m4: Regenerate.
358 * config.in: Regenerate.
359 * configure: Regenerate.
360 * iq2000-asm.c: Regenerate.
361 * iq2000-desc.c: Regenerate.
362 * iq2000-desc.h: Regenerate.
363 * iq2000-dis.c: Regenerate.
364 * iq2000-ibld.c: Regenerate.
365 * iq2000-opc.c: Regenerate.
366 * iq2000-opc.h: Regenerate.
367 * po/POTFILES.in: Regenerate.
368 * po/opcodes.pot: Regenerate.
372 * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
373 (print_insn_i860): Grab 4 bits of the control register field
378 * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
383 * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.
384 (libopcodes_la_DEPENDENCIES): Add libbfd.la.
385 * Makefile.in: Regenerated.
389 * configure.in (ALL_LINGUAS): Add Romanian translation.
390 * configure: Regenerate.
391 * po/ro.po: New file: Romanian translation.
395 * disassemble.c (disassembler): Add support for h8300hn and h8300sn.
399 * i386-dis.c (print_insn): Test intel_syntax against (char) -1 in
400 case char is unsigned.
404 * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.
405 (unpack_instr): Fix representation of segmented addresses.
406 (intr_name): Added, contains names of the parameters to the EI/DI
408 (unparse_instr): Fix display of EI/DI parameters.
412 * fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.
413 * frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate.
414 * ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate.
415 * m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate.
416 * m32r-opinst.c: Regenerate.
417 * openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate.
418 * xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
422 * h8500-opc.c: Replace occurrances of 'Hitachi' with 'Renesas'.
426 * ia64-ic.tbl (fr-readers): Add mem-writers-fp.
427 * ia64-asmtab.c: Regenerate.
431 * mips-dis.c (mips_gpr_names_newabi): Reverted previous patch.
435 * mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7.
439 * tic4x-dis.c: Namespace cleanup. Replace s/c4x/tic4x and
444 * arm-dis.c: Remove presence of (r) and (tm) symbols.
445 * arm-opc.h: Remove presence of (r) and (tm) symbols.
450 Contribute support for Intel's iWMMXt chip - an ARM variant:
452 * arm-dis.c (regnames): Add iWMMXt register names.
453 (set_iwmmxt_regnames): New function.
454 (print_insn_arm): Handle iWMMXt formatters.
455 * arm-opc.h: Document iWMMXt formatters.
456 (arm_opcod): Add iWMMXt instructions.
460 * i386-dis.c (dis386): Recognize icebp (0xf1).
464 * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
466 (print_insn_s390): Use new modes field of s390_opcodes.
467 * s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
468 (s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
469 (struct op_struct): Remove archbits. Add mode_bits and min_cpu.
470 (insertOpcode): Replace archbits by min_cpu and mode_bits.
471 (dumpTable): Write mode_bits and min_cpu instead of archbits.
472 (main): Adapt to new format in s390-opcode.txt.
473 * s390-opc.c (s390_opformats): Replace archbits by min_cpu and
475 * s390-opc.txt: Replace archbits by min_cpu and mode_bits.
479 * ppc-opc.c: Fix formatting. Update copyright date.
483 * ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403.
487 * hppa-dis.c: Formatting.
491 * hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
493 * hppa-dis.c (print_insn_hppa <2 bit space register>): Do not print
494 the space register when the value is zero.
498 * mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned,
499 use ARRAY_SIZE in loops.
503 * fr30-desc.c: Regenerate.
507 * i386-dis.c (dq_mode, Edq): Define.
508 (dis386_twobyte): Correct movd operands.
509 (OP_E): Handle dq_mode case.
513 * sparc-dis.c (print_insn_sparc): When examining values added in
514 to rs1, make sure that there are previous instructions.
522 * sh-dis.c (print_insn_shx): Handle bfd_mach_sh2e.
523 * sh-opc.h (arch_sh2e, arch_sh2e_up): New.
524 (arch_sh2_up): Added sh2e.
525 (sh_table): Replaced all occurrences of arch_sh3e_up with
526 arch_sh2e_up, except in fsqrt.
530 * sh64-dis.c: Include elf32-sh64.h.
531 * Makefile.am: Run "make dep-am".
532 * Makefile.in: Regenerate.
536 * alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrap
541 * Makefile.am: Run "make dep-am".
542 * Makefile.in: Regenerate.
543 * po/POTFILES.in: Regenerate.
547 * Makefile.am (ALL_MACHINES): Add msp430-dis.lo.
548 * Makefile.in: Regenerate.
552 * ppc-opc.c (powerpc_macros <extrwi>): Accept a shift of 32.
557 * iq2000-asm.c: New file.
558 * iq2000-desc.c: Likewise.
559 * iq2000-desc.h: Likewise.
560 * iq2000-dis.c: Likewise.
561 * iq2000-ibld.c: Likewise.
562 * iq2000-opc.c: Likewise.
563 * iq2000-opc.h: Likewise.
564 * Makefile.am (HFILES): Add iq2000-desc.h, iq2000-opc.h.
565 (CFILES): Add iq2000-asm.c, iq2000-desc.c, iq2000-dis.c,
566 iq2000-ibld.c, iq2000-opc.c.
567 (ALL_MACHINES): Add iq2000-asm.lo, iq2000-desc.lo, iq2000-dis.lo,
568 iq2000-ibld.lo, iq2000-opc.lo.
569 (CLEANFILES): Add stamp-iq2000.
570 (IQ2000_DEPS): New macro.
571 (stamp-iq2000): New target.
572 * Makefile.in: Regenerate.
573 * configure.in: Handle bfd_iq2000_arch.
574 * configure: Regenerate.
578 * mips-dis.c (print_insn_args): Use position extracted by "+A"
579 to calculate size for "+B". Redo code for "+C" so it shares
580 the same style as "+A" and "+B" now do.
584 * mips-dis.c: Update copyright years.
585 (print_insn_arg): Rename to...
586 (print_insn_args): This, returning void. Process the whole
587 string of args rather than a single one. Reindent.
588 (print_insn_mips): Update to match the above.
592 * mips-opc.c (mips_builtin_opcodes): Move "di" into the
593 right order alphabetically, and make all hex constants use
598 * mips-dis.c (mips_cp0sel_name): New structure.
599 (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
600 (mips_cp0sel_names_sb1): New arrays.
601 (mips_arch_choice): New structure members "cp0sel_names" and
603 (mips_arch_choices): Add references to new cp0sel_names arrays
604 as appropriate, and make all existing entries reference
605 appropriate mips_XXX_names_numeric arrays rather than simply
607 (mips_cp0sel_names, mips_cp0sel_names_len): New variables.
608 (lookup_mips_cp0sel_name): New function.
609 (set_default_mips_dis_options): Set mips_cp0sel_names and
610 mips_cp0sel_names_len as appropriate. Remove now-unnecessary
611 checks for NULL register name arrays.
612 (parse_mips_dis_option): Likewise.
613 (print_insn_arg): Handle "+D" operand type.
614 * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
615 of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
620 * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
621 (mips_hwr_names_mips3264r2): New arrays.
622 (mips_arch_choice): New "hwr_names" member.
623 (mips_arch_choices): Adjust for structure change, and add a new
624 entry for "mips32r2" ISA.
625 (mips_hwr_names): New variable.
626 (set_default_mips_dis_options): Set mips_hwr_names.
627 (parse_mips_dis_option): New "hwr-names" option which sets
628 mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
629 (print_insn_arg): Change return type to "int"
630 and use that to indicate number of characters consumed.
631 Add support for "+" operand extension character, "+A", "+B",
632 "+C", and "K" operands.
633 (print_insn_mips): Adjust for changes to print_insn_arg.
634 (print_mips_disassembler_options): Adjust for "hwr-names"
635 addition and "reg-names" change.
636 * mips-opc (I33): New define (shorthand for INSN_ISA32R2).
637 (mips_builtin_opcodes): Note that "nop" and "ssnop" are special
638 forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
639 di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
640 rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
641 Note that hardware rotate instructions (ror, rorv) can be
642 used on MIPS32 Release 2, and add the official mnemonics
643 for them (rotr, rotrv) and the similar "rotl" mnemonic for
648 * configure.in: Add msp430 target.
649 * configure: Regenerate.
650 * disassemble.c: Add entry for msp430 disassembly.
651 * msp430-dis.c: New file: msp430 disassembler.
655 * disassemble.c (disassembler_usage): Add invocation of
656 print_mips_disassembler_options.
657 * mips-dis.c: Include libiberty.h.
658 (print_mips_disassembler_options, set_default_mips_dis_options)
659 (parse_mips_dis_option, parse_mips_dis_options, choose_abi_by_name)
660 (choose_arch_by_name, choose_arch_by_number): New functions.
661 (mips_abi_choice, mips_arch_choice): New structures.
662 (mips32_reg_names, mips64_reg_names, reg_names): Remove.
663 (mips_gpr_names_numeric, mips_gpr_names_oldabi)
664 (mips_gpr_names_newabi, mips_fpr_names_numeric)
665 (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64)
666 (mips_cp0_names_numeric, mips_cp0_names_mips3264)
667 (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices)
668 (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names)
669 (mips_cp0_names): New variables.
670 (print_insn_args): Use new variables to print GPR, FPR, and CP0
672 (mips_isa_type): Remove.
673 (print_insn_mips): Remove ISA and CPU setup since it is now done...
674 (_print_insn_mips): Here. Remove register setup code, and
675 call set_default_mips_dis_options and parse_mips_dis_options
677 (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
681 * Makefile.in: Regenerate.
685 * cgen-asm.c (cgen_parse_keyword): Added underscore to symbol character
686 check to fix false keyword trigger with names such as <keyword>_foo.
690 * Makefile.am (CGEN_CPUS): New variable.
691 (run-cgen-all): New rule.
692 * Makefile.in: Regenerate.
696 * mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
697 "dror" entries, and reorder the remaining "dror" and "ror" entries.
701 * xstormy16-asm.c (parse_immediate16): Add prototype.
705 * xstormy16-asm.c: Regenerate.
709 * ns32k-dis.c (print_insn_ns32k): Constify "d", remove register
714 * h8500-opc.h (h8500_table): Add missing initializers to quiet
716 * pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change.
717 * pj-opc.c (pj_opc_info): Add braces around union initializer.
718 * z8kgen.c: Include "libiberty.h".
719 (opt, args, toks): Fix initializer warnings.
720 (chewname): Make "name" a char **. Return mnemonic trimmed of
722 (gas): Improve emitted "DO NOT EDIT" warning. Format emitted
723 opcode_entry_type, and make "nicename" and "name" const. Make
724 z8k_table const too. Formatting. Generate idx as gas needs it.
725 * z8k-opc.h: Regenerate.
729 * m68hc11-dis.c (print_indexed_operand): Fix PC-relative address
730 for 9 and 16-bit PC-relative addressing mode.
734 * ppc-opc.c: Delete evsabs, evsnabs, evsneg, evsadd, evssub,
735 evsmul, evsdiv, evscmpgt, evsgmplt, evststgt, evtstlt, evststeq,
736 evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi,
737 evsctsiz, evsctuf, evsctsf, evmwhssfaa, evmwhssmaa, evmwhsmfaa,
738 evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian,
739 evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa,
740 evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan,
741 evmwhgsmian, evmwhgumian.
742 (mftb): Add to opcode table.
743 (mtspefscr): Change RT to RS in opcode table.
747 * ppc-opc.c: Move mbar and msync up. Change mask for mbar and
752 * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
753 * ia64-opc-b.c: Add "hint.b" instruction.
754 * ia64-opc-f.c: Add "hint.f" instruction.
755 * ia64-opc-i.c: Add "hint.i" instruction.
756 * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
757 "cmp8xchg16" instructions.
758 * ia64-opc-x.c: Add "hint.x" instruction.
760 * ia64-opc.h (AR_CSD): New macro.
762 * ia64-ic.tbl: Update according to SDM2.1.
763 * ia64-raw.tbl: Ditto.
764 * ia64-waw.tbl: Ditto.
766 * ia64-gen.c (in_iclass): Handle "hint" like "nop".
767 (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
768 AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
769 * ia64-asmtab.c: Regenerate.
773 * ppc-opc.c: Remove evmwlssf, evmwlssfa, evmwlsmf, evmwlsmfa,
774 evmwlssfaaw, evmwlsmfaaw, evmwlssfanw, evmwlsfanw.
778 * ppc-opc.c (PMRN): Remove.
780 (powerpc_opcodes): Change PMRN to SPR.
782 Change mftb to look like mftbl.
783 Move mftb before mftbl.
786 Change mfpmr to use PMR.
787 Change mtpmr to use PMR.
789 (insert_ev2): Fix mask and shift.
794 (extract_pmrn): Remove.
795 (insert_pmrn): Remove.
799 * ia64-opc-m.c: Add ld8.mov.
800 * ia64-asmtab.c: Regenerate.
804 * arm-dis.c (print_insn_arm): Constify "insn". Formatting.
805 (print_insn_thumb): Likewise.
806 * h8500-dis.c (print_insn_h8500): Constify "opcode".
807 * mcore-dis.c (print_insn_mcore): Constify "op". Formatting.
808 * ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
809 type-punned pointer warnings.
810 <case 'L'>: Likewise. Fix error message too.
811 * pdp11-dis.c (print_reg): Warning fix.
812 * sh-dis.c (print_movxy): Constify "op" param.
813 (print_insn_ddt): Constify sh_opcode_info vars.
814 (print_insn_ppi): Likewise.
815 (print_insn_sh): Likewise.
816 * tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
817 type-punned pointer warnings.
818 * w65-dis.c (print_insn_w65): Constify "op".
822 * m68hc11-dis.c (PC_REGNUM): Define.
823 (print_indexed_operand): Need an adjustment for some PC-relative
824 operand modes; print the final address of PC-relative modes.
825 (print_insn): Take into account movw/movb to adjust the PC-relative
830 *arm-dis.c, cris-dis.c, h8300-dis.c, mips-dis.c, mmix-dis.c, sh-dis.c,
831 sh64-dis.c, v850-dis.c: Replace boolean with bfd_boolean, true with
832 TRUE, false with FALSE. Simplify comparisons of bfd_boolean vars
833 with TRUE/FALSE. Formatting.
837 * xstormy16-opc.c: Regenerate.
841 * ia64-dis.c (print_insn_ia64): Correct handling of IA64_OPND_TGT64.
845 * xstormy16-desc.c: Regenerate.
846 * xstormy16-opc.c: Regenerate.
847 * xstormy16-opc.h: Regenerate.
851 * avr-dis.c: Include libiberty.h (for xmalloc).
852 (struct avr_opcodes_s): Remove 'bin_mask' field (it's
853 automatically computed in the init routine).
854 (AVR_INSN): No longer provide bin_mask field in initializer.
855 (avr_opcodes_s): Declare as const.
856 (print_insn_avr): Store the bin_mask field in a separate table
857 (allocated with xmalloc); iterate through it at the same time as
858 we iterate through the opcodes.
862 * h8300-dis.c: Include libiberty.h (for xmalloc).
863 (struct h8_instruction): New type, used to wrap h8_opcodes with a
864 length field (computed at run-time).
865 (h8_instructions): New variable.
866 (bfd_h8_disassemble_init): Allocate the storage for
867 h8_instructions. Fill h8_instructions with pointers to the
868 appropriate opcode and the correct value for the length field.
869 (bfd_h8_disassemble): Iterate through h8_instructions instead of
874 * arc-opc.c (arc_ext_opcodes): Define.
875 (arc_ext_operands): Define.
876 * i386-dis.c (Suffix3DNow): Declare as const.
877 * arm-opc.h (arm_opcodes): Declare as const.
878 (thumb_opcodes): Declare as const.
879 * h8500-opc.h (h8500_table): Declare as const.
880 (h8500_table): Use a NULL for the opcode in the terminator, so
881 that code testing (opcode->name) behaves correctly.
882 * mcore-opc.h (mcore_table): Declare as const.
883 * sh-opc.h (sh_table): Declare as const.
884 * w65-opc.h (optable): Declare as const.
885 * z8k-opc.h (z8k_table): Declare as const.
889 * tic4x-dis.c: Added support for enhanced and special insn.
890 (c4x_print_op): Added insn class 'i' and 'j'
891 (c4x_hash_opcode_special): Add to support special insn
892 (c4x_hash_opcode): Update to support the new opcode-list
893 format. Add support for the new special insns.
894 (c4x_disassemble): New opcode-list support.
898 * m88k-dis.c: Include libiberty.h (for xmalloc).
899 (HASHTAB): New type, used to build instruction hash tables.
900 Contains a pointer to an INSTAB and a pointer to the next hash
902 (instructions): Move definition from m88k.h; remove initialization
904 (hashtable): Now an aray of pointer-to-HASHTAB, not INSTAB.
905 (printop): Mark pointer to OPSPEC as const.
906 (install): Remove; fold into init_disasm.
907 (m88kdis): Update to ihashtab_initialized to 1 after calling
908 init_disasm. entry_ptr now iterates through HASHTABs, not
910 (init_disasm): Iterate through the instructions and add to
915 * tic4x-dis.c: (c4x_print_op): Add support for the new argument
916 format. Fix bug in 'N' register printer.
920 * ppc-dis.c (print_insn_powerpc): Correct condition register display.
924 * ppc-opc.c (EVUIMM_4): Change bit size to 32.
930 * Makefile.am (ia64-asmtab.c): Update to use the new '--srcdir'
931 argument to ia64-gen.
932 Regenerate dependencies for ia64-len.lo.
933 * Makefile.in: Regenerate.
934 * ia64-gen.c: Convert to use getopt(). Add the standard GNU
935 options, as well as '--srcdir', which controls the directory in
936 which ia64-gen looks for the sources it uses to generate the
937 output table. Add a 'const' to the declaration of the final
938 output table. Call xmalloc_set_program_name to set the program
940 * ia64-asmtab.c: Regenerate.
944 * ia64-gen.c: Fix comment formatting and compile time warnings.
945 * ia64-opc-a.c: Fix compile time warnings.
946 * ia64-opc-b.c: Likewise.
947 * ia64-opc-d.c: Likewise.
948 * ia64-opc-f.c: Likewise.
949 * ia64-opc-i.c: Likewise.
950 * ia64-opc-m.c: Likewise.
951 * ia64-opc-x.c: Likewise.
955 * ppc-opc.c: Change RD to RS for evmerge*.
959 * sparc-opc.c (sparc_opcodes) <fb, fba, fbe, fbz, fbg, fbge,
960 fbl, fble, fblg, fbn, fbne, fbnz, fbo, fbu, fbue, fbug, fbuge,
961 fbul, fbule>: Add conditional/unconditional branch
966 * m68hc11-dis.c (print_insn): Treat bitmask and branch operands
975 * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
976 (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
977 and bfd_mach_mips5500.
978 * mips-opc.c (V1): Include INSN_4111 and INSN_4120.
979 (N411, N412, N5, N54, N55): New convenience defines.
980 (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
981 Change dmadd16 and madd16 from V1 to N411.
985 * mips-dis.c (print_insn_mips): Always allow disassembly of
990 * po/de.po: Updated German translation.
994 * Makefile.am: Run "make dep-am".
995 * Makefile.in: Regenerate.
996 * po/POTFILES.in: Regenerate.
1000 * ppc-opc.c (CRFD, CRFS): Add PPC_OPERAND_CR flag so that cr
1001 register names are accepted.
1005 * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.
1006 Convert functions to K&R format.
1010 * ppc-opc.c (MFDEC2): Include Book-E.
1011 (PPCCHLK64): New opcode mask.
1012 (evsubw, evsubiw, evmr, evnot, isellt, iselgt, iseleq, mfpid,
1013 mfcsrr0, mfcsrr1, mfdear, mfesr, mfivpr, mfusprg0, mftbl,
1014 mftbu, mfpir, mfdbsr, mfdbcr0, mfdbcr1, mfdbcr2, mfiac1,
1015 mfiac2, mfiac3, mfiac4, mfdac1, mfdac2, mfdvc1, mfdvc2, mftsr,
1016 mftcr, mfivor0, mfivor1, mfivor2, mfivor3, mfivor4, mfivor5,
1017 mfivor6, mfivor7, mfivor8, mfivor9, mfivor10, mfivor11,
1018 mfivor12, mfivor13, mfivor14, mfivor15, mfbbear, mfmcsrr0,
1019 mfmcsrr1, mfmcsr, mtpid, mtdecar, mtcsrr0, mtcsrr1, mtdear,
1020 mtesr, mtivpr, mtusprg0, mtsprg4, mtsprg5, mtsprg6, mtsprg7,
1021 mtdbsr, mtdbcr0, mtdbcr1, mtdbcr2, mtiac1, mtiac2, mtiac3,
1022 mtiac4, mtdac1, mtdac2, mtdvc1, mtdvc2, mttsr, mttcr, mtivor0,
1023 mtivor1, mtivor2, mtivor3, mtivor4, mtivor5, mtivor6, mtivor7,
1024 mtivor8, mtivor9, mtivor10, mtivor11, mtivor12, mtivor13,
1025 mtivor14, mtivor15, mtbbear, mtmcsrr0, mtmcsrr1, mtmcsr): New
1026 Book-E instructions.
1027 (evfsneg): Fix opcode value.
1028 (dcbtstlse, dcbtlse, icblce, dcblce, icbtsle): Use PPCCHLK64
1030 (mcrxr64, tlbivaxe, tlbsxe, tlbsxe.): Restrict to 64-bit
1032 (extsw): Restrict to 64-bit PPC instruction sets.
1033 (extsw.): Does not exist in 64-bit Book-E.
1034 (powerpc_macro): Remove mftbl, mftbu and mftb Book-E macros as
1035 they are no longer needed.
1039 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC.
1043 * po/da.po: Updated Danish translation file.
1047 * ppc-opc.c (extsw, extsw.): Do not allow for the BookE32.
1051 * disassemble.c (disassembler_usage): Add invocation of
1052 print_ppc_disassembler_options.
1053 * ppc-dis.c (print_ppc_disassembler_options): New function.
1057 * ppc-opc.c: The BookE implementations of the TLBWE and TLBRE
1058 instructions do not take any arguments.
1062 * v850-opc.c: Remove redundant references to V850EA architecture.
1066 * arc-opc.c: Include bfd.h.
1067 (arc_get_opcode_mach): Subtract off base bfd_mach value.
1071 * v850-dis.c (disassemble): Remove bfd_mach_v850ea case.
1073 * mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
1077 * configure.in: Added bfd_tic4x_arch.
1078 * configure: Regenerate.
1079 * Makefile.am: Added tic4x-dis.o target.
1080 * Makefile.in: Regenerate.
1084 * disassemble.c: Added tic4x target and c4x
1085 disassembler routine.
1086 * tic4x-dis.c: New file.
1090 * z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex
1092 * z8kgen.c (opt): Fix definition of "in rd,imm16" opcode.
1093 * z8k-opc.h: Regenerated with new z8kgen.c.
1099 * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
1100 `-mefs'. Turn off AltiVec for E500 and efs.
1101 (print_insn_powerpc): Don't print an AltiVec instruction if the
1104 * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
1105 insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
1106 for extracting pmrn/evld/evstd/etc operands.
1107 (CRB, CRFD, CRFS, DC, RD): New instruction fields.
1108 (CT): Make this equal to RD + 1.
1109 (PMRN): New operand.
1111 (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
1113 (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
1114 (ISEL, ISEL_MASK): New instruction form and mask for ISEL.
1115 (XISEL, XISEL_MASK): New instruction form and mask for ISEL.
1116 (CTX, CTX_MASK): New instruction form and mask for context cache
1118 (UCTX, UCTX_MASK): New instruction form and mask for user context
1120 (XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
1121 (CLASSIC): New define.
1122 (PPCESPE): New define.
1123 (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
1124 defines for integer select, cache control, branch
1125 locking, power management, cache locking and machine check
1126 APU instructions, respectively.
1127 (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
1128 efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
1129 efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
1130 efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
1131 evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
1132 evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
1133 evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
1134 evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
1135 evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
1136 evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
1137 evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
1138 evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
1139 evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
1140 evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
1141 evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
1142 evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
1143 evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
1144 evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
1145 evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
1146 evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
1147 evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
1148 evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
1149 evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
1150 evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
1151 evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
1152 evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
1153 evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
1154 evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
1155 evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
1156 evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
1157 evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
1158 evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
1159 evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
1160 evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
1161 evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
1162 evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
1163 evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
1164 evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
1165 evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
1166 evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
1167 evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
1168 evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
1169 evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
1170 evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
1171 evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
1172 evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
1174 (rfmci): New machine check APU instruction.
1175 (isel): New integer select APU instructino.
1176 (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
1177 dcbtstlse, dcblc, dcblce): New cache control APU instructions.
1178 (mtspefscr, mfspefscr): New instructions.
1179 (mfpmr, mtpmr): New performance monitor APU instructions.
1180 (savecontext): New context cache APU instructions.
1181 (bblels, bbelr): New branch locking APU instructions.
1182 (bblels, bbelr): New instructions.
1183 (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
1187 * m68hc11-opc.c: Update call operand to accept the page definition.
1188 Identify instructions that are branches and calls to generate a
1193 * m68hc11-dis.c (print_insn): Take into account 68HC12 memory
1194 banks and fix disassembling of call instruction.
1195 (print_indexed_operand): New param to tell whether
1196 it was an indirect addressing operand (for disassembling call).
1200 * po/sv.po: Updated Swedish translation.
1204 * mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
1205 aliases to "daddiu" and "addiu".
1209 * po/sv.po: Updated Swedish translation.
1213 * po/sv.po: Updated Swedish translation.
1214 * po/es.po: Updated Spanish translation.
1215 * po/pr_BR.po: Updated Brazilian Portuguese translation.
1216 * po/tr.po: Updated Turkish translation.
1217 * po/fr.po: Updated French translation.
1221 * po/sv.po: Updated Swedish translation.
1222 * po/es.po: Updated Spanish translation.
1223 * po/pr_BR.po: Updated Brazilian Portuguese translation.
1227 * Makefile.am: Run "make dep-am".
1228 * Makefile.in: Regenerate.
1229 * po/POTFILES.in: Regenerate.
1233 * po/fr.po: Updated French translation.
1234 * po/pr_BR.po: New Brazilian Portuguese translation.
1235 * po/id.po: Updated Indonesian translation.
1236 * configure.in (LINGUAS): Add pr_BR.
1237 * configure: Regenerate.
1244 * configure.in: Add support for ip2k.
1245 * configure: Regenerate.
1246 * Makefile.am: Add support for ip2k.
1247 * Makefile.in: Regenerate.
1248 * disassemble.c: Add support for ip2k.
1249 * ip2k-asm.c: New generated file.
1250 * ip2k-desc.c: New generated file.
1251 * ip2k-desc.h: New generated file.
1252 * ip2k-dis.c: New generated file.
1253 * ip2k-ibld.c: New generated file.
1254 * ip2k-opc.c: New generated file.
1255 * ip2k-opc.h: New generated file.
1259 * ia64-opc-b.c (bWhc): New macro.
1262 (ia64_opcodes_b): Correct patterns for indirect call
1263 instructions to use 3-bit "wh" field.
1264 * ia64-asmtab.c: Regnerate.
1268 * mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
1269 * mips-opc.c (I16): New define.
1270 (mips_builtin_opcodes): Make jalx an I16 insn.
1274 * po/POTFILES.in: Add frv-*.[ch].
1275 * disassemble.c (ARCH_frv): New macro.
1276 (disassembler): Handle bfd_arch_frv.
1277 * configure.in: Support frv_bfd_arch.
1278 * Makefile.am (HFILES): Add frv-*.h.
1279 (CFILES): Add frv-*.c
1280 (ALL_MACHINES): Add frv-*.lo.
1281 (CLEANFILES): Add stamp-frv.
1282 (FRV_DEPS): New variable.
1283 (stamp-frv): New target.
1284 (frv-asm.lo): New target.
1285 (frv-desc.lo): New target.
1286 (frv-dis.lo): New target.
1287 (frv-ibld.lo): New target.
1288 (frv-opc.lo): New target.
1289 (frv-*.[ch]): New files.
1293 * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
1294 * Makefile.in: Regenerate.
1298 * a29k-dis.c: Replace CONST with const.
1299 * h8300-dis.c: Likewise.
1300 * m68k-dis.c: Likewise.
1301 * or32-dis.c: Likewise.
1302 * sparc-dis.c: Likewise.
1306 * configure.in: Add "sh5*-*" to list of targets which include
1308 * configure: Regenerate.
1312 * mips-opc.c: Clean up a few whitespace issues, and sort a
1313 few entries understanding that 'x' follows 'w' in the alphabet.
1318 * mips-opc.c: Add support for SB-1 MDMX subset and extensions.
1322 * Makefile.am: Run "make dep-am".
1323 * Makefile.in: Regenerate.
1324 * po/POTFILES.in: Regenerate.
1329 * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
1330 and 'Z' formats, for MDMX.
1331 (mips_isa_type): Add MDMX instructions to the ISA
1332 bit mask for bfd_mach_mipsisa64.
1333 * mips-opc.c: Add support for MDMX instructions.
1334 (MX): New definition.
1336 * mips-dis.c: Update copyright years to include 2002.
1340 * d10v-opc.c (d10v_opcodes): `btsti' does not modify its
1345 * configure.in: Add DLX configuraton support.
1346 * configure: Regenerate.
1347 * Makefile.am: Add DLX configuraton support.
1348 * Makefile.in: Regenerate.
1349 * disassemble.c: Add DLX support.
1350 * dlx-dis.c: New file.
1354 * Makefile.am (sh-dis.lo): Don't put make commands in deps.
1355 * Makefile.in: Regenerate.
1356 * arc-dis.c: Use #include "" instead of <> for local header files.
1357 * m68k-dis.c: Likewise.
1361 * Makefile.am (sh-dis.lo): Compile with @archdefs@.
1362 * Makefile.in: regenerate.
1364 * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
1369 * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
1373 * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
1374 * sh-dis.c (LITTLE_BIT): Delete.
1375 (print_insn_sh, print_insn_shl): Deleted.
1376 (print_insn_shx): Renamed to
1377 (print_insn_sh). No longer static. Handle SHmedia instructions.
1378 Use info->endian to determine endianness.
1379 * sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
1380 (print_insn_sh64x): No longer static. Renamed to
1381 (print_insn_sh64). Removed pfun_compact and endian arguments.
1382 If we got an uneven address to indicate SHmedia, adjust it.
1383 Return -2 for SHcompact instructions.
1387 * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
1388 * configure.in: Invoke AM_INSTALL_LIBBFD.
1389 * Makefile.am (install-data-local): Move to..
1390 (install_libopcodes): .. New target.
1391 (uninstall_libopcodes): Likewise.
1392 (install-bfdlibLTLIBRARIES): Likewise.
1393 (uninstall-bfdlibLTLIBRARIES): Likewise.
1395 (bfdincludedir): New.
1396 (lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
1397 * aclocal.m4: Regenerate.
1398 * configure: Regenerate.
1399 * Makefile.in: Regenerate.
1403 * fr30-asm.c: Regenerate.
1404 * fr30-desc.c: Regenerate.
1405 * fr30-dis.c: Regenerate.
1406 * m32r-asm.c: Regenerate.
1407 * m32r-desc.c: Regenerate.
1408 * m32r-dis.c: Regenerate.
1409 * openrisc-asm.c: Regenerate.
1410 * openrisc-desc.c: Regenerate.
1411 * openrisc-dis.c: Regenerate.
1412 * xstormy16-asm.c: Regenerate.
1413 * xstormy16-desc.c: Regenerate.
1414 * xstormy16-dis.c: Regenerate.
1418 * mips-dis.c (is_newabi): EABI is not a NewABI.
1422 * configure.in (shle-*-*elf*): Include sh64 support.
1423 * configure: Regenerate.
1427 * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
1428 (print_insn_mode): Print some basic info about floating point values.
1432 * ppc-opc.c: Add "tlbiel" for POWER4.
1436 * cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
1437 than just most-recently-opened.
1441 * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke.
1445 * z8k-dis.c (print_insn_z8k): Set disassemble_info to 2
1446 bytes_per_chunk, 6 bytes_per_line for nicer display of the hex
1448 (z8k_lookup_instr): CLASS_IGNORE case added.
1449 (output_instr): Don't print hex codes, they are already
1451 (unpack_instr): ARG_NIM4 case added. ARG_NIM8 case
1452 fixed. Support CLASS_BIT_1OR2 and CLASS_IGNORE cases.
1453 (unparse_instr): Fix base and indexed addressing disassembly:
1454 The index is inside the brackets.
1455 * z8kgen.c (gas): Add ARG_NIM4 and CLASS_IGNORE defines.
1456 (opt): Fix shift left/right arithmetic/logical byte defines:
1457 The high byte of the immediate word is ignored by the
1459 Fix n parameter of ldm opcodes: The opcode contains (n-1).
1460 (args): Fix "n" entry.
1461 (toks): Add "nim4" and "iiii" entries.
1462 * z8k-opc.h: Regenerated with new z8kgen.c.
1466 * po/id.po: New Indonesian translation.
1467 * configure.in (ALL_LIGUAS): Add id.po
1468 * configure: Regenerate.
1472 * ppc-opc.c (powerpc_opcode): Fix dssall operand list.
1476 * dep-in.sed: Cope with absolute paths.
1477 * Makefile.am (dep.sed): Subst TOPDIR.
1479 * Makefile.in: Regenerate.
1480 * ppc-opc.c: Whitespace.
1481 * s390-dis.c: Fix copyright date.
1485 * ppc-opc.c (vmaddfp): Fix operand order.
1489 * Makefile.am: Run "make dep-am".
1490 * Makefile.in: Regenerate.
1494 * ppc-opc.c: Add optional field to mtmsrd.
1495 (MTMSRD_L, XRLARB_MASK): Define.
1499 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
1501 (print_insn) Likewise.
1502 (putop): Fix handling of 'E'
1503 (OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
1504 (ptr_reg): Likewise.
1508 * po/fr.po: Updated version.
1512 * mips-opc.c (M3D): Tweak comment.
1513 (mips_builtin_op): Add comment indicating that opcodes of the
1514 same name must be placed together in the table, and sort
1515 the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
1516 "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
1520 * Makefile.am: Tidy up sh64 rules.
1521 * Makefile.in: Regenerate.
1525 * mips-dis.c: Update copyright years.
1529 * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
1530 bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
1531 comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
1532 indicate that they should dissassemble all applicable
1533 MIPS-specified ASEs.
1534 * mips-opc.c: Add support for MIPS-3D instructions.
1535 (M3D): New definition.
1537 * mips-opc.c: Update copyright years.
1541 * mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
1545 * mips-dis.c (is_newabi): Fix ABI decoding.
1549 * mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32
1550 and bfd_mach_mipsisa64 cases to match the rest.
1554 * po/fr.po: Updated version.
1558 * ppc-opc.c: Add optional `L' field to tlbie.
1559 (XRTLRA_MASK): Define.
1563 * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
1566 * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
1570 * pdp11-opc.c: Fix "mark" operand type. Fix operand types
1571 for float opcodes that take float operands. Add alternate
1572 names (xxxD vs. xxxF) for float opcodes.
1573 * pdp11-dis.c (print_operand): Clean up formatting for mode 67.
1574 (print_foperand): New function to handle float opcode operands.
1575 (print_insn_pdp11): Use print_foperand to disassemble float ops.
1579 * po/de.po: Updated.
1583 * Makefile.am (install-data-local): Install dis-asm.h.
1587 * configure.in (LINGUAS): Add de.po.
1588 * configure: Regenerate.
1589 * po/de.po: New file.
1593 * ppc-dis.c (powerpc_dialect): Handle power4 option.
1594 * ppc-opc.c (insert_bdm): Correct description of "at" branch
1595 hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
1596 (extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
1597 (BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
1598 (BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
1599 (PPCCOM32, PPCCOM64): Delete.
1600 (NOPOWER4, POWER4): Define.
1601 (powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
1602 and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
1603 are enabled for power4 rather than ppc64.
1607 * ppc-opc.c (powerpc_operands): Add WS field. Use for tlbre, tlbwe.
1611 * s390-dis.c (init_disasm): Use renamed architecture defines.
1615 * ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola
1620 * po/tr.po: Updated translation.
1624 * alpha-opc.c (alpha_opcodes): Fix thinko in ret pseudo
1629 * alpha-opc.c (alpha_opcodes): Add simple pseudos for
1630 lda, ldah, jmp, ret.
1634 * po/da.po: Updated translation.
1638 * cgen-asm.in (parse_insn_normal): Change call from
1639 @arch@_cgen_parse_operand to cd->parse_operand, to
1640 facilitate CGEN_ASM_INIT_HOOK doing useful work.
1644 * sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not
1649 * Makefile.am: "make dep-am".
1650 * Makefile.in: Regenerate.
1651 * aclocal.m4: Regenerate.
1652 * config.in: Regenerate.
1653 * configure: Regenerate.
1657 * configure.in <bfd_sh_arc>: For sh-* and shl-*, enable sh64
1658 support only for sh-*-*elf*, shl-*-*elf*, sh-*-linux* and
1660 * configure: Regenerate.
1664 * cgen-dis.c: Add prototypes for count_decodable_bits
1665 and add_insn_to_hash_chain.
1669 * configure.in <bfd_sh_arc>: Enable sh64 support on sh-*.
1670 * configure: Rebuilt.
1674 * or32-opc.c: Fix compile time warning messages.
1675 * or32-dis.c: Fix compile time warning messages.
1679 Contribute sh64-elf.
1681 * sh64-opc.c: Regenerate.
1683 * sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its
1684 purpose is more obvious.
1685 * sh64-opc.c (shmedia_table): Ditto.
1686 * sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto.
1687 (print_insn_shmedia): Ditto.
1689 * sh64-opc.c: Adjust comments to reflect reality: replace bits
1690 3:0 with zeros (not "reserved"), replace "rrrrrr" with
1691 "gggggg" for two-operand floating point opcodes. Remove
1694 * sh64-dis.c (print_insn_shmedia) <failing read_memory_func>:
1695 Correct printing of .byte:s. Return number of printed bytes or
1697 (print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto. Print as .byte:s
1698 to next four-byte-alignment if insn or data is not aligned.
1700 * sh64-dis.c: Update comments and fix comment formatting.
1701 (initialize_shmedia_opcode_mask_table) <case A_IMMM>:
1702 Abort instead of setting length to 0.
1703 (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
1704 crange_bsearch_cmpl, sh64_get_contents_type,
1705 sh64_address_in_cranges): Move to bfd/elf32-sh64.c.
1707 * sh64-opc.c: Remove #if 0:d entries for instructions not found in
1708 SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo.
1710 * sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed
1711 address with same prefix as SHcompact.
1712 In the disassembler, use a .cranges section for linked executables.
1713 * sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file
1714 and update for using structure in info->private_data.
1715 (struct sh64_disassemble_info): New.
1716 (is_shmedia_p): Delete.
1717 (crange_qsort_cmpb): New function.
1718 (crange_qsort_cmpl, crange_bsearch_cmpb): New functions.
1719 (crange_bsearch_cmpl, sh64_address_in_cranges): New functions.
1720 (init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions.
1721 (sh64_get_contents_type, sh64_address_is_shmedia): New functions.
1722 (print_insn_shmedia): Correct displaying of address after MOVI/SHORI
1723 pair. Display addresses for linked executables only.
1724 (print_insn_sh64x_media): Initialize info->private_data by calling
1725 init_sh64_disasm_info.
1726 (print_insn_sh64x): Ditto. Find out type of contents by calling
1727 sh64_contents_type_disasm. Display data regions using ".long" and
1728 ".byte" similar to unrecognized opcodes.
1730 * sh64-dis.c (is_shmedia_p): Check info->section and look for ISA
1731 information in section flags before considering symbols. Don't
1732 assume an info->mach setting of bfd_mach_sh5 means SHmedia code.
1733 * configure.in (bfd_sh_arch): Check presence of sh64 insns by
1734 matching $target $canon_targets instead of looking at the
1735 now-removed -DINCLUDE_SHMEDIA in $targ_cflags.
1736 * configure: Regenerate.
1738 * sh64-opc.c (shmedia_creg_table): New.
1739 * sh64-opc.h (shmedia_creg_info): New type.
1740 (shmedia_creg_table): Declare.
1741 * sh64-dis.c (creg_name): New function.
1742 (print_insn_shmedia): Use it.
1743 * disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map
1744 bfd_mach_sh5 to print_insn_sh64 if big-endian and to
1745 print_insn_sh64l if little-endian.
1746 * sh64-dis.c (print_insn_shmedia): Make r unsigned.
1747 (print_insn_sh64l): New.
1748 (print_insn_sh64x): New.
1749 (print_insn_sh64x_media): New.
1750 (print_insn_sh64): Break out code to print_insn_sh64x and
1751 print_insn_sh64x_media.
1753 * sh64-opc.h: New file
1754 * sh64-opc.c: New file
1755 * sh64-dis.c: New file
1756 * Makefile.am: Add sh64 targets.
1757 (HFILES): Add sh64-opc.h.
1758 (CFILES): Add sh64-opc.c and sh64-dis.c.
1759 (ALL_MACHINES): Add sh64 files.
1760 * Makefile.in: Regenerate.
1761 * configure.in: Add support for sh64 to bfd_sh_arch.
1762 * configure: Regenerate.
1763 * disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define.
1764 (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to
1766 * sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4.
1767 * po/POTFILES.in: Regenerate.
1768 * po/opcodes.pot: Regenerate.
1772 * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
1776 * sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS.
1780 * Makefile.am: Run "make dep-am"
1781 * Makefile.in: Regenerate.
1785 * or32-dis.c: New file.
1786 * or32-opc.c: New file.
1787 * configure.in: Add support for or32.
1788 * configure: Regenerate.
1789 * Makefile.am: Add support for or32.
1790 * Makefile.in: Regenerate.
1791 * disassemble.c: Add support for or32.
1792 * po/POTFILES.in: Regenerate.
1793 * po/opcodes.pot: Regenerate.
1797 * configure: Regenerated.
1801 * po/fr.po: Updated version.
1805 * po/es.po: Updated version.
1809 * po/da.po: New version.
1813 * po/da.po: New file: Spanish translation.
1814 * configure.in (ALL_LINGUAS): Add da.
1815 * configure: Regenerate.
1819 * fr30-asm.c: Regenerate.
1820 * fr30-desc.c: Likewise.
1821 * fr30-desc.h: Likewise.
1822 * fr30-dis.c: Likewise.
1823 * fr30-ibld.c: Likewise.
1824 * fr30-opc.c: Likewise.
1825 * fr30-opc.h: Likewise.
1826 * m32r-asm.c: Likewise.
1827 * m32r-desc.c: Likewise.
1828 * m32r-desc.h: Likewise.
1829 * m32r-dis.c: Likewise.
1830 * m32r-ibld.c: Likewise.
1831 * m32r-opc.c: Likewise.
1832 * m32r-opc.h: Likewise.
1833 * m32r-opinst.c: Likewise.
1834 * openrisc-asm.c: Likewise.
1835 * openrisc-desc.c: Likewise.
1836 * openrisc-desc.h: Likewise.
1837 * openrisc-dis.c: Likewise.
1838 * openrisc-ibld.c: Likewise.
1839 * openrisc-opc.c: Likewise.
1840 * openrisc-opc.h: Likewise.
1841 * xstormy16-desc.c: Likewise.
1845 * alpha-dis.c (print_insn_alpha): Also mask the base opcode for
1850 * Makefile.am: Run "make dep-am".
1851 * Makefile.in: Regenerate.
1852 * po/POTFILES.in: Regenerate.
1856 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
1857 * arm-dis.c (print_insn_arm): Don't handle 'h' case.
1861 * arm-opc.h (arm_opcodes): Add bxj instruction.
1865 * po/opcodes.pot: Regenerate.
1866 * po/fr.po: Regenerate.
1867 * po/sv.po: Regenerate.
1868 * po/tr.po: Regenerate.
1872 * po/tr.po: Import new version.
1876 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
1877 * arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
1882 * xstormy16-asm.c: Regenerate.
1883 * xstormy16-desc.c: Likewise.
1884 * xstormy16-desc.h: Likewise.
1885 * xstormy16-dis.c: Likewise.
1886 * xstormy16-opc.c: Likewise.
1887 * xstormy16-opc.h: Likewise.
1891 * po/es.po: New file: Spanish translation.
1892 * configure.in (ALL_LINGUAS): Add es.
1893 * configure: Regenerate.
1897 * hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers,
1898 'X', 'M', and 'A'. No longer emit a space after 'x' or 's'.
1899 Always emit a space after 'H'.
1903 * ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY.
1907 * alpha-opc.c (unop): Encode with RB as $sp.
1911 * Makefile.am: Add support for xstormy16.
1912 * Makefile.in: Regenerate.
1913 * configure.in: Add support for xstormy16.
1914 * configure: Regenerate.
1915 * disassemble.c: Add support for xstormy16.
1916 * xstormy16-asm.c: New generated file.
1917 * xstormy16-desc.c: New generated file.
1918 * xstormy16-desc.h: New generated file.
1919 * xstormy16-dis.c: New generated file.
1920 * xstormy16-ibld.c: New generated file.
1921 * xstormy16-opc.c: New generated file.
1922 * xstormy16-opc.h: New generated file.
1926 * alpha-opc.c (alpha_opcodes): Add wh64en.
1930 * d10v-opc.c (d10v_predefined_registers): Remove warnings
1931 introduced in Nov 29's patch.
1933 * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of
1936 * d10v-dis.c (print_operand): Disregard OPERAND_SP in register
1939 * d10v-opc.c (RSRC_NOSP): New macro.
1940 (d10v_operands): Add it.
1941 (d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w".
1945 * d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
1946 (RSRC_SP): New macro.
1947 (d10v_operands): Add it.
1948 (d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
1952 * pdp11-dis.c (print_insn_pdp11): Handle illegal instructions.
1953 Also, break out of the loop as soon as an instruction has been
1958 * ppc-opc.c (mfvrsave, mtvrsave): New instructions.
1962 * po/POTFILES.in: Regenerate.
1964 * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
1965 (insert_bat, extract_bat, insert_bba, extract_bba,
1966 insert_bd, extract_bd, insert_bdm, extract_bdm,
1967 insert_bdp, extract_bdp, valid_bo,
1968 insert_bo, extract_bo, insert_boe, extract_boe,
1969 insert_ds, extract_ds, insert_de, extract_de,
1970 insert_des, extract_des, insert_li, extract_li,
1971 insert_mbe, extract_mbe, insert_mb6, extract_mb6,
1972 insert_nb, extract_nb, insert_nsi, extract_nsi,
1973 insert_ral, insert_ram, insert_ras,
1974 insert_rbs, extract_rbs, insert_sh6, extract_sh6,
1975 insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
1976 (extract_bd, extract_bdm, extract_bdp,
1977 extract_ds, extract_des,
1978 extract_li, extract_nsi): Implement sign extension without conditional.
1979 (insert_bdm, extract_bdm,
1980 insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
1981 (extract_bdm, extract_bdp): Correct 32 bit validation.
1982 (AT1_MASK, AT2_MASK): Define.
1983 (BBOAT_MASK): Define.
1984 (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
1985 (BOFM64, BOFP64, BOTM64, BOTP64): Define.
1986 (BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
1987 (PPCCOM32, PPCCOM64): Define.
1988 (powerpc_opcodes): Modify existing 32 bit insns with branch hints
1989 and add new patterns to implement 64 bit branches with hints. Move
1990 booke instructions so they match before ppc64.
1992 * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
1993 64 bit default targets, and parse "32" and "64" in options.
1995 (print_insn_powerpc): Pass dialect to operand->extract.
1999 * cgen-dis.c (count_decodable_bits): New function.
2000 (add_insn_to_hash_chain): New function.
2001 (hash_insn_array): Call add_insn_to_hash_chain.
2002 (hash_insn_list): Call add_insn_to_hash_chain.
2003 * m32r-dis.c: Regenerated.
2004 * fr30-dis.c: Regenerated.
2008 * i386-dis.c (print_insn): Use x86-64 as option.
2012 * disassemble.c (disassembler): Call print_insn_i386.
2013 * i386-dis.c (SUFFIX_ALWAYS): Define.
2014 (struct dis_private): Add orig_sizeflag.
2015 (print_insn_i386): Make it a wrapper, calling..
2016 (print_insn): ..The old body of print_insn_i386. Avoid longjmp
2017 warning without using volatile by moving orig_sizeflag to priv,
2018 and removing inbuf. Parse disassembler_options.
2019 (print_insn_i386_att, print_insn_i386_intel): Move initialisation
2021 (putop): Remove #ifdef SUFFIX_ALWAYS.
2025 * tic54x-dis.c: Use revised opcode structure. Export opcode
2027 (has_lkaddr): Don't forget about Lmem insns.
2028 * tic54x-opc.c: Add emulation trap. Parallel table now uses
2029 standard opcode templates.
2033 * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
2034 to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
2035 category instead of Ew.
2039 * m68k-opc.c: Fix definitions of wddata[bwl].
2043 * cgen-asm.c (cgen_parse_keyword): If the keyword is too big to
2044 fit in the buffer, try to match the empty keyword.
2048 * cgen-ibld.in (extract_1): Fix badly placed #if 0.
2049 * fr30-ibld.c: Regenerate.
2050 * m32r-ibld.c: Regenerate.
2051 * openrisc-ibld.c: Regenerate.
2055 * mips-dis.c (print_insn_mips): Remove spaces at end of line.
2059 * configure.in (ALL_LINGUAS): Add "fr", "sv" and "tr".
2060 * configure: Regernate.
2061 * po/fr.po: New file.
2062 * po/sv.po: New file.
2063 * po/tr.po: New file.
2067 * m68hc11-dis.c (print_insn): Fix disassembly of movb with a
2072 * Makefile.am (CFILES): Add mmix-dis.c and mmix-opc.c. Regenerate
2074 * Makefile.in: Regenerate.
2075 * mmix-dis.c, mmix-opc.c: New files.
2079 * d30v-dis.c: Fix a comment typo.
2083 * mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and
2084 "bltzall" as writing GPR 31 (since they do).
2086 * mips-dis.c (print_insn_arg): Calculate info->target
2088 (print_insn_mips): Fill in instruction info.
2089 (print_mips16_insn_arg): Remove unneded variable 'val'.
2090 Removed duplicated instruction target calculations,
2091 calculate once and print that result. Use same idiom for
2092 masking the jump segment bits as is used in print_insn_arg.
2096 * ppc-opc.c (CT): Make it an optional operand.
2100 * mips-dis.c (mips_isa_type): Make the ISA used to disassemble
2101 SB-1 binaries include instructions specific to the SB-1.
2102 * mips-opc.c (SB1): New definition.
2103 (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
2104 "recip.ps", "rsqrt.ps", and "sqrt.ps".
2108 * ppc-opc.c (STRM): New AltiVec operand.
2109 (XDSS): New AltiVec instruction form.
2110 (mtvscr): Correct operand list.
2111 (dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
2115 * po/POTFILES.in: Regenerate.
2119 * ppc-opc.c (MO): New macro for MO field of mbar instruction.
2120 (powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
2121 mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
2125 * cgen-ibld.in: Include safe-ctype.h in preference to
2127 * cgen-asm.in: Include safe-ctype.h in preference to
2128 ctype.h. Fix formatting. Use ISSPACE instead of isspace and
2129 TOLOWER instead of tolower.
2130 (@arch@_cgen_build_insn_regex): Remove duplication of syntax
2131 string elements in constructed regular expression.
2132 * fr30-asm.c: Regenerate.
2133 * fr30-desc.c: Regenerate.
2134 * fr30-ibld.c: Regenerate.
2135 * m32r-asm.c: Regenerate.
2136 * m32r-desc.c: Regenerate.
2137 * m32r-ibld.c: Regenerate.
2138 * openrisc-asm.c: Regenerate.
2139 * openrisc-desc.c: Regenerate.
2140 * openrisc-ibld.c: Regenerate.
2141 * po/opcodes.pot: Regenerate.
2145 * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
2146 instruction field instruction/extraction functions for new BookE
2147 DE form instructions.
2148 (CT): New macro for CT field in an X form instruction.
2149 (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
2151 (PPC64): Don't include PPC_OPCODE_PPC.
2152 (403): New opcode macro for PPC403 processors.
2153 (BOOKE): New opcode macro for BookE processors.
2154 (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
2155 (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
2156 (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
2157 (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
2158 (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
2159 (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
2160 (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
2161 (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
2162 (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
2163 (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
2164 (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
2165 (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
2166 (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
2167 (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
2169 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
2170 for a disassembler option of `booke', `booke32' or `booke64' to enable
2171 BookE support in the disassembler.
2175 * cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8)
2176 for the length when extracting the base part of the insn.
2180 * cgen-asm.in (*_cgen_build_insn_regex): Generate a case sensitive
2181 regular expression. Fix some formatting problems.
2182 * fr30-asm.c: Regenerate.
2183 * openrisc-asm.c: Regenerate.
2184 * m32r-asm.c: Regenerate.
2188 * z8k-dis.c (unparse_instr): Fixed formatting. Change disassembly
2189 of indirect register memory accesses to be same format the
2194 * sh-opc.h: Fix encoding of least significant nibble of the
2195 DSP single data transfer instructions.
2197 * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP
2202 * cgen-asm.in: Fix compile time warning messages in generated
2204 * cgen-dis.in: The same.
2205 * cgen-ibld.in: The same.
2206 * fr30-asm.c: Regenerate.
2207 * fr30-desc.c: Regenerate.
2208 * fr30-dis.c: Regenerate.
2209 * fr30-ibld.c: Regenerate.
2210 * fr30-opc.c: Regenerate.
2211 * m32r-asm.c: Regenerate.
2212 * m32r-desc.c: Regenerate.
2213 * m32r-dis.c: Regenerate.
2214 * m32r-ibld.c: Regenerate.
2215 * m32r-opc.c: Regenerate.
2216 * m32r-opinst.c Regenerate.
2217 * openrisc-asm.c: Regenerate.
2218 * openrisc-desc.c: Regenerate.
2219 * openrisc-dis.c: Regenerate.
2220 * openrisc-ibld.c: Regenerate.
2221 * openrisc-opc.c: Regenerate.
2222 * openrisc-opc.h: Regenerate.
2223 * Makefile.in: Regenerate.
2224 * po/POTFILES.in: Regenerate.
2225 * po/opcodes.pot: Regenerate.
2229 * arm-opc.h (arm_opcodes): Add cirrus insns.
2231 * arm-dis.c (print_insn_arm): Add 'I' case.
2235 * po/POTFILES.in: Regenerate.
2236 * configure: Regenerate.
2240 * Makefile.am (Makefile): Depend on bfd/configure.in.
2242 * Makefile.in: Regenerate.
2246 * cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits
2247 calls to cgen_get_insn_value and cgen_put_insn_value calls.
2248 (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call.
2252 * Makefile.am: Update dependencies with "make dep-am".
2253 * Makefile.in: Regenerate.
2257 * arc-dis.c: Formatting fixes.
2258 (my_sprintf): Define using VPARAMS, VA_OPEN, VA_FIXEDARG, VA_CLOSE.
2262 * arc-dis.c: Don't include <ctype.h>.
2263 * openrisc-desc.c: Likewise.
2264 * openrisc-ibld.c: Likewise.
2268 * fr30-opc.c: Fix compile time warning messages.
2269 * i370-opc.c: Fix compile time warning messages.
2270 * i960-dis.c: Fix compile time warning messages.
2271 * m32r-asm.c: Fix compile time warning messages.
2272 * m32r-desc.c: Fix compile time warning messages.
2273 * m32r-dis.c: Fix compile time warning messages.
2274 * m32r-ibld.c: Fix compile time warning messages.
2275 * m32r-opc.c: Fix compile time warning messages.
2276 * m32r-opinst.c: Fix compile time warning messages.
2277 * ns32k-dis.c: Fix compile time warning messages.
2278 * openrisc-asm.c: Fix compile time warning messages.
2279 * openrisc-desc.c: Fix compile time warning messages.
2280 * openrisc-dis.c: Fix compile time warning messages.
2281 * openrisc-ibld.c: Fix compile time warning messages.
2282 * openrisc-opc.c: Fix compile time warning messages.
2283 * pdp11-dis.c: Fix compile time warning messages.
2284 * tic54x-dis.c: Fix compile time warning messages.
2285 * v850-opc.c: Fix compile time warning messages.
2286 * vax-dis.c: Fix compile time warning messages.
2287 * w65-opc.h: Fix compile time warning messages.
2288 * z8k-opc.h: Fix compile time warning messages.
2289 * z8kgen.c: Fix compile time warning messages.
2293 * arm-dis.c: Fix compile time warning messages.
2294 * cgen-asm.c: Fix compile time warning messages.
2295 * cgen-dis.c: Fix compile time warning messages.
2296 * cris-dis.c: Fix compile time warning messages.
2297 * d10v-dis.c: Fix compile time warning messages.
2298 * fr30-asm.c: Fix compile time warning messages.
2299 * fr30-desc.c: Fix compile time warning messages.
2300 * fr30-dis.c: Fix compile time warning messages.
2301 * fr30-ibld.c: Fix compile time warning messages.
2305 * cgen-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2306 (cgen_parse_keyword): Use ISALNUM instead of isalnum.
2307 * cgen-opc.c: Include "safe-ctype.h" instead of <ctype.h>.
2308 (cgen_keyword_lookup_name): Use ISALPHA/TOLOWER instead of
2310 (cgen_keyword_add): Use ISALNUM instead of isalnum.
2311 (hash_keyword_name): Use TOLOWER instead of tolower.
2312 * fr30-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2313 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
2315 (fr30_cgen_assemble_insn): Use ISSPACE instead of isspace.
2316 * fr30-desc.c: Don't include <ctype.h>.
2317 * fr30-ibld.c: Likewise.
2318 * ia64-gen.c: Include "safe-ctype.h" instead of <ctype.h>.
2319 (load_insn_classes, parse_resource_users, load_depfile): Use
2320 ISSPACE instead of isspace.
2321 * m32r-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2322 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
2324 (m32r_cgen_assemble_insn): Use ISSPACE instead of isspace.
2325 * m32r-desc.c: Don't include <ctype.h>.
2326 * m32r-ibld.c: Likewise.
2327 * openrisc-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2328 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
2330 (openrisc_cgen_assemble_insn): Use ISSPACE instead of isspace.
2334 * Makefile.am: Add rules and dependencies to create the s/390 opcode
2335 table out of s390-opc.txt automatically.
2336 * configure.in: Add BFD_CC_FOR_BUILD to allow CC_FOR_BUILD to be used.
2337 * s390-mkopc.c (dumpTable): Change output to create a complete file.
2338 * s390-opc.c: New improved opcode format macros and remove the
2339 pregenerated opcode table.
2340 * s390-opc.txt: Adapt to new improved opcode format macros.
2344 * ppc-opc.c (VXA, VXA_MASK): Fix mask bits.
2348 * i386-dis.c (grps): Don't print the implicit al/ax/eax register
2349 for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
2354 * mips-dis.c: Add support for bfd_mach_mipsisa32 and
2355 bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k,
2360 * tic54x-opc.c: Add default initializers to avoid warnings.
2362 * arc-opc.c: Include "sysdep.h" to get stdio.h as include file.
2363 * arc-ext.c: Likewise.
2367 * ppc-opc.c (icbt): Order correctly.
2372 * ppc-opc.c (DS): Add PPC_OPERAND_DS flag.
2374 (insert_ds): Complain if not a multiple of 4.
2376 (XSYNC_MASK): Define.
2377 (powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev",
2378 "slbmfee". Modify "sync" to use XSYNC_MASK and LS.
2382 * h8500-opc.h: Add default initializers to h8500_table to shut up
2387 * tic54x-dis.c: Add unused attributes where needed.
2389 * z8k-dis.c (output_instr): Add unused attribute.
2391 * h8300-dis.c: Add missing prototypes.
2392 (bfd_h8_disassemble): Make static.
2394 * cris-dis.c: Add missing prototype.
2395 * h8500-dis.c: Likewise.
2396 * m68hc11-dis.c: Likewise.
2397 * pj-dis.c: Likewise.
2398 * tic54x-dis.c: Likewise.
2399 * v850-dis.c: Likewise.
2400 * vax-dis.c: Likewise.
2401 * w65-dis.c: Likewise.
2402 * z8k-dis.c: Likewise.
2404 * d10v-dis.c: Add missing prototype.
2405 (dis_long): Remove unused variable.
2406 (dis_2_short): Likewise.
2408 * sh-dis.c: Add missing prototypes.
2409 * v850-opc.c: Likewise.
2410 Add unused attributes where needed.
2412 * ns32k-dis.c: Add missing prototypes.
2413 (bit_extract_simple): Remove unused variable.
2417 * s390-opc.c: Add "low or high" and "not low or high"
2418 branch instructions for gcc 3.0.
2419 * s390-opc.txt: Likewise.
2423 * i960-dis.c: Add parameters for prototypes
2424 (ctrl): Add unused attributes.
2426 (put_abs): Likewise.
2428 * mips-dis.c: Add missing prototypes.
2429 * a29k-dis.c: Likewise.
2430 * arc-dis.c: Likewise.
2431 * ia64-opc.c: Likewise.
2433 * s390-dis.c: Add missing prototypes.
2434 (init_disasm): Remove unused attribute since the parameter is
2439 * mips-opc.c (M1): Define. Reformatted Code.
2440 (mips_builtin_opcodes): Added performance counter opcodes mfpc, mfps,
2445 * mips-opc.c: R3900s can support all branch likely INSN_MACROs where
2446 the corresponding non-likely insn is in MIPS I.
2450 * mcore-dis.c: Fix formatting.
2451 * mips-dis.c: Likewise.
2452 * pj-dis.c: Likewise.
2453 * z8k-dis.c: Likewise.
2457 * cgen-ibld.in (extract_normal): Match type of VALUE and MASK
2458 to *VALUEP. Regenerate all cgen files.
2462 * mips-dis.c (print_insn_mips): Remove OPCODE_IS_MEMBER's gp32
2464 * mips-opc.c (G6): Undefine.
2465 (mips_builtin_opcodes): Remove gp32 entry for "move". Add macro
2466 as the first "move" alternative.
2470 * configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes
2472 * configure: Regenerate.
2476 * ppc-opc.c: Revert 2001-08-08.
2480 * dis-buf.c (generic_strcat_address): Add missing prototype.
2481 #if 0 the functions as it is unused.
2486 * ppc-opc.c: Include "bfd.h".
2487 (powerpc_operands): Add new field for reloc type.
2491 * mips-dis.c (print_insn_arg): Don't use software integer registers
2492 for coprocessor registers.
2493 (get_mips_isa): Removed.
2494 (is_newabi): New function, checks if NewABI is used.
2495 (_print_insn_mips): Get distinction between old ABI and new ABI right.
2499 * z8kgen.c: Fixed indentation of opt[] array. Include stdio.h to
2500 get stderr definition.
2501 (internal, gas): Removed warnings.
2502 (gas): Create a correct final entry for created array.
2503 * z8k-opc.h: Recreated with new z8kgen.
2507 * i386-dis.c: Fix formatting.
2511 * i386-dis.c: Change formatting conventions for architecture
2512 i386:intel to better match the format of various intel i386
2513 assemblers, like nasm, tasm or masm.
2517 * Makefile.am: Update dependencies with "make dep-am".
2518 * Makefile.in: Regenerate
2522 * alpha-dis.c: Fix formatting.
2523 * cris-dis.c: Likewise.
2524 * d10v-dis.c: Likewise.
2525 * d30v-dis.c: Likewise.
2526 * m10300-dis.c: Likewise.
2527 * tic54x-dis.c: Likewise.
2531 * m68k-dis.c: Fix formatting.
2532 * pj-dis.c: Likewise.
2533 * s390-dis.c: Likewise.
2534 * z8k-dis.c: Likewise.
2538 * mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s
2539 into the rest of the surrounding definitions.
2543 * i386-dis.c (grps): Print l or w suffix, and require mem modrm
2544 for lgdt, lidt, sgdt, sidt.
2548 * arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
2552 * cgen-asm.in: Include "xregex.h" always to enable the libiberty
2554 (@arch@_cgen_build_insn_regex): New routine from Graydon.
2555 (@arch@_cgen_assemble_insn): Add Graydon's code to use regex
2556 to verify if it is worth parsing the insn as insn "x". Also update
2557 error message when insn is not a recognized format of the insn vs
2558 when the insn is completely unrecognized.
2562 * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
2564 * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
2565 non-zero CGEN_CPU_DESC->insn_chunk_bitsize.
2569 * i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
2570 (OP_J): Use bfd_vma for mask to work properly with 64 bits.
2571 (op_address,op_riprel): Use bfd_vma to handle 64 bits.
2575 * Makefile.am (CPUDIR): Define.
2576 (stamp-m32r): Update dependencies.
2577 (stamp-fr30): Ditto.
2578 (stamp-openrisc): Ditto.
2579 * Makefile.in: Regenerate.
2583 * ppc-opc.c: Fix encoding of 'clf' instruction.
2587 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT.
2591 * cgen-asm.c (cgen_parse_keyword): Allow any first character.
2592 * cgen-opc.c (cgen_keyword_add): Ignore special first
2593 character when building nonalpha_chars field.
2597 * m88k-dis.c: Format to conform to GNU coding standards.
2601 * disassemble.c (disassembler_usage): Add unused attribute.
2605 * mips-opc.c: Move prefx to start of the table.
2609 * arc-opc.c (insert_st_syntax): Fix over-optimisation of ST
2614 * m68k-opc.c: Add wdebug instruction.
2618 * m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
2622 * cgen-asm.c (cgen_parse_keyword): When looking for the
2623 boundaries of a keyword, allow any special characters
2624 that are actually in one of the allowed keyword.
2625 * cgen-opc.c (cgen_keyword_add): Add any special characters
2626 to the nonalpha_chars field.
2630 * s390-opc.c: Add lgh instruction.
2631 * s390-opc.txt: Likewise.
2635 * i386-dis.c: Group function prototypes in one place.
2636 (FLOATCODE): Redefine as 1.
2637 (USE_GROUPS): Redefine as 2.
2638 (USE_PREFIX_USER_TABLE): Redefine as 3.
2639 (X86_64_SPECIAL): Define as 4.
2640 (GRP1b..GRPAMD): Move USE_GROUPS to bytecode1, index to bytecode2.
2641 (PREGRP0..PREGRP26): Similarly with USE_PREFIX_USER_TABLE.
2642 (dis386_att, dis386_intel, disx86_64_att, disx86_64_intel): Delete.
2643 (dis386): New table combining above four tables.
2644 (dis386_twobyte_att, dis386_twobyte_intel): Delete.
2645 (dis386_twobyte): New table combining above two tables.
2646 (x86_64_table): New table to handle x86_64.
2648 (float_mem_att, float_mem_intel): Delet.
2649 (float_mem): New table combining above two tables.
2650 (print_insn_i386): Modify for above.
2651 (dofloat): Likewise.
2652 (putop): Handle '{', '|' and '}' to select alternative mnemonics.
2653 Return 0 on success, 1 if no valid alternative.
2654 (putop <case 'F'>, <case 'H'>): Print nothing for intel_syntax.
2655 (putop <case 'T'>): Move to case 'U', and share case 'Q' code.
2656 (putop <case 'I'>): Move to case 'T', and share case 'P' code.
2657 (OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg
2659 (OP_I <case q_mode>): Handle as for v_mode if not 64-bit mode.
2660 (OP_I64): If not 64-bit mode, call OP_I.
2661 OP_OFF64): If not 64-bit mode, call OP_OFF.
2662 (OP_ST, OP_STi, OP_SEG, OP_DIR, OP_OFF, OP_OFF64, OP_MMX): Rename
2663 'ignore'/'ignored' to 'bytemode'.
2667 * configure.in: Sort 'ta' case statement.
2668 * configure: Regenerate.
2670 * i386-dis.c (dis386_att): Add 'H' to conditional branch and
2672 (disx86_64_att): Likewise.
2673 (dis386_twobyte_att): Likewise.
2674 (print_insn_i386): Don't print branch hints as a prefix.
2675 (putop): 'H' macro prints branch hints.
2676 (get64): Kill compile warnings.
2680 * sh-opc.h (sh_table): Don't use empty initializers.
2684 * z8k-dis.c: Fix formatting.
2685 (unpack_instr): Remove unused cases in switch statement. Add
2686 safety abort() in default case.
2687 (unparse_instr): Add safety abort() in default case.
2691 * m68k-dis.c (print_insn_m68k): Fix typo.
2692 * m68k-opc.c (m68k_opcodes): Correct allowed operands for
2693 mcf (ColdFire) div, rem and moveb instructions.
2697 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
2698 (cond_jump_mode, loop_jcxz_mode): Define.
2699 (dis386_att): Add cond_jump_flag and loop_jcxz_flag as
2700 appropriate, and 'F' suffix to loop insns.
2701 (disx86_64_att): Likewise.
2702 (dis386_twobyte_att): Likewise.
2703 (print_insn_i386): Don't output addr prefix for loop, jcxz insns.
2704 Output data size prefix for long conditional jumps. Output cs and
2706 (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
2707 (OP_J): Don't make PREFIX_DATA used.
2711 * sh-opc.h (sh_table): Complete last element entry to avoid
2716 * mips-dis.c (mips_isa_type): Add MIPS r12k support.
2720 * arc-opc.c: Whitespace changes.
2724 * cris-opc.c (cris_spec_regs): Add missing initializer field for
2729 * cgen-dis.in (extract_normal): Complete support for min<base case.
2733 * mips-dis.c (INSNLEN): Rename MAXLEN.
2734 (std_reg_names): Replace by mips32_reg_names and mips64_reg_names.
2735 (print_insn_arg): Remove $ prefix of register names.
2736 (set_mips_isa_type): Remove.
2737 (mips_isa_type): New function.
2738 (get_mips_isa): New Function.
2739 (print_insn_mips): Rename _print_insn_mips.
2740 (_print_insn_mips): New function, contains code which was
2741 duplicated in print_insn_big_mips and print_insn_little_mips.
2742 (print_insn_big_mips): Moved code to _print_insn_mips.
2743 (print_insn_little_mips): Likewise.
2744 (print_mips16_insn_arg): Remove $ prefix of register names.
2745 Print error message before abort.
2749 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
2750 simplified mnemonics used for setting PPC750-specific special
2755 * i386-dis.c (print_insn_i386): Always set `mod', `reg' and
2760 * arc-opc.c (arc_reg_names): Correct attribute for lp_count
2761 register to r/w. Formatting fixes throughout file.
2765 * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
2767 (twobyte_has_modrm): Update table.
2768 (need_modrm): Give it file scope.
2769 (MODRM_CHECK): Define.
2770 (dofloat): Use MODRM_CHECK.
2777 * cgen-dis.in (default_print_insn): Tolerate min<base instructions
2778 even at end of a section.
2779 * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
2780 by ignoring precariously-unpacked insn_value in favor of raw buffer.
2784 * disassemble.c (disassembler_usage): Remove unused attribute.
2788 * m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.
2792 * cgen-dis.in (print_insn): Remove call to read_insn. Instead,
2793 assume incoming buffer already has the base insn loaded. Handle
2794 smaller-than-base instructions for variable-length case.
2798 * i386-dis.c (Ev, Ed): Remove duplicate define.
2801 (OP_XS): New function.
2802 (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
2804 (dis386_twobyte_intel): Likewise.
2805 (prefix_user_table): Use MS for maskmovq operand.
2809 * Makefile.am: Add OpenRISC target.
2810 * Makefile.in: Regenerated.
2812 * disassemble.c (disassembler): Recognize the OpenRISC disassembly.
2814 * configure.in (bfd_openrisc_arch): Add target.
2815 * configure: Regenerated.
2817 * openrisc-asm.c: New file.
2818 * openrisc-desc.c: Likewise.
2819 * openrisc-desc.h: Likewise.
2820 * openrisc-dis.c: Likewise.
2821 * openrisc-ibld.c: Likewise.
2822 * openrisc-opc.c: Likewise.
2823 * openrisc-opc.h: Likewise.
2827 * z8k-dis.c: add names of control registers (ctrl_names);
2828 (seg_length): provides instruction length fixup for segmented
2829 mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12,
2830 CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases;
2831 (unparse_intr): handle CLASS_PR, print addresses without '#'
2832 * z8k-opc.h: re-created with new z8kgen
2833 * z8kgen.c: merged in fixes which were in existing z8k-opc.h; new
2834 entries for ldctl/ldctlb instruction
2838 * i386-dis.c: Add ffreep instruction.
2842 * ppc-opc.c (insert_mbe): Shift mask initializer as long.
2846 * i386-dis.c (PREGRP25): Define.
2847 (dis386_twobyte_att): Use here in place of "movntq" entry.
2848 (dis386_twobyte_intel): Likewise.
2849 (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq".
2851 (dis386_twobyte_att): Use here.
2852 (dis386_twobyte_intel): Likewise.
2853 (prefix_user_table): Add PREGRP26 entry for "punpcklqdq".
2854 (prefix_user_table <maskmovdqu>): XM operand, not MX.
2855 (prefix_user_table): Cosmetic changes to "bad" entries.
2859 * mips-opc.c: Remove extraneous whitespace.
2860 * mips-dis.c: Remove extraneous whitespace.
2864 * cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
2865 declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
2866 * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
2867 to allay a compiler warning.
2871 * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq.
2872 (dis386_twobyte_intel): Likewise.
2873 (twobyte_has_modrm): Set entry for paddq, psubq.
2877 * cgen-dis.in (print_insn_@arch@): Add support for target machine
2878 determination via CGEN_COMPUTE_MACH.
2879 * fr30-desc.c: Regenerate.
2880 * fr30-dis.c: Regenerate.
2881 * fr30-opc.h: Regenerate.
2882 * m32r-desc.c: Regenerate.
2883 * m32r-dis.c: Regenerate.
2884 * m32r-opc.h: Regenerate.
2885 * m32r-opinst.c: Regenerate.
2889 * configure.in: Remove the redundent AC_ARG_PROGRAM.
2890 * configure: Rebuild.
2894 * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
2895 notestr if larger than xsect.
2896 (in_class): Handle format M5.
2897 * ia64-asmtab.c: Regnerate.
2901 * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer
2902 has more than one byte left to read.
2906 * s390-opc.c: Add new opcodes. Smooth out formatting.
2907 * s390-opc.txt: Add new opcodes.
2911 * arm-dis.c (print_insn_thumb): Compute destination address
2912 of BLX(1) instruction by taking bit 1 from PC and not from bit
2917 * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
2918 so command line switches will work.
2922 * fr30-asm.c: Regenerate.
2923 * fr30-desc.c: Regenerate.
2924 * fr30-desc.h: Regenerate.
2925 * fr30-dis.c: Regenerate.
2926 * fr30-ibld.c: Regenerate.
2927 * fr30-opc.c: Regenerate.
2928 * fr30-opc.h: Regenerate.
2929 * m32r-asm.c: Regenerate.
2930 * m32r-desc.c: Regenerate.
2931 * m32r-desc.h: Regenerate.
2932 * m32r-dis.c: Regenerate.
2933 * m32r-ibld.c: Regenerate.
2934 * m32r-opc.c: Regenerate.
2935 * m32r-opc.h: Regenerate.
2936 * m32r-opinst.c: Regenerate.
2940 * m68k-opc.c: fix cpushl according to Motorola. Enable
2941 bunch of instructions for Coldfire 5407 and add all new.
2945 * configure.in (BFD_VERSION): Do without grep.
2946 * configure: Regenerate.
2947 * Makefile.am: Run "make dep-am".
2948 * Makefile.in: Regenerate.
2952 * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
2953 * ia64-asmtab.c: Regenerate.
2957 * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
2958 separate variants: one for IMM22 and the other for IMM14.
2959 * ia64-asmtab.c: Regenerate.
2963 * cgen-opc.c (cgen_get_insn_value): Add missing `return'.
2967 * Makefile.am (ia64-ic.tbl): Remove the target.
2968 (ia64-raw.tbl): Likewise.
2969 (ia64-waw.tbl): Likewise.
2970 (ia64-war.tbl): Likewise.
2971 (ia64-asmtab.c): Generate it in the source directory.
2972 * Makefile.in: Regenerated.
2976 * Makefile.am: Add PDP-11 target.
2977 * configure.in: Likewise.
2978 * disassemble.c: Likewise.
2979 * pdp11-dis.c: New file.
2980 * pdp11-opc.c: New file.
2984 * ia64-ic.tbl: Update from Intel. Add setf to fr-writers.
2985 * ia64-asmtab.c: Regenerate.
2989 * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
2995 * mips-dis.c (print_insn_arg): Use top four bits of the address of
2996 the following instruction not of the jump itself for the jump
2998 (print_mips16_insn_arg): Likewise.
3002 * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
3004 * Makefile.in: Regenerate.
3008 * Makefile.am: Add linux target for S/390.
3009 * Makefile.in: Likewise.
3010 * configure.in: Likewise.
3011 * disassemble.c: Likewise.
3012 * s390-dis.c: New file.
3013 * s390-mkopc.c: New file.
3014 * s390-opc.c: New file.
3015 * s390-opc.txt: New file.
3019 * ia64-asmtab.c: Revert 2000-12-16 change.
3023 * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
3024 * m32r-desc.h: Regenerate.
3028 * i386-dis.c (dis386_att, grps): Use 'T' for push/pop
3029 (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
3033 * hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types.
3037 * disassemble.c: Remove spurious white space.
3041 * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
3046 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
3047 * Makefile.am (C_FILES): Add arc-ext.c.
3048 (ALL_MACHINES) Add arc-ext.lo.
3049 (INCLUDES) Add opcode directory to list.
3050 New dependency entry for arc-ext.lo.
3051 * disassemble.c (disassembler): Correct call to
3052 arc_get_disassembler.
3053 * arc-opc.c: New update for ARC, including full base
3054 instructions for ARC variants.
3055 * arc-dis.h, arc-dis.c: New update for ARC, including
3056 extensibility functionality.
3057 * arc-ext.h, arc-ext.c: New files for handling extensibility.
3061 * i386-dis.c (PREGRP15 - PREGRP24): New.
3062 (dis386_twobyt): Add SSE2 instructions.
3063 (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
3064 (twobyte_uses_f3_prefix): ... this one.
3065 (grps): Add SSE instructions.
3066 (prefix_user_table): Add two new slots; add SSE2 instructions.
3067 (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
3068 Handle the REPNZ and Data16 prefixes as well; do proper lookup
3069 to prefix_user_table.
3070 (OP_E): Accept mfence and lfence as well.
3071 (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
3072 (OP_XMM): Support REX extensions.
3078 * arm-dis.c (print_insn): Set pc to zero for instructions with
3079 a reloc associated with them.
3083 * cgen-asm.in (parse_insn_normal): Changed syn to be
3084 CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn
3085 as character to use CGEN_SYNTAX_CHAR macro and all comparisons
3086 to '\0' to use 0 instead.
3087 * cgen-dis.in (print_insn_normal): Ditto.
3088 * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
3092 * i386-dis.c: Add x86_64 support.
3093 (rex): New static variable.
3094 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
3095 (USED_REX): New macro.
3096 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
3097 (OP_I64, OP_OFF64, OP_IMREG): New functions.
3098 (OP_REG, OP_OFF): Declare.
3099 (get64, get32, get32s): New functions.
3100 (r??_reg): New constants.
3101 (dis386_att): Change templates of instruction implicitly promoted
3102 to 64bit; change e?? to RMe?? for unwind RM byte instructions.
3104 (dis386_intel): Likewise.
3105 (dixx86_64_att): New table based on dis386_att.
3106 (dixx86_64_intel): New table based on dis386_intel.
3107 (names64, names8rex): New global variable.
3108 (names32, names16): Add extended registers.
3109 (prefix_user_t): Recognize rex prefixes.
3110 (prefix_name): Print REX prefixes nicely.
3111 (op_riprel): New global variable.
3112 (start_pc): Set type to bfd_vma.
3113 (print_insn_i386): Detect the 64bit mode and use proper table;
3114 move ckprefix after initializing the buffer; output unused rex prefixes;
3115 output information about target of RIP relative addresses.
3116 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
3117 (print_operand_value): New function.
3118 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
3119 REX prefix and new modes.
3120 (get64, get32s): New.
3121 (get32): Return bfd_signed_vma type.
3122 (set_op): Initialize the op_riprel.
3123 * disassemble.c (disassembler): Recognize the x86-64 disassembly.
3127 cgen-dis.in (read_insn): Use bfd_get_bits()
3131 * cgen-dis.c (hash_insn_array): Use bfd_put_bits().
3132 (hash_insn_list): Likewise
3133 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
3134 (extract_1): Use bfd_get_bits().
3135 (extract_normal): Apply sign extension to both extraction
3137 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
3138 (cgen_put_insn_value): Use bfd_put_bits()
3142 * cgen-asm.in (parse_insn_normal): Print better error message for
3143 instructions with missing operands.
3147 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
3151 * Makefile.in: Regenerate.
3152 * aclocal.m4: Regenerate.
3153 * config.in: Regenerate.
3154 * configure.in: Add spacing.
3155 * configure: Regenerate.
3156 * ia64-asmtab.c: Regenerate.
3157 * po/opcodes.pot: Regenerate.
3161 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
3162 error messages over later parse-time ones.
3166 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
3168 * ia64-gen.c (insert_deplist): Cast sizeof result to int.
3169 (print_dependency_table): Print NULL if semantics field not set.
3170 (insert_opcode_dependencies): Mark cmp parameter as unused.
3171 (print_main_table): Use fprintf_vma to print long long fields.
3172 (main): Mark argv paramter as unused. Convert to old style definition.
3173 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
3174 * ia64-asmtab.c: Regnerate.
3178 * m32r-dis.c (print_insn): Prevent re-read of instruction from
3181 * fr30-dis.c: Regenerate.
3185 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
3186 * Makefile.am (C_FILES): Add arc-ext.c.
3187 (ALL_MACHINES) Add arc-ext.lo.
3188 (INCLUDES) Add opcode directory to list.
3189 New dependency entry for arc-ext.lo.
3190 * disassemble.c (disassembler): Correct call to
3191 arc_get_disassembler.
3192 * arc-opc.c: New update for ARC, including full base
3193 instructions for ARC variants.
3194 * arc-dis.h, arc-dis.c: New update for ARC, including
3195 extensibility functionality.
3196 * arc-ext.h, arc-ext.c: New files for handling extensibility.
3200 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
3201 MOD_HILO, and MOD_LO macros.
3203 * mips-opc.c (M1, M2): Delete.
3204 (mips_builtin_opcodes): Remove all uses of M1.
3206 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
3207 instructions take "G" format second operands and use the
3209 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
3211 Delete "sel" code operands from mfc1 and mtc1.
3212 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
3218 * mips-opc.c (mips_builtin_opcodes): Finish additions
3219 for MIPS32 support, and clean up existing entries for
3220 aesthetics, consistency with the MIPS32 ISA, and
3221 with consistency the rest of the table.
3225 * mips16-opc.c (mips16_opcodes): Add initialiser for membership
3230 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
3231 specifiers. Update 'B' for new constant names, and remove
3233 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
3234 near the top of the array, so they are disassembled properly.
3235 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
3236 code for MIPS32. Update "clo" and "clz" to use 'U' operand
3237 specifier. Add 'H' format specifier variants for "mfc1,"
3238 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
3239 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
3240 "wait" variant which uses 'J' operand specifier.
3242 * mips-dis.c (set_mips_isa_type): Update to use
3243 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
3244 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
3245 * mips-opc.c (I32): New constant for instructions added in
3248 (mips_builtin_opcodes) Replace all uses of P4 with I32.
3250 * mips-dis.c (set_mips_isa_type): Add cases for
3251 bfd_mach_mips5 and bfd_mach_mips64.
3252 * mips-opc.c (I64): New definitions.
3254 * mips-dis.c (set_mips_isa_type): Add case for
3259 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
3260 (print_insn_ppi): Make nib1, nib2, nib3 unsigned.
3261 Initialize variable dc to NULL.
3262 (print_insn_shx): Remove unused label d_reg_n.
3266 * arm-opc.h: Add new opcode formatting parameter 'B'.
3267 (arm_opcodes): Add XScale, v5, and v5te instructions.
3268 (thumb_opcodes): Add v5t instructions.
3270 * arm-dis.c (print_insn_arm): Handle new 'B' format
3272 (print_insn_thumb): Decode BLX(1) instruction.
3276 * mips-opc.c: Fix file header comment.
3280 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
3281 print_insn_cris_with_register_prefix.
3285 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
3289 * cgen-dis.in (print_insn): All insns which can fit into insn_value
3290 must be loaded there in their entirety.
3294 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
3295 (compute_arch_mask): Add v8plusb and v9b machines.
3296 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
3297 * sparc-opc.c: Support for Cheetah instruction set.
3298 (prefetch_table): Add #invalidate.
3302 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
3306 * fr30-desc.h: Regenerate.
3307 * m32r-desc.h: Regenerate.
3308 * m32r-ibld.c: Regenerate.
3312 * ia64-ic.tbl: Update from Intel.
3313 * ia64-asmtab.c: Regenerate.
3317 * ia64-gen.c: Convert C++-style comments to C-style comments.
3318 * tic54x-dis.c: Likewise.
3322 Changes to add dollar prefix to registers for files where user symbols
3323 don't have a leading underscore. Fix formatting.
3324 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
3325 (format_reg): Add parameter with_reg_prefix. All callers changed.
3326 (print_with_operands): Ditto.
3327 (print_insn_cris_generic): Renamed from print_insn_cris, add
3328 parameter with_reg_prefix.
3329 (print_insn_cris_with_register_prefix,
3330 print_insn_cris_without_register_prefix, cris_get_disassembler):
3332 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
3336 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
3337 gt, ge, ngt, and nge.
3338 * ia64-asmtab.c: Regenerate.
3340 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
3341 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
3342 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
3343 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
3344 * ia64-asmtab.c: Regnerate.
3348 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
3349 Add mfc0 and mtc0 with sub-selection values.
3350 Add clo and clz opcodes.
3351 Add msub and msubu instructions for MIPS32.
3352 Add madd/maddu aliases for mad/madu for MIPS32.
3353 Support wait, deret, eret, movn, pref for MIPS32.
3354 Support tlbp, tlbr, tlbwi, tlbwr.
3357 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
3358 (print_insn_arg): Handle 'H' args.
3359 (set_mips_isa_type): Recognize 4K.
3360 Use CPU_* defines instead of hardcoded numbers.
3364 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
3365 (d30v_format_tab): Use Rb2 for modinc and moddec.
3369 * d30v-opc.c (d30v_format_tab): Use format Ra for
3374 * configure: Rebuilt with new libtool.m4.
3378 * configure: Regenerate.
3379 * po/opcodes.pot: Regenerate.
3383 * acinclude.m4: Include libtool and gettext macros from the
3385 * aclocal.m4, configure: Rebuilt.
3389 * tic80-dis.c: Fix formatting.
3393 * w65-dis.c: Fix formatting.
3397 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
3398 (powerpc_opcodes): Add table entries for PPC 405 instructions.
3399 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
3400 instructions. Added extended mnemonic mftbl as defined in the
3401 405GP manual for all PPCs.
3405 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
3406 call. Change last goto to use failed instead of done.
3410 * cgen-ibld.in (cgen_put_insn_int_value): New function.
3411 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
3412 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
3413 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
3414 * cgen-dis.in (read_insn): New static function.
3415 (print_insn): Use read_insn to read the insn into the buffer and set
3417 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
3419 * fr30-asm.c: Regenerated.
3420 * fr30-desc.c: Regenerated.
3421 * fr30-desc.h: Regenerated.
3422 * fr30-dis.c: Regenerated.
3423 * fr30-ibld.c: Regenerated.
3424 * fr30-opc.c: Regenerated.
3425 * fr30-opc.h: Regenerated.
3426 * m32r-asm.c: Regenerated.
3427 * m32r-desc.c: Regenerated.
3428 * m32r-desc.h: Regenerated.
3429 * m32r-dis.c: Regenerated.
3430 * m32r-ibld.c: Regenerated.
3431 * m32r-opc.c: Regenerated.
3435 * tic30-dis.c: Fix formatting.
3439 * sh-dis.c: Fix formatting.
3443 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
3447 * z8k-dis.c: Fix formatting.
3451 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
3452 break, mov-immediate, nop.
3453 * ia64-opc-f.c: Delete fpsub instructions.
3454 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
3455 address operand. Rewrite using macros to avoid long lines.
3456 * ia64-opc.h (POSTINC): Define.
3457 * ia64-asmtab.c: Regenerate.
3461 * ia64-ic.tbl: Add missing entries.
3465 * i860-dis.c (print_br_address): Change third argument from int
3470 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
3471 for MLI templates. Handle IA64_OPND_TGT64.
3475 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
3476 * cgen.sh: Likewise.
3480 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
3484 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
3485 Change return type from void to int. Check the combination
3486 of operands, return 1 if valid. Fix to avoid BUF overflow.
3487 Report undefined combinations of operands in COMMENT.
3488 Report internal errors to stderr. Output the adiw/sbiw
3489 constant operand in both decimal and hex.
3490 (print_insn_avr): Disassemble ldd/std with displacement of 0
3491 as ld/st. Check avr_operand () return value, handle invalid
3492 combinations of operands like unknown opcodes.
3496 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
3497 (run-cgen, stamp-m32r, stamp-fr30): New targets.
3498 * Makefile.in: Regenerate.
3499 * configure.in: Add --enable-cgen-maint option.
3500 * configure: Regenerate.
3504 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
3505 (cgen_hw_lookup_by_num): Ditto.
3506 (cgen_operand_lookup_by_name): Ditto.
3507 (print_address): Ditto.
3508 (print_keyword): Ditto.
3509 * cgen-dis.c (hash_insn_array): Mark unused parameters with
3511 * cgen-asm.c (hash_insn_array): Mark unused parameters with
3513 (cgen_parse_keyword): Ditto.
3517 * i860-dis.c: New file.
3518 (print_insn_i860): New function.
3519 (print_br_address): New function.
3520 (sign_extend): New function.
3521 (BITWISE_OP): New macro.
3522 (I860_REG_PREFIX): New macro.
3523 (grnames, frnames, crnames): New structures.
3525 * disassemble.c (ARCH_i860): Define.
3526 (disassembler): Add check for bfd_arch_i860 to set disassemble
3527 function to print_insn_i860.
3529 * Makefile.in (CFILES): Added i860-dis.c.
3530 (ALL_MACHINES): Added i860-dis.lo.
3531 (i860-dis.lo): New dependences.
3533 * configure.in: New bits for bfd_i860_arch.
3535 * configure: Regenerated.
3539 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
3540 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
3541 (cris-dis.lo, cris-opc.lo): New rules.
3542 * Makefile.in: Rebuild.
3543 * configure.in (bfd_cris_arch): New target.
3544 * configure: Rebuild.
3545 * disassemble.c (ARCH_cris): Define.
3546 (disassembler): Support ARCH_cris.
3547 * cris-dis.c, cris-opc.c: New files.
3548 * po/POTFILES.in, po/opcodes.pot: Regenerate.
3552 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
3557 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
3562 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
3563 fput_const, extract_3, extract_5_load, extract_5_store,
3564 extract_5r_store, extract_5R_store, extract_10U_store,
3565 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
3566 extract_12, extract_17, extract_22): Prototype.
3567 (print_insn_hppa): Rename inner block opcode -> opc to avoid
3568 shadowing outer block.
3577 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
3581 * avr-dis.c (avr_operand): Change _ () to _() around all strings
3582 marked for translation (exception from the usual coding style).
3583 (print_insn_avr): Initialize insn2 to avoid warnings.
3587 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
3588 * h8500-dis.c: Fix formatting.
3592 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
3593 (CLEANFILES): Add DEPA.
3594 * Makefile.in: Regenerate.
3598 * arm-dis.c (regnames): Add an additional register set to match
3599 the set used by GCC. Make it the default.
3603 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
3605 * Makefile.in: Regenerate.
3609 * Makefile.am: Rebuild dependency.
3610 * Makefile.in: Rebuild.
3614 * Makefile.in, configure: regenerate
3615 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
3617 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
3619 * configure.in: Recognize m68hc12 and m68hc11.
3620 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
3621 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
3622 and opcode generation for m68hc11 and m68hc12.
3626 * disassemble.c (disassembler): Refer to the PowerPC 620 using
3627 bfd_mach_ppc_620 instead of 620.
3631 * h8300-dis.c: Fix formatting.
3632 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
3637 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
3641 * avr-dis.c: completely rewritten.
3645 * h8300-dis.c: Follow the GNU coding style.
3646 (bfd_h8_disassemble) Fix a typo.
3650 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
3651 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
3652 correctly. Fix a typo.
3656 * opintl.h (_(String)): Explain why dgettext is used instead of
3661 * opintl.h (gettext, dgettext, dcgettext, textdomain,
3662 bindtextdomain): Replace defines with those from intl/libgettext.h
3663 to quieten gcc warnings.
3667 * Makefile.am: Update dependencies with "make dep-am"
3668 * Makefile.in: Regenerate.
3672 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
3673 sign-extending operands.
3677 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
3682 * Makefile.am (LIBIBERTY): Define.
3686 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
3687 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
3688 (reg_names): Rename to std_reg_names. Change it to a char **
3690 (std_reg_names): New name for reg_names.
3691 (set_mips_isa_type): Set reg_names to point to std_reg_names by
3696 * fr30-desc.h: Partially regenerated to account for changed
3697 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
3698 * m32r-desc.h: Ditto.
3702 * arm-opc.h: Use upper case for flasg in MSR and MRS
3703 instructions. Allow any bit to be set in the field_mask of
3704 the MSR instruction.
3706 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
3707 field_mask of an MSR instruction.
3711 * arm-opc.h: Disassembly of thumb ldsb/ldsh
3712 instructions changed to ldrsb/ldrsh.
3716 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
3717 target addresses for 'jal' and 'j'.
3721 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
3722 also available in common mode when powerpc syntax is being used.
3726 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
3727 (dummy_print_address): Ditto.
3731 * tic54x-opc.c: New.
3732 * tic54x-dis.c: New.
3733 * disassemble.c (disassembler): Add ARCH_tic54x.
3734 * configure.in: Added tic54x target.
3736 * Makefile.am: Add tic54x dependencies.
3737 * Makefile.in: Ditto.
3741 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
3742 vector unit operands.
3743 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
3744 unit instruction formats.
3745 (PPCVEC): New macro, mask for vector instructions.
3746 (powerpc_operands): Add table entries for above operand types.
3747 (powerpc_opcodes): Add table entries for vector instructions.
3749 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
3750 (print_insn_little_powerpc): Likewise.
3751 (print_insn_powerpc): Prepend 'v' when printing vector registers.
3755 * configure.in: Add bfd_powerpc_64_arch.
3756 * disassemble.c (disassembler): Use print_insn_big_powerpc for
3761 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
3766 * avr-dis.c (reg_fmul_d): New. Extract destination register from
3768 (reg_fmul_r): New. Extract source register from FMUL instruction.
3769 (reg_muls_d): New. Extract destination register from MULS instruction.
3770 (reg_muls_r): New. Extract source register from MULS instruction.
3771 (reg_movw_d): New. Extract destination register from MOVW instruction.
3772 (reg_movw_r): New. Extract source register from MOVW instruction.
3773 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
3774 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
3778 * ia64-gen.c (general): Add an ordered table of primary
3779 opcode names, as well as priority fields to disassembly data
3780 structures to enforce a preferred disassembly format based on the
3781 ordering of the opcode tables.
3782 (load_insn_classes): Show a useful message if IC tables are missing.
3783 (load_depfile): Ditto.
3784 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
3785 distinguish preferred disassembly.
3786 * ia64-opc-f.c: Reorder some insn for preferred disassembly
3787 format. Fix incorrect flag on fma.s/fma.s.s0.
3788 * ia64-opc.c: Scan *all* disassembly matches and use the one with
3789 the highest priority.
3790 * ia64-opc-b.c: Use more abbreviations.
3791 * ia64-asmtab.c: Regenerate.
3795 * hppa-dis.c (extract_16): New function.
3796 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
3797 new operand types l,y,&,fe,fE,fx.
3805 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
3806 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
3807 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
3809 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
3810 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
3811 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
3812 * Makefile.in: Rebuild.
3813 * configure Rebuild.
3814 * configure.in (bfd_ia64_arch): New target.
3815 * disassemble.c (ARCH_ia64): Define.
3816 (disassembler): Support ARCH_ia64.
3817 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
3818 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
3819 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
3820 ia64-war.tbl, ia64-waw.tbl: New files.
3824 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
3825 (disassemble): Use them.
3829 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
3830 * Makefile.am: Update dependencies.
3831 * Makefile.in: Regenerate.
3835 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
3836 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
3837 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
3838 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
3839 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
3840 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
3841 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
3842 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
3843 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
3844 ansidecl.h as sysdep.h includes it.
3848 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
3849 --enable-build-warnings option.
3850 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
3851 * Makefile.in, configure: Re-generate.
3855 * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
3856 stc GBR,@-<REG_N> is available for arch_sh1_up.
3857 Group parallel processing insn with identical mnemonics together.
3858 Make three-operand psha / pshl come first.
3862 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
3863 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
3864 (sh_arg_type): Add A_PC.
3865 (sh_table): Update entries using immediates. Add repeat.
3866 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
3867 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
3871 * po/opcodes.pot: Regenerate.
3873 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
3874 (DEP): Quote when passing vars to sub-make. Add warning message
3876 (DEP1): Rewrite for "gcc -MM".
3877 (CLEANFILES): Add DEP2.
3878 Update dependencies.
3879 * Makefile.in: Regenerate.
3883 * avr-dis.c: Syntax cleanup.
3884 (add0fff): Print the pc relative address as a signed number.
3885 (add03f8): Likewise.
3889 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
3890 the parameter ATTRIBUTE_UNUSED.
3891 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
3895 * m10300-opc.c: SP-based offsets are always unsigned.
3899 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
3900 [branch always] instead of "undefined".
3904 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
3905 short instructions, from end of list of long instructions.
3909 * Makefile.am (CFILES): Add avr-dis.c.
3910 (ALL_MACHINES): Add avr-dis.lo.
3914 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
3916 (print_insn_avr): Call function via pointer in K&R compatible way.
3917 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
3918 add0fff, add03f8): Convert to old style function declaration and
3920 (avrdis_opcode): Add prototype.
3924 * avr-dis.c: New file. AVR disassembler.
3925 * configure.in (bfd_avr_arch): New architecture support.
3926 * disassemble.c: Likewise.
3927 * configure: Regenerate.
3931 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
3935 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
3936 flag to determine if operand is pc-relative.
3938 (d30v_format_table):
3939 (REL6S3): Renamed from IMM6S3.
3940 Added flag OPERAND_PCREL.
3941 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
3942 added flag OPERAND_PCREL.
3943 (IMM12S3U): Replaced with REL12S3.
3944 (SHORT_D2, LONG_D): Delay target is pc-relative.
3945 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
3946 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
3947 using the REL* operands.
3948 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
3949 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
3950 LONG_Db, using REL* operands.
3951 (SHORT_U, SHORT_A5S): Removed stray alternatives.
3952 (d30v_opcode_table): Use new *r formats.
3956 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
3957 'signed_overflow_ok_p'.
3961 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
3962 name of the libtool directory.
3963 * Makefile.in: Rebuild.
3967 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
3968 (cgen_clear_signed_overflow_ok): New function.
3969 (cgen_signed_overflow_ok_p): New function.
3973 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
3974 m32r-ibld.c, m32r-opc.h: Rebuild.
3978 * i370-dis.c, i370-opc.c: New.
3980 * disassemble.c (ARCH_i370): Define.
3981 (disassembler): Handle it.
3983 * Makefile.am: Add support for Linux/IBM 370.
3984 * configure.in: Likewise.
3986 * Makefile.in: Regenerate.
3987 * configure: Likewise.
3991 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
3992 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
3997 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
3999 * mips-opc.c (G6): New define.
4000 (mips_builtin_op): Add "move" definition for -gp32.
4005 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
4009 * dis-buf.c (buffer_read_memory): Change `length' param and all int
4014 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
4015 (print_insn_ppi): Likewise.
4016 (print_insn_shx): Use info->mach to select appropriate insn set.
4017 Add support for sh-dsp. Remove FD_REG_N support.
4018 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
4019 (sh_arg_type): Likewise. Remove FD_REG_N.
4020 (sh_dsp_reg_nums): New enum.
4021 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
4022 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
4023 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
4024 (arch_sh3_dsp_up): Likewise.
4025 (sh_opcode_info): New field: arch.
4026 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
4027 D_REG_N. Fill in arch field. Add sh-dsp insns.
4031 * arm-dis.c: Change flavor name from atpcs-special to
4032 special-atpcs to prevent name conflict in gdb.
4033 (get_arm_regname_num_options, set_arm_regname_option,
4034 get_arm_regnames): New functions. API to access the several
4035 flavor of register names. Note: Used by gdb.
4036 (print_insn_thumb): Use the register name entry from the currently
4037 selected flavor for LR and PC.
4041 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
4043 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
4044 "mulsh.h" instructions.
4045 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
4047 (print_insn_mcore): Add support for little endian targets.
4048 Add support for MULSH and OPSR classes.
4052 * arm-dis.c (parse_arm_diassembler_option): Rename again.
4053 Previous delat did not take.
4057 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
4058 to adjust target address bounds checking and calculate the
4059 appropriate octet offset into data.
4063 * arm-dis.c: (parse_disassembler_option): Rename to
4064 parse_arm_disassembler_option and allow to be exported.
4066 * disassemble.c (disassembler_usage): New function: Print out any
4067 target specific disassembler options.
4068 Call arm_disassembler_options() if the ARM architecture is being
4071 * arm-dis.c (NUM_ELEM): Define this macro if not already
4073 (arm_regname): New struct type for ARM register names.
4074 (arm_toggle_regnames): Delete.
4075 (parse_disassembler_option): Use register name structure.
4076 (print_insn): New function: Combines duplicate code found in
4077 print_insn_big_arm and print_insn_little_arm.
4078 (print_insn_big_arm): Call print_insn.
4079 (print_insn_little_arm): Call print_insn.
4080 (print_arm_disassembler_options): Display list of supported,
4081 ARM specific disassembler options.
4085 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
4086 ARM_STT_16BIT flag as Thumb code symbols.
4088 * arm-dis.c (printf_insn_little_arm): Ditto.
4092 * arm-dis.c (printf_insn_thumb): Prevent double dumping
4093 of raw thumb instructions.
4097 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
4101 * arm-dis.c (streq): New macro.
4102 (strneq): New macro.
4103 (force_thumb): ew local variable.
4104 (parse_disassembler_option): New function: Parse a single, ARM
4105 specific disassembler command line switch.
4106 (parse_disassembler_option): Call parse_disassembler_option to
4107 parse individual command line switches.
4108 (print_insn_big_arm): Check force_thumb.
4109 (print_insn_little_arm): Check force_thumb.
4111 For older changes see ChangeLog-9899
4117 version-control: never