3 * configure: Regenerate.
4 * configure.ac (BFIN_SIM_EXTRA_OBJS): Delete.
5 * Makefile.in (SIM_OBJS): Delete @BFIN_SIM_EXTRA_OBJS@.
9 * dv-bfin_uart.c [!HAVE_DV_SOCKSER] (dv_sockser_status,
10 dv_sockser_write, dv_sockser_read): Delete.
14 * sim-main.h: Delete run-sim.h include.
18 * aclocal.m4, config.in, configure: Regenerate.
19 * tconfig.in: Rename file ...
20 * tconfig.h: ... here.
24 * tconfig.in: Delete includes.
25 [HAVE_DV_SOCKSER]: Delete.
29 * bfin-sim.c (decode_dsp32alu_0): Change v to bu32.
33 * Makefile.in (SIM_RUN_OBJS): Delete.
38 * Makefile.in ($(srcdir)/linux-fixed-code.h): Put a ; after the
39 print sed command for BSD compatibility.
44 * Makefile.in ($(srcdir)/linux-fixed-code.h): Specify the asm input
45 directly rather than use $<. Move the file name to the end of the
46 sed command to be POSIX compliant.
50 * configure: Regenerate.
54 * configure: Regenerate.
55 * config.in: Regenerate.
59 * configure: Regenerate.
63 * configure: Regenerate.
67 * bfin-sim.c (decode_dsp32alu_0): Add note about broken handling of
68 SEARCH with parallel insns.
72 * bfin-sim.c (decode_dsp32shift_0): Make sure HLs is 0 after last
74 (decode_dsp32shiftimm_0): Likewise.
75 Require HLs be less than 2 for accumulator shift insns.
79 * bfin-sim.c (decode_dsp32alu_0): Check more opcode fields before
80 decoding various insns.
84 * TODO: Add more notes.
88 * Makefile.in ($(srcdir)/linux-fixed-code.h): Add
89 @MAINTAINER_MODE_TRUE@ as the first item in the dependency list.
93 * aclocal.m4, configure: Regenerate.
101 * aclocal.m4, configure: Regenerate.
105 * configure.ac: Use $SIM_DV_SOCKSER_O.
106 * configure: Regenerated.
110 * aclocal.m4: Revert the previous change changing
111 the license from GPL v2 or later to GPL v3 or later
112 (this file was generated).
116 * linux-fixed-code.s: Revert the previous change changing
117 the license from GPL v2 or later to GPL v3 or later.
121 * machs.c (bf54x_roms): Pass 0x1000 to alias field of BFROM, and
122 0x10000 to the alias field of BFROMA.
123 (bf561_roms): Pass 0x1000 to alias field of BFROM.
124 (bf59x_roms): Pass 0x10000 to alias field of BFROMA.
128 * machs.c (bfin_reg_fetch): Change return 0 to return -1, and
129 return -1 to return 4.
130 (bfin_reg_store): Likewise.
134 * config.in, configure: Regenerate.
138 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pint.
139 * configure: Regenerate.
140 * dv-bfin_pint.c, dv-bfin_pint.h: New device model.
141 * machs.c (bf542_dev): Add PINT register blocks.
142 (bf544_dev, bf547_dev): Likewise.
144 (bf54x_port): Add pint/gpio routing.
145 * machs.h (BFIN_MMR_PINT_SIZE): Define.
149 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio2.
150 * configure: Regenerate.
151 * dv-bfin_gpio2.c, dv-bfin_gpio2.h: New device model.
152 * machs.c (bf54x_mem): Delete GPIO mem stub.
153 (bf542_dev): Add GPIO register blocks.
154 (bf544_dev, bf547_dev): Likewise.
155 * machs.h (BFIN_MMR_GPIO2_SIZE): Define.
159 * bfin-sim.c (decode_dsp32shift_0): Extract the sign for ASHIFT
160 and LSHIFT, and set ASTAT based on the before/after values.
161 Rename "val" to "acc" to be consistent with other code branches.
165 * bfin-sim.c (sgn_extend): New helper.
166 (decode_dsp32shiftimm_0): Call lshift when newimmag is more
167 than 16, otherwise call ashiftrt. Set ASTAT fields as needed.
168 For accumulator shifts, call new sgn_extend helper.
172 * bfin-sim.c (illegal_instruction_or_combination): New helper.
173 (decode_ProgCtrl_0): Call illegal_instruction_or_combination instead
174 of illegal_instruction.
175 (decode_PushPopReg_0, decode_CCflag_0, decode_CC2dreg_0,
176 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
177 decode_dspLDST_0, decode_LDST_0, _interp_insn_bfin): Likewise.
178 (decode_PushPopMultiple_0): Call illegal_instruction_combination when
179 PARALLEL_GROUP is not BFIN_PARALLEL_NONE.
180 (decode_CCflag_0, decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0,
181 decode_COMPI2opD_0, decode_COMPI2opP_0): Likewise.
182 (decode_CC2stat_0): Check PARALLEL_GROUP before cbit.
183 (decode_LDSTpmod_0): Call illegal_instruction_combination when
184 PARALLEL_GROUP is BFIN_PARALLEL_GROUP2.
185 (decode_dagMODim_0, decode_dagMODik_0, decode_LDST_0,
186 decode_LDSTiiFP_0, decode_LDSTii_0): Likewise.
190 * bfin-sim.h (bfin_parallel_group): New enum.
191 (bfin_cpu_state): Add new "group" member.
192 (PARALLEL_GROUP): Define.
193 * bfin-sim.c (decode_ProgCtrl_0): Change INSN_LEN check to
195 (decode_CaCTRL_0, decode_PushPopReg_0, decode_ccMV_0, decode_CCflag_0,
196 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
197 decode_LOGI2op_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
198 decode_CALLa_0, decode_linkage_0): Likewise.
199 (_interp_insn_bfin): Set PARALLEL_GROUP.
200 (interp_insn_bfin): Likewise.
204 * bfin-sim.c (decode_dsp32alu_0): Delete extra space in TRACE_INSN.
208 * bfin-sim.c (_interp_insn_bfin): Call illegal_instruction_combination
209 when INSN_LEN is non-zero before 32bit decode.
213 * bfin-dis.c (fmtconst): Replace decimal handling with a single
214 sprintf call and the '*' field width.
218 * machs.c (bfin_model_map_bfrom): Return when mnum is 535.
222 * interp.c (bfin_user_init): Move auxvt_size decl from top to
223 inside of auxvt check.
227 * dv-bfin_sic.c (bfin_sic_finish): Change iwr1 to iwr2.
231 * devices.c: Include devices.h.
235 * aclocal.m4, config.in, configure: Regenerate.
240 * bfin-sim.c (lshift): Add an overflow flag. Delete now unused
241 i, j, and tmp vars. Add a new v_i var. Split the overflow logic
242 out from the saturate logic. Do not set V ASTAT bits when working
244 (decode_ALU2op_0): Add new argument to lshift call.
245 (decode_LOGI2op_0, decode_dsp32shift_0, decode_dsp32shiftimm_0):
250 * dv-bfin_ebiu_amc.c (struct bfin_ebiu_amc): Add bank_base.
251 (bfin_ebiu_amc_write_amgctl): Replace BFIN_EBIU_AMC_BASE with
253 (bfin_ebiu_amc_finish): Assign BFIN_EBIU_AMC_BASE to amc->bank_base.
257 * dv-bfin_ebiu_amc.c (bfin_ebiu_amc_attach_address_callback): Use
258 ARRAY_SIZE rather than hardcoded constant.
262 * config.in: Regenerate.
263 * configure: Likewise.
264 * configure.ac: Add linux/types.h to AC_CHECK_HEADERS.
265 * dv-eth_phy.c: Check for HAVE_LINUX_TYPES_H, and delete __u16 and
266 _LINUX_TYPES_H defines.
270 * interp.c (bfin_syscall): Increase _tbuf storage. Declare new local
271 tstr buffer. Call cb_get_string on tstr when handling CB_SYS_stat64,
272 CB_SYS_lstat64, CB_SYS_open, CB_SYS_write, CB_SYS_unlink,
273 CB_SYS_truncate, CB_SYS_rename, CB_SYS_stat, CB_SYS_lstat. Include
274 tstr in the tbuf output.
278 * Makefile.in: Delete all dependency rules.
279 * aclocal.m4, configure: Regenerate.
283 * configure: Regenerate after common/acinclude.m4 update.
287 * configure.ac: Change include to common/acinclude.m4.
288 * aclocal.m4, configure: Regenerate.
292 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
293 call. Replace common.m4 include with SIM_AC_COMMON.
294 * configure: Regenerate.
298 * bfin-sim.c (decode_dsp32shift_0): Use STORE() for VIT_MAX insns.
302 * interp.c (sim_do_command): Delete.
306 * interp.c (cb_linux_stat_map_32, cb_linux_stat_map_64): Rename from
307 stat_map_32 and stat_map_64.
308 (cb_libgloss_stat_map_32): New stat map.
309 (stat_map_32, stat_map_64): New stat map pointers.
310 (bfin_user_init): Assign stat_map_32 to cb_linux_stat_map_32 and
311 stat_map_64 to cb_linux_stat_map_64.
312 (bfin_virtual_init): New function.
313 (sim_create_inferior): Call bfin_virtual_init for all other envs.
317 * interp.c (bfin_syscall): Delete old comment. Set dreg 1 to
318 sc.result2 and dreg 2 to sc.errcode.
322 * bfin-sim.c (decode_dsp32shift_0): Clear ASTAT[AV] if val is 0,
323 else set it. Set ASTAT[AVS] if val is 0. Do this for LSHIFT and
324 ASHIFT accumulator insns.
328 * bfin-sim.c (ashiftrt): If size is 40, do not call SET_ASTATREG.
329 (lshiftrt): Likewise.
333 * bfin-sim.c (decode_dsp32shift_0): Use get_unextended_acc
334 rather than get_extended_acc in LSHIFT insns.
338 * bfin-sim.c (decode_macfunc): Handle MM when mmod is M_TFU.
339 Check MM once when mmod is M_FU to match M_TFU better.
343 * bfin-sim.c (decode_dsp32shiftimm_0): When shift is greater than
344 32, perform a left shift. Update the corresponding AV bit. Set
345 AZ when the low 32bits are also zero.
349 * bfin-sim.c (decode_dsp32shiftimm_0): With left shift vector insns,
350 call lshift only when count is positive. Otherwise, call ashiftrt.
351 With arithmetic right shift insns, call ashiftrt when the value is
352 small enough, otherwise call lshift.
356 * bfin-sim.c (extract_mult): Call saturate_s16 directly when
357 mmod is M_IH rather than computing the result by hand.
361 * bfin-sim.c (decode_macfunc): Add nosat_acc to track acc value
362 before saturation, set sat when more cases saturate, and set the
363 overflow bit based on these results. For M_TFU, M_IU, M_FU, and
364 M_W32, change the max values compared against.
365 (decode_dsp32mac_0): Delete v_i and add v_0 and v_1. Pass v_1
366 when processing MAC1 and pass v_0 when processing MAC0. Combine
367 the results into the V/VS ASTAT bits.
371 * bfin-sim.c (extract_mult): Call saturate_s32 when MM is set
372 and mmod is M_IU. Call saturate_s16 when MM is set and mmod
377 * bfin-sim.c (decode_multfunc): Call new is_macmod_signed, and
378 allow MM to sign extend all the time.
379 (decode_macfunc): Likewise. Drop sign extension of unsigned
384 * bfin-sim.c (saturate_s40_astat): Change ">=" to ">".
385 (decode_macfunc): Likewise when mmod is M_IH.
389 * interp.c (sim_create_inferior): Change free to freeargv.
393 * machs.c (bf534_dev, bf537_dev): Add glue-or devices.
394 (bf537_port): Define applicable devices with PORT to the glue-or
395 devices instead of SIC.
396 (bfin_model_hw_tree_init): Drop old sim_hw_parse call for bfin_sic.
397 Only parse reg/type when the device has an address. Move the call
398 to dv_bfin_hw_port_parse up before slash check.
402 * dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Move above the
403 BFIN_SIC_TO_CEC_PORTS definition.
404 (SIC_PORTS): New define.
405 (bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
406 bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
407 bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
409 (bfin_sic1_ports, bfin_sic2_ports, bfin_sic3_ports,
410 bfin_sic_561_ports): Define new layouts with SIC_PORTS().
411 (bfin_sic_finish): Change reference to bfin_sic_50x_ports,
412 bfin_sic_51x_ports, bfin_sic_52x_ports, and bfin_sic_538_ports
413 to bfin_sic2_ports. Change reference to bfin_sic_533_ports,
414 bfin_sic_537_ports, and bfin_sic_59x_ports to bfin_sic1_ports.
415 Change reference to bfin_sic_54x_ports to bfin_sic3_ports.
416 * machs.c (bfin_port_layout): New structure.
417 (bfin_model_data): Add new "port" and "port_count" members.
418 (PORT, SIC): New defines.
419 (bf000_port, bf50x_port, bf51x_port, bf52x_port, bf533_port,
420 bf537_port, bf538_port, bf54x_port, bf561_port, bf592_port):
421 Move and redefine port layout from dv-bfin_sic.c to here.
422 (bf504_port, bf506_port, bf512_port, bf514_port, bf516_port,
423 bf518_port, bf522_port, bf523_port, bf524_port, bf525_port,
424 bf526_port, bf527_port, bf531_port, bf532_port, bf534_port,
425 bf536_port, bf539_port, bf542_port, bf544_port, bf547_port,
426 bf548_port, bf549_port): New defines.
427 (bfin_model_data): Link in new bfin_port_layout.port member.
428 (dv_bfin_hw_port_parse): New function.
429 (dv_bfin_hw_parse): Call new dv_bfin_hw_port_parse function.
430 (bfin_model_hw_tree_init): Replace calls to sim_hw_parse for
431 bfin_sic links with new dv_bfin_hw_port_parse function.
435 * dv-bfin_dma.c (bfin_dma_io_write_buffer): Fix indentation.
439 * sim-main.h (TRACE_SYSCALL): Change EVENTS to SYSCALL.
443 * dv-bfin_cec.h (BFIN_COREMMR_CEC_{BASE,SIZE}): Move to ...
444 * dv-bfin_ctimer.h (BFIN_COREMMR_CTIMER_{BASE,SIZE}): Move to ...
445 * dv-bfin_dma.h (BFIN_MMR_DMA_SIZE): Move to ...
446 * dv-bfin_dmac.h (BFIN_MMR_DMAC{0,1}_BASE): Move to ...
447 * dv-bfin_ebiu_amc.h (BF{IN,50X,54X}_MMR_EBIU_AMC_SIZE): Move to ...
448 * dv-bfin_ebiu_ddrc.h (BFIN_MMR_EBIU_DDRC_SIZE): Move to ...
449 * dv-bfin_ebiu_sdc.h (BFIN_MMR_EBIU_SDC_SIZE): Move to ...
450 * dv-bfin_emac.h (BFIN_MMR_EMAC_{BASE,SIZE}): Move to ...
451 * dv-bfin_eppi.h (BFIN_MMR_EPPI_SIZE): Move to ...
452 * dv-bfin_evt.h (BFIN_COREMMR_EVT_{BASE,SIZE}): Move to ...
453 * dv-bfin_gpio.h (BFIN_MMR_GPIO_SIZE): Move to ...
454 * dv-bfin_gptimer.h (BFIN_MMR_GPTIMER_SIZE): Move to ...
455 * dv-bfin_jtag.h (BFIN_COREMMR_JTAG_{BASE,SIZE}): Move to ...
456 * dv-bfin_mmu.h (BFIN_COREMMR_MMU_{BASE,SIZE}): Move to ...
457 * dv-bfin_nfc.h (BFIN_MMR_NFC_SIZE): Move to ...
458 * dv-bfin_otp.h (BFIN_MMR_OTP_SIZE): Move to ...
459 * dv-bfin_pfmon.h (BFIN_COREMMR_PFMON_{BASE,SIZE}): Move to ...
460 * dv-bfin_pll.h (BFIN_MMR_PLL_{BASE,SIZE}): Move to ...
461 * dv-bfin_ppi.h (BFIN_MMR_PPI_SIZE): Move to ...
462 * dv-bfin_rtc.h (BFIN_MMR_RTC_SIZE): Move to ...
463 * dv-bfin_sic.h (BFIN_MMR_SIC_{BASE,SIZE}): Move to ...
464 * dv-bfin_spi.h (BFIN_MMR_SPI_SIZE): Move to ...
465 * dv-bfin_trace.h (BFIN_COREMMR_TRACE_{BASE,SIZE}): Move to ...
466 * dv-bfin_twi.h (BFIN_MMR_TWI_SIZE): Move to ...
467 * dv-bfin_uart.h (BFIN_MMR_UART_SIZE): Move to ...
468 * dv-bfin_uart2.h (BFIN_MMR_UART2_SIZE): Move to ...
469 * dv-bfin_wdog.h (BFIN_MMR_WDOG_SIZE): Move to ...
470 * dv-bfin_wp.h (BFIN_COREMMR_WP_{BASE,SIZE}): Move to ...
472 * machs.c: Delete all dv-bfin_*.h includes except for cec/dmac.
476 * Makefile.in (dv-bfin_pfmon.o): New target.
477 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pfmon.
478 * configure: Regenerated.
479 * dv-bfin_pfmon.c, dv-bfin_pfmon.h: New files.
480 * machs.c: Add include new bfin_pfmon.h.
481 (bfin_core_dev): Add pfmon.
485 * machs.c (bf526_roms): Add a region with rev of 2.
486 (bf54x_roms): Add regions with rev of 4.
487 * bfroms/all.h: Include new bf526-0.2.h, bf54x-0.4.h, and
488 bf54x_l1-0.4.h headers.
489 * bfroms/bf526-0.2.h, bfroms/bf54x-0.4.h, bfroms/bf54x_l1-0.4.h:
494 * bfin-sim.c (decode_PushPopReg_0): Delete (grp == 1 && reg == 6)
499 * dv-bfin_uart.c (bfin_uart_write_byte): Add a mcr arg. Declare a
500 local uart. When LOOP_ENA is set in mcr, write to the saved byte
501 and count fields of the uart.
502 (bfin_uart_io_write_buffer): Pass uart->mcr to bfin_uart_write_byte
503 and bfin_uart_get_next_byte.
504 (bfin_uart_get_next_byte): Add a mcr arg. Move uart->saved_count
505 check first, and skip the remaining code when LOOP_ENA is set in mcr.
506 * dv-bfin_uart.h (bfin_uart_write_byte): Add an mcr argument.
507 (bfin_uart_get_next_byte): Likewise.
508 (XOFF, MRTS, RFIT, RFRT, LOOP_ENA, FCPOL, ARTS, ACTS): Define.
509 * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Padd uart->mcr when
510 calling bfin_uart_write_byte and bfin_uart_get_next_byte.
514 * dv-bfin_uart2.c (bfin_uart_io_read_buffer): Clear DR/THRE/TEMT bits
515 from uart->lsr before setting them.
519 * dv-bfin_dmac.c (bfin_dmac): Constify pmap array.
520 (bfin_dmac_50x_pmap, bfin_dmac_51x_pmap, bfin_dmac_52x_pmap,
521 bfin_dmac_533_pmap, bfin_dmac_537_pmap, bfin_dmac0_538_pmap,
522 bfin_dmac1_538_pmap, bfin_dmac0_54x_pmap, bfin_dmac1_54x_pmap,
523 bfin_dmac0_561_pmap, bfin_dmac1_561_pmap, bfin_dmac_59x_pmap):
528 * dv-bfin_gpio.c (bfin_gpio_forward_ouput): New function.
529 (bfin_gpio_io_write_buffer): Store the current port state into
530 "data", and call bfin_gpio_forward_ouput when the data or dir
532 (bfin_gpio_ports): Change p0..p15 to bidirect_port.
536 * dv-bfin_gpio.c (bfin_gpio): Add "int_state" member.
537 (bfin_gpio_forward_int, bfin_gpio_forward_ints): New functions.
538 (bfin_gpio_io_write_buffer): Call bfin_gpio_forward_int when the
539 mask a or mask b MMRs are written.
540 (bfin_gpio_port_event): When handling edge gpios, set the bit in
541 int_state, call bfin_gpio_forward_ints, and then clear the bit.
542 When handling level gpios, clear/set the bit in int_state rather
543 than returning immediately. Call bfin_gpio_forward_ints instead
544 of checking mask[ab] and calling HW_TRACE/hw_port_event directly.
548 * bfin-sim.c (decode_dsp32alu_0): Call STORE instead of SET_DREG for
549 BYTEOP2P, BYTEOP3P, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK, and
551 (decode_dsp32shift_0): Call STORE instead of SET_DREG for PACK,
552 BITMUX, EXTRACT, DEPOSIT, ALIGN8, ALIGN16, and ALIGN24.
556 * bfin-sim.c (decode_dsp32alu_0): Set DIS_ALGN_EXPT when handling
557 BYTEOP2P, BYTEOP3P, SAA, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK,
558 and BYTEUNPACK insns.
562 * dv-bfin_sic.c (bfin_sic_port_event): New helper function.
563 (bfin_sic_52x_port_event, bfin_sic_537_port_event,
564 bfin_sic_54x_port_event, bfin_sic_561_port_event): Include level
565 in the trace output, and call the new bfin_sic_port_event func.
569 * dv-bfin_gpio.c (bfin_gpio_ports): Add p15.
573 * dv-bfin_otp.c (bfin_otp_ports): Declare.
574 (bfin_otp_finish): Call set_hw_ports with bfin_otp_ports.
578 * configure: Regenerate after common/aclocal.m4 changes.
582 * bfin-sim.c (decode_dsp32alu_0): Cast high 16bits of A0.W to bs16
583 and add to casted low 16bits of A0.L and store in val0. Cast high
584 16bits of A1.W to bs16 and add to casted low 16bits of A1.L and
585 store in val1. Delete bit checks of val0 and val1.
589 * bfin-sim.c (decode_dsp32alu_0): Set result to 0x7FFFFFFF when
590 the result was 0x80000000 for RND12 subtraction.
594 * bfin-sim.c (decode_dsp32alu_0): Set VS when V is set.
598 * dv-bfin_gpio.c (bfin_gpio_port_event): Call HW_TRACE at every
599 major code flow point.
600 * dv-bfin_sic.c (bfin_sic_forward_interrupts): Call HW_TRACE just
601 before calling hw_port_event on ourselves.
602 (bfin_sic_52x_port_event, bfin_sic_537_port_event,
603 bfin_sic_54x_port_event, bfin_sic_561_port_event): Call HW_TRACE
604 at the start of the function.
608 * dv-bfin_gpio.c (bfin_gpio_port_event): Split dir/inen bit checking.
609 Normalize "level" to 0/1 values. Shift "level" over by "my_port".
610 Invert port->both bit check.
614 * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Subtract 2 from the
615 valuep pointer for clear MMRs, 4 for set MMRs, and 6 for toggle MMRs.
619 * TODO: Document some known SIC issues.
623 * devices.h (dv_w1c): Fix typos in documentation of "bits" arg.
624 * dv-bfin_cec.c (bfin_cec_io_write_buffer): Pass 0xffee to dv_w1c_4.
625 * dv-bfin_emac.c (bfin_emac_io_write_buffer): Pass 0xe1 to dv_w1c_4
626 for systat MMR and -1 to dv_w1c_4 for [rt]x_stky/mmc_[rt]irqs MMRs.
627 * dv-bfin_eppi.c (bfin_eppi_io_write_buffer): Pass 0x1ff to dv_w1c_2.
628 * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Invert bits to dv_w1c_2.
629 * dv-bfin_jtag.c (bfin_jtag_io_write_buffer): Invert bits to dv_w1c_4.
630 * dv-bfin_nfc.c (bfin_nfc_io_write_buffer): Invert bits to dv_w1c_2.
631 * dv-bfin_otp.c (bfin_otp_io_write_buffer): Invert bits to dv_w1c_2.
632 * dv-bfin_ppi.c (bfin_ppi_io_write_buffer): Invert bits to dv_w1c_2.
633 * dv-bfin_rtc.c (bfin_rtc_io_write_buffer): Invert bits to dv_w1c_2.
634 * dv-bfin_spi.c (bfin_spi_io_write_buffer): Invert bits to dv_w1c_2.
635 * dv-bfin_twi.c (bfin_twi_io_write_buffer): Invert bits to dv_w1c_2.
636 * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Invert bits to dv_w1c_2.
640 * dv-bfin_uart.h (TFI, BI, FE, PE, OE): Define.
644 * dv-bfin_twi.h (LOSTARB): Rename from LOSTARG.
648 * bfin-sim.c (decode_dsp32shift_0): Set acc0 to the unextended
649 value for the VIT_MAX insn, and mask off the result when done.
653 * bfin-sim.c (decode_dsp32alu_0): Set A1 to a1_lo when up_hi is false,
654 and set A0 to a0_lo when up_lo is false.
658 * bfin-sim.c (decode_dsp32alu_0): Call saturate_s40_astat instead of
659 saturate_s40, and use the v parameter to update the AV bit. Set the
660 AC bit only when the final result is 0.
664 * dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Define.
665 (bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
666 bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
667 bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
668 Encode ids with the ENC macro.
669 (bfin_sic_52x_port_event, bfin_sic_537_port_event,
670 bfin_sic_54x_port_event, bfin_sic_561_port_event): Set idx
671 from my_port with DEC_SIC, and set bit from my_port with DEC_PIN.
672 (bfin_sic_533_port_event): Delete.
673 (bfin_sic_finish): Call set_hw_port_event with
674 bfin_sic_537_port_event for BF533 and BF59x targets.
678 * bfin-sim.c (decode_dsp32alu_0): Drop the src0/src1 check for
679 BYTEOP1P, BYTEOP2P, and BYTEOP3P insns.
683 * machs.c (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev,
684 bf533_dev, bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev):
685 Change bfin_gpio addresses from f/g/h to 5/6/7.
686 (bfin_model_hw_tree_init): Add the bfin_gpio address base to 'a'.
690 * configure.ac (AC_CHECK_FUNCS): Check for kill and pread.
691 * configure: Regenerate.
692 * config.in: Regenerate.
693 * interp.c (bfin_syscall): Check for HAVE_{KILL,PREAD} before using
698 * Makefile.in (dv-bfin_gpio.o): New target.
699 * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio.
700 * configure: Regenerate.
701 * dv-bfin_gpio.c, dv-bfin_gpio.h: New files.
702 * machs.c: Include dv-bfin_gpio.h.
703 (bf50x_mem, bf51x_mem, bf52x_mem, bf531_mem, bf532_mem, bf533_mem,
704 bf534_mem, bf536_mem, bf537_mem, bf538_mem, bf561_mem, bf592_mem):
705 Delete GPIO memory stubs.
706 (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev, bf533_dev,
707 bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev): Add GPIO
709 (bfin_model_hw_tree_init): Hook up GPIO interrupts to SIC.
713 * bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h, bfroms/bf51x-0.1.h,
714 bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h, bfroms/bf526-0.1.h,
715 bfroms/bf527-0.0.h, bfroms/bf527-0.1.h, bfroms/bf527-0.2.h,
716 bfroms/bf533-0.1.h, bfroms/bf533-0.2.h, bfroms/bf533-0.3.h,
717 bfroms/bf537-0.0.h, bfroms/bf537-0.1.h, bfroms/bf537-0.3.h,
718 bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h, bfroms/bf54x-0.1.h,
719 bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h, bfroms/bf54x_l1-0.1.h,
720 bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h, bfroms/bf59x-0.0.h,
721 bfroms/bf59x_l1-0.1.h, dv-bfin_cec.c, dv-bfin_ctimer.c,
722 dv-bfin_dma.c, dv-bfin_dmac.c, dv-bfin_ebiu_amc.c,
723 dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_sdc.c, dv-bfin_emac.c,
724 dv-bfin_eppi.c, dv-bfin_evt.c, dv-bfin_gptimer.c, dv-bfin_jtag.c,
725 dv-bfin_mmu.c, dv-bfin_nfc.c, dv-bfin_otp.c, dv-bfin_pll.c,
726 dv-bfin_ppi.c, dv-bfin_rtc.c, dv-bfin_sic.c, dv-bfin_spi.c,
727 dv-bfin_trace.c, dv-bfin_twi.c, dv-bfin_uart.c, dv-bfin_uart2.c,
728 dv-bfin_wdog.c, dv-bfin_wp.c, dv-eth_phy.c, gui.c,
729 linux-fixed-code.h, linux-targ-map.h, machs.c, Makefile.in: Fix style.
733 * bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds
738 * bfin-sim.c (decode_macfunc): Move acc STOREs behind op != 3 check.
742 * bfin-sim.c (decode_macfunc): New neg parameter. Set when the
743 high bit is set after extract_mult.
744 (decode_dsp32mac_0): Declare n_1 and n_0. Pass to the decode_macfunc
745 functions. Use these to update the AN bit.
749 * bfin-sim.c (decode_dsp32mult_0): Declare v_i0 and v_i1. Pass to
750 the extract_mult functions. Include these when updating the V, VS,
755 * bfin-sim.c (astat_names): New global bit array.
756 (decode_CC2stat_0): Delete local astat_name and astat_names.
757 (decode_psedodbg_assert_0): Move hardcoded offset into a variable.
758 Print out ASTAT bit values when checking an ASTAT register.
762 * bfin-sim.c (extract_mult): Handle M_IU.
766 * Makefile.in, TODO, aclocal.m4, bfin-sim.c, bfin-sim.h,
767 bfroms/all.h, bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h,
768 bfroms/bf51x-0.1.h, bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h,
769 bfroms/bf526-0.1.h, bfroms/bf527-0.0.h, bfroms/bf527-0.1.h,
770 bfroms/bf527-0.2.h, bfroms/bf533-0.1.h, bfroms/bf533-0.2.h,
771 bfroms/bf533-0.3.h, bfroms/bf537-0.0.h, bfroms/bf537-0.1.h,
772 bfroms/bf537-0.3.h, bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h,
773 bfroms/bf54x-0.1.h, bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h,
774 bfroms/bf54x_l1-0.1.h, bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h,
775 bfroms/bf59x-0.0.h, bfroms/bf59x_l1-0.1.h, config.in, configure,
776 configure.ac, devices.c, devices.h, dv-bfin_cec.c, dv-bfin_cec.h,
777 dv-bfin_ctimer.c, dv-bfin_ctimer.h, dv-bfin_dma.c, dv-bfin_dma.h,
778 dv-bfin_dmac.c, dv-bfin_dmac.h, dv-bfin_ebiu_amc.c, dv-bfin_ebiu_amc.h,
779 dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_ddrc.h, dv-bfin_ebiu_sdc.c,
780 dv-bfin_ebiu_sdc.h, dv-bfin_emac.c, dv-bfin_emac.h, dv-bfin_eppi.c,
781 dv-bfin_eppi.h, dv-bfin_evt.c, dv-bfin_evt.h, dv-bfin_gptimer.c,
782 dv-bfin_gptimer.h, dv-bfin_jtag.c, dv-bfin_jtag.h, dv-bfin_mmu.c,
783 dv-bfin_mmu.h, dv-bfin_nfc.c, dv-bfin_nfc.h, dv-bfin_otp.c,
784 dv-bfin_otp.h, dv-bfin_pll.c, dv-bfin_pll.h, dv-bfin_ppi.c,
785 dv-bfin_ppi.h, dv-bfin_rtc.c, dv-bfin_rtc.h, dv-bfin_sic.c,
786 dv-bfin_sic.h, dv-bfin_spi.c, dv-bfin_spi.h, dv-bfin_trace.c,
787 dv-bfin_trace.h, dv-bfin_twi.c, dv-bfin_twi.h, dv-bfin_uart.c,
788 dv-bfin_uart.h, dv-bfin_uart2.c, dv-bfin_uart2.h, dv-bfin_wdog.c,
789 dv-bfin_wdog.h, dv-bfin_wp.c, dv-bfin_wp.h, dv-eth_phy.c, gui.c,
790 gui.h, insn_list.def, interp.c, linux-fixed-code.h, linux-fixed-code.s,
791 linux-targ-map.h, machs.c, machs.h, proc_list.def, sim-main.h,
792 tconfig.in: New Blackfin port.