3 * config/tc-arm.c (aeabi_set_public_attributes): Set Tag_DIV_use.
7 * config/tc-arm.c (aeabi_set_public_attributes): Set
8 Tag_ABI_HardFP_use to 1 if a single precision FPU is selected.
12 * Makefile.in: Regenerate with automake 1.11.1.
14 * doc/Makefile.in: Ditto.
18 * po/es.po: Updated Spanish translation.
22 * read.c (cons_worker): Detect and reject unexpected string argument.
26 * write.c (fixup_segment): Revert previous delta.
27 * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Also force the
28 generation of relocations for fixups against weak symbols.
32 * write.c (fixup_segment): Do not assume we know the section a
33 defined weak symbol is in.
34 * config/tc-arm.c (relax_adr, relax_branch, md_apply_fix): Treat
35 weak symbols as not known to be in the same section, even if they
40 * config/tc-tic6x.h (tic6x_label_list): New.
41 (tic6x_segment_info_type): Keep a list of labels and a current
42 frag instead of a boolean for whether labels seen and a count of
44 (tic6x_frag_info, TC_FRAG_TYPE, TC_FRAG_INIT, tic6x_frag_init,
45 md_do_align, tic6x_do_align, md_end, tic6x_end): New.
46 * config/tc-tic6x.c (tic6x_frob_label): Put label on list.
47 (tic6x_cleanup): Correct comment.
48 (tic6x_free_label_list): New.
49 (tic6x_cons_align): Free label list and update for
50 tic6x_segment_info_type changes.
51 (tic6x_do_align): New.
52 (md_assemble): Handle list of labels and saved frag for execute
53 packet. Create machine-dependent frag for new execute packet and
54 adjust labels accordingly.
55 (tic6x_adjust_section, tic6x_frag_init, tic6x_end): New.
56 (md_convert_frag, md_estimate_size_before_relax): Update comments.
61 * config/tc-i386-intel.c (intel_state): Add is_indirect.
62 (i386_intel_operand): Initialize intel_state.is_indirect. Check
63 intel_state.is_indirect for "call|jmp [symbol]".
67 * po/gas.pot: Updated by the Translation project.
71 * config/tc-i386.c (i386_is_register): Removed.
72 (x86_cons): Don't use i386_is_register.
73 (parse_register): Likewise.
74 * config/tc-i386-intel.c (i386_intel_simplify): Likewise.
75 (i386_intel_operand): Likewise.
79 * config/tc-i386.c (tc_x86_parse_to_dw2regnum): Don't use
84 * config/tc-i386.c (i386_is_register): Remove is_intel_syntax.
86 (parse_register): Likewise.
87 (tc_x86_parse_to_dw2regnum): Likewise.
88 * config/tc-i386-intel.c (i386_intel_simplify): Likewise.
89 (i386_intel_operand): Likewise.
94 * config/tc-i386-intel.c (i386_intel_simplify_register): New.
95 (i386_intel_simplify): Use i386_is_register and
96 i386_intel_simplify_register. Set X_md for O_register and
97 check X_md for O_constant.
98 (i386_intel_operand): Use i386_is_register.
100 * config/tc-i386.c (i386_is_register): New.
101 (x86_cons): Initialize the X_md field. Use i386_is_register.
102 (parse_register): Use i386_is_register.
103 (tc_x86_parse_to_dw2regnum): Likewise.
107 * expr.c (expr): Initialize the X_md field.
111 * config/tc-tic6x.c (OPTION_MGENERATE_REL): New.
112 (md_longopts): Add -mgenerate-rel.
113 (tic6x_generate_rela): New.
114 (md_parse_option): Handle -mgenerate-rel.
115 (md_show_usage): Add comment that -mgenerate-rel is undocumented.
116 (tic6x_init_after_args): New.
117 (md_apply_fix): Correct shift calculations for SB-relative
119 (md_pcrel_from): Change to tic6x_pcrel_from_section. Do not
120 adjust addresses for relocations referencing symbols in other
122 (tc_gen_reloc): Adjust addend calculations for REL relocations.
123 * config/tc-tic6x.h (MD_PCREL_FROM_SECTION,
124 tic6x_pcrel_from_section, tc_init_after_args,
125 tic6x_init_after_args): New.
130 * macro.c (macro_expand_body): Do not treat LOCAL as a keyword in
131 altmacro mode if found inside a quoted string.
135 * config/bfin-lex.l (parse_int): Change index() to strchr().
140 * config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
141 matcher to accept and unconditional 32-bit add instruction.
142 (pa_build_unwind_subspace): Cope with error conditions not
143 allowing the start symbol to be set.
147 * config/tc-arm.c (arm_convert_symbolic_attribute): Add support for
148 new tag names in v2.08 of ARM ABI.
149 * doc/c-arm.texi: Document new tag names in ABI.
153 * config/tc-alpha.c: Includes vms/egps.h on EVAX.
154 (s_alpha_comm): Used new EGPS macros from egps.h
155 (RGPS__V_NO_SHIFT, EGPS__V_MASK): New local macros.
156 (s_alpha_section_word): Add comments. Use new EGPS macros.
157 Adjust for modified bfd_vms_set_section_flags function.
162 * config/tc-ppc.c (ppc_elf_cons): Clear frag contents.
166 * as.c (create_obj_attrs_section): Remove unused variable addr.
167 * listing.c (listing_listing): Remove unused variable message.
168 * read.c: Remove unnecessary register type qualifiers.
169 (s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
174 * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
175 atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
176 atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
177 atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
178 atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
179 atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
180 atmega88pa, attiny461a, attiny84a, m3000.
181 Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
182 atmega8hvd, attiny327, m3000f, m3000s, m3001b.
183 * doc/c-avr.texi: Same.
187 * config/tc-arm.c (make_mapping_symbol): Handle the case
188 that multiple mapping symbols have the same value 0.
192 * configure: Regenerate.
196 * po/ru.po: New Russian translation.
197 * configure.in (ALL_LINGUAS): Add ru.
198 * configure: Regenerate.
203 * input-scrub.c (input_scrub_next_buffer): Use memmove instead
204 of memcpy to copy overlap memory.
208 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
209 (TARGET_CPU_HFILES): Add config/tc-tic6x.h.
210 * Makefile.in: Regenerate.
211 * NEWS: Add news entry for TI C6X support.
212 * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
213 TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
214 operands if TC_KEEP_OPERAND_SPACES.
215 * configure.tgt (tic6x-*-*): New.
216 * config/tc-ia64.h (TC_PREDICATE_START_CHAR,
217 TC_PREDICATE_END_CHAR): Define.
218 * config/tc-tic6x.c, config/tc-tic6x.h: New.
219 * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
220 * doc/Makefile.in: Regenerate.
221 * doc/all.texi (TIC6X): Define.
222 * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
223 * doc/c-tic6x.texi: New.
227 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
231 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
232 with operand_size_mismatch.
233 (operand_size_match): Updated.
234 (match_template): Likewise.
238 * config/tc-i386.c (i386_error): New.
239 (_i386_insn): Replace err_msg with error.
240 (operand_size_match): Set error instead of err_msg on failure.
241 (operand_type_match): Likewise.
242 (operand_type_register_match): Likewise.
243 (VEX_check_operands): Likewise.
244 (match_template): Likewise. Use error instead of err_msg with
249 * config/tc-arm.c (make_mapping_symbol): Hanle the case
250 that two mapping symbols have the same value.
254 * doc/c-arm.texi (.setfp): Correct example.
259 * config/tc-arm.c (reloc_names): New relocation names.
260 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
261 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
262 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
266 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
267 cases, and not only for .eh_frame.
269 * dw2gencfi.c (output_cie): Make it more explicit which code paths
270 belong to .eh_frame only.
274 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
275 assembler constants on 64-bit hosts.
279 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
280 Strip trailing whitespace.
284 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
285 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
287 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
291 * doc/as.texinfo: Add Blackfin options.
292 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
293 * config/tc-bfin.c (md_show_usage): Show usage for all
294 Blackfin specific options.
299 * listing.c (listing_newline): Correct backslash quote logic.
303 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
304 (ELF_TARGET_FORMAT64): Define.
308 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
312 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
313 reading uninitialized data.
317 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
321 * configure.tgt: Fix mep cpu case.
325 * config/tc-arm.c (do_t_strexd): Remove
326 operand[1] != operand[2] contraint.
330 * config/tc-arm.c (neon_select_shape): No need to match
331 the remaining operands in the shape when one operand does
336 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
341 * cgen.c: Whitespace fixes.
342 (weak_operand_overflow_check): Formatting fix.
346 * config/tc-i386.c (match_template): Update error messages.
350 * config/tc-i386.c (_i386_insn): Add err_msg.
351 (operand_size_match): Set err_msg on failure.
352 (operand_type_match): Likewise.
353 (operand_type_register_match): Likewise.
354 (VEX_check_operands): Likewise.
355 (match_template): Likewise. Use i.err_msg with as_bad.
359 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
360 mips_fix_loongson2f_jump): New variables.
361 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
362 -mno-fix-loongson2f-nop/jump.
363 (md_parse_option): Initialize variables via above options.
364 (options): New enums for the above options.
365 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
366 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
368 (append_insn): call fix_loongson2f().
369 (mips_handle_align): Replace the implicit nops.
370 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
371 for the new mips_handle_align().
372 * doc/c-mips.texi: Document the new options.
376 * config/tc-arm.c (do_rd_rm_rn): Added warning
382 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
383 (avr_cons_fix_new): Handle fixups of a single byte.
388 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
389 compiler's predefines.
393 * configure.tgt: Whiltespace. Sort moxie entry.
397 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
398 * doc/c-arm.texi: Likewise.
402 * config/tc-arm.c (asm_opcode): operands type
404 (BAD_PC_ADDRESSING): New macro message.
405 (BAD_PC_WRITEBACK): Likewise.
406 (MIX_ARM_THUMB_OPERANDS): New macro.
407 (operand_parse_code): Added enum values.
408 (parse_operands): Added thumb/arm distinction,
409 plus new enum values handling.
410 (encode_arm_addr_mode_2): Validations enhanced.
411 (encode_arm_addr_mode_3): Likewise.
412 (do_rm_rd_rn): Likewise.
413 (encode_thumb32_addr_mode): Likewise.
414 (do_t_ldrex): Likewise.
415 (do_t_ldst): Likewise.
416 (do_t_strex): Likewise.
417 (md_assemble): Call parse_operands with
425 (insns): Updated insns operands.
430 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
431 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
432 (pseudo_func): Add an entry for slotcount.
433 (md_begin): Initialize slotcount pseudo symbol.
434 (ia64_parse_name): Handle @slotcount parameter.
435 (ia64_gen_real_reloc_type): Handle slotcount.
436 (md_apply_fix): Ditto.
437 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
441 * config/tc-xtensa.c (istack_init): Don't call memset.
445 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
450 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
454 * config/tc-i386.c (build_modrm_byte): Reformat.
458 * config/tc-i386.c: Update copyright.
463 * config/tc-i386.c (vec_imm4) New operand type.
465 (VEX_check_operands): New.
466 (check_reverse): Call VEX_check_operands.
467 (build_modrm_byte): Reintroduce code for 5
468 operand insns. Fix whitespace.
472 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
477 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
478 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
479 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
483 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
484 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
485 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
486 BFD_RELOC_ARM_PCREL_CALL)
490 * config/tc-xtensa.c (frag_format_size): Generalize logic to
491 handle more instruction sizes and fetch widths.
492 (branch_align_power): Likewise.
493 (text_align_power): Likewise.
494 (bytes_to_stretch): Likewise.
498 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
499 (ppc_mach): Handle titan.
500 * doc/c-ppc.texi: Mention -mtitan.
504 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
506 (xtensa_fetch_width) ...this.
510 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
511 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
512 * Makefile.in: Regenerate.
516 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
517 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
518 * config/tc-i386.h (processor_type): Same.
519 * doc/c-i386.texi: Change amdfam15 to bdver1.
524 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
529 * NEWS: Mention new feature.
530 * config/obj-coff.c (obj_coff_section): Accept digits and use
531 to override default section alignment power if specified.
532 * doc/as.texinfo (.section directive): Update documentation.
536 * config/tc-i386.c (avxscalar): New.
537 (OPTION_MAVXSCALAR): Likewise.
538 (build_vex_prefix): Select vector_length for scalar instructions
540 (md_longopts): Add OPTION_MAVXSCALAR.
541 (md_parse_option): Handle OPTION_MAVXSCALAR.
542 (md_show_usage): Add -mavxscalar=.
544 * doc/c-i386.texi: Document -mavxscalar=.
548 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
553 * write.h (fix_at_start): Declare.
554 * write.c (fix_new_internal): Add at_beginning parameter.
555 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
556 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
557 (fix_new, fix_new_exp): Update accordingly.
558 (fix_at_start): New function.
559 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
560 (ppc_ref): New function, for OBJ_XCOFF.
561 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
562 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
566 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
567 on 64-bit Solaris/x86.
568 Include obj-format.h earlier.
572 * config/tc-s390.c (s390_elf_final_processing): New function.
573 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
574 (s390_elf_final_processing): Added prototype.
580 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
581 code to handle round-to-zero for VCVT conversions.
582 (do_neon_cvt): New. Call do_neon_cvt_1.
583 (do_neon_cvtr): New. Call do_neon_cvt_1.
584 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
589 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
593 * config/tc-i386.c (md_assemble): Before accessing the IMM field
594 check that it's not an XOP insn.
598 * config/bfin-aux.h: Remove argument names in function
600 * config/bfin-lex.l (parse_int): Fix shadowed variable name
602 * config/bfin-parse.y (value_match): Remove argument names
604 (notethat): Likewise.
609 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
613 * config/tc-h8300.c (h8300_elf_section): New function - issue a
614 warning message if a new section is created without setting any
616 (md_pseudo_table): Intercept section creation pseudos.
617 (md_pcrel_from): Replace abort with an error message.
618 * config/obj-elf.c (obj_elf_section_name): Export this function.
619 * config/obj-elf.h (obj_elf_section_name): Prototype.
624 * listing.c (print_source): Add one to line number.
628 * Makefile.in: Regenerate.
629 * configure: Regenerate.
630 * doc/Makefile.in: Regenerate.
634 * version.c (parse_args): Change to "Copyright 2010".
638 * config/tc-i386.c (cpu_arch): Add amdfam15.
639 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
640 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
641 * doc/c-i386.texi: Add amdfam15.
645 * config/tc-arm.c (do_neon_logic): Accept imm value
646 in the third operand too.
647 (operand_parse_code): OP_RNDQ_IMVNb renamed to
649 (parse_operands): OP_NILO case removed, applied renaming.
650 (insns): Neon shape changed for some logic instructions.
654 * config/tc-arm.c (do_neon_ldx_stx): Added
655 validation for vector load/store insns.
659 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
663 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
664 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
665 (NEON_ENCODE): New macro.
666 (check_neon_suffixes): New macro.
667 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
668 (do_vfp_nsyn_opcode): Likewise.
669 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
670 (do_vfp_nsyn_cmp): Likewise.
671 (do_neon_shl_imm): Likewise.
672 (do_neon_qshl_imm): Likewise.
673 (neon_dyadic_misc): Likewise.
674 (do_neon_mac_maybe_scalar): Likewise.
675 (do_neon_qdmulh): Likewise.
676 (do_neon_qmovn): Likewise.
677 (do_neon_qmovun): Likewise.
678 (do_neon_movn): Likewise.
679 (neon_mac_reg_scalar_long): Likewise.
680 (do_neon_vmull): Likewise.
681 (do_neon_trn): Likewise.
682 (do_neon_ldx_stx): Likewise.
683 (neon_dp_fixup): Changed signature and set the flag.
684 (neon_three_same): Call the above with new signature.
685 (neon_two_same): Likewise.
686 (neon_imm_shift): Likewise.
687 (neon_mul_mac): Likewise.
688 (do_neon_abs_neg): Likewise.
689 (neon_mixed_length): Likewise.
690 (do_neon_ext): Likewise.
691 (do_neon_mov): Likewise.
692 (do_neon_tbl_tbx): Likewise.
693 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
694 (neon_compare): Likewise.
695 (do_neon_shll): Likewise.
696 (do_neon_cvt): Likewise.
697 (do_neon_mvn): Likewise.
698 (do_neon_dup): Likewise.
699 (md_assemble): Call check_neon_suffixes ().
701 For older changes see ChangeLog-2009
707 version-control: never