1 /* MIPS-dependent portions of the RPC protocol
2 used with a VxWorks target
4 Contributed by Wind River Systems.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "vx-share/regPacket.h"
33 #include "symfile.h" /* for struct complaint */
35 #include "gdb_string.h"
39 #include <sys/types.h>
41 #include <sys/socket.h>
43 #include <sys/time.h> /* UTek's <rpc/rpc.h> doesn't #incl this */
45 #include "vx-share/ptrace.h"
46 #include "vx-share/xdr_ptrace.h"
47 #include "vx-share/xdr_ld.h"
48 #include "vx-share/xdr_rdb.h"
49 #include "vx-share/dbgRpcLib.h"
51 /* get rid of value.h if possible */
55 /* Flag set if target has fpu */
57 extern int target_has_fp;
59 /* Generic register read/write routines in remote-vx.c. */
61 extern void net_read_registers ();
62 extern void net_write_registers ();
64 /* Read a register or registers from the VxWorks target.
65 REGNO is the register to read, or -1 for all; currently,
66 it is ignored. FIXME look at regno to improve efficiency. */
69 vx_read_register (regno)
72 char mips_greg_packet[MIPS_GREG_PLEN];
73 char mips_fpreg_packet[MIPS_FPREG_PLEN];
75 /* Get general-purpose registers. */
77 net_read_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_GETREGS);
79 /* this code copies the registers obtained by RPC
80 stored in a structure(s) like this :
89 into a stucture like this:
95 0x8C BAD --- Not available currently
96 0x90 CAUSE --- Not available currently
100 0x11C FIR --- Not available currently
101 0x120 FP --- Not available currently
103 structure is 0x124 (292) bytes in length */
105 /* Copy the general registers. */
107 bcopy (&mips_greg_packet[MIPS_R_GP0], ®isters[0], 32 * MIPS_GREG_SIZE);
109 /* Copy SR, LO, HI, and PC. */
111 bcopy (&mips_greg_packet[MIPS_R_SR],
112 ®isters[REGISTER_BYTE (PS_REGNUM)], MIPS_GREG_SIZE);
113 bcopy (&mips_greg_packet[MIPS_R_LO],
114 ®isters[REGISTER_BYTE (LO_REGNUM)], MIPS_GREG_SIZE);
115 bcopy (&mips_greg_packet[MIPS_R_HI],
116 ®isters[REGISTER_BYTE (HI_REGNUM)], MIPS_GREG_SIZE);
117 bcopy (&mips_greg_packet[MIPS_R_PC],
118 ®isters[REGISTER_BYTE (PC_REGNUM)], MIPS_GREG_SIZE);
120 /* If the target has floating point registers, fetch them.
121 Otherwise, zero the floating point register values in
122 registers[] for good measure, even though we might not
127 net_read_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,
130 /* Copy the floating point registers. */
132 bcopy (&mips_fpreg_packet[MIPS_R_FP0],
133 ®isters[REGISTER_BYTE (FP0_REGNUM)],
134 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
136 /* Copy the floating point control/status register (fpcsr). */
138 bcopy (&mips_fpreg_packet[MIPS_R_FPCSR],
139 ®isters[REGISTER_BYTE (FCRCS_REGNUM)],
140 REGISTER_RAW_SIZE (FCRCS_REGNUM));
144 bzero ((char *) ®isters[REGISTER_BYTE (FP0_REGNUM)],
145 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
146 bzero ((char *) ®isters[REGISTER_BYTE (FCRCS_REGNUM)],
147 REGISTER_RAW_SIZE (FCRCS_REGNUM));
150 /* Mark the register cache valid. */
152 registers_fetched ();
155 /* Store a register or registers into the VxWorks target.
156 REGNO is the register to store, or -1 for all; currently,
157 it is ignored. FIXME look at regno to improve efficiency. */
159 vx_write_register (regno)
162 char mips_greg_packet[MIPS_GREG_PLEN];
163 char mips_fpreg_packet[MIPS_FPREG_PLEN];
165 /* Store general registers. */
167 bcopy (®isters[0], &mips_greg_packet[MIPS_R_GP0], 32 * MIPS_GREG_SIZE);
169 /* Copy SR, LO, HI, and PC. */
171 bcopy (®isters[REGISTER_BYTE (PS_REGNUM)],
172 &mips_greg_packet[MIPS_R_SR], MIPS_GREG_SIZE);
173 bcopy (®isters[REGISTER_BYTE (LO_REGNUM)],
174 &mips_greg_packet[MIPS_R_LO], MIPS_GREG_SIZE);
175 bcopy (®isters[REGISTER_BYTE (HI_REGNUM)],
176 &mips_greg_packet[MIPS_R_HI], MIPS_GREG_SIZE);
177 bcopy (®isters[REGISTER_BYTE (PC_REGNUM)],
178 &mips_greg_packet[MIPS_R_PC], MIPS_GREG_SIZE);
180 net_write_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_SETREGS);
182 /* Store floating point registers if the target has them. */
186 /* Copy the floating point data registers. */
188 bcopy (®isters[REGISTER_BYTE (FP0_REGNUM)],
189 &mips_fpreg_packet[MIPS_R_FP0],
190 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
192 /* Copy the floating point control/status register (fpcsr). */
194 bcopy (®isters[REGISTER_BYTE (FCRCS_REGNUM)],
195 &mips_fpreg_packet[MIPS_R_FPCSR],
196 REGISTER_RAW_SIZE (FCRCS_REGNUM));
198 net_write_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,