3 * Makefile.am (BUILD_LIBINTL): New variable.
4 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
5 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
6 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
7 * Makefile.in: Regenerate.
11 * mep-asm.c: Regenerate.
12 * mep-desc.c: Regenerate.
13 * mep-opc.c: Regenerate.
17 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
18 dependencies. Remove unused FORMAT variable.
19 * configure.com: New file to create build.com DCL script for
20 Itanium VMS or Alpha VMS.
24 * cris-dis.c (bytes_to_skip): Update code to use new name.
25 * i386-dis.c (putop): Update code to use new name.
26 * i386-gen.c (process_i386_opcodes): Update code to use
28 * i386-opc.h (struct template): Rename struct template to
29 insn_template. Update code accordingly.
30 * i386-tbl.h (i386_optab): Update type to use new name.
31 * ia64-dis.c (print_insn_ia64): Rename variable template
33 * tic30-dis.c (struct instruction, get_tic30_instruction):
34 Update code to use new name.
35 * tic54x-dis.c (has_lkaddr, get_insn_size)
36 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
37 Update code to use new name.
38 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
39 Update type to new name.
40 * z8kgen.c (internal, gas): Rename variable new to new_op.
44 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
45 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
46 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
47 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
48 * Makefile.in: Regenerated.
52 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
53 [INSTALL_LIBBFD]: ... here, ...
54 [INSTALL_LIBBFD]: ... and empty overrides here.
55 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
56 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
57 * Makefile.in: Regenerate.
58 * configure: Regenerate.
62 * m68k-dis.c (print_insn_arg): Add movecr register names for
63 coldfire v4e families.
67 * Makefile.am (SUBDIRS): Build '.' before 'po'.
68 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
69 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
70 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
71 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
72 (i386-gen.o): New rule.
73 ($(srcdir)/i386-init.h): Adjust.
74 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
75 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
76 (ia64-gen.o): New rule.
77 (ia64_asmtab_deps): New variable.
78 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
79 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
80 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
82 (s390-opc.tab): Adjust.
83 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
85 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
86 * Makefile.in: Regenerate.
87 * z8kgen.c (gas): Avoid '/*' in comment.
88 * z8k-opc.h (func): Regenerate.
92 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
93 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
94 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
95 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
97 (LIBOPCODES_CFILES): New variable, adding to
98 TARGET_LIBOPCODES_CFILES also non-target library sources.
99 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
101 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
102 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
103 * Makefile.in: Regenerate.
104 * po/POTFILES.in: Regenerate.
108 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
109 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
110 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
111 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
112 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
113 is built shared even if it is not to be installed.
114 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
115 (install_libopcodes, uninstall_libopcodes): Remove.
116 (AM_CPPFLAGS): Renamed from ...
117 (INCLUDES): ... this.
118 * Makefile.in: Regenerate.
120 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
121 1.11, foreign, no-dist.
122 (MKDEP, m32c_opc_h): Remove variables.
123 (disassemble.lo): Rewrite using automake-style dependency
124 tracking rules; only list the dependency upon the primary source
125 file, but no included headers.
126 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
127 (i386-gen.o, ia64-gen.o): Remove dependency statements.
128 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
129 ensure all dependency fragments are included in the Makefile.
130 (s390-opc.lo): Depend on s390-opc.tab.
131 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
132 (mkdep section): Remove.
133 * Makefile.in: Regenerate.
134 * po/POTFILES.in: Regenerate.
136 * Makefile.am (install-pdf, install-html): Remove.
137 * Makefile.in: Regenerate.
139 * Makefile.in: Regenerate.
140 * aclocal.m4: Likewise.
141 * config.in: Likewise.
142 * configure: Likewise.
146 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
147 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
148 * Makefile.in: Regenerate.
149 * configure.in: Add bfd_microblaze_arch target.
150 * configure: Regenerate.
151 * disassemble.c: Define ARCH_microblaze, return
152 print_insn_microblaze().
153 * microblaze-dis.c: New MicroBlaze disassembler.
154 * microblaze-opc.h: New MicroBlaze opcode definitions.
155 * microblaze-opcm.h: New MicroBlaze opcode types.
159 * configure.in: Handle bfd_l1om_arch.
160 * disassemble.c (disassembler): Likewise.
162 * configure: Regenerated.
164 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
165 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
167 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
169 (cpu_flags): Add CpuL1OM.
170 (set_bitfield): Take an argument to set the value field.
171 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
172 (process_i386_opcode_modifier): Updated.
173 (process_i386_operand_type): Likewise.
174 * i386-init.h: Regenerated.
175 * i386-tbl.h: Likewise.
177 * i386-opc.h (CpuL1OM): New.
179 (i386_cpu_flags): Add cpul1om.
183 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
185 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
186 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
187 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
188 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
190 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
192 * i386-opc.tbl: Qualify floating point instructions by their
193 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
194 and fsincos to be avilable only on 387. Fix fstsw ax to be
195 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
197 * i386-init.h, i386-tbl.h: Regenerate.
202 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
203 offset or indexed based addressing mode 3.
208 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
210 (arm_decode_shift): Catch illegal register based shifts.
211 (print_insn_arm): Properly handle negative register r0
212 post-indexed addressing.
216 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
217 lower 32 bits of long types to make hexadecimal output consistent
218 on both 32-bit and 64-bit hosts.
222 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
223 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
224 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
225 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
226 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
227 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
228 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
229 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
230 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
231 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
232 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
233 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
237 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
242 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
247 * mep-desc.c: Regenerate.
248 * mep-desc.h: Regenerate.
249 * mep-opc.c: Regenerate.
250 * mep-opc.h: Regenerate.
254 * i386-opc.h (CpuFMA4): Add CpuFMA4.
255 (i386_cpu_flags): New.
256 * i386-gen.c: Add CPU_FMA4_FLAGS.
257 * i386-opc.tbl: Add FMA4 instructions.
258 * i386-tbl.h: Regenerate.
259 * i386-init.h: Regenerate.
260 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
261 (OP_XMM_VexW): Ditto.
263 (VEXI4_Fixup): Ditto.
264 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
265 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
266 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
267 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
268 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
269 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
270 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
271 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
272 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
273 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
274 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
275 (get_vex_imm8): New. handle FMA4.
276 (OP_EX_VexReg): Ditto.
281 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
282 LFM and SFM instructions as comments,.
283 Improve consistency of formatting for instructions displayed as
284 comments and decimal values displayed with their hexadecimal
291 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
292 boundary between variaant and generic coprocessor instuctions.
293 (coprocessor): Use it.
294 Fix architecture version of MCRR and MRRC instructions.
295 (arm_opcdes): Fix patterns for STRB and STRH instructions.
296 (print_insn_coprocessor): Check architecture and extension masks.
297 Print a hexadecimal version of any decimal constant that is
298 outside of the range of -16 to +32.
299 (print_arm_address): Add a return value of the offset used in the
300 adress, if it is worth printing a hexadecimal version of it.
301 (print_insn_neon): Print a hexadecimal version of any decimal
302 constant that is outside of the range of -16 to +32.
303 (print_insn_arm): Likewise.
304 (print_insn_thumb16): Likewise.
305 (print_insn_thumb32): Likewise.
308 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
309 of an undefined instruction.
310 (arm_opcodes): Use it.
311 (thumb_opcod): Use it.
312 (thumb32_opc): Use it.
316 * mep-desc.c: Regenerate.
317 * mep-desc.h: Regenerate.
318 * mep-dis.c: Regenerate.
319 * mep-ibld.c: Regenerate.
320 * mep-opc.c: Regenerate.
322 * mep-asm.c: Regenerate.
323 * mep-opc.c: Regenerate.
324 * mep-opc.h: Regenerate.
328 * po/fi.po: Updated Finish translation.
332 * m32c-asm.c: Regenerate.
336 * score-dis.c (print_insn_score48, print_insn_score32): Move default
337 case label to proper lexical block.
338 * score7-dis.c (print_insn_score32): Likewise.
342 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
343 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
344 * s390-opc.txt (nopr, nop): Use new instruction format.
349 * arm-dis.c (print_insn_coprocessor): Check that a user specified
350 ARM architecture supports the matched instruction.
351 (print_insn_arm): Likewise.
352 (select_arm_features): New function. Fills in the fields of an
353 arm_feature_set structure based on a given arm machine number.
354 (print_insn): Initialise an arm_feature_set structure.
358 * vax-dis.c (is_function_entry): Return success for synthetic
360 (is_plt_tail): New function.
361 (print_insn_vax): Decode PLT entry offset longword.
366 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
370 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
375 * arm-dis.c (print_insn): Ignore is_data if the user has requested
376 the disassembly of data as well as instructions.
380 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
384 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
385 (moxie_form3_opc_info): Add branch instructions.
386 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
387 encoded instructions.
391 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
392 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
396 * dep-in.sed: Don't use \n in replacement part of s command.
397 * Makefile.am (DEP1): LC_ALL for uniq.
398 * Makefile.in: Regenerate.
402 * po/nl.po: Updated Dutch translation.
406 * ia64-gen.c (parse_resource_users, print_dependency_table,
407 add_dis_table_ent, finish_distable, insert_bit_table_ent,
408 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
409 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
410 insert_completer_entry, print_completer_entry, print_completer_table,
411 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
415 * mep-asm.c: Regenerate.
416 * mep-desc.c: Regenerate.
420 * mep-asm.c: Regenerate.
421 * mep-desc.c: Regenerate.
422 * mep-desc.h: Regenerate.
423 * mep-dis.c: Regenerate.
424 * mep-ibld.c: Regenerate.
425 * mep-opc.c: Regenerate.
426 * mep-opc.h: Regenerate.
430 * po/id.po: Updated Indonesian translation.
431 * po/opcodes.pot: Updated template file.
435 * dep-in.sed: Don't modify .o to .lo here. Output one filename
436 per line with all lines having continuation backslash. Prefix
437 first line with "A", following lines with "B".
438 * Makefile.am (DEP): Don't use dep.sed here.
439 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
440 dep.sed here on dependencies, sort and uniq.
441 * Makefile.in: Regenerate.
445 * makefile.vms (OPT): New variable.
446 (CFLAGS): Update compilation flags.
450 * mep-asm.c: Regenerate.
451 * mep-desc.c: Regenerate.
452 * mep-desc.h: Regenerate.
453 * mep-dis.c: Regenerate.
454 * mep-ibld.c: Regenerate.
455 * mep-opc.c: Regenerate.
456 * mep-opc.h: Regenerate.
460 * i386-opc.h (Cpusse5): Delete.
461 (i386_cpu_flags): Delete.
462 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
463 * i386-opc.tbl: Remove SSE5 instructions.
464 * i386-tbl.h: Regenerate.
465 * i386-init.h: Regenerate.
466 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
467 (print_drex_arg): Delete.
470 (OP_DREX_ICMP): Delete.
471 (OP_DREX_FCMP): Delete.
473 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
477 * Makefile.am: Run "make dep-am".
478 * Makefile.in: Regenerate.
479 * po/POTFILES.in: Regenerate.
483 * mep-asm.c: Regenerate.
484 * mep-opc.c: Regenerate.
488 * mep-asm.c: Regenerate.
489 * mep-desc.c: Regenerate.
490 * mep-desc.h: Regenerate.
491 * mep-dis.c: Regenerate.
492 * mep-ibld.c: Regenerate.
493 * mep-opc.c: Regenerate.
494 * mep-opc.h: Regenerate.
498 * mep-desc.c: Regenerate.
499 * mep-ibld.c: Regenerate.
500 * mep-opc.c: Regenerate.
501 * mep-opc.h: Regenerate.
505 * moxie-opc.c, moxie-dis.c: Created.
506 * Makefile.am: Build the moxie source files.
507 * configure.in: Add moxie support.
508 * Makefile.in, configure: Rebuilt.
509 * disassemble.c (disassembler): Add moxie support.
510 (ARCH_moxie): Define.
514 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
516 (pshab, pshaw, pshad, pshaq): Likewise.
517 * i386-tbl.h: Re-generate.
521 * mep-asm.c: Regenerate.
522 * mep-desc.c: Regenerate.
523 * mep-desc.h: Regenerate.
524 * mep-dis.c: Regenerate.
525 * mep-ibld.c: Regenerate.
526 * mep-opc.c: Regenerate.
527 * mep-opc.h: Regenerate.
531 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
532 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
533 Reorder entries so the extended mnemonics are listed before tlbilx.
537 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
539 (print_insn_powerpc): Make sure we only deprecate instructions using
540 the original dialect and not a modified dialect due to -Many handling.
541 Move the handling of the condition register and default operands to
542 the end of the if/else if/else chain.
543 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
544 instructions from newer processors are listed before older ones.
545 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
546 that have instructions with conflicting opcodes.
550 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
555 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
559 * arm-dis.c (print_insn): Also check section matches in backwards
560 search for mapping symbol.
564 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
568 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
569 * Makefile.am: Run "make dep-am".
570 * Makefile.in: Regenerate.
571 * openrisc-opc.c: Regenerate.
575 * po/id.po: Updated Indonesian translation.
579 * ppc-dis.c: Include "opintl.h".
580 (struct ppc_mopt, ppc_opts): New.
581 (ppc_parse_cpu): New function.
582 (powerpc_init_dialect): Use it.
583 (print_ppc_disassembler_options): Dump options from ppc_opts.
584 Internationalize message.
588 * po/es.po: Updated Spanish translation.
593 * configure.in: Test for ld --as-needed support. Link shared
594 libopcodes against libm.
595 * configure: Regenerate.
599 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
600 instructions from newer processors are listed before older ones.
604 * Makefile.am: Run "make dep-am".
605 (HFILES): Move lm32-desc.h and lm32-opc.h from..
607 * Makefile.in: Regenerate.
611 * score7-dis.c: New file.
612 * Makefile.am: Add dependencies for score7-dis.c.
613 * Makefile.in: Regenerate.
614 * configure.in: Add score7-dis to score files.
615 * configure: Regenerate.
616 * score-dis.c: Add support for score7 architecture.
617 * score-opc.h: Likewise.
621 * configure: Regenerate.
625 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
629 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
630 the power7 and the isel instructions.
631 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
632 (insert_dm, extract_dm): Likewise.
633 (XB6): Update comment to include XX2 form.
634 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
635 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
636 (RemoveXX3DM): Delete.
637 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
638 "mftgpr">: Deprecate for POWER7.
639 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
640 "frsqrte.">: Deprecate the three operand form and enable the two
641 operand form for POWER7 and later.
642 <"wait">: Extend to accept optional parameter. Enable for POWER7.
643 <"waitsrv", "waitimpl">: Add extended opcodes.
644 <"ldbrx", "stdbrx">: Enable for POWER7.
645 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
646 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
647 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
648 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
649 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
650 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
651 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
652 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
653 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
654 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
655 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
656 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
657 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
658 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
659 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
660 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
661 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
662 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
663 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
664 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
665 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
666 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
667 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
668 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
669 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
670 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
671 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
672 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
673 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
674 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
675 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
676 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
677 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
678 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
679 "xxspltw", "xxswapd">: Add VSX opcodes.
683 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
684 (operand_types): Remove Vex_Imm4.
686 * i386-opc.h (Vex_Imm4): Removed.
688 (i386_operand_type): Remove vex_imm4.
690 * i386-opc.tbl: Remove Vex_Imm4 comments.
691 * i386-init.h: Regenerated.
692 * i386-tbl.h: Likewise.
696 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
697 vq{r}shr{u}n.s64 insnstructions.
701 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
702 operand to be a float point register (FRT/FRS).
706 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
707 dmfc2 and dmtc2 before the architecture-level variants.
711 * fr30-opc.c: Regenerate.
712 * frv-opc.c: Regenerate.
713 * ip2k-opc.c: Regenerate.
714 * iq2000-opc.c: Regenerate.
715 * lm32-opc.c: Regenerate.
716 * m32c-opc.c: Regenerate.
717 * m32r-opc.c: Regenerate.
718 * mep-opc.c: Regenerate.
719 * mt-opc.c: Regenerate.
720 * xc16x-opc.c: Regenerate.
721 * xstormy16-opc.c: Regenerate.
722 * tic54x-dis.c (print_instruction): Avoid compiler warning on
727 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
731 * ppc-opc.c: Update copyright year.
732 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
733 ordering for POWER4 and later and use the correct Server ordering.
737 AVX Programming Reference (January, 2009)
738 * i386-dis.c (PREFIX_VEX_3A44): New.
739 (VEX_LEN_3A44_P_2): Likewise.
740 (PREFIX_VEX_3A48): Updated.
741 (VEX_LEN_3A4C_P_2): Likewise.
742 (prefix_table): Add PREFIX_VEX_3A44.
743 (vex_table): Likewise.
744 (vex_len_table): Add VEX_LEN_3A44_P_2.
746 * i386-opc.tbl: Add PCLMUL + AVX instructions.
747 * i386-tbl.h: Regenerated.
751 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
752 (mips_arch_choices): Add XLR entry.
753 * mips-opc.c (XLR): Define.
754 (mips_builtin_opcodes): Add XLR instructions.
758 * Makefile.am: Add install-pdf target.
759 * po/Make-in: Add install-pdf target.
760 * Makefile.in: Regenerate.
764 * mep-asm.c: Regenerate.
765 * mep-desc.c: Regenerate.
766 * mep-desc.h: Regenerate.
767 * mep-dis.c: Regenerate.
768 * mep-ibld.c: Regenerate.
769 * mep-opc.c: Regenerate.
770 * mep-opc.h: Regenerate.
774 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
779 * mips-opc.c (suxc1): Add the flag of FP_D.
783 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
784 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
785 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
786 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
787 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
788 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
789 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
790 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
794 * configure.in (commonbfdlib): Delete.
795 (SHARED_LIBADD): Add pic libiberty if such is available.
796 * configure: Regenerate.
797 * po/POTFILES.in: Regenerate.
801 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
802 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
803 operand form and enable the four operand form for POWER6 and later.
804 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
805 three operand form for POWER6 and later.
809 * bfin-dis.c (OUTS): Use "%s" as format string.
813 * i386-gen.c (cpu_flag_init): Remove a white space.
814 (operand_type_init): Likewise.
818 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
819 * i386-tbl.h: Regenerated.
823 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
824 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
829 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
830 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
831 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
832 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
835 (set_bitfield): Take an argument, lineno. Don't report lineno
836 on error if it is -1.
837 (process_i386_cpu_flag): Take an argument, lineno.
838 (process_i386_opcode_modifier): Likewise.
839 (process_i386_operand_type): Likewise.
840 (output_i386_opcode): Likewise.
841 (opcode_hash_entry): Add lineno.
842 (process_i386_opcodes): Updated.
843 (process_i386_registers): Likewise.
844 (process_i386_initializers): Likewise.
846 * i386-opc.h (CpuP4): Removed.
850 (CpuSYSCALL): Likewise.
852 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
853 cpuclflush and cpusyscall.
855 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
857 * i386-init.h: Regenerated.
858 * i386-tbl.h: Likewise.
862 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
863 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
864 (cpu_flags): Add CpuRdtscp.
865 (set_bitfield): Remove CpuSledgehammer check.
867 * i386-opc.h (CpuRdtscp): New.
869 (i386_cpu_flags): Add cpurdtscp.
871 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
872 * i386-init.h: Regenerated.
873 * i386-tbl.h: Likewise.
877 * ppc-opc.c (PPCNONE): Define.
879 (powerpc_opcodes): Initialize the new "deprecated" field.
883 AVX Programming Reference (December, 2008)
884 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
885 (VEX_LEN_E7_P_2_M_0): Likewise.
886 (VEX_LEN_2C_P_1): Updated.
887 (VEX_LEN_E8_P_2): Likewise.
888 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
889 (mod_table): Likewise.
891 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
892 * i386-tbl.h: Regenerated.
896 * i386-gen.c (process_copyright): Update for 2009.
898 * i386-init.h: Regenerated.
899 * i386-tbl.h: Likewise.
903 AVX Programming Reference (December, 2008)
904 * i386-dis.c (OP_VEX_FMA): Removed.
905 (OP_EX_VexW): Likewise.
906 (OP_EX_VexImmW): Likewise.
907 (OP_XMM_VexW): Likewise.
908 (VEXI4_Fixup): Likewise.
909 (VPERMIL2_Fixup): Likewise.
912 (Vex128FMA): Likewise.
916 (EXVexImmW): Likewise.
918 (VPERMIL2): Likewise.
919 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
920 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
921 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
922 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
923 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
924 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
925 (get_vex_imm8): Likewise.
926 (OP_EX_VexReg): Likewise.
927 vpermil2_op): Likewise.
929 (vex_w_dq_mode): Likewise.
930 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
931 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
932 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
934 (PREFIX_VEX_38DB): Likewise.
935 (PREFIX_VEX_3A4A): Likewise.
936 (PREFIX_VEX_3A60): Likewise.
937 (PREFIX_VEX_3ADF): Likewise.
938 (VEX_LEN_3ADF_P_2): Likewise.
939 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
940 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
941 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
942 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
943 PREFIX_VEX_3896...PREFIX_VEX_389F,
944 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
945 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
946 (vex_table): Likewise.
947 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
948 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
949 (putop): Support "%XW".
950 (intel_operand_size): Handle vex_w_dq_mode.
952 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
954 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
955 instructions. Add new FMA instructions.
956 * i386-tbl.h: Regenerated.
960 * or32-opc.c (or32_print_register, or32_print_immediate,
961 disassemble_insn): Don't rely on undefined sprintf behaviour.
963 For older changes see ChangeLog-2008
969 version-control: never