1 /* tc-arm.c All the arm specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
6 Copyright (C) 1994, 1995 Free Software Foundation, Inc.
8 This file is part of GAS, the GNU Assembler.
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
36 /* ??? This is currently unused. */
38 #define internalError() \
39 as_fatal ("ARM Internal Error, line %d, %s", __LINE__, __FILE__)
41 #define internalError() as_fatal ("ARM Internal Error")
44 /* Types of processor to assemble for. */
45 #define ARM_1 0x00000001
46 #define ARM_2 0x00000002
47 #define ARM_250 0x00000002 /* Checkme, should this be = ARM_3? */
48 #define ARM_3 0x00000004
49 #define ARM_6 0x00000008
50 #define ARM_7 0x00000008
51 #define ARM_7DM 0x00000010
53 /* Some useful combinations: */
54 #define ARM_ANY 0x00ffffff
55 #define ARM_2UP 0x00fffffe
56 #define ARM_ALL ARM_2UP /* Not arm1 only */
57 #define ARM_3UP 0x00fffffc
58 #define ARM_6UP 0x00fffff8
59 #define ARM_LONGMUL 0x00000010 /* Don't know which will have this. */
61 #define FPU_CORE 0x80000000
62 #define FPU_FPA10 0x40000000
63 #define FPU_FPA11 0x40000000
66 /* Some useful combinations */
67 #define FPU_ALL 0xff000000 /* Note this is ~ARM_ANY */
68 #define FPU_MEMMULTI 0x7f000000 /* Not fpu_core */
71 #define CPU_DEFAULT ARM_ALL
75 #define FPU_DEFAULT FPU_ALL
78 unsigned long cpu_variant = CPU_DEFAULT | FPU_DEFAULT;
80 /* This array holds the chars that always start a comment. If the
81 pre-processor is disabled, these aren't very useful */
82 CONST char comment_chars[] = "@";
84 /* This array holds the chars that only start a comment at the beginning of
85 a line. If the line seems to have the form '# 123 filename'
86 .line and .file directives will appear in the pre-processed output */
87 /* Note that input_file.c hand checks for '#' at the beginning of the
88 first line of the input file. This is because the compiler outputs
89 #NO_APP at the beginning of its output. */
90 /* Also note that comments like this one will always work. */
91 CONST char line_comment_chars[] = "#";
93 CONST char line_separator_chars[] = "";
95 /* Chars that can be used to separate mant from exp in floating point nums */
96 CONST char EXP_CHARS[] = "eE";
98 /* Chars that mean this number is a floating point constant */
102 CONST char FLT_CHARS[] = "rRsSfFdDxXeEpP";
104 const int md_reloc_size = 8; /* Size of relocation record */
109 unsigned long instruction;
113 bfd_reloc_code_real_type type;
123 CONST char *template;
127 static CONST struct asm_shift shift[] =
143 #define NO_SHIFT_RESTRICT 1
144 #define SHIFT_RESTRICT 0
146 #define NUM_FLOAT_VALS 8
148 CONST char *fp_const[] =
150 "0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0", 0
153 /* Number of littlenums required to hold an extended precision number */
154 #define MAX_LITTLENUMS 6
156 LITTLENUM_TYPE fp_values[NUM_FLOAT_VALS][MAX_LITTLENUMS];
166 #define CP_T_X 0x00008000
167 #define CP_T_Y 0x00400000
168 #define CP_T_Pre 0x01000000
169 #define CP_T_UD 0x00800000
170 #define CP_T_WB 0x00200000
172 #define TRANS_BIT (0x00200000)
176 CONST char *template;
180 /* This is to save a hash look-up in the common case */
181 #define COND_ALWAYS 0xe0000000
183 static CONST struct asm_cond conds[] =
187 {"cs", 0x20000000}, {"hs", 0x20000000},
188 {"cc", 0x30000000}, {"ul", 0x30000000}, {"lo", 0x30000000},
206 CONST char *template; /* Basic flag string */
207 unsigned long set_bits; /* Bits to set */
210 static CONST struct asm_flg s_flag[] =
216 static CONST struct asm_flg ldst_flags[] =
220 {"bt", 0x00400000 | TRANS_BIT},
224 static CONST struct asm_flg byte_flag[] =
230 static CONST struct asm_flg cmp_flags[] =
237 static CONST struct asm_flg ldm_flags[] =
250 static CONST struct asm_flg stm_flags[] =
263 static CONST struct asm_flg lfm_flags[] =
270 static CONST struct asm_flg sfm_flags[] =
277 static CONST struct asm_flg round_flags[] =
285 static CONST struct asm_flg except_flag[] =
291 static CONST struct asm_flg cplong_flag[] =
299 CONST char *template;
300 unsigned long number;
303 #define PSR_ALL 0x00010000
305 static CONST struct asm_psr psrs[] =
318 /* Functions called by parser */
319 /* ARM instructions */
320 static void do_arit PARAMS ((char *operands, unsigned long flags));
321 static void do_cmp PARAMS ((char *operands, unsigned long flags));
322 static void do_mov PARAMS ((char *operands, unsigned long flags));
323 static void do_ldst PARAMS ((char *operands, unsigned long flags));
324 static void do_ldmstm PARAMS ((char *operands, unsigned long flags));
325 static void do_branch PARAMS ((char *operands, unsigned long flags));
326 static void do_swi PARAMS ((char *operands, unsigned long flags));
327 /* Pseudo Op codes */
328 static void do_adr PARAMS ((char *operands, unsigned long flags));
329 static void do_nop PARAMS ((char *operands, unsigned long flags));
331 static void do_mul PARAMS ((char *operands, unsigned long flags));
332 static void do_mla PARAMS ((char *operands, unsigned long flags));
334 static void do_swap PARAMS ((char *operands, unsigned long flags));
336 static void do_msr PARAMS ((char *operands, unsigned long flags));
337 static void do_mrs PARAMS ((char *operands, unsigned long flags));
339 static void do_mull PARAMS ((char *operands, unsigned long flags));
340 /* Coprocessor Instructions */
341 static void do_cdp PARAMS ((char *operands, unsigned long flags));
342 static void do_lstc PARAMS ((char *operands, unsigned long flags));
343 static void do_co_reg PARAMS ((char *operands, unsigned long flags));
344 static void do_fp_ctrl PARAMS ((char *operands, unsigned long flags));
345 static void do_fp_ldst PARAMS ((char *operands, unsigned long flags));
346 static void do_fp_ldmstm PARAMS ((char *operands, unsigned long flags));
347 static void do_fp_dyadic PARAMS ((char *operands, unsigned long flags));
348 static void do_fp_monadic PARAMS ((char *operands, unsigned long flags));
349 static void do_fp_cmp PARAMS ((char *operands, unsigned long flags));
350 static void do_fp_from_reg PARAMS ((char *operands, unsigned long flags));
351 static void do_fp_to_reg PARAMS ((char *operands, unsigned long flags));
353 static void fix_new_arm PARAMS ((fragS *frag, int where,
354 short int size, expressionS *exp,
355 int pc_rel, int reloc));
356 static int arm_reg_parse PARAMS ((char **ccp));
357 static int arm_psr_parse PARAMS ((char **ccp));
359 /* All instructions take 4 bytes in the object file */
363 /* LONGEST_INST is the longest basic instruction name without conditions or
365 * ARM7DM has 4 of length 5
368 #define LONGEST_INST 5
372 CONST char *template; /* Basic string to match */
373 unsigned long value; /* Basic instruction code */
374 CONST char *comp_suffix; /* Compulsory suffix that must follow conds */
375 CONST struct asm_flg *flags; /* Bits to toggle if flag 'n' set */
376 unsigned long variants; /* Which CPU variants this exists for */
377 void (*parms)(); /* Function to call to parse args */
380 static CONST struct asm_opcode insns[] =
382 /* ARM Instructions */
383 {"and", 0x00000000, NULL, s_flag, ARM_ANY, do_arit},
384 {"eor", 0x00200000, NULL, s_flag, ARM_ANY, do_arit},
385 {"sub", 0x00400000, NULL, s_flag, ARM_ANY, do_arit},
386 {"rsb", 0x00600000, NULL, s_flag, ARM_ANY, do_arit},
387 {"add", 0x00800000, NULL, s_flag, ARM_ANY, do_arit},
388 {"adc", 0x00a00000, NULL, s_flag, ARM_ANY, do_arit},
389 {"sbc", 0x00c00000, NULL, s_flag, ARM_ANY, do_arit},
390 {"rsc", 0x00e00000, NULL, s_flag, ARM_ANY, do_arit},
391 {"orr", 0x01800000, NULL, s_flag, ARM_ANY, do_arit},
392 {"bic", 0x01c00000, NULL, s_flag, ARM_ANY, do_arit},
393 {"tst", 0x01000000, NULL, cmp_flags, ARM_ANY, do_cmp},
394 {"teq", 0x01200000, NULL, cmp_flags, ARM_ANY, do_cmp},
395 {"cmp", 0x01400000, NULL, cmp_flags, ARM_ANY, do_cmp},
396 {"cmn", 0x01600000, NULL, cmp_flags, ARM_ANY, do_cmp},
397 {"mov", 0x01a00000, NULL, s_flag, ARM_ANY, do_mov},
398 {"mvn", 0x01e00000, NULL, s_flag, ARM_ANY, do_mov},
399 {"str", 0x04000000, NULL, ldst_flags, ARM_ANY, do_ldst},
400 {"ldr", 0x04100000, NULL, ldst_flags, ARM_ANY, do_ldst},
401 {"stm", 0x08000000, NULL, stm_flags, ARM_ANY, do_ldmstm},
402 {"ldm", 0x08100000, NULL, ldm_flags, ARM_ANY, do_ldmstm},
403 {"swi", 0x0f000000, NULL, NULL, ARM_ANY, do_swi},
404 {"bl", 0x0b000000, NULL, NULL, ARM_ANY, do_branch},
405 {"b", 0x0a000000, NULL, NULL, ARM_ANY, do_branch},
408 {"adr", 0x028f0000, NULL, NULL, ARM_ANY, do_adr},
409 {"nop", 0x01a00000, NULL, NULL, ARM_ANY, do_nop},
411 /* ARM 2 multiplies */
412 {"mul", 0x00000090, NULL, s_flag, ARM_2UP, do_mul},
413 {"mla", 0x00200090, NULL, s_flag, ARM_2UP, do_mla},
415 /* ARM 3 - swp instructions */
416 {"swp", 0x01000090, NULL, byte_flag, ARM_3UP, do_swap},
418 /* ARM 6 Coprocessor instructions */
419 {"mrs", 0x010f0000, NULL, NULL, ARM_6UP, do_mrs},
420 {"msr", 0x0128f000, NULL, NULL, ARM_6UP, do_msr},
422 /* ARM 7DM long multiplies - need signed/unsigned flags! */
423 {"smull", 0x00c00090, NULL, s_flag, ARM_LONGMUL, do_mull},
424 {"umull", 0x00800090, NULL, s_flag, ARM_LONGMUL, do_mull},
425 {"smlal", 0x00e00090, NULL, s_flag, ARM_LONGMUL, do_mull},
426 {"umlal", 0x00a00090, NULL, s_flag, ARM_LONGMUL, do_mull},
428 /* Floating point instructions */
429 {"wfs", 0x0e200110, NULL, NULL, FPU_ALL, do_fp_ctrl},
430 {"rfs", 0x0e300110, NULL, NULL, FPU_ALL, do_fp_ctrl},
431 {"wfc", 0x0e400110, NULL, NULL, FPU_ALL, do_fp_ctrl},
432 {"rfc", 0x0e500110, NULL, NULL, FPU_ALL, do_fp_ctrl},
433 {"ldf", 0x0c100100, "sdep", NULL, FPU_ALL, do_fp_ldst},
434 {"stf", 0x0c000100, "sdep", NULL, FPU_ALL, do_fp_ldst},
435 {"lfm", 0x0c100200, NULL, lfm_flags, FPU_MEMMULTI, do_fp_ldmstm},
436 {"sfm", 0x0c000200, NULL, sfm_flags, FPU_MEMMULTI, do_fp_ldmstm},
437 {"mvf", 0x0e008100, "sde", round_flags, FPU_ALL, do_fp_monadic},
438 {"mnf", 0x0e108100, "sde", round_flags, FPU_ALL, do_fp_monadic},
439 {"abs", 0x0e208100, "sde", round_flags, FPU_ALL, do_fp_monadic},
440 {"rnd", 0x0e308100, "sde", round_flags, FPU_ALL, do_fp_monadic},
441 {"sqt", 0x0e408100, "sde", round_flags, FPU_ALL, do_fp_monadic},
442 {"log", 0x0e508100, "sde", round_flags, FPU_ALL, do_fp_monadic},
443 {"lgn", 0x0e608100, "sde", round_flags, FPU_ALL, do_fp_monadic},
444 {"exp", 0x0e708100, "sde", round_flags, FPU_ALL, do_fp_monadic},
445 {"sin", 0x0e808100, "sde", round_flags, FPU_ALL, do_fp_monadic},
446 {"cos", 0x0e908100, "sde", round_flags, FPU_ALL, do_fp_monadic},
447 {"tan", 0x0ea08100, "sde", round_flags, FPU_ALL, do_fp_monadic},
448 {"asn", 0x0eb08100, "sde", round_flags, FPU_ALL, do_fp_monadic},
449 {"acs", 0x0ec08100, "sde", round_flags, FPU_ALL, do_fp_monadic},
450 {"atn", 0x0ed08100, "sde", round_flags, FPU_ALL, do_fp_monadic},
451 {"urd", 0x0ee08100, "sde", round_flags, FPU_ALL, do_fp_monadic},
452 {"nrm", 0x0ef08100, "sde", round_flags, FPU_ALL, do_fp_monadic},
453 {"adf", 0x0e000100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
454 {"suf", 0x0e200100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
455 {"rsf", 0x0e300100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
456 {"muf", 0x0e100100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
457 {"dvf", 0x0e400100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
458 {"rdf", 0x0e500100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
459 {"pow", 0x0e600100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
460 {"rpw", 0x0e700100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
461 {"rmf", 0x0e800100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
462 {"fml", 0x0e900100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
463 {"fdv", 0x0ea00100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
464 {"frd", 0x0eb00100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
465 {"pol", 0x0ec00100, "sde", round_flags, FPU_ALL, do_fp_dyadic},
466 {"cmf", 0x0e90f110, NULL, except_flag, FPU_ALL, do_fp_cmp},
467 {"cnf", 0x0eb0f110, NULL, except_flag, FPU_ALL, do_fp_cmp},
468 /* The FPA10 data sheet suggests that the 'E' of cmfe/cnfe should not
469 be an optional suffix, but part of the instruction. To be compatible,
471 {"cmfe", 0x0ed0f110, NULL, NULL, FPU_ALL, do_fp_cmp},
472 {"cnfe", 0x0ef0f110, NULL, NULL, FPU_ALL, do_fp_cmp},
473 {"flt", 0x0e000110, "sde", round_flags, FPU_ALL, do_fp_from_reg},
474 {"fix", 0x0e100110, NULL, round_flags, FPU_ALL, do_fp_to_reg},
476 /* Generic copressor instructions */
477 {"cdp", 0x0e000000, NULL, NULL, ARM_ANY, do_cdp},
478 {"ldc", 0x0c100000, NULL, cplong_flag, ARM_ANY, do_lstc},
479 {"stc", 0x0c000000, NULL, cplong_flag, ARM_ANY, do_lstc},
480 {"mcr", 0x0e000010, NULL, NULL, ARM_ANY, do_co_reg},
481 {"mrc", 0x0e100010, NULL, NULL, ARM_ANY, do_co_reg},
484 /* defines for various bits that we will want to toggle */
486 #define INST_IMMEDIATE 0x02000000
487 #define OFFSET_REG 0x02000000
488 #define SHIFT_BY_REG 0x00000010
489 #define PRE_INDEX 0x01000000
490 #define INDEX_UP 0x00800000
491 #define WRITE_BACK 0x00200000
492 #define MULTI_SET_PSR 0x00400000
494 #define LITERAL_MASK 0xf000f000
495 #define COND_MASK 0xf0000000
496 #define OPCODE_MASK 0xfe1fffff
497 #define DATA_OP_SHIFT 21
499 /* Codes to distinguish the arithmetic instructions */
511 #define OPCODE_CMP 10
512 #define OPCODE_CMN 11
513 #define OPCODE_ORR 12
514 #define OPCODE_MOV 13
515 #define OPCODE_BIC 14
516 #define OPCODE_MVN 15
524 #define int_register(reg) ((reg) >= 0 && (reg) <= 15)
525 #define cp_register(reg) ((reg) >= 32 && (reg) <= 47)
526 #define fp_register(reg) ((reg) >= 16 && (reg) <= 23)
530 /* These are the standard names; Users can add aliases with .req */
531 static CONST struct reg_entry reg_table[] =
533 /* Processor Register Numbers */
534 {"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3},
535 {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7},
536 {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11},
537 {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", REG_PC},
538 /* APCS conventions */
539 {"a1", 0}, {"a2", 1}, {"a3", 2}, {"a4", 3},
540 {"v1", 4}, {"v2", 5}, {"v3", 6}, {"v4", 7}, {"v5", 8},
541 {"v6", 9}, {"sb", 9}, {"v7", 10}, {"sl", 10},
542 {"fp", 11}, {"ip", 12}, {"sp", 13}, {"lr", 14}, {"pc", REG_PC},
544 {"f0", 16}, {"f1", 17}, {"f2", 18}, {"f3", 19},
545 {"f4", 20}, {"f5", 21}, {"f6", 22}, {"f7", 23},
546 {"c0", 32}, {"c1", 33}, {"c2", 34}, {"c3", 35},
547 {"c4", 36}, {"c5", 37}, {"c6", 38}, {"c7", 39},
548 {"c8", 40}, {"c9", 41}, {"c10", 42}, {"c11", 43},
549 {"c12", 44}, {"c13", 45}, {"c14", 46}, {"c15", 47},
550 {"cr0", 32}, {"cr1", 33}, {"cr2", 34}, {"cr3", 35},
551 {"cr4", 36}, {"cr5", 37}, {"cr6", 38}, {"cr7", 39},
552 {"cr8", 40}, {"cr9", 41}, {"cr10", 42}, {"cr11", 43},
553 {"cr12", 44}, {"cr13", 45}, {"cr14", 46}, {"cr15", 47},
557 static CONST char *bad_args = "Bad arguments to instruction";
558 static CONST char *bad_pc = "r15 not allowed here";
560 static struct hash_control *arm_ops_hsh = NULL;
561 static struct hash_control *arm_cond_hsh = NULL;
562 static struct hash_control *arm_shift_hsh = NULL;
563 static struct hash_control *arm_reg_hsh = NULL;
564 static struct hash_control *arm_psr_hsh = NULL;
566 /* This table describes all the machine specific pseudo-ops the assembler
567 has to support. The fields are:
568 pseudo-op name without dot
569 function to call to execute this pseudo-op
570 Integer arg to pass to the function
573 static void s_req PARAMS ((int));
574 static void s_align PARAMS ((int));
575 static void s_bss PARAMS ((int));
576 static void s_even PARAMS ((int));
577 static void s_ltorg PARAMS ((int));
579 static int my_get_expression PARAMS ((expressionS *, char **));
581 CONST pseudo_typeS md_pseudo_table[] =
583 {"req", s_req, 0}, /* Never called becasue '.req' does not start line */
585 {"align", s_align, 0},
587 {"ltorg", s_ltorg, 0},
588 {"pool", s_ltorg, 0},
590 {"extend", float_cons, 'x'},
591 {"ldouble", float_cons, 'x'},
592 {"packed", float_cons, 'p'},
596 /* Stuff needed to resolve the label ambiguity
606 symbolS *last_label_seen;
610 #define MAX_LITERAL_POOL_SIZE 1024
612 typedef struct literalS
614 struct expressionS exp;
618 literalT literals[MAX_LITERAL_POOL_SIZE];
619 int next_literal_pool_place = 0; /* Next free entry in the pool */
620 int lit_pool_num = 1; /* Next literal pool number */
621 symbolS *current_poolP = NULL;
622 symbolS *symbol_make_empty ();
627 if (current_poolP == NULL)
628 current_poolP = symbol_make_empty();
630 if (next_literal_pool_place > MAX_LITERAL_POOL_SIZE)
632 inst.error = "Literal Pool Overflow\n";
636 literals[next_literal_pool_place].exp = inst.reloc.exp;
637 inst.reloc.exp.X_op = O_symbol;
638 inst.reloc.exp.X_add_number = (next_literal_pool_place++)*4-8;
639 inst.reloc.exp.X_add_symbol = current_poolP;
644 /* Can't use symbol_new here, so have to create a symbol and them at
645 a later datete assign iot a value. Thats what these functions do */
647 symbol_locate (symbolP, name, segment, valu, frag)
649 CONST char *name; /* It is copied, the caller can modify */
650 segT segment; /* Segment identifier (SEG_<something>) */
651 valueT valu; /* Symbol value */
652 fragS *frag; /* Associated fragment */
654 unsigned int name_length;
655 char *preserved_copy_of_name;
657 name_length = strlen (name) + 1; /* +1 for \0 */
658 obstack_grow (¬es, name, name_length);
659 preserved_copy_of_name = obstack_finish (¬es);
660 #ifdef STRIP_UNDERSCORE
661 if (preserved_copy_of_name[0] == '_')
662 preserved_copy_of_name++;
665 #ifdef tc_canonicalize_symbol_name
666 preserved_copy_of_name =
667 tc_canonicalize_symbol_name (preserved_copy_of_name);
670 S_SET_NAME (symbolP, preserved_copy_of_name);
672 S_SET_SEGMENT (symbolP, segment);
673 S_SET_VALUE (symbolP, valu);
674 symbol_clear_list_pointers(symbolP);
676 symbolP->sy_frag = frag;
679 * Link to end of symbol chain.
682 extern int symbol_table_frozen;
683 if (symbol_table_frozen)
687 symbol_append (symbolP, symbol_lastP, &symbol_rootP, &symbol_lastP);
689 obj_symbol_new_hook (symbolP);
691 #ifdef tc_symbol_new_hook
692 tc_symbol_new_hook (symbolP);
696 verify_symbol_chain(symbol_rootP, symbol_lastP);
697 #endif /* DEBUG_SYMS */
705 symbolP = (symbolS *) obstack_alloc (¬es, sizeof (symbolS));
707 /* symbol must be born in some fixed state. This seems as good as any. */
708 memset (symbolP, 0, sizeof (symbolS));
711 symbolP->bsym = bfd_make_empty_symbol (stdoutput);
712 assert (symbolP->bsym != 0);
713 symbolP->bsym->udata.p = (PTR) symbolP;
719 /* Check that an immediate is valid, and if so, convert it to the right format
722 /* OH, for a rotate instruction in C! */
725 validate_immediate (val)
728 unsigned int a = (unsigned int) val;
731 /* Do the easy (and most common ones) quickly */
732 for (i = 0; i <= 24; i += 2)
734 if ((a & (0xff << i)) == a)
735 return (int) (((32 - i) & 0x1e) << 7) | ((a >> i) & 0xff);
738 /* Now do the harder ones */
739 for (; i < 32; i += 2)
741 if ((a & ((0xff << i) | (0xff >> (32 - i)))) == a)
743 a = ((a >> i) & 0xff) | ((a << (32 - i)) & 0xff);
744 return (int) a | (((32 - i) >> 1) << 8);
751 validate_offset_imm (val)
754 if (val < -4095 || val > 4095)
755 as_bad ("bad immediate value for offset (%d)", val);
764 as_bad ("Invalid syntax for .req directive.");
771 /* We don't support putting frags in the BSS segment, we fake it by
772 marking in_bss, then looking at s_skip for clues?.. */
773 subseg_set (bss_section, 0);
774 demand_empty_rest_of_line ();
781 if (!need_pass_2) /* Never make frag if expect extra pass. */
783 record_alignment (now_seg, 1);
784 demand_empty_rest_of_line ();
794 if (current_poolP == NULL)
798 as_tsktsk ("Nothing to put in the pool\n");
802 /* Align pool as you have word accesses */
803 /* Only make a frag if we have to ... */
807 record_alignment (now_seg, 2);
810 as_tsktsk ("Inserting implicit pool at change of section");
812 sprintf (sym_name, "$$lit_\002%x", lit_pool_num++);
814 symbol_locate (current_poolP, sym_name, now_seg,
815 (valueT) ((char *)obstack_next_free (&frags)
816 - frag_now->fr_literal), frag_now);
817 symbol_table_insert (current_poolP);
819 while (lit_count < next_literal_pool_place)
820 /* First output the expression in the instruction to the pool */
821 emit_expr (&(literals[lit_count++].exp), 4); /* .word */
823 next_literal_pool_place = 0;
824 current_poolP = NULL;
828 arm_align (power, fill)
832 /* Only make a frag if we HAVE to ... */
833 if (power && !need_pass_2)
834 frag_align (power, fill);
836 record_alignment (now_seg, power);
840 s_align (unused) /* Same as s_align_ptwo but align 0 => align 2 */
844 register long temp_fill;
845 long max_alignment = 15;
847 temp = get_absolute_expression ();
848 if (temp > max_alignment)
849 as_bad ("Alignment too large: %d. assumed.", temp = max_alignment);
852 as_bad ("Alignment negative. 0 assumed.");
856 if (*input_line_pointer == ',')
858 input_line_pointer++;
859 temp_fill = get_absolute_expression ();
867 /* Only make a frag if we HAVE to. . . */
868 if (temp && !need_pass_2)
869 frag_align (temp, (int) temp_fill);
870 demand_empty_rest_of_line ();
872 record_alignment (now_seg, temp);
883 inst.error = "Garbage following instruction";
887 skip_past_comma (str)
893 while ((c = *p) == ' ' || c == ',')
896 if (c == ',' && comma++)
904 return comma ? SUCCESS : FAIL;
907 /* A standard register must be given at this point. Shift is the place to
908 put it in the instruction. */
911 reg_required_here (str, shift)
918 if ((reg = arm_reg_parse (str)) != FAIL && int_register (reg))
920 inst.instruction |= reg << shift;
924 /* In the few cases where we might be able to accept something else
925 this error can be overridden */
926 inst.error = "Register expected";
928 /* Restore the start point, we may have got a reg of the wrong class. */
934 psr_required_here (str, shift)
941 if ((psr = arm_psr_parse (str)) != FAIL && psr < 2)
944 inst.instruction |= 1 << shift; /* Should be bit 22 */
948 /* In the few cases where we might be able to accept something else
949 this error can be overridden */
950 inst.error = "<psr> expected";
952 /* Restore the start point. */
958 psrf_required_here (str, shift)
965 if ((psrf = arm_psr_parse (str)) != FAIL && psrf > 1)
967 if (psrf == 1 || psrf == 3)
968 inst.instruction |= 1 << shift; /* Should be bit 22 */
972 /* In the few cases where we might be able to accept something else
973 this error can be overridden */
974 inst.error = "<psrf> expected";
976 /* Restore the start point. */
985 int processor, pchar;
990 /* The data sheet seems to imply that just a number on its own is valid
991 here, but the RISC iX assembler seems to accept a prefix 'p'. We will
993 if (**str == 'p' || **str == 'P')
997 if (pchar >= '0' && pchar <= '9')
999 processor = pchar - '0';
1000 if (**str >= '0' && **str <= '9')
1002 processor = processor * 10 + *(*str)++ - '0';
1005 inst.error = "Illegal co-processor number";
1012 inst.error = "Bad or missing co-processor number";
1016 inst.instruction |= processor << 8;
1021 cp_opc_expr (str, where, length)
1028 while (**str == ' ')
1031 memset (&expr, '\0', sizeof (expr));
1033 if (my_get_expression (&expr, str))
1035 if (expr.X_op != O_constant)
1037 inst.error = "bad or missing expression";
1041 if ((expr.X_add_number & ((1 << length) - 1)) != expr.X_add_number)
1043 inst.error = "immediate co-processor expression too large";
1047 inst.instruction |= expr.X_add_number << where;
1052 cp_reg_required_here (str, where)
1059 if ((reg = arm_reg_parse (str)) != FAIL && cp_register (reg))
1062 inst.instruction |= reg << where;
1066 /* In the few cases where we might be able to accept something else
1067 this error can be overridden */
1068 inst.error = "Co-processor register expected";
1070 /* Restore the start point */
1076 fp_reg_required_here (str, where)
1083 if ((reg = arm_reg_parse (str)) != FAIL && fp_register (reg))
1086 inst.instruction |= reg << where;
1090 /* In the few cases where we might be able to accept something else
1091 this error can be overridden */
1092 inst.error = "Floating point register expected";
1094 /* Restore the start point */
1100 cp_address_offset (str)
1105 while (**str == ' ')
1110 inst.error = "immediate expression expected";
1115 if (my_get_expression (&inst.reloc.exp, str))
1117 if (inst.reloc.exp.X_op == O_constant)
1119 offset = inst.reloc.exp.X_add_number;
1122 inst.error = "co-processor address must be word aligned";
1126 if (offset > 1023 || offset < -1023)
1128 inst.error = "offset too large";
1133 inst.instruction |= INDEX_UP;
1137 inst.instruction |= offset >> 2;
1140 inst.reloc.type = BFD_RELOC_ARM_CP_OFF_IMM;
1146 cp_address_required_here (str)
1161 if ((reg = reg_required_here (&p, 16)) == FAIL)
1163 inst.error = "Register required";
1173 if (skip_past_comma (&p) == SUCCESS)
1176 write_back = WRITE_BACK;
1179 inst.error = "pc may not be used in post-increment";
1183 if (cp_address_offset (&p) == FAIL)
1187 pre_inc = PRE_INDEX | INDEX_UP;
1191 /* '['Rn, #expr']'[!] */
1193 if (skip_past_comma (&p) == FAIL)
1195 inst.error = "pre-indexed expression expected";
1199 pre_inc = PRE_INDEX;
1200 if (cp_address_offset (&p) == FAIL)
1208 inst.error = "missing ]";
1219 inst.error = "pc may not be used with write-back";
1224 write_back = WRITE_BACK;
1230 if (my_get_expression (&inst.reloc.exp, &p))
1233 inst.reloc.type = BFD_RELOC_ARM_CP_OFF_IMM;
1234 inst.reloc.exp.X_add_number -= 8; /* PC rel adjust */
1235 inst.reloc.pc_rel = 1;
1236 inst.instruction |= (REG_PC << 16);
1239 inst.instruction |= write_back | pre_inc;
1247 unsigned long flags;
1249 /* Do nothing really */
1250 inst.instruction |= flags; /* This is pointless */
1258 unsigned long flags;
1260 /* Only one syntax */
1264 if (reg_required_here (&str, 12) == FAIL)
1266 inst.error = bad_args;
1270 if (skip_past_comma (&str) == FAIL
1271 || psr_required_here (&str, 22) == FAIL)
1273 inst.error = "<psr> expected";
1277 inst.instruction |= flags;
1285 unsigned long flags;
1288 /* Three possible forms: "<psr>, Rm", "<psrf>, Rm", "<psrf>, #expression" */
1293 if ((psr = psr_required_here (&str, 22)) != FAIL)
1295 inst.instruction |= PSR_ALL;
1296 /* Sytax should be "<psr>, Rm" */
1297 if (skip_past_comma (&str) == FAIL
1298 || (reg = reg_required_here (&str, 0)) == FAIL)
1300 inst.error = bad_args;
1304 else if ((psrf = psrf_required_here (&str, 22)) != FAIL)
1305 /* Syntax could be "<psrf>, rm", "<psrf>, #expression" */
1307 if (skip_past_comma (&str) == FAIL)
1309 inst.error = bad_args;
1312 if ((reg = reg_required_here (&str, 0)) != FAIL)
1314 /* Immediate expression */
1315 else if (*(str++) == '#')
1318 if (my_get_expression (&inst.reloc.exp, &str))
1320 inst.error = "Register or shift expression expected";
1324 if (inst.reloc.exp.X_add_symbol)
1326 inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
1327 inst.reloc.pc_rel = 0;
1331 int value = validate_immediate (inst.reloc.exp.X_add_number);
1334 inst.error = "Invalid constant";
1338 inst.instruction |= value;
1341 flags |= INST_IMMEDIATE;
1345 inst.error = "Error: the other";
1351 inst.error = bad_args;
1356 inst.instruction |= flags;
1361 /* Long Multiply Parser
1362 UMULL RdLo, RdHi, Rm, Rs
1363 SMULL RdLo, RdHi, Rm, Rs
1364 UMLAL RdLo, RdHi, Rm, Rs
1365 SMLAL RdLo, RdHi, Rm, Rs
1368 do_mull (str, flags)
1370 unsigned long flags;
1372 int rdlo, rdhi, rm, rs;
1374 /* only one format "rdlo, rdhi, rm, rs" */
1378 if ((rdlo = reg_required_here (&str, 12)) == FAIL)
1380 inst.error = bad_args;
1384 if (skip_past_comma (&str) == FAIL
1385 || (rdhi = reg_required_here (&str, 16)) == FAIL)
1387 inst.error = bad_args;
1391 if (skip_past_comma (&str) == FAIL
1392 || (rm = reg_required_here (&str, 0)) == FAIL)
1394 inst.error = bad_args;
1398 /* rdhi, rdlo and rm must all be different */
1399 if (rdlo == rdhi || rdlo == rm || rdhi == rm)
1400 as_tsktsk ("rdhi, rdlo and rm must all be different");
1402 if (skip_past_comma (&str) == FAIL
1403 || (rs = reg_required_here (&str, 8)) == FAIL)
1405 inst.error = bad_args;
1409 if (rdhi == REG_PC || rdhi == REG_PC || rdhi == REG_PC || rdhi == REG_PC)
1411 inst.error = bad_pc;
1415 inst.instruction |= flags;
1423 unsigned long flags;
1427 /* only one format "rd, rm, rs" */
1431 if ((rd = reg_required_here (&str, 16)) == FAIL)
1433 inst.error = bad_args;
1439 inst.error = bad_pc;
1443 if (skip_past_comma (&str) == FAIL
1444 || (rm = reg_required_here (&str, 0)) == FAIL)
1446 inst.error = bad_args;
1452 inst.error = bad_pc;
1457 as_tsktsk ("rd and rm should be different in mul");
1459 if (skip_past_comma (&str) == FAIL
1460 || (rm = reg_required_here (&str, 8)) == FAIL)
1462 inst.error = bad_args;
1468 inst.error = bad_pc;
1472 inst.instruction |= flags;
1480 unsigned long flags;
1484 /* only one format "rd, rm, rs, rn" */
1488 if ((rd = reg_required_here (&str, 16)) == FAIL)
1490 inst.error = bad_args;
1496 inst.error = bad_pc;
1500 if (skip_past_comma (&str) == FAIL
1501 || (rm = reg_required_here (&str, 0)) == FAIL)
1503 inst.error = bad_args;
1509 inst.error = bad_pc;
1514 as_tsktsk ("rd and rm should be different in mla");
1516 if (skip_past_comma (&str) == FAIL
1517 || (rd = reg_required_here (&str, 8)) == FAIL
1518 || skip_past_comma (&str) == FAIL
1519 || (rm = reg_required_here (&str, 12)) == FAIL)
1521 inst.error = bad_args;
1525 if (rd == REG_PC || rm == REG_PC)
1527 inst.error = bad_pc;
1531 inst.instruction |= flags;
1536 /* Returns the index into fp_values of a floating point number, or -1 if
1537 not in the table. */
1539 my_get_float_expression (str)
1542 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1547 memset (words, 0, MAX_LITTLENUMS * sizeof (LITTLENUM_TYPE));
1548 /* Look for a raw floating point number */
1549 if ((save_in = atof_ieee (*str, 'x', words)) != NULL
1550 && (is_end_of_line [(int)(*save_in)] || *save_in == '\0'))
1552 for (i = 0; i < NUM_FLOAT_VALS; i++)
1554 for (j = 0; j < MAX_LITTLENUMS; j++)
1556 if (words[j] != fp_values[i][j])
1560 if (j == MAX_LITTLENUMS)
1568 /* Try and parse a more complex expression, this will probably fail
1569 unless the code uses a floating point prefix (eg "0f") */
1570 save_in = input_line_pointer;
1571 input_line_pointer = *str;
1572 if (expression (&exp) == absolute_section
1573 && exp.X_op == O_big
1574 && exp.X_add_number < 0)
1576 if (gen_to_words (words, 6, (long)15) == 0)
1578 for (i = 0; i < NUM_FLOAT_VALS; i++)
1580 for (j = 0; j < MAX_LITTLENUMS; j++)
1582 if (words[j] != fp_values[i][j])
1586 if (j == MAX_LITTLENUMS)
1588 *str = input_line_pointer;
1589 input_line_pointer = save_in;
1596 *str = input_line_pointer;
1597 input_line_pointer = save_in;
1601 /* Return true if anything in the expression is a bignum */
1603 walk_no_bignums (sp)
1606 if (sp->sy_value.X_op == O_big)
1609 if (sp->sy_value.X_add_symbol)
1611 return (walk_no_bignums (sp->sy_value.X_add_symbol)
1612 || (sp->sy_value.X_op_symbol
1613 && walk_no_bignums (sp->sy_value.X_op_symbol)));
1620 my_get_expression (ep, str)
1627 save_in = input_line_pointer;
1628 input_line_pointer = *str;
1629 seg = expression (ep);
1630 if (seg != absolute_section
1631 && seg != text_section
1632 && seg != data_section
1633 && seg != bss_section
1634 && seg != undefined_section)
1636 inst.error = "bad_segment";
1637 *str = input_line_pointer;
1638 input_line_pointer = save_in;
1642 /* Get rid of any bignums now, so that we don't generate an error for which
1643 we can't establish a line number later on. Big numbers are never valid
1644 in instructions, which is where is routine is always called. */
1645 if (ep->X_op == O_big
1646 || (ep->X_add_symbol
1647 && (walk_no_bignums (ep->X_add_symbol)
1649 && walk_no_bignums (ep->X_op_symbol)))))
1651 inst.error = "Invalid constant";
1652 *str = input_line_pointer;
1653 input_line_pointer = save_in;
1657 *str = input_line_pointer;
1658 input_line_pointer = save_in;
1662 /* unrestrict should be one if <shift> <register> is permitted for this
1666 decode_shift (str, unrestrict)
1670 struct asm_shift *shft;
1674 while (**str == ' ')
1677 for (p = *str; isalpha (*p); p++)
1682 inst.error = "Shift expression expected";
1688 shft = (struct asm_shift *) hash_find (arm_shift_hsh, *str);
1692 if (!strcmp (*str, "rrx"))
1695 inst.instruction |= shft->value;
1702 if (unrestrict && reg_required_here (&p, 8) != FAIL)
1704 inst.instruction |= shft->value | SHIFT_BY_REG;
1712 if (my_get_expression (&inst.reloc.exp, &p))
1715 /* Validate some simple #expressions */
1716 if (! inst.reloc.exp.X_add_symbol)
1718 int num = inst.reloc.exp.X_add_number;
1719 if (num < 0 || num > 32
1721 && (shft->value == 0 || shft->value == 0x60)))
1723 inst.error = "Invalid immediate shift";
1727 /* Shifts of zero should be converted to lsl (which is zero)*/
1734 /* Shifts of 32 are encoded as 0, for those shifts that
1739 inst.instruction |= (num << 7) | shft->value;
1744 inst.reloc.type = BFD_RELOC_ARM_SHIFT_IMM;
1745 inst.reloc.pc_rel = 0;
1746 inst.instruction |= shft->value;
1752 inst.error = unrestrict ? "shift requires register or #expression"
1753 : "shift requires #expression";
1759 inst.error = "Shift expression expected";
1763 /* Do those data_ops which can take a negative immediate constant */
1764 /* by altering the instuction. A bit of a hack really */
1768 by inverting the second operand, and
1771 by negating the second operand.
1774 negate_data_op (instruction, value)
1775 unsigned long *instruction;
1776 unsigned long value;
1779 unsigned long negated, inverted;
1781 negated = validate_immediate (-value);
1782 inverted = validate_immediate (~value);
1784 op = (*instruction >> DATA_OP_SHIFT) & 0xf;
1788 case OPCODE_SUB: /* ADD <-> SUB */
1789 new_inst = OPCODE_ADD;
1794 new_inst = OPCODE_SUB;
1798 case OPCODE_CMP: /* CMP <-> CMN */
1799 new_inst = OPCODE_CMN;
1804 new_inst = OPCODE_CMP;
1808 /* Now Inverted ops */
1809 case OPCODE_MOV: /* MOV <-> MVN */
1810 new_inst = OPCODE_MVN;
1815 new_inst = OPCODE_MOV;
1819 case OPCODE_AND: /* AND <-> BIC */
1820 new_inst = OPCODE_BIC;
1825 new_inst = OPCODE_AND;
1829 case OPCODE_ADC: /* ADC <-> SBC */
1830 new_inst = OPCODE_SBC;
1835 new_inst = OPCODE_ADC;
1839 /* We cannot do anything */
1847 *instruction &= OPCODE_MASK;
1848 *instruction |= new_inst << DATA_OP_SHIFT;
1859 while (**str == ' ')
1862 if (reg_required_here (str, 0) != FAIL)
1864 if (skip_past_comma (str) == SUCCESS)
1866 /* Shift operation on register */
1867 return decode_shift (str, NO_SHIFT_RESTRICT);
1873 /* Immediate expression */
1874 if (*((*str)++) == '#')
1877 if (my_get_expression (&inst.reloc.exp, str))
1880 if (inst.reloc.exp.X_add_symbol)
1882 inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
1883 inst.reloc.pc_rel = 0;
1887 if (skip_past_comma (str) == SUCCESS)
1889 /* #x, y -- ie explicit rotation by Y */
1890 if (my_get_expression (&expr, str))
1893 if (expr.X_op != O_constant)
1895 inst.error = "Constant expression expected";
1899 /* Rotate must be a multiple of 2 */
1900 if (((unsigned) expr.X_add_number) > 30
1901 || (expr.X_add_number & 1) != 0
1902 || ((unsigned) inst.reloc.exp.X_add_number) > 255)
1904 inst.error = "Invalid constant";
1907 inst.instruction |= INST_IMMEDIATE;
1908 inst.instruction |= inst.reloc.exp.X_add_number;
1909 inst.instruction |= expr.X_add_number << 7;
1913 /* Implicit rotation, select a suitable one */
1914 value = validate_immediate (inst.reloc.exp.X_add_number);
1918 /* Can't be done, perhaps the code reads something like
1919 "add Rd, Rn, #-n", where "sub Rd, Rn, #n" would be ok */
1920 if ((value = negate_data_op (&inst.instruction,
1921 inst.reloc.exp.X_add_number))
1924 inst.error = "Invalid constant";
1929 inst.instruction |= value;
1932 inst.instruction |= INST_IMMEDIATE;
1936 inst.error = "Register or shift expression expected";
1944 unsigned long flags;
1946 while (**str == ' ')
1949 if (fp_reg_required_here (str, 0) != FAIL)
1953 /* Immediate expression */
1954 if (*((*str)++) == '#')
1959 while (**str == ' ')
1962 /* First try and match exact strings, this is to guarantee that
1963 some formats will work even for cross assembly */
1965 for (i = 0; fp_const[i]; i++)
1967 if (strncmp (*str, fp_const[i], strlen (fp_const[i])) == 0)
1971 *str += strlen (fp_const[i]);
1972 if (is_end_of_line[(int)**str] || **str == '\0')
1974 inst.instruction |= i + 8;
1981 /* Just because we didn't get a match doesn't mean that the
1982 constant isn't valid, just that it is in a format that we
1983 don't automatically recognize. Try parsing it with
1984 the standard expression routines. */
1985 if ((i = my_get_float_expression (str)) >= 0)
1987 inst.instruction |= i + 8;
1991 inst.error = "Invalid floating point immediate expression";
1994 inst.error = "Floating point register or immediate expression expected";
2000 do_arit (str, flags)
2002 unsigned long flags;
2007 if (reg_required_here (&str, 12) == FAIL
2008 || skip_past_comma (&str) == FAIL
2009 || reg_required_here (&str, 16) == FAIL
2010 || skip_past_comma (&str) == FAIL
2011 || data_op2 (&str) == FAIL)
2014 inst.error = bad_args;
2018 inst.instruction |= flags;
2026 unsigned long flags;
2028 /* This is a pseudo-op of the form "adr rd, label" to be converted into
2029 a relative address of the form add rd, pc, #label-.-8 */
2034 if (reg_required_here (&str, 12) == FAIL
2035 || skip_past_comma (&str) == FAIL
2036 || my_get_expression (&inst.reloc.exp, &str))
2039 inst.error = bad_args;
2042 /* Frag hacking will turn this into a sub instruction if the offset turns
2043 out to be negative. */
2044 inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
2045 inst.reloc.exp.X_add_number -= 8; /* PC relative adjust */
2046 inst.reloc.pc_rel = 1;
2047 inst.instruction |= flags;
2055 unsigned long flags;
2060 if (reg_required_here (&str, 16) == FAIL)
2063 inst.error = bad_args;
2067 if (skip_past_comma (&str) == FAIL
2068 || data_op2 (&str) == FAIL)
2071 inst.error = bad_args;
2075 inst.instruction |= flags;
2076 if ((flags & 0x0000f000) == 0)
2077 inst.instruction |= 0x00100000;
2086 unsigned long flags;
2091 if (reg_required_here (&str, 12) == FAIL)
2094 inst.error = bad_args;
2098 if (skip_past_comma (&str) == FAIL
2099 || data_op2 (&str) == FAIL)
2102 inst.error = bad_args;
2106 inst.instruction |= flags;
2121 if (my_get_expression (&inst.reloc.exp, str))
2124 if (inst.reloc.exp.X_op == O_constant)
2126 int value = inst.reloc.exp.X_add_number;
2128 if (value < -4095 || value > 4095)
2130 inst.error = "address offset too large";
2140 inst.instruction |= add | value;
2144 inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
2145 inst.reloc.pc_rel = 0;
2150 add = 0; /* and fall through */
2152 (*str)++; /* and fall through */
2154 if (reg_required_here (str, 0) == FAIL)
2156 inst.error = "Register expected";
2159 inst.instruction |= add | OFFSET_REG;
2160 if (skip_past_comma (str) == SUCCESS)
2161 return decode_shift (str, SHIFT_RESTRICT);
2167 do_ldst (str, flags)
2169 unsigned long flags;
2178 if ((conflict_reg = reg_required_here (&str, 12)) == FAIL)
2181 inst.error = bad_args;
2185 if (skip_past_comma (&str) == FAIL)
2187 inst.error = "Address expected";
2199 if ((reg = reg_required_here (&str, 16)) == FAIL)
2201 inst.error = "Register required";
2205 conflict_reg = (((conflict_reg == reg)
2206 && (inst.instruction & 0x00100000))
2215 if (skip_past_comma (&str) == SUCCESS)
2217 /* [Rn],... (post inc) */
2218 if (ldst_extend (&str) == FAIL)
2221 as_warn ("destination register same as write-back base\n");
2232 if (skip_past_comma (&str) == FAIL)
2234 inst.error = "pre-indexed expression expected";
2239 if (ldst_extend (&str) == FAIL)
2247 inst.error = "missing ]";
2257 as_warn ("destination register same as write-back base\n");
2259 inst.instruction |= WRITE_BACK;
2263 else if (*str == '=')
2265 /* Parse an "ldr Rd, =expr" instruction; this is another pseudo op */
2271 if (my_get_expression (&inst.reloc.exp, &str))
2274 if (inst.reloc.exp.X_op != O_constant
2275 && inst.reloc.exp.X_op != O_symbol)
2277 inst.error = "Constant expression expected";
2281 if (inst.reloc.exp.X_op == O_constant
2282 && (value = validate_immediate(inst.reloc.exp.X_add_number)) != FAIL)
2284 /* This can be done with a mov instruction */
2285 inst.instruction &= LITERAL_MASK;
2286 inst.instruction |= INST_IMMEDIATE | (OPCODE_MOV << DATA_OP_SHIFT);
2287 inst.instruction |= (flags & COND_MASK) | (value & 0xfff);
2293 /* Insert into literal pool */
2294 if (add_to_lit_pool () == FAIL)
2297 inst.error = "literal pool insertion failed\n";
2301 /* Change the instruction exp to point to the pool */
2302 inst.reloc.type = BFD_RELOC_ARM_LITERAL;
2303 inst.reloc.pc_rel = 1;
2304 inst.instruction |= (REG_PC << 16);
2310 if (my_get_expression (&inst.reloc.exp, &str))
2313 inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM;
2314 inst.reloc.exp.X_add_number -= 8; /* PC rel adjust */
2315 inst.reloc.pc_rel = 1;
2316 inst.instruction |= (REG_PC << 16);
2320 if (pre_inc && (flags & TRANS_BIT))
2321 inst.error = "Pre-increment instruction with translate";
2323 inst.instruction |= flags | (pre_inc ? PRE_INDEX : 0);
2329 do_ldmstm (str, flags)
2331 unsigned long flags;
2338 if ((base_reg = reg_required_here (&str, 16)) == FAIL)
2341 inst.error = bad_args;
2345 if (base_reg == REG_PC)
2347 inst.error = "r15 not allowed as base register";
2355 flags |= WRITE_BACK;
2359 if (skip_past_comma (&str) == FAIL)
2361 inst.error = bad_args;
2365 /* We come back here if we get ranges concatenated by '+' or '|' */
2380 if ((reg = arm_reg_parse (&str)) == FAIL || !int_register (reg))
2382 inst.error = "Register expected";
2392 inst.error = "Bad range in register list";
2396 for (i = cur_reg + 1; i < reg; i++)
2398 if (flags & (1 << i))
2400 ("Warning: Duplicated register (r%d) in register list",
2408 if (flags & (1 << reg))
2409 as_tsktsk ("Warning: Duplicated register (r%d) in register list",
2411 else if (reg <= cur_reg)
2412 as_tsktsk ("Warning: Register range not in ascending order");
2416 } while (skip_past_comma (&str) != FAIL
2417 || (in_range = 1, *str++ == '-'));
2424 inst.error = "Missing `}'";
2432 if (my_get_expression (&expr, &str))
2435 if (expr.X_op == O_constant)
2437 if (expr.X_add_number
2438 != (expr.X_add_number & 0x0000ffff))
2440 inst.error = "invalid register mask";
2444 if ((flags & expr.X_add_number) != 0)
2446 int regno = flags & expr.X_add_number;
2449 regno = (1 << regno) - 1;
2450 as_tsktsk ("Warning: Duplicated register (r%d) in register list",
2454 flags |= expr.X_add_number;
2458 if (inst.reloc.type != 0)
2460 inst.error = "expression too complex";
2464 memcpy (&inst.reloc.exp, &expr, sizeof (expressionS));
2465 inst.reloc.type = BFD_RELOC_ARM_MULTI;
2466 inst.reloc.pc_rel = 0;
2473 if (*str == '|' || *str == '+')
2482 flags |= MULTI_SET_PSR;
2484 inst.instruction |= flags;
2492 unsigned long flags;
2494 /* Allow optional leading '#'. */
2500 if (my_get_expression (&inst.reloc.exp, &str))
2503 inst.reloc.type = BFD_RELOC_ARM_SWI;
2504 inst.reloc.pc_rel = 0;
2505 inst.instruction |= flags;
2511 do_swap (str, flags)
2513 unsigned long flags;
2520 if ((reg = reg_required_here (&str, 12)) == FAIL)
2525 inst.error = "r15 not allowed in swap";
2529 if (skip_past_comma (&str) == FAIL
2530 || (reg = reg_required_here (&str, 0)) == FAIL)
2533 inst.error = bad_args;
2539 inst.error = "r15 not allowed in swap";
2543 if (skip_past_comma (&str) == FAIL
2546 inst.error = bad_args;
2553 if ((reg = reg_required_here (&str, 16)) == FAIL)
2558 inst.error = bad_pc;
2567 inst.error = "missing ]";
2571 inst.instruction |= flags;
2577 do_branch (str, flags)
2579 unsigned long flags;
2581 if (my_get_expression (&inst.reloc.exp, &str))
2583 inst.reloc.type = BFD_RELOC_ARM_PCREL_BRANCH;
2584 inst.reloc.pc_rel = 1;
2585 inst.instruction |= flags | 0x00fffffe; /* PC-rel adjust */
2593 unsigned long flags;
2595 /* Co-processor data operation.
2596 Format: CDP{cond} CP#,<expr>,CRd,CRn,CRm{,<expr>} */
2600 if (co_proc_number (&str) == FAIL)
2603 inst.error = bad_args;
2607 if (skip_past_comma (&str) == FAIL
2608 || cp_opc_expr (&str, 20,4) == FAIL)
2611 inst.error = bad_args;
2615 if (skip_past_comma (&str) == FAIL
2616 || cp_reg_required_here (&str, 12) == FAIL)
2619 inst.error = bad_args;
2623 if (skip_past_comma (&str) == FAIL
2624 || cp_reg_required_here (&str, 16) == FAIL)
2627 inst.error = bad_args;
2631 if (skip_past_comma (&str) == FAIL
2632 || cp_reg_required_here (&str, 0) == FAIL)
2635 inst.error = bad_args;
2639 if (skip_past_comma (&str) == SUCCESS)
2641 if (cp_opc_expr (&str, 5, 3) == FAIL)
2644 inst.error = bad_args;
2654 do_lstc (str, flags)
2656 unsigned long flags;
2658 /* Co-processor register load/store.
2659 Format: <LDC|STC{cond}[L] CP#,CRd,<address> */
2664 if (co_proc_number (&str) == FAIL)
2667 inst.error = bad_args;
2671 if (skip_past_comma (&str) == FAIL
2672 || cp_reg_required_here (&str, 12) == FAIL)
2675 inst.error = bad_args;
2679 if (skip_past_comma (&str) == FAIL
2680 || cp_address_required_here (&str) == FAIL)
2683 inst.error = bad_args;
2687 inst.instruction |= flags;
2693 do_co_reg (str, flags)
2695 unsigned long flags;
2697 /* Co-processor register transfer.
2698 Format: <MCR|MRC>{cond} CP#,<expr1>,Rd,CRn,CRm{,<expr2>} */
2703 if (co_proc_number (&str) == FAIL)
2706 inst.error = bad_args;
2710 if (skip_past_comma (&str) == FAIL
2711 || cp_opc_expr (&str, 21, 3) == FAIL)
2714 inst.error = bad_args;
2718 if (skip_past_comma (&str) == FAIL
2719 || reg_required_here (&str, 12) == FAIL)
2722 inst.error = bad_args;
2726 if (skip_past_comma (&str) == FAIL
2727 || cp_reg_required_here (&str, 16) == FAIL)
2730 inst.error = bad_args;
2734 if (skip_past_comma (&str) == FAIL
2735 || cp_reg_required_here (&str, 0) == FAIL)
2738 inst.error = bad_args;
2742 if (skip_past_comma (&str) == SUCCESS)
2744 if (cp_opc_expr (&str, 5, 3) == FAIL)
2747 inst.error = bad_args;
2757 do_fp_ctrl (str, flags)
2759 unsigned long flags;
2761 /* FP control registers.
2762 Format: <WFS|RFS|WFC|RFC>{cond} Rn */
2767 if (reg_required_here (&str, 12) == FAIL)
2770 inst.error = bad_args;
2779 do_fp_ldst (str, flags)
2781 unsigned long flags;
2786 switch (inst.suffix)
2791 inst.instruction |= CP_T_X;
2794 inst.instruction |= CP_T_Y;
2797 inst.instruction |= CP_T_X | CP_T_Y;
2803 if (fp_reg_required_here (&str, 12) == FAIL)
2806 inst.error = bad_args;
2810 if (skip_past_comma (&str) == FAIL
2811 || cp_address_required_here (&str) == FAIL)
2814 inst.error = bad_args;
2822 do_fp_ldmstm (str, flags)
2824 unsigned long flags;
2831 if (fp_reg_required_here (&str, 12) == FAIL)
2834 inst.error = bad_args;
2838 /* Get Number of registers to transfer */
2839 if (skip_past_comma (&str) == FAIL
2840 || my_get_expression (&inst.reloc.exp, &str))
2843 inst.error = "constant expression expected";
2847 if (inst.reloc.exp.X_op != O_constant)
2849 inst.error = "Constant value required for number of registers";
2853 num_regs = inst.reloc.exp.X_add_number;
2855 if (num_regs < 1 || num_regs > 4)
2857 inst.error = "number of registers must be in the range [1:4]";
2864 inst.instruction |= CP_T_X;
2867 inst.instruction |= CP_T_Y;
2870 inst.instruction |= CP_T_Y | CP_T_X;
2884 /* The instruction specified "ea" or "fd", so we can only accept
2885 [Rn]{!}. The instruction does not really support stacking or
2886 unstacking, so we have to emulate these by setting appropriate
2887 bits and offsets. */
2888 if (skip_past_comma (&str) == FAIL
2892 inst.error = bad_args;
2900 if ((reg = reg_required_here (&str, 16)) == FAIL)
2902 inst.error = "Register required";
2911 inst.error = bad_args;
2922 inst.error = "R15 not allowed as base register with write-back";
2929 if (flags & CP_T_Pre)
2932 offset = 3 * num_regs;
2938 /* Post-increment */
2942 offset = 3 * num_regs;
2946 /* No write-back, so convert this into a standard pre-increment
2947 instruction -- aesthetically more pleasing. */
2948 flags = CP_T_Pre | CP_T_UD;
2953 inst.instruction |= flags | offset;
2955 else if (skip_past_comma (&str) == FAIL
2956 || cp_address_required_here (&str) == FAIL)
2959 inst.error = bad_args;
2967 do_fp_dyadic (str, flags)
2969 unsigned long flags;
2974 switch (inst.suffix)
2979 inst.instruction |= 0x00000080;
2982 inst.instruction |= 0x00080000;
2988 if (fp_reg_required_here (&str, 12) == FAIL)
2991 inst.error = bad_args;
2995 if (skip_past_comma (&str) == FAIL
2996 || fp_reg_required_here (&str, 16) == FAIL)
2999 inst.error = bad_args;
3003 if (skip_past_comma (&str) == FAIL
3004 || fp_op2 (&str) == FAIL)
3007 inst.error = bad_args;
3011 inst.instruction |= flags;
3017 do_fp_monadic (str, flags)
3019 unsigned long flags;
3024 switch (inst.suffix)
3029 inst.instruction |= 0x00000080;
3032 inst.instruction |= 0x00080000;
3038 if (fp_reg_required_here (&str, 12) == FAIL)
3041 inst.error = bad_args;
3045 if (skip_past_comma (&str) == FAIL
3046 || fp_op2 (&str) == FAIL)
3049 inst.error = bad_args;
3053 inst.instruction |= flags;
3059 do_fp_cmp (str, flags)
3061 unsigned long flags;
3066 if (fp_reg_required_here (&str, 16) == FAIL)
3069 inst.error = bad_args;
3073 if (skip_past_comma (&str) == FAIL
3074 || fp_op2 (&str) == FAIL)
3077 inst.error = bad_args;
3081 inst.instruction |= flags;
3087 do_fp_from_reg (str, flags)
3089 unsigned long flags;
3094 switch (inst.suffix)
3099 inst.instruction |= 0x00000080;
3102 inst.instruction |= 0x00080000;
3108 if (fp_reg_required_here (&str, 16) == FAIL)
3111 inst.error = bad_args;
3115 if (skip_past_comma (&str) == FAIL
3116 || reg_required_here (&str, 12) == FAIL)
3119 inst.error = bad_args;
3123 inst.instruction |= flags;
3129 do_fp_to_reg (str, flags)
3131 unsigned long flags;
3136 if (reg_required_here (&str, 12) == FAIL)
3139 inst.error = bad_args;
3143 if (skip_past_comma (&str) == FAIL
3144 || fp_reg_required_here (&str, 0) == FAIL)
3147 inst.error = bad_args;
3151 inst.instruction |= flags;
3160 int len = strlen (reg_table[entry].name) + 2;
3161 char *buf = (char *) xmalloc (len);
3162 char *buf2 = (char *) xmalloc (len);
3165 #ifdef REGISTER_PREFIX
3166 buf[i++] = REGISTER_PREFIX;
3169 strcpy (buf + i, reg_table[entry].name);
3171 for (i = 0; buf[i]; i++)
3172 buf2[i] = islower (buf[i]) ? toupper (buf[i]) : buf[i];
3176 hash_insert (arm_reg_hsh, buf, (PTR) ®_table[entry]);
3177 hash_insert (arm_reg_hsh, buf2, (PTR) ®_table[entry]);
3181 insert_reg_alias (str, regnum)
3185 struct reg_entry *new =
3186 (struct reg_entry *)xmalloc (sizeof (struct reg_entry));
3187 char *name = xmalloc (strlen (str) + 1);
3191 new->number = regnum;
3193 hash_insert (arm_reg_hsh, name, (PTR) new);
3197 set_constant_flonums ()
3201 for (i = 0; i < NUM_FLOAT_VALS; i++)
3202 if (atof_ieee ((char *)fp_const[i], 'x', fp_values[i]) == NULL)
3211 if ((arm_ops_hsh = hash_new ()) == NULL
3212 || (arm_cond_hsh = hash_new ()) == NULL
3213 || (arm_shift_hsh = hash_new ()) == NULL
3214 || (arm_reg_hsh = hash_new ()) == NULL
3215 || (arm_psr_hsh = hash_new ()) == NULL)
3216 as_fatal ("Virtual memory exhausted");
3218 for (i = 0; i < sizeof (insns) / sizeof (struct asm_opcode); i++)
3219 hash_insert (arm_ops_hsh, insns[i].template, (PTR) (insns + i));
3220 for (i = 0; i < sizeof (conds) / sizeof (struct asm_cond); i++)
3221 hash_insert (arm_cond_hsh, conds[i].template, (PTR) (conds + i));
3222 for (i = 0; i < sizeof (shift) / sizeof (struct asm_shift); i++)
3223 hash_insert (arm_shift_hsh, shift[i].template, (PTR) (shift + i));
3224 for (i = 0; i < sizeof (psrs) / sizeof (struct asm_psr); i++)
3225 hash_insert (arm_psr_hsh, psrs[i].template, (PTR) (psrs + i));
3227 for (i = 0; reg_table[i].name; i++)
3230 set_constant_flonums ();
3233 /* This funciton is called once, before the assembler exits. It is
3234 supposed to do any final cleanup for this part of the assembler.
3241 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
3242 for use in the a.out file, and stores them in the array pointed to by buf.
3243 This knows about the endian-ness of the target machine and does
3244 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
3245 2 (short) and 4 (long) Floating numbers are put out as a series of
3246 LITTLENUMS (shorts, here at least)
3249 md_number_to_chars (buf, val, n)
3254 if (target_big_endian)
3255 number_to_chars_bigendian (buf, val, n);
3257 number_to_chars_littleendian (buf, val, n);
3261 md_chars_to_number (buf, n)
3266 unsigned char *where = (unsigned char *) buf;
3268 if (target_big_endian)
3273 result |= (*where++ & 255);
3281 result |= (where[n] & 255);
3289 This is identical to the md_atof in m68k.c. I think this is right,
3292 Turn a string in input_line_pointer into a floating point constant of type
3293 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
3294 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
3297 md_atof (type, litP, sizeP)
3303 LITTLENUM_TYPE words[MAX_LITTLENUMS];
3304 LITTLENUM_TYPE *wordP;
3337 return "Bad call to MD_ATOF()";
3339 t = atof_ieee (input_line_pointer, type, words);
3341 input_line_pointer = t;
3342 *sizeP = prec * sizeof (LITTLENUM_TYPE);
3343 for (wordP = words; prec--;)
3345 fprintf (stderr, "%02x 02x ", ((*wordP) >> 8) & 255, (*wordP) & 255);
3346 md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE));
3347 litP += sizeof (LITTLENUM_TYPE);
3349 fprintf (stderr, "\n");
3353 /* We have already put the pipeline compensation in the instruction */
3356 md_pcrel_from (fixP)
3359 if (fixP->fx_addsy && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section
3360 && fixP->fx_subsy == NULL)
3361 return 0; /* HACK */
3363 return fixP->fx_where + fixP->fx_frag->fr_address;
3366 /* Round up a section size to the appropriate boundary. */
3368 md_section_align (segment, size)
3372 /* Round all sects to multiple of 4 */
3373 return (size + 3) & ~3;
3376 /* We have no need to default values of symbols. */
3380 md_undefined_symbol (name)
3386 /* arm_reg_parse () := if it looks like a register, return its token and
3387 advance the pointer. */
3391 register char **ccp;
3396 struct reg_entry *reg;
3398 #ifdef REGISTER_PREFIX
3399 if (*start != REGISTER_PREFIX)
3404 #ifdef OPTIONAL_REGISTER_PREFIX
3405 if (*p == OPTIONAL_REGISTER_PREFIX)
3409 if (!isalpha (*p) || !is_name_beginner (*p))
3413 while (isalpha (c) || isdigit (c) || c == '_')
3417 reg = (struct reg_entry *) hash_find (arm_reg_hsh, start);
3431 register char **ccp;
3435 CONST struct asm_psr *psr;
3439 while (isalpha (c) || c == '_')
3443 psr = (CONST struct asm_psr *) hash_find (arm_psr_hsh, start);
3456 md_apply_fix (fixP, val)
3460 offsetT value = *val;
3461 offsetT newval, temp;
3463 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3465 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
3467 fixP->fx_addnumber = value; /* Remember value for emit_reloc */
3469 /* Note whether this will delete the relocation. */
3470 if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
3473 switch (fixP->fx_r_type)
3475 case BFD_RELOC_ARM_IMMEDIATE:
3476 newval = validate_immediate (value);
3477 temp = md_chars_to_number (buf, INSN_SIZE);
3479 /* If the instruction will fail, see if we can fix things up by
3480 changing the opcode. */
3482 && (newval = negate_data_op (&temp, value)) == FAIL)
3484 as_bad_where (fixP->fx_file, fixP->fx_line,
3485 "invalid constant after fixup\n");
3489 newval |= (temp & 0xfffff000);
3490 md_number_to_chars (buf, newval, INSN_SIZE);
3493 case BFD_RELOC_ARM_OFFSET_IMM:
3495 value = validate_offset_imm (value); /* Should be OK ... but .... */
3499 newval = md_chars_to_number (buf, INSN_SIZE);
3500 newval &= 0xff7ff000;
3501 newval |= value | (sign ? 0x00800000 : 0);
3502 md_number_to_chars (buf, newval, INSN_SIZE);
3505 case BFD_RELOC_ARM_LITERAL:
3510 if ((value = validate_immediate (value)) == FAIL)
3512 as_bad_where (fixP->fx_file, fixP->fx_line,
3513 "invalid literal constant: pool needs to be closer\n");
3517 newval = md_chars_to_number (buf, INSN_SIZE);
3518 newval &= 0xff7ff000;
3519 newval |= value | (sign ? 0x00800000 : 0);
3520 md_number_to_chars (buf, newval, INSN_SIZE);
3523 case BFD_RELOC_ARM_SHIFT_IMM:
3524 newval = md_chars_to_number (buf, INSN_SIZE);
3525 if (((unsigned long) value) > 32
3527 && (((newval & 0x60) == 0) || (newval & 0x60) == 0x60)))
3529 as_bad_where (fixP->fx_file, fixP->fx_line,
3530 "shift expression is too large");
3535 newval &= ~0x60; /* Shifts of zero must be done as lsl */
3536 else if (value == 32)
3538 newval &= 0xfffff07f;
3539 newval |= (value & 0x1f) << 7;
3540 md_number_to_chars (buf, newval , INSN_SIZE);
3543 case BFD_RELOC_ARM_SWI:
3544 if (((unsigned long) value) > 0x00ffffff)
3545 as_bad_where (fixP->fx_file, fixP->fx_line, "Invalid swi expression");
3546 newval = md_chars_to_number (buf, INSN_SIZE) & 0xff000000;
3548 md_number_to_chars (buf, newval , INSN_SIZE);
3551 case BFD_RELOC_ARM_MULTI:
3552 if (((unsigned long) value) > 0xffff)
3553 as_bad_where (fixP->fx_file, fixP->fx_line,
3554 "Invalid expression in load/store multiple");
3555 newval = value | md_chars_to_number (buf, INSN_SIZE);
3556 md_number_to_chars (buf, newval, INSN_SIZE);
3559 case BFD_RELOC_ARM_PCREL_BRANCH:
3560 value = (value >> 2) & 0x00ffffff;
3561 newval = md_chars_to_number (buf, INSN_SIZE);
3562 value = (value + (newval & 0x00ffffff)) & 0x00ffffff;
3563 newval = value | (newval & 0xff000000);
3564 md_number_to_chars (buf, newval, INSN_SIZE);
3568 if (fixP->fx_done || fixP->fx_pcrel)
3569 md_number_to_chars (buf, value, 1);
3573 if (fixP->fx_done || fixP->fx_pcrel)
3574 md_number_to_chars (buf, value, 2);
3578 if (fixP->fx_done || fixP->fx_pcrel)
3579 md_number_to_chars (buf, value, 4);
3582 case BFD_RELOC_ARM_CP_OFF_IMM:
3584 if (value < -1023 || value > 1023 || (value & 3))
3585 as_bad_where (fixP->fx_file, fixP->fx_line,
3586 "Illegal value for co-processor offset");
3589 newval = md_chars_to_number (buf, INSN_SIZE) & 0xff7fff00;
3590 newval |= (value >> 2) | (sign ? 0x00800000 : 0);
3591 md_number_to_chars (buf, newval , INSN_SIZE);
3594 case BFD_RELOC_NONE:
3596 as_bad_where (fixP->fx_file, fixP->fx_line,
3597 "Bad relocation fixup type (%d)\n", fixP->fx_r_type);
3603 /* Translate internal representation of relocation info to BFD target
3606 tc_gen_reloc (section, fixp)
3611 bfd_reloc_code_real_type code;
3613 reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
3614 assert (reloc != 0);
3616 reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
3617 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
3619 /* @@ Why fx_addnumber sometimes and fx_offset other times? */
3620 if (fixp->fx_pcrel == 0)
3621 reloc->addend = fixp->fx_offset;
3623 reloc->addend = fixp->fx_offset = reloc->address;
3625 /* @@ Why fx_addnumber sometimes and fx_offset other times? */
3626 if (fixp->fx_pcrel == 0)
3627 reloc->addend = fixp->fx_offset;
3629 reloc->addend = fixp->fx_offset = reloc->address;
3631 switch (fixp->fx_r_type)
3636 code = BFD_RELOC_8_PCREL;
3643 code = BFD_RELOC_16_PCREL;
3650 code = BFD_RELOC_32_PCREL;
3654 case BFD_RELOC_ARM_PCREL_BRANCH:
3655 code = fixp->fx_r_type;
3658 case BFD_RELOC_ARM_LITERAL:
3659 /* If this is called then the a literal has been referenced across
3660 a section boundry - possibly due to an implicit dump */
3661 as_bad ("Literal referenced across section boundry (Implicit dump?)");
3664 case BFD_RELOC_ARM_IMMEDIATE:
3665 as_bad ("Internal_relocation (type %d) not fixed up (IMMEDIATE)"
3669 case BFD_RELOC_ARM_OFFSET_IMM:
3670 as_bad ("Internal_relocation (type %d) not fixed up (OFFSET_IMM)"
3674 case BFD_RELOC_ARM_SHIFT_IMM:
3675 as_bad ("Internal_relocation (type %d) not fixed up (SHIFT_IMM)"
3679 case BFD_RELOC_ARM_SWI:
3680 as_bad ("Internal_relocation (type %d) not fixed up (SWI)"
3684 case BFD_RELOC_ARM_MULTI:
3685 as_bad ("Internal_relocation (type %d) not fixed up (MULTI)"
3689 case BFD_RELOC_ARM_CP_OFF_IMM:
3690 as_bad ("Internal_relocation (type %d) not fixed up (CP_OFF_IMM)"
3698 reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
3699 assert (reloc->howto != 0);
3704 CONST int md_short_jump_size = 4;
3705 CONST int md_long_jump_size = 4;
3707 /* These should never be called on the arm */
3709 md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
3711 addressT from_addr, to_addr;
3715 as_fatal ("md_create_long_jump\n");
3719 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
3721 addressT from_addr, to_addr;
3725 as_fatal ("md_create_short_jump\n");
3729 md_estimate_size_before_relax (fragP, segtype)
3733 as_fatal ("md_estimate_size_before_relax\n");
3745 as_bad ("%s -- statement `%s'\n", inst.error, str);
3749 to = frag_more (INSN_SIZE);
3750 md_number_to_chars (to, inst.instruction, INSN_SIZE);
3752 if (inst.reloc.type != BFD_RELOC_NONE)
3753 fix_new_arm (frag_now, to - frag_now->fr_literal,
3754 4, &inst.reloc.exp, inst.reloc.pc_rel,
3765 CONST struct asm_opcode *opcode;
3766 char *p, *q, *start;
3768 /* Align the instruction */
3769 /* this may not be the right thing to do but ... */
3770 /* arm_align (2, 0); */
3771 listing_prev_line (); /* Defined in listing.h */
3773 /* Align the previous label if needed */
3774 if (last_label_seen != NULL)
3776 last_label_seen->sy_frag = frag_now;
3777 S_SET_VALUE (last_label_seen,
3778 (valueT) ((char *) obstack_next_free (&frags)
3779 - frag_now->fr_literal));
3780 S_SET_SEGMENT (last_label_seen, now_seg);
3783 memset (&inst, '\0', sizeof (inst));
3784 inst.reloc.type = BFD_RELOC_NONE;
3787 str++; /* Skip leading white space */
3789 /* scan up to the end of the op-code, which must end in white space or
3791 for (start = p = str; *p != '\0'; p++)
3797 as_bad ("No operator -- statement `%s'\n", str);
3801 /* p now points to the end of the opcode, probably white space, but we have
3802 to break the opcode up in case it contains condionals and flags;
3803 keep trying with progressively smaller basic instructions until one
3804 matches, or we run out of opcode. */
3805 q = (p - str > LONGEST_INST) ? str + LONGEST_INST : p;
3806 for (; q != str; q--)
3810 opcode = (CONST struct asm_opcode *) hash_find (arm_ops_hsh, str);
3812 if (opcode && opcode->template)
3814 unsigned long flag_bits = 0;
3817 /* Check that this instruction is supported for this CPU */
3818 if ((opcode->variants & cpu_variant) == 0)
3821 inst.instruction = opcode->value;
3822 if (q == p) /* Just a simple opcode */
3824 if (opcode->comp_suffix != 0)
3825 as_bad ("Opcode `%s' must have suffix from <%s>\n", str,
3826 opcode->comp_suffix);
3829 inst.instruction |= COND_ALWAYS;
3830 (*opcode->parms)(q, 0);
3832 output_inst (start);
3836 /* Now check for a conditional */
3840 CONST struct asm_cond *cond;
3844 cond = (CONST struct asm_cond *) hash_find (arm_cond_hsh, r);
3848 if (cond->value == 0xf0000000)
3850 ("Warning: Use of the 'nv' conditional is deprecated\n");
3852 inst.instruction |= cond->value;
3856 inst.instruction |= COND_ALWAYS;
3859 inst.instruction |= COND_ALWAYS;
3861 /* if there is a compulsory suffix, it should come here, before
3862 any optional flags. */
3863 if (opcode->comp_suffix)
3865 CONST char *s = opcode->comp_suffix;
3877 as_bad ("Opcode `%s' must have suffix from <%s>\n", str,
3878 opcode->comp_suffix);
3885 /* The remainder, if any should now be flags for the instruction;
3886 Scan these checking each one found with the opcode. */
3890 CONST struct asm_flg *flag = opcode->flags;
3899 for (flagno = 0; flag[flagno].template; flagno++)
3901 if (! strcmp (r, flag[flagno].template))
3903 flag_bits |= flag[flagno].set_bits;
3909 if (! flag[flagno].template)
3916 (*opcode->parms) (p, flag_bits);
3917 output_inst (start);
3924 /* It wasn't an instruction, but it might be a register alias of the form
3934 if (*q && !strncmp (q, ".req ", 4))
3937 if ((reg = arm_reg_parse (&str)) == FAIL)
3945 for (r = q; *r != '\0'; r++)
3955 regnum = arm_reg_parse (&q);
3959 insert_reg_alias (str, regnum);
3973 as_bad ("bad instruction `%s'", start);
3978 * Invocation line includes a switch not recognized by the base assembler.
3979 * See if it's a processor-specific option. These are:
3980 * Cpu variants, the arm part is optional:
3981 * -m[arm]1 Currently not supported.
3982 * -m[arm]2, -m[arm]250 Arm 2 and Arm 250 processor
3983 * -m[arm]3 Arm 3 processor
3984 * -m[arm]6, -m[arm]7 Arm 6 and 7 processors
3985 * -m[arm]7dm Arm 7dm processors
3986 * -mall All (except the ARM1)
3988 * -mfpa10, -mfpa11 FPA10 and 11 co-processor instructions
3989 * -mfpe-old (No float load/store multiples)
3990 * -mno-fpu Disable all floating point instructions
3991 * Run-time endian selection:
3992 * -EB big endian cpu
3993 * -EL little endian cpu
3996 CONST char *md_shortopts = "m:";
3997 struct option md_longopts[] = {
3998 #ifdef ARM_BI_ENDIAN
3999 #define OPTION_EB (OPTION_MD_BASE + 0)
4000 {"EB", no_argument, NULL, OPTION_EB},
4001 #define OPTION_EL (OPTION_MD_BASE + 1)
4002 {"EL", no_argument, NULL, OPTION_EL},
4004 {NULL, no_argument, NULL, 0}
4006 size_t md_longopts_size = sizeof(md_longopts);
4009 md_parse_option (c, arg)
4017 #ifdef ARM_BI_ENDIAN
4019 target_big_endian = 1;
4022 target_big_endian = 0;
4030 if (! strcmp (str, "fpa10"))
4031 cpu_variant = (cpu_variant & ~FPU_ALL) | FPU_FPA10;
4032 else if (! strcmp (str, "fpa11"))
4033 cpu_variant = (cpu_variant & ~FPU_ALL) | FPU_FPA11;
4034 else if (! strcmp (str, "fpe-old"))
4035 cpu_variant = (cpu_variant & ~FPU_ALL) | FPU_CORE;
4041 if (! strcmp (str, "no-fpu"))
4042 cpu_variant &= ~FPU_ALL;
4046 if (! strcmp (str, "all"))
4048 cpu_variant = ARM_ALL | FPU_ALL;
4052 /* Strip off optional "arm" */
4053 if (! strncmp (str, "arm", 3))
4059 if (! strcmp (str, "1"))
4060 cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_1;
4066 if (! strcmp (str, "2"))
4067 cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_2;
4068 else if (! strcmp (str, "250"))
4069 cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_250;
4075 if (! strcmp (str, "3"))
4076 cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_3;
4082 if (! strcmp (str, "6"))
4083 cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_6;
4089 if (! strcmp (str, "7"))
4090 cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7;
4091 else if (! strcmp (str, "7dm"))
4092 cpu_variant = (cpu_variant & ~ARM_ANY) | ARM_7DM;
4099 as_bad ("Invalid architecture -m%s", arg);
4117 "-m[arm]1, -m[arm]2, -m[arm]250,\n-m[arm]3, -m[arm]6, -m[arm]7, -m[arm]7dm\n\
4118 \t\t\tselect processor architecture\n\
4119 -mall\t\t\tallow any instruction\n\
4120 -mfpa10, -mfpa11\tselect floating point architecture\n\
4121 -mfpe-old\t\tdon't allow floating-point multiple instructions\n\
4122 -mno-fpu\t\tdon't allow any floating-point instructions.\n");
4123 #ifdef ARM_BI_ENDIAN
4125 "-EB\t\t\tassemble code for a big endian cpu\n\
4126 -EL\t\t\tassemble code for a little endian cpu\n");
4130 /* We need to be able to fix up arbitrary expressions in some statements.
4131 This is so that we can handle symbols that are an arbitrary distance from
4132 the pc. The most common cases are of the form ((+/-sym -/+ . - 8) & mask),
4133 which returns part of an address in a form which will be valid for
4134 a data instruction. We do this by pushing the expression into a symbol
4135 in the expr_section, and creating a fix for that. */
4138 fix_new_arm (frag, where, size, exp, pc_rel, reloc)
4154 new_fix = fix_new_exp (frag, where, size, exp, pc_rel, reloc);
4162 /* FIXME: This should be something which decode_local_label_name
4164 fake = FAKE_LABEL_NAME;
4166 /* Putting constant symbols in absolute_section rather than
4167 expr_section is convenient for the old a.out code, for which
4168 S_GET_SEGMENT does not always retrieve the value put in by
4170 symbolP = symbol_new (fake, expr_section, 0, &zero_address_frag);
4171 symbolP->sy_value = *exp;
4172 new_fix = fix_new (frag, where, size, symbolP, 0, pc_rel, reloc);
4180 /* A good place to do this, although this was probably not intended
4181 * for this kind of use. We need to dump the literal pool before
4182 * references are made to a null symbol pointer. */
4184 arm_after_pass_hook (ignore)
4187 if (current_poolP != NULL)
4189 subseg_set (text_section, 0); /* Put it at the end of text section */
4191 listing_prev_line ();
4196 arm_start_line_hook ()
4198 last_label_seen = NULL;
4202 arm_frob_label (sym)
4205 last_label_seen = sym;