1 /* Print m68k instructions for objdump
2 Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
5 This file is part of the binutils.
7 The binutils are free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 1, or (at your option)
12 The binutils are distributed in the hope that they will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with the binutils; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 Revision 1.3 1991/10/11 11:22:00 gnu
24 Include bfd.h before sysdep.h, so ansidecl and PROTO() get defined first.
26 * Revision 1.2 1991/06/14 22:54:44 steve
27 * *** empty log message ***
29 * Revision 1.1.1.1 1991/03/21 21:26:46 gumby
30 * Back from Intel with Steve
32 * Revision 1.1 1991/03/21 21:26:45 gumby
35 * Revision 1.1 1991/03/13 00:34:06 chrisb
38 * Revision 1.4 1991/03/09 04:36:34 rich
40 * sparc-pinsn.c ostrip.c objdump.c m68k-pinsn.c i960-pinsn.c
43 * Pulled sysdep.h out of bfd.h.
45 * Revision 1.3 1991/03/08 21:54:45 rich
47 * Makefile ar.c binutils.h bucomm.c copy.c cplus-dem.c getopt.c
48 * i960-pinsn.c m68k-pinsn.c nm.c objdump.c sparc-opcode.h
49 * sparc-pinsn.c strip.c
51 * Verifying Portland tree with steve's last changes. Also, some partial
54 * Revision 1.2 1991/03/08 07:46:24 sac
55 * Added -l option to disassembly - prints line numbers too.
57 * Revision 1.1 1991/02/22 16:48:02 sac
64 #include "m68k-opcode.h"
67 extern void print_address();
69 /* 68k instructions are never longer than this many bytes. */
72 /* Number of elements in the opcode table. */
73 #define NOPCODES (sizeof m68k_opcodes / sizeof m68k_opcodes[0])
75 extern char *reg_names[];
76 char *fpcr_names[] = { "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
77 "fpiar/fpcr", "fpsr/fpcr", "fpiar-fpcr"};
79 char *reg_names[] = {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
80 static unsigned char *print_insn_arg ();
81 static unsigned char *print_indexed ();
82 static void print_base ();
83 static int fetch_arg ();
85 #define NEXTBYTE(p) (p += 2, ((char *)p)[-1])
88 (p += 2, ((((char *)p)[-2]) << 8) + p[-1])
91 (p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])
93 #define NEXTSINGLE(p) \
94 (p += 4, *((float *)(p - 4)))
96 #define NEXTDOUBLE(p) \
97 (p += 8, *((double *)(p - 8)))
99 #define NEXTEXTEND(p) \
100 (p += 12, 0.0) /* Need a function to convert from extended to double
103 #define NEXTPACKED(p) \
104 (p += 12, 0.0) /* Need a function to convert from packed to double
105 precision. Actually, it's easier to print a
106 packed number than a double anyway, so maybe
107 there should be a special case to handle this... */
109 /* Print the m68k instruction at address MEMADDR in debugged memory,
110 on STREAM. Returns length of the instruction, in bytes. */
113 print_insn_m68k(addr, buffer, stream)
115 unsigned char *buffer;
118 register unsigned int i;
119 register unsigned char *p;
121 register unsigned int bestmask;
128 for (i = 0; i < NOPCODES; i++)
130 register unsigned int opcode = m68k_opcodes[i].opcode;
131 register unsigned int match = m68k_opcodes[i].match;
132 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
133 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
134 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
135 && ((0xff & buffer[3] & match) == (0xff & opcode)))
137 /* Don't use for printout the variants of divul and divsl
138 that have the same register number in two places.
139 The more general variants will match instead. */
140 for (d = m68k_opcodes[i].args; *d; d += 2)
144 /* Don't use for printout the variants of most floating
145 point coprocessor instructions which use the same
146 register number in two places, as above. */
148 for (d = m68k_opcodes[i].args; *d; d += 2)
152 if (*d == 0 && match > bestmask)
160 /* Handle undefined instructions. */
163 fprintf (stream, "0%o", (unsigned) (buffer[0] << 8) + buffer[1]);
167 fprintf (stream, "%s", m68k_opcodes[best].name);
169 /* Point at first word of argument data,
170 and at descriptor for first argument. */
173 /* Why do this this way? -MelloN */
174 for (d = m68k_opcodes[best].args; *d; d += 2)
178 if (d[1] == 'l' && p - buffer < 6)
180 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
183 if (d[1] >= '1' && d[1] <= '3' && p - buffer < 4)
185 if (d[1] >= '4' && d[1] <= '6' && p - buffer < 6)
187 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
191 d = m68k_opcodes[best].args;
198 p = print_insn_arg (d, buffer, p, addr + p - buffer, stream);
200 if (*d && *(d - 2) != 'I' && *d != 'k')
206 static unsigned char *
207 print_insn_arg (d, buffer, p, addr, stream)
209 unsigned char *buffer;
210 register unsigned char *p;
211 bfd_vma addr; /* PC for this arg to be relative to */
215 register int place = d[1];
217 register char *regname;
218 register unsigned char *p1;
219 register double flval;
225 fprintf (stream, "ccr");
229 fprintf (stream, "sr");
233 fprintf (stream, "usp");
238 static struct { char *name; int value; } names[]
239 = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
240 {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
241 {"msp", 0x803}, {"isp", 0x804}};
243 val = fetch_arg (buffer, place, 12);
244 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
245 if (names[regno].value == val)
247 fprintf (stream, names[regno].name);
251 fprintf (stream, "%d", val);
256 val = fetch_arg (buffer, place, 3);
257 if (val == 0) val = 8;
258 fprintf (stream, "#%d", val);
262 val = fetch_arg (buffer, place, 8);
265 fprintf (stream, "#%d", val);
269 val = fetch_arg (buffer, place, 4);
270 fprintf (stream, "#%d", val);
274 fprintf (stream, "%s", reg_names[fetch_arg (buffer, place, 3)]);
278 fprintf (stream, "%s",
279 reg_names[fetch_arg (buffer, place, 3) + 010]);
283 fprintf (stream, "%s", reg_names[fetch_arg (buffer, place, 4)]);
287 fprintf (stream, "fp%d", fetch_arg (buffer, place, 3));
291 val = fetch_arg (buffer, place, 6);
293 fprintf (stream, "%s", reg_names [val & 7]);
295 fprintf (stream, "%d", val);
299 fprintf (stream, "%s@+",
300 reg_names[fetch_arg (buffer, place, 3) + 8]);
304 fprintf (stream, "%s@-",
305 reg_names[fetch_arg (buffer, place, 3) + 8]);
310 fprintf (stream, "{%s}", reg_names[fetch_arg (buffer, place, 3)]);
311 else if (place == 'C')
313 val = fetch_arg (buffer, place, 7);
314 if ( val > 63 ) /* This is a signed constant. */
316 fprintf (stream, "{#%d}", val);
319 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
325 p1 = buffer + (*d == '#' ? 2 : 4);
327 val = fetch_arg (buffer, place, 4);
328 else if (place == 'C')
329 val = fetch_arg (buffer, place, 7);
330 else if (place == '8')
331 val = fetch_arg (buffer, place, 3);
332 else if (place == '3')
333 val = fetch_arg (buffer, place, 8);
334 else if (place == 'b')
336 else if (place == 'w')
338 else if (place == 'l')
341 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
343 fprintf (stream, "#%d", val);
349 else if (place == 'w')
351 else if (place == 'l')
353 else if (place == 'g')
355 val = ((char *)buffer)[1];
361 else if (place == 'c')
363 if (buffer[1] & 0x40) /* If bit six is one, long offset */
369 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
371 print_address (addr + val, stream);
376 fprintf (stream, "%s@(%d)",
377 reg_names[fetch_arg (buffer, place, 3)], val);
381 fprintf (stream, "%s",
382 fpcr_names[fetch_arg (buffer, place, 3)]);
386 val = fetch_arg (buffer, 'd', 3); /* Get coprocessor ID... */
387 if (val != 1) /* Unusual coprocessor ID? */
388 fprintf (stream, "(cpid=%d) ", val);
390 p += 2; /* Skip coprocessor extended operands */
406 val = fetch_arg (buffer, 'x', 6);
407 val = ((val & 7) << 3) + ((val >> 3) & 7);
410 val = fetch_arg (buffer, 's', 6);
412 /* Get register number assuming address register. */
413 regno = (val & 7) + 8;
414 regname = reg_names[regno];
418 fprintf (stream, "%s", reg_names[val]);
422 fprintf (stream, "%s", regname);
426 fprintf (stream, "%s@", regname);
430 fprintf (stream, "%s@+", regname);
434 fprintf (stream, "%s@-", regname);
439 fprintf (stream, "%s@(%d)", regname, val);
443 p = print_indexed (regno, p, addr, stream);
451 fprintf (stream, "@#");
452 print_address (val, stream);
457 fprintf (stream, "@#");
458 print_address (val, stream);
463 print_address (addr + val, stream);
467 p = print_indexed (-1, p, addr, stream);
471 flt_p = 1; /* Assume it's a float... */
490 flval = NEXTSINGLE(p);
494 flval = NEXTDOUBLE(p);
498 flval = NEXTEXTEND(p);
502 flval = NEXTPACKED(p);
506 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
509 if ( flt_p ) /* Print a float? */
510 fprintf (stream, "#%g", flval);
512 fprintf (stream, "#%d", val);
516 fprintf (stream, "<invalid address mode 0%o>", (unsigned) val);
528 /* Move the pointer ahead if this point is farther ahead
533 fputs ("#0", stream);
538 register int newval = 0;
539 for (regno = 0; regno < 16; ++regno)
540 if (val & (0x8000 >> regno))
541 newval |= 1 << regno;
546 for (regno = 0; regno < 16; ++regno)
547 if (val & (1 << regno))
553 fprintf (stream, "%s", reg_names[regno]);
555 while (val & (1 << (regno + 1)))
557 if (regno > first_regno)
558 fprintf (stream, "-%s", reg_names[regno]);
561 else if (place == '3')
565 val = fetch_arg (buffer, place, 8);
568 fputs ("#0", stream);
573 register int newval = 0;
574 for (regno = 0; regno < 8; ++regno)
575 if (val & (0x80 >> regno))
576 newval |= 1 << regno;
581 for (regno = 0; regno < 8; ++regno)
582 if (val & (1 << regno))
588 fprintf (stream, "fp%d", regno);
590 while (val & (1 << (regno + 1)))
592 if (regno > first_regno)
593 fprintf (stream, "-fp%d", regno);
601 fprintf(stderr, "Invalid arg format in opcode table: \"%c\".", *d);
604 return (unsigned char *) p;
607 /* Fetch BITS bits from a position in the instruction specified by CODE.
608 CODE is a "place to put an argument", or 'x' for a destination
609 that is a general address (mode and register).
610 BUFFER contains the instruction. */
613 fetch_arg (buffer, code, bits)
614 unsigned char *buffer;
625 case 'd': /* Destination, for register or quick. */
626 val = (buffer[0] << 8) + buffer[1];
630 case 'x': /* Destination, for general arg */
631 val = (buffer[0] << 8) + buffer[1];
636 val = (buffer[3] >> 4);
644 val = (buffer[2] << 8) + buffer[3];
649 val = (buffer[2] << 8) + buffer[3];
655 val = (buffer[2] << 8) + buffer[3];
659 val = (buffer[4] << 8) + buffer[5];
664 val = (buffer[4] << 8) + buffer[5];
669 val = (buffer[4] << 8) + buffer[5];
673 val = (buffer[2] << 8) + buffer[3];
678 val = (buffer[2] << 8) + buffer[3];
708 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
709 P points to extension word, in buffer.
710 ADDR is the nominal core address of that extension word. */
712 static unsigned char *
713 print_indexed (basereg, p, addr, stream)
720 static char *scales[] = {"", "*2", "*4", "*8"};
721 register int base_disp;
722 register int outer_disp;
727 /* Generate the text for the index register.
728 Where this will be output is not yet determined. */
729 sprintf (buf, "[%s.%c%s]",
730 reg_names[(word >> 12) & 0xf],
731 (word & 0x800) ? 'l' : 'w',
732 scales[(word >> 9) & 3]);
734 /* Handle the 68000 style of indexing. */
736 if ((word & 0x100) == 0)
739 ((word & 0x80) ? word | 0xff00 : word & 0xff)
740 + ((basereg == -1) ? addr : 0),
746 /* Handle the generalized kind. */
747 /* First, compute the displacement to add to the base register. */
754 switch ((word >> 4) & 3)
757 base_disp = NEXTWORD (p);
760 base_disp = NEXTLONG (p);
765 /* Handle single-level case (not indirect) */
769 print_base (basereg, base_disp, stream);
774 /* Two level. Compute displacement to add after indirection. */
780 outer_disp = NEXTWORD (p);
783 outer_disp = NEXTLONG (p);
786 fprintf (stream, "%d(", outer_disp);
787 print_base (basereg, base_disp, stream);
789 /* If postindexed, print the closeparen before the index. */
791 fprintf (stream, ")%s", buf);
792 /* If preindexed, print the closeparen after the index. */
794 fprintf (stream, "%s)", buf);
799 /* Print a base register REGNO and displacement DISP, on STREAM.
800 REGNO = -1 for pc, -2 for none (suppressed). */
803 print_base (regno, disp, stream)
809 fprintf (stream, "%d", disp);
810 else if (regno == -1)
811 fprintf (stream, "0x%x", (unsigned) disp);
813 fprintf (stream, "%d(%s)", disp, reg_names[regno]);