1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19 #include "floatformat.h"
21 #include "opcode/m68k.h"
23 /* Local function prototypes */
26 fetch_arg PARAMS ((unsigned char *, int, int, disassemble_info *));
29 print_base PARAMS ((int, bfd_vma, disassemble_info*));
31 static unsigned char *
32 print_indexed PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *));
35 print_insn_arg PARAMS ((const char *, unsigned char *, unsigned char *,
36 bfd_vma, disassemble_info *));
38 CONST char * CONST fpcr_names[] = {
39 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
40 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"};
42 static char *const reg_names[] = {
43 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
44 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
47 /* Sign-extend an (unsigned char). */
49 #define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
51 #define COERCE_SIGNED_CHAR(ch) ((int)(((ch) ^ 0x80) & 0xFF) - 128)
54 /* Get a 1 byte signed integer. */
55 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
57 /* Get a 2 byte signed integer. */
58 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
60 (p += 2, FETCH_DATA (info, p), \
61 COERCE16 ((p[-2] << 8) + p[-1]))
63 /* Get a 4 byte signed integer. */
64 #define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
66 (p += 4, FETCH_DATA (info, p), \
67 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
69 /* NEXTSINGLE and NEXTDOUBLE handle alignment problems, but not
70 * byte-swapping or other float format differences. FIXME! */
78 #define NEXTSINGLE(val, p) \
79 { int i; union number u;\
80 FETCH_DATA (info, p + sizeof (float));\
81 for (i = 0; i < sizeof(float); i++) u.c[i] = *p++; \
84 #define NEXTDOUBLE(val, p) \
85 { int i; union number u;\
86 FETCH_DATA (info, p + sizeof (double));\
87 for (i = 0; i < sizeof(double); i++) u.c[i] = *p++; \
90 /* Need a function to convert from extended to double precision... */
91 #define NEXTEXTEND(p) \
92 (p += 12, FETCH_DATA (info, p), 0.0)
94 /* Need a function to convert from packed to double
95 precision. Actually, it's easier to print a
96 packed number than a double anyway, so maybe
97 there should be a special case to handle this... */
98 #define NEXTPACKED(p) \
99 (p += 12, FETCH_DATA (info, p), 0.0)
102 /* Maximum length of an instruction. */
109 /* Points to first byte not fetched. */
110 bfd_byte *max_fetched;
111 bfd_byte the_buffer[MAXLEN];
116 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
117 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
119 #define FETCH_DATA(info, addr) \
120 ((addr) <= ((struct private *)(info->private_data))->max_fetched \
121 ? 1 : fetch_data ((info), (addr)))
124 fetch_data (info, addr)
125 struct disassemble_info *info;
129 struct private *priv = (struct private *)info->private_data;
130 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
132 status = (*info->read_memory_func) (start,
134 addr - priv->max_fetched,
138 (*info->memory_error_func) (status, start, info);
139 longjmp (priv->bailout, 1);
142 priv->max_fetched = addr;
146 /* This function is used to print to the bit-bucket. */
149 dummy_printer (FILE * file, const char * format, ...)
151 dummy_printer (file) FILE *file;
156 dummy_print_address (vma, info)
158 struct disassemble_info *info;
162 /* Print the m68k instruction at address MEMADDR in debugged memory,
163 on INFO->STREAM. Returns length of the instruction, in bytes. */
166 print_insn_m68k (memaddr, info)
168 disassemble_info *info;
171 register unsigned char *p;
172 unsigned char *save_p;
173 register const char *d;
174 register unsigned long bestmask;
175 const struct m68k_opcode *best = 0;
177 bfd_byte *buffer = priv.the_buffer;
178 fprintf_ftype save_printer = info->fprintf_func;
179 void (*save_print_address) PARAMS((bfd_vma, struct disassemble_info*))
180 = info->print_address_func;
182 info->private_data = (PTR) &priv;
183 priv.max_fetched = priv.the_buffer;
184 priv.insn_start = memaddr;
185 if (setjmp (priv.bailout) != 0)
190 FETCH_DATA (info, buffer + 2);
191 for (i = 0; i < m68k_numopcodes; i++)
193 const struct m68k_opcode *opc = &m68k_opcodes[i];
194 unsigned long opcode = opc->opcode;
195 unsigned long match = opc->match;
197 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
198 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
199 /* Only fetch the next two bytes if we need to. */
200 && (((0xffff & match) == 0)
202 (FETCH_DATA (info, buffer + 4)
203 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
204 && ((0xff & buffer[3] & match) == (0xff & opcode)))
207 /* Don't use for printout the variants of divul and divsl
208 that have the same register number in two places.
209 The more general variants will match instead. */
210 for (d = opc->args; *d; d += 2)
214 /* Don't use for printout the variants of most floating
215 point coprocessor instructions which use the same
216 register number in two places, as above. */
218 for (d = opc->args; *d; d += 2)
222 if (*d == 0 && match > bestmask)
233 /* Point at first word of argument data,
234 and at descriptor for first argument. */
237 /* Figure out how long the fixed-size portion of the instruction is.
238 The only place this is stored in the opcode table is
239 in the arguments--look for arguments which specify fields in the 2nd
240 or 3rd words of the instruction. */
241 for (d = best->args; *d; d += 2)
243 /* I don't think it is necessary to be checking d[0] here; I suspect
244 all this could be moved to the case statement below. */
247 if (d[1] == 'l' && p - buffer < 6)
249 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
252 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
276 /* Some opcodes like pflusha and lpstop are exceptions; they take no
277 arguments but are two words long. Recognize them by looking at
278 the lower 16 bits of the mask. */
279 if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
282 FETCH_DATA (info, p);
286 /* We can the operands twice. The first time we don't print anything,
287 but look for errors. */
290 info->print_address_func = dummy_print_address;
291 info->fprintf_func = (fprintf_ftype)dummy_printer;
294 int eaten = print_insn_arg (d, buffer, p, memaddr + p - buffer, info);
297 else if (eaten == -1)
301 (*info->fprintf_func)(info->stream,
302 "<internal error in opcode table: %s %s>\n",
310 info->fprintf_func = save_printer;
311 info->print_address_func = save_print_address;
315 (*info->fprintf_func) (info->stream, "%s", best->name);
318 (*info->fprintf_func) (info->stream, " ");
322 p += print_insn_arg (d, buffer, p, memaddr + p - buffer, info);
324 if (*d && *(d - 2) != 'I' && *d != 'k')
325 (*info->fprintf_func) (info->stream, ",");
330 /* Handle undefined instructions. */
331 info->fprintf_func = save_printer;
332 info->print_address_func = save_print_address;
333 (*info->fprintf_func) (info->stream, "0%o",
334 (buffer[0] << 8) + buffer[1]);
338 /* Returns number of bytes "eaten" by the operand, or
339 return -1 if an invalid operand was found, or -2 if
340 an opcode tabe error was found. */
343 print_insn_arg (d, buffer, p0, addr, info)
345 unsigned char *buffer;
347 bfd_vma addr; /* PC for this arg to be relative to */
348 disassemble_info *info;
350 register int val = 0;
351 register int place = d[1];
352 register unsigned char *p = p0;
354 register CONST char *regname;
355 register unsigned char *p1;
361 case 'c': /* cache identifier */
363 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
364 val = fetch_arg (buffer, place, 2, info);
365 (*info->fprintf_func) (info->stream, cacheFieldName[val]);
369 case 'a': /* address register indirect only. Cf. case '+'. */
371 (*info->fprintf_func)
374 reg_names [fetch_arg (buffer, place, 3, info) + 8]);
378 case '_': /* 32-bit absolute address for move16. */
381 (*info->print_address_func) (val, info);
386 (*info->fprintf_func) (info->stream, "%%ccr");
390 (*info->fprintf_func) (info->stream, "%%sr");
394 (*info->fprintf_func) (info->stream, "%%usp");
399 static const struct { char *name; int value; } names[]
400 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
401 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
402 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
403 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
404 {"%msp", 0x803}, {"%ibsp", 0x804},
406 /* Should we be calling this psr like we do in case 'Y'? */
409 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
411 val = fetch_arg (buffer, place, 12, info);
412 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
413 if (names[regno].value == val)
415 (*info->fprintf_func) (info->stream, "%s", names[regno].name);
419 (*info->fprintf_func) (info->stream, "%d", val);
424 val = fetch_arg (buffer, place, 3, info);
425 /* 0 means 8, except for the bkpt instruction... */
426 if (val == 0 && d[1] != 's')
428 (*info->fprintf_func) (info->stream, "#%d", val);
432 val = fetch_arg (buffer, place, 8, info);
435 (*info->fprintf_func) (info->stream, "#%d", val);
439 val = fetch_arg (buffer, place, 4, info);
440 (*info->fprintf_func) (info->stream, "#%d", val);
444 (*info->fprintf_func) (info->stream, "%s",
445 reg_names[fetch_arg (buffer, place, 3, info)]);
449 (*info->fprintf_func)
451 reg_names[fetch_arg (buffer, place, 3, info) + 010]);
455 (*info->fprintf_func)
457 reg_names[fetch_arg (buffer, place, 4, info)]);
461 regno = fetch_arg (buffer, place, 4, info);
463 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
465 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
469 (*info->fprintf_func)
470 (info->stream, "%%fp%d",
471 fetch_arg (buffer, place, 3, info));
475 val = fetch_arg (buffer, place, 6, info);
477 (*info->fprintf_func) (info->stream, "%s", reg_names [val & 7]);
479 (*info->fprintf_func) (info->stream, "%d", val);
483 (*info->fprintf_func)
484 (info->stream, "%s@+",
485 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
489 (*info->fprintf_func)
490 (info->stream, "%s@-",
491 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
496 (*info->fprintf_func)
497 (info->stream, "{%s}",
498 reg_names[fetch_arg (buffer, place, 3, info)]);
499 else if (place == 'C')
501 val = fetch_arg (buffer, place, 7, info);
502 if ( val > 63 ) /* This is a signed constant. */
504 (*info->fprintf_func) (info->stream, "{#%d}", val);
512 p1 = buffer + (*d == '#' ? 2 : 4);
514 val = fetch_arg (buffer, place, 4, info);
515 else if (place == 'C')
516 val = fetch_arg (buffer, place, 7, info);
517 else if (place == '8')
518 val = fetch_arg (buffer, place, 3, info);
519 else if (place == '3')
520 val = fetch_arg (buffer, place, 8, info);
521 else if (place == 'b')
523 else if (place == 'w' || place == 'W')
525 else if (place == 'l')
529 (*info->fprintf_func) (info->stream, "#%d", val);
535 else if (place == 'B')
536 val = COERCE_SIGNED_CHAR(buffer[1]);
537 else if (place == 'w' || place == 'W')
539 else if (place == 'l' || place == 'L' || place == 'C')
541 else if (place == 'g')
543 val = NEXTBYTE (buffer);
549 else if (place == 'c')
551 if (buffer[1] & 0x40) /* If bit six is one, long offset */
559 (*info->print_address_func) (addr + val, info);
564 (*info->fprintf_func)
565 (info->stream, "%s@(%d)",
566 reg_names[fetch_arg (buffer, place, 3, info)], val);
570 (*info->fprintf_func) (info->stream, "%s",
571 fpcr_names[fetch_arg (buffer, place, 3, info)]);
575 /* Get coprocessor ID... */
576 val = fetch_arg (buffer, 'd', 3, info);
578 if (val != 1) /* Unusual coprocessor ID? */
579 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
597 val = fetch_arg (buffer, 'x', 6, info);
598 val = ((val & 7) << 3) + ((val >> 3) & 7);
601 val = fetch_arg (buffer, 's', 6, info);
603 /* Get register number assuming address register. */
604 regno = (val & 7) + 8;
605 regname = reg_names[regno];
609 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
613 (*info->fprintf_func) (info->stream, "%s", regname);
617 (*info->fprintf_func) (info->stream, "%s@", regname);
621 (*info->fprintf_func) (info->stream, "%s@+", regname);
625 (*info->fprintf_func) (info->stream, "%s@-", regname);
630 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
634 p = print_indexed (regno, p, addr, info);
642 (*info->print_address_func) (val, info);
647 (*info->print_address_func) (val, info);
652 (*info->print_address_func) (addr + val, info);
656 p = print_indexed (-1, p, addr, info);
660 flt_p = 1; /* Assume it's a float... */
679 NEXTSINGLE(flval, p);
683 NEXTDOUBLE(flval, p);
687 FETCH_DATA (info, p + 12);
688 floatformat_to_double (&floatformat_m68881_ext,
694 flval = NEXTPACKED(p);
700 if ( flt_p ) /* Print a float? */
701 (*info->fprintf_func) (info->stream, "#%g", flval);
703 (*info->fprintf_func) (info->stream, "#%d", val);
719 /* Move the pointer ahead if this point is farther ahead
724 (*info->fprintf_func) (info->stream, "#0");
729 register int newval = 0;
730 for (regno = 0; regno < 16; ++regno)
731 if (val & (0x8000 >> regno))
732 newval |= 1 << regno;
737 for (regno = 0; regno < 16; ++regno)
738 if (val & (1 << regno))
742 (*info->fprintf_func) (info->stream, "/");
744 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
746 while (val & (1 << (regno + 1)))
748 if (regno > first_regno)
749 (*info->fprintf_func) (info->stream, "-%s",
753 else if (place == '3')
757 val = fetch_arg (buffer, place, 8, info);
760 (*info->fprintf_func) (info->stream, "#0");
765 register int newval = 0;
766 for (regno = 0; regno < 8; ++regno)
767 if (val & (0x80 >> regno))
768 newval |= 1 << regno;
773 for (regno = 0; regno < 8; ++regno)
774 if (val & (1 << regno))
778 (*info->fprintf_func) (info->stream, "/");
780 (*info->fprintf_func) (info->stream, "%%fp%d", regno);
782 while (val & (1 << (regno + 1)))
784 if (regno > first_regno)
785 (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
802 int val = fetch_arg (buffer, place, 5, info);
806 case 2: name = "%tt0"; break;
807 case 3: name = "%tt1"; break;
808 case 0x10: name = "%tc"; break;
809 case 0x11: name = "%drp"; break;
810 case 0x12: name = "%srp"; break;
811 case 0x13: name = "%crp"; break;
812 case 0x14: name = "%cal"; break;
813 case 0x15: name = "%val"; break;
814 case 0x16: name = "%scc"; break;
815 case 0x17: name = "%ac"; break;
816 case 0x18: name = "%psr"; break;
817 case 0x19: name = "%pcsr"; break;
821 int break_reg = ((buffer[3] >> 2) & 7);
822 (*info->fprintf_func)
823 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
828 (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
831 (*info->fprintf_func) (info->stream, "%s", name);
837 int fc = fetch_arg (buffer, place, 5, info);
839 (*info->fprintf_func) (info->stream, "%%dfc");
841 (*info->fprintf_func) (info->stream, "%%sfc");
843 (*info->fprintf_func) (info->stream, "<function code %d>", fc);
848 (*info->fprintf_func) (info->stream, "%%val");
853 int level = fetch_arg (buffer, place, 3, info);
854 (*info->fprintf_func) (info->stream, "%d", level);
865 /* Fetch BITS bits from a position in the instruction specified by CODE.
866 CODE is a "place to put an argument", or 'x' for a destination
867 that is a general address (mode and register).
868 BUFFER contains the instruction. */
871 fetch_arg (buffer, code, bits, info)
872 unsigned char *buffer;
875 disassemble_info *info;
877 register int val = 0;
884 case 'd': /* Destination, for register or quick. */
885 val = (buffer[0] << 8) + buffer[1];
889 case 'x': /* Destination, for general arg */
890 val = (buffer[0] << 8) + buffer[1];
895 FETCH_DATA (info, buffer + 3);
896 val = (buffer[3] >> 4);
900 FETCH_DATA (info, buffer + 3);
905 FETCH_DATA (info, buffer + 3);
906 val = (buffer[2] << 8) + buffer[3];
911 FETCH_DATA (info, buffer + 3);
912 val = (buffer[2] << 8) + buffer[3];
918 FETCH_DATA (info, buffer + 3);
919 val = (buffer[2] << 8) + buffer[3];
923 FETCH_DATA (info, buffer + 5);
924 val = (buffer[4] << 8) + buffer[5];
929 FETCH_DATA (info, buffer + 5);
930 val = (buffer[4] << 8) + buffer[5];
935 FETCH_DATA (info, buffer + 5);
936 val = (buffer[4] << 8) + buffer[5];
940 FETCH_DATA (info, buffer + 3);
941 val = (buffer[2] << 8) + buffer[3];
946 FETCH_DATA (info, buffer + 3);
947 val = (buffer[2] << 8) + buffer[3];
952 FETCH_DATA (info, buffer + 3);
953 val = (buffer[2] << 8) + buffer[3];
958 val = (buffer[1] >> 6);
988 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
989 P points to extension word, in buffer.
990 ADDR is the nominal core address of that extension word. */
992 static unsigned char *
993 print_indexed (basereg, p, addr, info)
997 disassemble_info *info;
1000 static char *const scales[] = {"", ":2", ":4", ":8"};
1006 word = NEXTWORD (p);
1008 /* Generate the text for the index register.
1009 Where this will be output is not yet determined. */
1010 sprintf (buf, "%s:%c%s",
1011 reg_names[(word >> 12) & 0xf],
1012 (word & 0x800) ? 'l' : 'w',
1013 scales[(word >> 9) & 3]);
1015 /* Handle the 68000 style of indexing. */
1017 if ((word & 0x100) == 0)
1020 if ((word & 0x80) != 0)
1024 print_base (basereg, word, info);
1025 (*info->fprintf_func) (info->stream, ",%s)", buf);
1029 /* Handle the generalized kind. */
1030 /* First, compute the displacement to add to the base register. */
1042 switch ((word >> 4) & 3)
1045 base_disp = NEXTWORD (p);
1048 base_disp = NEXTLONG (p);
1053 /* Handle single-level case (not indirect) */
1055 if ((word & 7) == 0)
1057 print_base (basereg, base_disp, info);
1059 (*info->fprintf_func) (info->stream, ",%s", buf);
1060 (*info->fprintf_func) (info->stream, ")");
1064 /* Two level. Compute displacement to add after indirection. */
1070 outer_disp = NEXTWORD (p);
1073 outer_disp = NEXTLONG (p);
1076 print_base (basereg, base_disp, info);
1077 if ((word & 4) == 0 && buf[0] != '\0')
1079 (*info->fprintf_func) (info->stream, ",%s", buf);
1082 sprintf_vma (vmabuf, outer_disp);
1083 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
1085 (*info->fprintf_func) (info->stream, ",%s", buf);
1086 (*info->fprintf_func) (info->stream, ")");
1091 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
1092 REGNO = -1 for pc, -2 for none (suppressed). */
1095 print_base (regno, disp, info)
1098 disassemble_info *info;
1102 (*info->fprintf_func) (info->stream, "%%pc@(");
1103 (*info->print_address_func) (disp, info);
1110 (*info->fprintf_func) (info->stream, "@(");
1111 else if (regno == -3)
1112 (*info->fprintf_func) (info->stream, "%%zpc@(");
1114 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
1116 sprintf_vma (buf, disp);
1117 (*info->fprintf_func) (info->stream, "%s", buf);