3 * z8k-dis.c (intr_names): Removed.
4 (print_intr, print_flags): New functions.
5 (unparse_instr): Use new functions.
9 * m32r-opc.c: Regenerate.
13 * arm-opc.h (arm_opcodes): Put V6 instructions before XScale
18 * mmix-opc.c (mmix_opcodes): Use GO_INSN_BYTE, PUSHGO_INSN_BYTE,
19 SETL_INSN_BYTE, INCH_INSN_BYTE, INCMH_INSN_BYTE, INCML_INSN_BYTE
20 and SWYM_INSN_BYTE instead of raw numbers.
24 * ppc-opc.c (MO): Make optional.
25 (RAO, RSO, SHO): New optional forms of RA, RS, SH operands.
26 (tlbwe): Accept for both PPC403 and BOOKE. Make all operands optional.
32 * arm-dis.c (print_arm_insn): Add 'W' macro.
33 * arm-opc.h (arm_opcodes): Add V6 instructions.
34 (thumb_opcodes): Likewise.
38 * openrisc-asm.c: Regenerate.
39 * pj-opc.c: Update copyright date.
43 * m32r-asm.c: Regenerate.
44 * m32r-desc.c: Regenerate.
45 * m32r-desc.h: Regenerate.
46 * m32r-dis.c: Regenerate.
47 * m32r-ibld.c: Regenerate.
48 * m32r-opc.c: Regenerate.
49 * m32r-opc.h: Regenerate.
50 * m32r-opinst.c: Regenerate.
54 * sh-opc.h: Add support for sh4a and no-fpu variants.
59 * alpha-opc.c: Remove ARGSUSED.
60 * i370-opc.c: Likewise.
61 * ppc-opc.c: Likewise.
65 * Makefile.am: Run "make dep-am".
66 * Makefile.in: Regenerate.
70 * z8k-dis.c: Convert to ISO C90.
71 * z8kgen.c: Convert to ISO C90.
72 (opt): Move long opcode for "ldb rdb,imm8" after short one, now
73 the short one is created when assembling.
74 * z8k-opc.h: Regenerate with new z8kgen.c.
78 * h8300-dis.c (print_colon_thingie): Remove.
82 * mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and
87 * dis-init.c (init_disassemble_info): Initialise
88 symbol_is_valid field.
89 * dis-buf.c (generic_symbol_is_valid): New function. Always
91 * arm-dis.c (arm_symbol_is_valid): New function. Return FALSE
92 for ARM ELF mapping symbols.
93 * disassemble.c (disassemble_init_for_target): Set
94 symbol_is_valid field to arm_symbol_is_valid of the target is
99 * m68k-opc.c (m68k_opcodes): Reorder "fmovel".
103 * arm-dis.c (print_arm_insn): Print "-" after "#".
107 * alpha-opc.c: Add support for a second argument to RPCC.
111 * m68hc11-dis.c: Convert to ISO C90 prototypes.
116 * m68k-dis.c: Add MCFv4/MCF5528x support.
117 * m68k-opc.c: Likewise.
121 * frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
125 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
129 * xtensa-dis.c (fetch_data): Remove numBytes parameter.
130 (print_insn_xtensa): Fix call to fetch_data.
134 * mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
135 (print_insn_args): Add handing for +E, +F, +G, and +H.
136 * mips-opc.c (I65): New define for MIPS64r2.
137 (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
138 "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
139 and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to
140 be supported on MIPS64r2.
144 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
148 * i386-dis.c: Convert to ISO C90 prototypes.
149 * i370-dis.c: Likewise.
150 * i370-opc.c: Likewiwse.
151 * i960-dis.c: Likewise.
152 * ia64-opc.c: Likewise.
156 * frv-desc.c: Regenerated.
161 * Makefile.am (run-cgen): Pass new args archfile and opcfile
163 (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc,
164 stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files
166 (stamp-frv): Delete hardcoded path spec workaround.
167 * Makefile.in: Regenerate.
168 * cgen.sh: New args archfile and opcfile. Pass on to cgen.
172 * v850-dis.c (disassemble): Accept bfd_mach_v850e1.
173 * v850-opc.c (v850_opcodes): Add DBTRAP and DBRET instructions.
177 * ppc-dis.c (struct dis_private): New.
178 (powerpc_dialect): Make static. Accept -Many in addition to existing
179 options. Save dialect in dis_private.
180 (print_insn_big_powerpc): Retrieve dialect from dis_private.
181 (print_insn_little_powerpc): Likewise.
182 (print_insn_powerpc): Call powpc_dialect here. Remove unnecessary
183 efs/altivec check. Try harder to disassemble if given -Many.
184 * ppc-opc.c (insert_fxm): Expand comment.
185 (PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY.
186 (POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise.
187 (POWER4): Remove PPCCOM.
188 (PPCONLY): Don't define. Update all occurrences to PPC.
192 * dis-init.c (init_disassemble_info): New file and function.
193 * Makefile.am (CFILES): Add "dis-init.c".
194 (libopcodes_la_SOURCES): Add "dis-init.c".
195 (dis-init.lo): Specify dependencies.
196 * Makefile.in: Regenerate.
200 * frv-*: Regenerated.
204 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries.
205 Move duplicate mnemonic entries together. Use RS instead of RT on
207 * ppc-dis.c: Convert to ISO C.
211 * Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from
212 $(srcdir)/../cpu temporarily when regenerating source files.
213 * Makefile.in: Regenerated.
217 * arm-dis.c (print_insn_arm: case 'A'): Add code to
218 disassemble unindexed form of Addressing Mode 5.
222 * ppc-opc.c (PPC440): Define.
223 (powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci,
224 icread instructions when PPC440. Add dlmzb instruction.
228 * dep-in.sed: Remove libintl.h.
229 * Makefile.am (POTFILES.in): Unset LC_COLLATE.
231 * Makefile.in: Regenerate.
235 * cgen-asm.c (hash_insn_array): Remove PARAMS macro.
236 (hash_insn_list): Ditto.
237 (build_asm_hash_table): Ditto.
238 (cgen_set_parse_operand_fn): Prototype definition.
239 (cgen_init_parse_operand): Ditto.
240 (hash_insn_array): Ditto.
241 (hash_insn_list): Ditto.
242 (build_asm_hash_table): Ditto.
243 (cgen_asm_lookup_insn): Ditto.
244 (cgen_parse_keyword): Ditto.
245 (cgen_parse_signed_integer): Ditto.
246 (cgen_parse_unsigned_integer): Ditto.
247 (cgen_parse_address): Ditto.
248 (cgen_validate_signed_integer): Ditto.
249 (cgen_validate_unsigned_integer): Ditto.
251 * cgen-opc.c (hash_keyword_name): Remove PARAMS macro.
252 (hash_keyword_value): Ditto.
253 (build_keyword_hash_tables): Ditto.
254 (cgen_keyword_lookup_name): Prototype definition.
255 (cgen_keyword_lookup_value): Ditto.
256 (cgen_keyword_add): Ditto.
257 (cgen_keyword_search_init): Ditto.
258 (cgen_keyword_search_next): Ditto.
259 (hash_keyword_name): Ditto.
260 (hash_keyword_value): Ditto.
261 (build_keyword_hash_tables): Ditto.
262 (cgen_hw_lookup_by_name): Ditto.
263 (cgen_hw_lookup_by_num): Ditto.
264 (cgen_operand_lookup_by_name): Ditto.
265 (cgen_operand_lookup_by_num): Ditto.
266 (cgen_insn_count): Ditto.
267 (cgen_macro_insn_count): Ditto.
268 (cgen_get_insn_value): Ditto.
269 (cgen_put_insn_value): Ditto.
270 (cgen_lookup_insn): Ditto.
271 (cgen_get_insn_operands): Ditto.
272 (cgen_lookup_get_insn_operands): Ditto.
273 (cgen_set_signed_overflow_ok): Ditto.
274 (cgen_clear_signed_overflow_ok): Ditto.
275 (cgen_signed_overflow_ok_p): Ditto.
277 * cgen-dis.c (hash_insn_array): Remove PARAMS macro.
278 (hash_insn_list): Ditto.
279 (build_dis_hash_table): Ditto.
280 (count_decodable_bits): Ditto.
281 (add_insn_to_hash_chain): Ditto.
282 (count_decodable_bits): Prototype definition.
283 (add_insn_to_hash_chain): Ditto.
284 (hash_insn_array): Ditto.
285 (hash_insn_list): Ditto.
286 (build_dis_hash_table): Ditto.
287 (cgen_dis_lookup_insn): Ditto.
289 * cgen-asm.in (parse_insn_normal): Remove PARAMS macro.
290 (@arch@_cgen_build_insn_regex): Prototype definition.
291 (parse_insn_normal): Ditto.
292 (@arch@_cgen_assemble_insn): Ditto.
293 (@arch@_cgen_asm_hash_keywords): Ditto.
295 * cgen-dis.in (print_normal): Remove PARAMS macro. Use void *
297 (print_address): Ditto.
298 (print_keyword): Ditto.
299 (print_insn_normal): Ditto.
301 (default_print_insn): Ditto.
303 (print_normal): Prototype definition. Use void * instead of PTR.
304 (print_address): Ditto.
305 (print_keyword): Ditto.
306 (print_insn_normal): Ditto.
309 (default_print_insn): Ditto.
310 (print_insn_@arch@): Ditto.
312 * cgen-ibld.in (insert_normal): Remove PARAMS macro.
313 (insn_insn_normal): Ditto.
314 (extract_normal): Ditto.
315 (extract_insn_normal): Ditto.
316 (put_insn_int_value): Ditto.
320 (insert_1): Prototype definition.
321 (insert_normal): Ditto.
322 (insert_insn_normal): Ditto.
323 (put_insn_int_value): Ditto.
326 (extract_normal): Ditto.
327 (extract_insn_normal): Ditto.
329 * fr30-asm.c: Regenerate.
331 * fr30-ibld.c: Ditto.
337 * ip2k-ibld.c: Ditto.
338 * iq2000-asm.c: Ditto.
339 * iq2000-dis.c: Ditto.
340 * iq2000-ibld.c: Ditto.
343 * m32r-ibld.c: Ditto.
344 * openrisc-asm.c: Ditto.
345 * openrisc-dis.c: Ditto.
346 * openrisc-ibld.c: Ditto.
347 * xstormy16-asm.c: Ditto.
348 * xstormy16-dis.c: Ditto.
349 * xstormy16-ibld.c: Ditto.
353 * po/fr.po: Updated French translation.
357 * configure.in (ALL_LINGUAS): Add nl.
358 * configure: Regenerate.
359 * po/nl.po: New Dutch translation.
363 * i860-dis.c: Convert to ISO C90. Remove superflous prototypes.
367 * po/ro.po: Updated Romanian translation.
371 * ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up.
375 * po/fr.po: Updated French translation.
379 * arm-dis.c (parse_arm_disassembler_option): Do not expect
380 option string to be NUL terminated.
381 (parse_disassembler_options): Allow options to be space or
386 * po/es.po: New Spanish translation.
387 * po/sv.po: New Swedish translation.
388 * po/opcodes.pot: Regenerate.
392 * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
396 * po/tr.po: Update with latest version.
397 * po/POTFILES.in: Regenerate.
398 * Makefile.in: Regenerate.
402 * po/opcodes.pot: Regenerate.
407 * m10300-dis.c (disassemble): Negate negative accumulator's shift.
409 * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
410 32-bit longs when sign-extending operands.
412 * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
413 * m10300-dis.c (HAVE_AM33_2): Define.
414 (disassemble): Use it.
415 (HAVE_AM33): Redefine.
416 (print_insn_mn10300): Fix mask for 5-byte extended insns.
418 * m10300-opc.c: Renamed AM332 to AM33_2.
420 * m10300-opc.c: Defined AM33 2.0 register operands. Added support
421 for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
422 bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
423 * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
424 insn code of AM33 2.0.
425 (disassemble): Recognize FMT_D3. Print out FP register names.
429 * mips-dis.c (set_default_mips_dis_options): Get BFD from
430 the disassembler_info's section, rather than from the
431 disassembler_info's symbols pointer.
435 * ppc-opc.c: Remove NULL pointer checks. Formatting. Remove
436 extraneous ATTRIBUTE_UNUSED.
437 * ppc-dis.c (print_insn_powerpc): Always pass a valid address to
442 * ppc-opc.c: Convert to C90, removing unnecessary prototypes and
445 * ppc-opc.c: Remove PARAMS from prototypes.
447 (insert_fxm): New function, used by both FXM and FXM4.
448 (extract_fxm): Likewise.
449 (XFXFXM_MASK): Remove 1 << 20 term.
450 (powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
454 * s390-dis.c (s390_extract_operand): Add support for long displacements.
455 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
456 * s390-opc.c (D20_20): Add define for 20 bit displacements.
457 (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
458 INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
459 new instruction formats.
460 (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
461 MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
462 (s390_opformats): Likewise.
463 * s390-opc.txt: Add new instructions for cpu type z990. Add missing
464 hfp instructions. Add missing instructions pgin, pgout and xsch.
468 * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
469 Intel Precott New Instructions.
470 (PREGRP27): New. Added for "addsubpd" and "addsubps".
471 (PREGRP28): New. Added for "haddpd" and "haddps".
472 (PREGRP29): New. Added for "hsubpd" and "hsubps".
473 (PREGRP30): New. Added for "movsldup" and "movddup".
474 (PREGRP31): New. Added for "movshdup" and "movhpd".
475 (PREGRP32): New. Added for "lddqu".
476 (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
477 Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
478 entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
479 entry 0xd0. Use PREGRP32 for entry 0xf0.
480 (twobyte_has_modrm): Updated.
481 (twobyte_uses_SSE_prefix): Likewise.
482 (grps): Use PNI_Fixup in the "sidtQ" entry.
483 (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
484 PREGRP31 and PREGRP32.
485 (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
486 Use "fisttpll" in entry 1 in opcode 0xdd.
487 Use "fisttp" in entry 1 in opcode 0xdf.
491 * z8k-dis.c (instr_data_s): Change tabl_index from long to int.
492 (print_insn_z8k): Correctly check return value from
493 z8k_lookup_instr call.
494 (unparse_instr): Handle CLASS_IRO case.
495 * z8kgen.c: Fix function definitions. Fix formatting.
496 (opt): Add brk opcode alias for non-simulator breakpoint. Add
497 missing and fix existing in/out and sin/sout opcode definitions.
498 (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
500 (internal): Check p->flags for non-zero before dereferencing it.
501 (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added
502 opcodes and renumber the remaining lines repectively.
503 (main): Remove "-d" command line switch.
504 * z8k-opc.h: Regenerate with new z8kgen.c.
508 * po/Make-in (DESTDIR): New.
509 (install-data-yes): Support $(DESTDIR).
510 (uninstall): Likewise.
514 * Makefile.am: Run "make dep-am".
515 * Makefile.in: Regenerate.
516 * po/POTFILES.in: Regenerate.
520 * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
522 * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
523 * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
524 * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
525 * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
526 * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
527 * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
528 * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
533 * ppc-opc.c (DQ, RAQ, RSQ, RTQ): Define.
534 (insert_dq, extract_dq, insert_raq, insert_rtq, insert_rsq): New.
535 (powerpc_opcodes): Add "attn", "lq" and "stq".
539 * h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
540 rts/l and rte/l register lists.
544 * frv-desc.c: Regenerate.
545 * frv-opc.c: Regenerate.
546 * frv-asm.c: Regenerate.
547 * frv-desc.h: Regenerate.
548 * frv-dis.c: Regenerate.
549 * frv-ibld.c: Regenerate.
550 * frv-opc.h: Regenerate.
551 * po/opcodes.pot: Regenerate.
557 * disassemble.c (disassembler): Add support for h8300sx.
558 * h8300-dis.c: Ditto.
562 * frv-desc.c: Regenerate.
563 * frv-opc.c: Regenerate.
565 * aclocal.m4: Regenerate.
566 * config.in: Regenerate.
567 * configure: Regenerate.
568 * iq2000-asm.c: Regenerate.
569 * iq2000-desc.c: Regenerate.
570 * iq2000-desc.h: Regenerate.
571 * iq2000-dis.c: Regenerate.
572 * iq2000-ibld.c: Regenerate.
573 * iq2000-opc.c: Regenerate.
574 * iq2000-opc.h: Regenerate.
575 * po/POTFILES.in: Regenerate.
576 * po/opcodes.pot: Regenerate.
580 * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
581 (print_insn_i860): Grab 4 bits of the control register field
586 * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
591 * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.
592 (libopcodes_la_DEPENDENCIES): Add libbfd.la.
593 * Makefile.in: Regenerated.
597 * configure.in (ALL_LINGUAS): Add Romanian translation.
598 * configure: Regenerate.
599 * po/ro.po: New file: Romanian translation.
603 * disassemble.c (disassembler): Add support for h8300hn and h8300sn.
607 * i386-dis.c (print_insn): Test intel_syntax against (char) -1 in
608 case char is unsigned.
612 * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.
613 (unpack_instr): Fix representation of segmented addresses.
614 (intr_name): Added, contains names of the parameters to the EI/DI
616 (unparse_instr): Fix display of EI/DI parameters.
620 * fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.
621 * frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate.
622 * ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate.
623 * m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate.
624 * m32r-opinst.c: Regenerate.
625 * openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate.
626 * xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
630 * h8500-opc.c: Replace occurrances of 'Hitachi' with 'Renesas'.
634 * ia64-ic.tbl (fr-readers): Add mem-writers-fp.
635 * ia64-asmtab.c: Regenerate.
639 * mips-dis.c (mips_gpr_names_newabi): Reverted previous patch.
643 * mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7.
647 * tic4x-dis.c: Namespace cleanup. Replace s/c4x/tic4x and
652 * arm-dis.c: Remove presence of (r) and (tm) symbols.
653 * arm-opc.h: Remove presence of (r) and (tm) symbols.
658 Contribute support for Intel's iWMMXt chip - an ARM variant:
660 * arm-dis.c (regnames): Add iWMMXt register names.
661 (set_iwmmxt_regnames): New function.
662 (print_insn_arm): Handle iWMMXt formatters.
663 * arm-opc.h: Document iWMMXt formatters.
664 (arm_opcod): Add iWMMXt instructions.
668 * i386-dis.c (dis386): Recognize icebp (0xf1).
672 * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
674 (print_insn_s390): Use new modes field of s390_opcodes.
675 * s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
676 (s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
677 (struct op_struct): Remove archbits. Add mode_bits and min_cpu.
678 (insertOpcode): Replace archbits by min_cpu and mode_bits.
679 (dumpTable): Write mode_bits and min_cpu instead of archbits.
680 (main): Adapt to new format in s390-opcode.txt.
681 * s390-opc.c (s390_opformats): Replace archbits by min_cpu and
683 * s390-opc.txt: Replace archbits by min_cpu and mode_bits.
687 * ppc-opc.c: Fix formatting. Update copyright date.
691 * ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403.
695 * hppa-dis.c: Formatting.
699 * hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
701 * hppa-dis.c (print_insn_hppa <2 bit space register>): Do not print
702 the space register when the value is zero.
706 * mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned,
707 use ARRAY_SIZE in loops.
711 * fr30-desc.c: Regenerate.
715 * i386-dis.c (dq_mode, Edq): Define.
716 (dis386_twobyte): Correct movd operands.
717 (OP_E): Handle dq_mode case.
721 * sparc-dis.c (print_insn_sparc): When examining values added in
722 to rs1, make sure that there are previous instructions.
730 * sh-dis.c (print_insn_shx): Handle bfd_mach_sh2e.
731 * sh-opc.h (arch_sh2e, arch_sh2e_up): New.
732 (arch_sh2_up): Added sh2e.
733 (sh_table): Replaced all occurrences of arch_sh3e_up with
734 arch_sh2e_up, except in fsqrt.
738 * sh64-dis.c: Include elf32-sh64.h.
739 * Makefile.am: Run "make dep-am".
740 * Makefile.in: Regenerate.
744 * alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrap
749 * Makefile.am: Run "make dep-am".
750 * Makefile.in: Regenerate.
751 * po/POTFILES.in: Regenerate.
755 * Makefile.am (ALL_MACHINES): Add msp430-dis.lo.
756 * Makefile.in: Regenerate.
760 * ppc-opc.c (powerpc_macros <extrwi>): Accept a shift of 32.
765 * iq2000-asm.c: New file.
766 * iq2000-desc.c: Likewise.
767 * iq2000-desc.h: Likewise.
768 * iq2000-dis.c: Likewise.
769 * iq2000-ibld.c: Likewise.
770 * iq2000-opc.c: Likewise.
771 * iq2000-opc.h: Likewise.
772 * Makefile.am (HFILES): Add iq2000-desc.h, iq2000-opc.h.
773 (CFILES): Add iq2000-asm.c, iq2000-desc.c, iq2000-dis.c,
774 iq2000-ibld.c, iq2000-opc.c.
775 (ALL_MACHINES): Add iq2000-asm.lo, iq2000-desc.lo, iq2000-dis.lo,
776 iq2000-ibld.lo, iq2000-opc.lo.
777 (CLEANFILES): Add stamp-iq2000.
778 (IQ2000_DEPS): New macro.
779 (stamp-iq2000): New target.
780 * Makefile.in: Regenerate.
781 * configure.in: Handle bfd_iq2000_arch.
782 * configure: Regenerate.
786 * mips-dis.c (print_insn_args): Use position extracted by "+A"
787 to calculate size for "+B". Redo code for "+C" so it shares
788 the same style as "+A" and "+B" now do.
792 * mips-dis.c: Update copyright years.
793 (print_insn_arg): Rename to...
794 (print_insn_args): This, returning void. Process the whole
795 string of args rather than a single one. Reindent.
796 (print_insn_mips): Update to match the above.
800 * mips-opc.c (mips_builtin_opcodes): Move "di" into the
801 right order alphabetically, and make all hex constants use
806 * mips-dis.c (mips_cp0sel_name): New structure.
807 (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
808 (mips_cp0sel_names_sb1): New arrays.
809 (mips_arch_choice): New structure members "cp0sel_names" and
811 (mips_arch_choices): Add references to new cp0sel_names arrays
812 as appropriate, and make all existing entries reference
813 appropriate mips_XXX_names_numeric arrays rather than simply
815 (mips_cp0sel_names, mips_cp0sel_names_len): New variables.
816 (lookup_mips_cp0sel_name): New function.
817 (set_default_mips_dis_options): Set mips_cp0sel_names and
818 mips_cp0sel_names_len as appropriate. Remove now-unnecessary
819 checks for NULL register name arrays.
820 (parse_mips_dis_option): Likewise.
821 (print_insn_arg): Handle "+D" operand type.
822 * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
823 of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
828 * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
829 (mips_hwr_names_mips3264r2): New arrays.
830 (mips_arch_choice): New "hwr_names" member.
831 (mips_arch_choices): Adjust for structure change, and add a new
832 entry for "mips32r2" ISA.
833 (mips_hwr_names): New variable.
834 (set_default_mips_dis_options): Set mips_hwr_names.
835 (parse_mips_dis_option): New "hwr-names" option which sets
836 mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
837 (print_insn_arg): Change return type to "int"
838 and use that to indicate number of characters consumed.
839 Add support for "+" operand extension character, "+A", "+B",
840 "+C", and "K" operands.
841 (print_insn_mips): Adjust for changes to print_insn_arg.
842 (print_mips_disassembler_options): Adjust for "hwr-names"
843 addition and "reg-names" change.
844 * mips-opc (I33): New define (shorthand for INSN_ISA32R2).
845 (mips_builtin_opcodes): Note that "nop" and "ssnop" are special
846 forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
847 di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
848 rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
849 Note that hardware rotate instructions (ror, rorv) can be
850 used on MIPS32 Release 2, and add the official mnemonics
851 for them (rotr, rotrv) and the similar "rotl" mnemonic for
856 * configure.in: Add msp430 target.
857 * configure: Regenerate.
858 * disassemble.c: Add entry for msp430 disassembly.
859 * msp430-dis.c: New file: msp430 disassembler.
863 * disassemble.c (disassembler_usage): Add invocation of
864 print_mips_disassembler_options.
865 * mips-dis.c: Include libiberty.h.
866 (print_mips_disassembler_options, set_default_mips_dis_options)
867 (parse_mips_dis_option, parse_mips_dis_options, choose_abi_by_name)
868 (choose_arch_by_name, choose_arch_by_number): New functions.
869 (mips_abi_choice, mips_arch_choice): New structures.
870 (mips32_reg_names, mips64_reg_names, reg_names): Remove.
871 (mips_gpr_names_numeric, mips_gpr_names_oldabi)
872 (mips_gpr_names_newabi, mips_fpr_names_numeric)
873 (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64)
874 (mips_cp0_names_numeric, mips_cp0_names_mips3264)
875 (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices)
876 (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names)
877 (mips_cp0_names): New variables.
878 (print_insn_args): Use new variables to print GPR, FPR, and CP0
880 (mips_isa_type): Remove.
881 (print_insn_mips): Remove ISA and CPU setup since it is now done...
882 (_print_insn_mips): Here. Remove register setup code, and
883 call set_default_mips_dis_options and parse_mips_dis_options
885 (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
889 * Makefile.in: Regenerate.
893 * cgen-asm.c (cgen_parse_keyword): Added underscore to symbol character
894 check to fix false keyword trigger with names such as <keyword>_foo.
898 * Makefile.am (CGEN_CPUS): New variable.
899 (run-cgen-all): New rule.
900 * Makefile.in: Regenerate.
904 * mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
905 "dror" entries, and reorder the remaining "dror" and "ror" entries.
909 * xstormy16-asm.c (parse_immediate16): Add prototype.
913 * xstormy16-asm.c: Regenerate.
917 * ns32k-dis.c (print_insn_ns32k): Constify "d", remove register
922 * h8500-opc.h (h8500_table): Add missing initializers to quiet
924 * pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change.
925 * pj-opc.c (pj_opc_info): Add braces around union initializer.
926 * z8kgen.c: Include "libiberty.h".
927 (opt, args, toks): Fix initializer warnings.
928 (chewname): Make "name" a char **. Return mnemonic trimmed of
930 (gas): Improve emitted "DO NOT EDIT" warning. Format emitted
931 opcode_entry_type, and make "nicename" and "name" const. Make
932 z8k_table const too. Formatting. Generate idx as gas needs it.
933 * z8k-opc.h: Regenerate.
937 * m68hc11-dis.c (print_indexed_operand): Fix PC-relative address
938 for 9 and 16-bit PC-relative addressing mode.
942 * ppc-opc.c: Delete evsabs, evsnabs, evsneg, evsadd, evssub,
943 evsmul, evsdiv, evscmpgt, evsgmplt, evststgt, evtstlt, evststeq,
944 evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi,
945 evsctsiz, evsctuf, evsctsf, evmwhssfaa, evmwhssmaa, evmwhsmfaa,
946 evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian,
947 evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa,
948 evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan,
949 evmwhgsmian, evmwhgumian.
950 (mftb): Add to opcode table.
951 (mtspefscr): Change RT to RS in opcode table.
955 * ppc-opc.c: Move mbar and msync up. Change mask for mbar and
960 * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
961 * ia64-opc-b.c: Add "hint.b" instruction.
962 * ia64-opc-f.c: Add "hint.f" instruction.
963 * ia64-opc-i.c: Add "hint.i" instruction.
964 * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
965 "cmp8xchg16" instructions.
966 * ia64-opc-x.c: Add "hint.x" instruction.
968 * ia64-opc.h (AR_CSD): New macro.
970 * ia64-ic.tbl: Update according to SDM2.1.
971 * ia64-raw.tbl: Ditto.
972 * ia64-waw.tbl: Ditto.
974 * ia64-gen.c (in_iclass): Handle "hint" like "nop".
975 (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
976 AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
977 * ia64-asmtab.c: Regenerate.
981 * ppc-opc.c: Remove evmwlssf, evmwlssfa, evmwlsmf, evmwlsmfa,
982 evmwlssfaaw, evmwlsmfaaw, evmwlssfanw, evmwlsfanw.
986 * ppc-opc.c (PMRN): Remove.
988 (powerpc_opcodes): Change PMRN to SPR.
990 Change mftb to look like mftbl.
991 Move mftb before mftbl.
994 Change mfpmr to use PMR.
995 Change mtpmr to use PMR.
997 (insert_ev2): Fix mask and shift.
1000 (extract_ev4): Same.
1002 (extract_pmrn): Remove.
1003 (insert_pmrn): Remove.
1007 * ia64-opc-m.c: Add ld8.mov.
1008 * ia64-asmtab.c: Regenerate.
1012 * arm-dis.c (print_insn_arm): Constify "insn". Formatting.
1013 (print_insn_thumb): Likewise.
1014 * h8500-dis.c (print_insn_h8500): Constify "opcode".
1015 * mcore-dis.c (print_insn_mcore): Constify "op". Formatting.
1016 * ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
1017 type-punned pointer warnings.
1018 <case 'L'>: Likewise. Fix error message too.
1019 * pdp11-dis.c (print_reg): Warning fix.
1020 * sh-dis.c (print_movxy): Constify "op" param.
1021 (print_insn_ddt): Constify sh_opcode_info vars.
1022 (print_insn_ppi): Likewise.
1023 (print_insn_sh): Likewise.
1024 * tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
1025 type-punned pointer warnings.
1026 * w65-dis.c (print_insn_w65): Constify "op".
1030 * m68hc11-dis.c (PC_REGNUM): Define.
1031 (print_indexed_operand): Need an adjustment for some PC-relative
1032 operand modes; print the final address of PC-relative modes.
1033 (print_insn): Take into account movw/movb to adjust the PC-relative
1038 *arm-dis.c, cris-dis.c, h8300-dis.c, mips-dis.c, mmix-dis.c, sh-dis.c,
1039 sh64-dis.c, v850-dis.c: Replace boolean with bfd_boolean, true with
1040 TRUE, false with FALSE. Simplify comparisons of bfd_boolean vars
1041 with TRUE/FALSE. Formatting.
1045 * xstormy16-opc.c: Regenerate.
1049 * ia64-dis.c (print_insn_ia64): Correct handling of IA64_OPND_TGT64.
1053 * xstormy16-desc.c: Regenerate.
1054 * xstormy16-opc.c: Regenerate.
1055 * xstormy16-opc.h: Regenerate.
1059 * avr-dis.c: Include libiberty.h (for xmalloc).
1060 (struct avr_opcodes_s): Remove 'bin_mask' field (it's
1061 automatically computed in the init routine).
1062 (AVR_INSN): No longer provide bin_mask field in initializer.
1063 (avr_opcodes_s): Declare as const.
1064 (print_insn_avr): Store the bin_mask field in a separate table
1065 (allocated with xmalloc); iterate through it at the same time as
1066 we iterate through the opcodes.
1070 * h8300-dis.c: Include libiberty.h (for xmalloc).
1071 (struct h8_instruction): New type, used to wrap h8_opcodes with a
1072 length field (computed at run-time).
1073 (h8_instructions): New variable.
1074 (bfd_h8_disassemble_init): Allocate the storage for
1075 h8_instructions. Fill h8_instructions with pointers to the
1076 appropriate opcode and the correct value for the length field.
1077 (bfd_h8_disassemble): Iterate through h8_instructions instead of
1082 * arc-opc.c (arc_ext_opcodes): Define.
1083 (arc_ext_operands): Define.
1084 * i386-dis.c (Suffix3DNow): Declare as const.
1085 * arm-opc.h (arm_opcodes): Declare as const.
1086 (thumb_opcodes): Declare as const.
1087 * h8500-opc.h (h8500_table): Declare as const.
1088 (h8500_table): Use a NULL for the opcode in the terminator, so
1089 that code testing (opcode->name) behaves correctly.
1090 * mcore-opc.h (mcore_table): Declare as const.
1091 * sh-opc.h (sh_table): Declare as const.
1092 * w65-opc.h (optable): Declare as const.
1093 * z8k-opc.h (z8k_table): Declare as const.
1097 * tic4x-dis.c: Added support for enhanced and special insn.
1098 (c4x_print_op): Added insn class 'i' and 'j'
1099 (c4x_hash_opcode_special): Add to support special insn
1100 (c4x_hash_opcode): Update to support the new opcode-list
1101 format. Add support for the new special insns.
1102 (c4x_disassemble): New opcode-list support.
1106 * m88k-dis.c: Include libiberty.h (for xmalloc).
1107 (HASHTAB): New type, used to build instruction hash tables.
1108 Contains a pointer to an INSTAB and a pointer to the next hash
1110 (instructions): Move definition from m88k.h; remove initialization
1112 (hashtable): Now an aray of pointer-to-HASHTAB, not INSTAB.
1113 (printop): Mark pointer to OPSPEC as const.
1114 (install): Remove; fold into init_disasm.
1115 (m88kdis): Update to ihashtab_initialized to 1 after calling
1116 init_disasm. entry_ptr now iterates through HASHTABs, not
1118 (init_disasm): Iterate through the instructions and add to
1123 * tic4x-dis.c: (c4x_print_op): Add support for the new argument
1124 format. Fix bug in 'N' register printer.
1128 * ppc-dis.c (print_insn_powerpc): Correct condition register display.
1132 * ppc-opc.c (EVUIMM_4): Change bit size to 32.
1138 * Makefile.am (ia64-asmtab.c): Update to use the new '--srcdir'
1139 argument to ia64-gen.
1140 Regenerate dependencies for ia64-len.lo.
1141 * Makefile.in: Regenerate.
1142 * ia64-gen.c: Convert to use getopt(). Add the standard GNU
1143 options, as well as '--srcdir', which controls the directory in
1144 which ia64-gen looks for the sources it uses to generate the
1145 output table. Add a 'const' to the declaration of the final
1146 output table. Call xmalloc_set_program_name to set the program
1148 * ia64-asmtab.c: Regenerate.
1152 * ia64-gen.c: Fix comment formatting and compile time warnings.
1153 * ia64-opc-a.c: Fix compile time warnings.
1154 * ia64-opc-b.c: Likewise.
1155 * ia64-opc-d.c: Likewise.
1156 * ia64-opc-f.c: Likewise.
1157 * ia64-opc-i.c: Likewise.
1158 * ia64-opc-m.c: Likewise.
1159 * ia64-opc-x.c: Likewise.
1163 * ppc-opc.c: Change RD to RS for evmerge*.
1167 * sparc-opc.c (sparc_opcodes) <fb, fba, fbe, fbz, fbg, fbge,
1168 fbl, fble, fblg, fbn, fbne, fbnz, fbo, fbu, fbue, fbug, fbuge,
1169 fbul, fbule>: Add conditional/unconditional branch
1174 * m68hc11-dis.c (print_insn): Treat bitmask and branch operands
1183 * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
1184 (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
1185 and bfd_mach_mips5500.
1186 * mips-opc.c (V1): Include INSN_4111 and INSN_4120.
1187 (N411, N412, N5, N54, N55): New convenience defines.
1188 (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
1189 Change dmadd16 and madd16 from V1 to N411.
1193 * mips-dis.c (print_insn_mips): Always allow disassembly of
1198 * po/de.po: Updated German translation.
1202 * Makefile.am: Run "make dep-am".
1203 * Makefile.in: Regenerate.
1204 * po/POTFILES.in: Regenerate.
1208 * ppc-opc.c (CRFD, CRFS): Add PPC_OPERAND_CR flag so that cr
1209 register names are accepted.
1213 * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.
1214 Convert functions to K&R format.
1218 * ppc-opc.c (MFDEC2): Include Book-E.
1219 (PPCCHLK64): New opcode mask.
1220 (evsubw, evsubiw, evmr, evnot, isellt, iselgt, iseleq, mfpid,
1221 mfcsrr0, mfcsrr1, mfdear, mfesr, mfivpr, mfusprg0, mftbl,
1222 mftbu, mfpir, mfdbsr, mfdbcr0, mfdbcr1, mfdbcr2, mfiac1,
1223 mfiac2, mfiac3, mfiac4, mfdac1, mfdac2, mfdvc1, mfdvc2, mftsr,
1224 mftcr, mfivor0, mfivor1, mfivor2, mfivor3, mfivor4, mfivor5,
1225 mfivor6, mfivor7, mfivor8, mfivor9, mfivor10, mfivor11,
1226 mfivor12, mfivor13, mfivor14, mfivor15, mfbbear, mfmcsrr0,
1227 mfmcsrr1, mfmcsr, mtpid, mtdecar, mtcsrr0, mtcsrr1, mtdear,
1228 mtesr, mtivpr, mtusprg0, mtsprg4, mtsprg5, mtsprg6, mtsprg7,
1229 mtdbsr, mtdbcr0, mtdbcr1, mtdbcr2, mtiac1, mtiac2, mtiac3,
1230 mtiac4, mtdac1, mtdac2, mtdvc1, mtdvc2, mttsr, mttcr, mtivor0,
1231 mtivor1, mtivor2, mtivor3, mtivor4, mtivor5, mtivor6, mtivor7,
1232 mtivor8, mtivor9, mtivor10, mtivor11, mtivor12, mtivor13,
1233 mtivor14, mtivor15, mtbbear, mtmcsrr0, mtmcsrr1, mtmcsr): New
1234 Book-E instructions.
1235 (evfsneg): Fix opcode value.
1236 (dcbtstlse, dcbtlse, icblce, dcblce, icbtsle): Use PPCCHLK64
1238 (mcrxr64, tlbivaxe, tlbsxe, tlbsxe.): Restrict to 64-bit
1240 (extsw): Restrict to 64-bit PPC instruction sets.
1241 (extsw.): Does not exist in 64-bit Book-E.
1242 (powerpc_macro): Remove mftbl, mftbu and mftb Book-E macros as
1243 they are no longer needed.
1247 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC.
1251 * po/da.po: Updated Danish translation file.
1255 * ppc-opc.c (extsw, extsw.): Do not allow for the BookE32.
1259 * disassemble.c (disassembler_usage): Add invocation of
1260 print_ppc_disassembler_options.
1261 * ppc-dis.c (print_ppc_disassembler_options): New function.
1265 * ppc-opc.c: The BookE implementations of the TLBWE and TLBRE
1266 instructions do not take any arguments.
1270 * v850-opc.c: Remove redundant references to V850EA architecture.
1274 * arc-opc.c: Include bfd.h.
1275 (arc_get_opcode_mach): Subtract off base bfd_mach value.
1279 * v850-dis.c (disassemble): Remove bfd_mach_v850ea case.
1281 * mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
1285 * configure.in: Added bfd_tic4x_arch.
1286 * configure: Regenerate.
1287 * Makefile.am: Added tic4x-dis.o target.
1288 * Makefile.in: Regenerate.
1292 * disassemble.c: Added tic4x target and c4x
1293 disassembler routine.
1294 * tic4x-dis.c: New file.
1298 * z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex
1300 * z8kgen.c (opt): Fix definition of "in rd,imm16" opcode.
1301 * z8k-opc.h: Regenerated with new z8kgen.c.
1307 * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
1308 `-mefs'. Turn off AltiVec for E500 and efs.
1309 (print_insn_powerpc): Don't print an AltiVec instruction if the
1312 * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
1313 insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
1314 for extracting pmrn/evld/evstd/etc operands.
1315 (CRB, CRFD, CRFS, DC, RD): New instruction fields.
1316 (CT): Make this equal to RD + 1.
1317 (PMRN): New operand.
1319 (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
1321 (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
1322 (ISEL, ISEL_MASK): New instruction form and mask for ISEL.
1323 (XISEL, XISEL_MASK): New instruction form and mask for ISEL.
1324 (CTX, CTX_MASK): New instruction form and mask for context cache
1326 (UCTX, UCTX_MASK): New instruction form and mask for user context
1328 (XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
1329 (CLASSIC): New define.
1330 (PPCESPE): New define.
1331 (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
1332 defines for integer select, cache control, branch
1333 locking, power management, cache locking and machine check
1334 APU instructions, respectively.
1335 (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
1336 efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
1337 efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
1338 efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
1339 evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
1340 evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
1341 evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
1342 evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
1343 evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
1344 evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
1345 evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
1346 evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
1347 evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
1348 evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
1349 evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
1350 evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
1351 evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
1352 evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
1353 evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
1354 evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
1355 evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
1356 evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
1357 evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
1358 evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
1359 evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
1360 evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
1361 evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
1362 evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
1363 evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
1364 evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
1365 evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
1366 evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
1367 evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
1368 evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
1369 evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
1370 evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
1371 evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
1372 evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
1373 evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
1374 evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
1375 evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
1376 evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
1377 evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
1378 evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
1379 evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
1380 evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
1382 (rfmci): New machine check APU instruction.
1383 (isel): New integer select APU instructino.
1384 (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
1385 dcbtstlse, dcblc, dcblce): New cache control APU instructions.
1386 (mtspefscr, mfspefscr): New instructions.
1387 (mfpmr, mtpmr): New performance monitor APU instructions.
1388 (savecontext): New context cache APU instructions.
1389 (bblels, bbelr): New branch locking APU instructions.
1390 (bblels, bbelr): New instructions.
1391 (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
1395 * m68hc11-opc.c: Update call operand to accept the page definition.
1396 Identify instructions that are branches and calls to generate a
1401 * m68hc11-dis.c (print_insn): Take into account 68HC12 memory
1402 banks and fix disassembling of call instruction.
1403 (print_indexed_operand): New param to tell whether
1404 it was an indirect addressing operand (for disassembling call).
1408 * po/sv.po: Updated Swedish translation.
1412 * mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
1413 aliases to "daddiu" and "addiu".
1417 * po/sv.po: Updated Swedish translation.
1421 * po/sv.po: Updated Swedish translation.
1422 * po/es.po: Updated Spanish translation.
1423 * po/pr_BR.po: Updated Brazilian Portuguese translation.
1424 * po/tr.po: Updated Turkish translation.
1425 * po/fr.po: Updated French translation.
1429 * po/sv.po: Updated Swedish translation.
1430 * po/es.po: Updated Spanish translation.
1431 * po/pr_BR.po: Updated Brazilian Portuguese translation.
1435 * Makefile.am: Run "make dep-am".
1436 * Makefile.in: Regenerate.
1437 * po/POTFILES.in: Regenerate.
1441 * po/fr.po: Updated French translation.
1442 * po/pr_BR.po: New Brazilian Portuguese translation.
1443 * po/id.po: Updated Indonesian translation.
1444 * configure.in (LINGUAS): Add pr_BR.
1445 * configure: Regenerate.
1452 * configure.in: Add support for ip2k.
1453 * configure: Regenerate.
1454 * Makefile.am: Add support for ip2k.
1455 * Makefile.in: Regenerate.
1456 * disassemble.c: Add support for ip2k.
1457 * ip2k-asm.c: New generated file.
1458 * ip2k-desc.c: New generated file.
1459 * ip2k-desc.h: New generated file.
1460 * ip2k-dis.c: New generated file.
1461 * ip2k-ibld.c: New generated file.
1462 * ip2k-opc.c: New generated file.
1463 * ip2k-opc.h: New generated file.
1467 * ia64-opc-b.c (bWhc): New macro.
1470 (ia64_opcodes_b): Correct patterns for indirect call
1471 instructions to use 3-bit "wh" field.
1472 * ia64-asmtab.c: Regnerate.
1476 * mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
1477 * mips-opc.c (I16): New define.
1478 (mips_builtin_opcodes): Make jalx an I16 insn.
1482 * po/POTFILES.in: Add frv-*.[ch].
1483 * disassemble.c (ARCH_frv): New macro.
1484 (disassembler): Handle bfd_arch_frv.
1485 * configure.in: Support frv_bfd_arch.
1486 * Makefile.am (HFILES): Add frv-*.h.
1487 (CFILES): Add frv-*.c
1488 (ALL_MACHINES): Add frv-*.lo.
1489 (CLEANFILES): Add stamp-frv.
1490 (FRV_DEPS): New variable.
1491 (stamp-frv): New target.
1492 (frv-asm.lo): New target.
1493 (frv-desc.lo): New target.
1494 (frv-dis.lo): New target.
1495 (frv-ibld.lo): New target.
1496 (frv-opc.lo): New target.
1497 (frv-*.[ch]): New files.
1501 * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
1502 * Makefile.in: Regenerate.
1506 * a29k-dis.c: Replace CONST with const.
1507 * h8300-dis.c: Likewise.
1508 * m68k-dis.c: Likewise.
1509 * or32-dis.c: Likewise.
1510 * sparc-dis.c: Likewise.
1514 * configure.in: Add "sh5*-*" to list of targets which include
1516 * configure: Regenerate.
1520 * mips-opc.c: Clean up a few whitespace issues, and sort a
1521 few entries understanding that 'x' follows 'w' in the alphabet.
1526 * mips-opc.c: Add support for SB-1 MDMX subset and extensions.
1530 * Makefile.am: Run "make dep-am".
1531 * Makefile.in: Regenerate.
1532 * po/POTFILES.in: Regenerate.
1537 * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
1538 and 'Z' formats, for MDMX.
1539 (mips_isa_type): Add MDMX instructions to the ISA
1540 bit mask for bfd_mach_mipsisa64.
1541 * mips-opc.c: Add support for MDMX instructions.
1542 (MX): New definition.
1544 * mips-dis.c: Update copyright years to include 2002.
1548 * d10v-opc.c (d10v_opcodes): `btsti' does not modify its
1553 * configure.in: Add DLX configuraton support.
1554 * configure: Regenerate.
1555 * Makefile.am: Add DLX configuraton support.
1556 * Makefile.in: Regenerate.
1557 * disassemble.c: Add DLX support.
1558 * dlx-dis.c: New file.
1562 * Makefile.am (sh-dis.lo): Don't put make commands in deps.
1563 * Makefile.in: Regenerate.
1564 * arc-dis.c: Use #include "" instead of <> for local header files.
1565 * m68k-dis.c: Likewise.
1569 * Makefile.am (sh-dis.lo): Compile with @archdefs@.
1570 * Makefile.in: regenerate.
1572 * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
1577 * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
1581 * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
1582 * sh-dis.c (LITTLE_BIT): Delete.
1583 (print_insn_sh, print_insn_shl): Deleted.
1584 (print_insn_shx): Renamed to
1585 (print_insn_sh). No longer static. Handle SHmedia instructions.
1586 Use info->endian to determine endianness.
1587 * sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
1588 (print_insn_sh64x): No longer static. Renamed to
1589 (print_insn_sh64). Removed pfun_compact and endian arguments.
1590 If we got an uneven address to indicate SHmedia, adjust it.
1591 Return -2 for SHcompact instructions.
1595 * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
1596 * configure.in: Invoke AM_INSTALL_LIBBFD.
1597 * Makefile.am (install-data-local): Move to..
1598 (install_libopcodes): .. New target.
1599 (uninstall_libopcodes): Likewise.
1600 (install-bfdlibLTLIBRARIES): Likewise.
1601 (uninstall-bfdlibLTLIBRARIES): Likewise.
1603 (bfdincludedir): New.
1604 (lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
1605 * aclocal.m4: Regenerate.
1606 * configure: Regenerate.
1607 * Makefile.in: Regenerate.
1611 * fr30-asm.c: Regenerate.
1612 * fr30-desc.c: Regenerate.
1613 * fr30-dis.c: Regenerate.
1614 * m32r-asm.c: Regenerate.
1615 * m32r-desc.c: Regenerate.
1616 * m32r-dis.c: Regenerate.
1617 * openrisc-asm.c: Regenerate.
1618 * openrisc-desc.c: Regenerate.
1619 * openrisc-dis.c: Regenerate.
1620 * xstormy16-asm.c: Regenerate.
1621 * xstormy16-desc.c: Regenerate.
1622 * xstormy16-dis.c: Regenerate.
1626 * mips-dis.c (is_newabi): EABI is not a NewABI.
1630 * configure.in (shle-*-*elf*): Include sh64 support.
1631 * configure: Regenerate.
1635 * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
1636 (print_insn_mode): Print some basic info about floating point values.
1640 * ppc-opc.c: Add "tlbiel" for POWER4.
1644 * cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
1645 than just most-recently-opened.
1649 * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke.
1653 * z8k-dis.c (print_insn_z8k): Set disassemble_info to 2
1654 bytes_per_chunk, 6 bytes_per_line for nicer display of the hex
1656 (z8k_lookup_instr): CLASS_IGNORE case added.
1657 (output_instr): Don't print hex codes, they are already
1659 (unpack_instr): ARG_NIM4 case added. ARG_NIM8 case
1660 fixed. Support CLASS_BIT_1OR2 and CLASS_IGNORE cases.
1661 (unparse_instr): Fix base and indexed addressing disassembly:
1662 The index is inside the brackets.
1663 * z8kgen.c (gas): Add ARG_NIM4 and CLASS_IGNORE defines.
1664 (opt): Fix shift left/right arithmetic/logical byte defines:
1665 The high byte of the immediate word is ignored by the
1667 Fix n parameter of ldm opcodes: The opcode contains (n-1).
1668 (args): Fix "n" entry.
1669 (toks): Add "nim4" and "iiii" entries.
1670 * z8k-opc.h: Regenerated with new z8kgen.c.
1674 * po/id.po: New Indonesian translation.
1675 * configure.in (ALL_LIGUAS): Add id.po
1676 * configure: Regenerate.
1680 * ppc-opc.c (powerpc_opcode): Fix dssall operand list.
1684 * dep-in.sed: Cope with absolute paths.
1685 * Makefile.am (dep.sed): Subst TOPDIR.
1687 * Makefile.in: Regenerate.
1688 * ppc-opc.c: Whitespace.
1689 * s390-dis.c: Fix copyright date.
1693 * ppc-opc.c (vmaddfp): Fix operand order.
1697 * Makefile.am: Run "make dep-am".
1698 * Makefile.in: Regenerate.
1702 * ppc-opc.c: Add optional field to mtmsrd.
1703 (MTMSRD_L, XRLARB_MASK): Define.
1707 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
1709 (print_insn) Likewise.
1710 (putop): Fix handling of 'E'
1711 (OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
1712 (ptr_reg): Likewise.
1716 * po/fr.po: Updated version.
1720 * mips-opc.c (M3D): Tweak comment.
1721 (mips_builtin_op): Add comment indicating that opcodes of the
1722 same name must be placed together in the table, and sort
1723 the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
1724 "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
1728 * Makefile.am: Tidy up sh64 rules.
1729 * Makefile.in: Regenerate.
1733 * mips-dis.c: Update copyright years.
1737 * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
1738 bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
1739 comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
1740 indicate that they should dissassemble all applicable
1741 MIPS-specified ASEs.
1742 * mips-opc.c: Add support for MIPS-3D instructions.
1743 (M3D): New definition.
1745 * mips-opc.c: Update copyright years.
1749 * mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
1753 * mips-dis.c (is_newabi): Fix ABI decoding.
1757 * mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32
1758 and bfd_mach_mipsisa64 cases to match the rest.
1762 * po/fr.po: Updated version.
1766 * ppc-opc.c: Add optional `L' field to tlbie.
1767 (XRTLRA_MASK): Define.
1771 * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
1774 * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
1778 * pdp11-opc.c: Fix "mark" operand type. Fix operand types
1779 for float opcodes that take float operands. Add alternate
1780 names (xxxD vs. xxxF) for float opcodes.
1781 * pdp11-dis.c (print_operand): Clean up formatting for mode 67.
1782 (print_foperand): New function to handle float opcode operands.
1783 (print_insn_pdp11): Use print_foperand to disassemble float ops.
1787 * po/de.po: Updated.
1791 * Makefile.am (install-data-local): Install dis-asm.h.
1795 * configure.in (LINGUAS): Add de.po.
1796 * configure: Regenerate.
1797 * po/de.po: New file.
1801 * ppc-dis.c (powerpc_dialect): Handle power4 option.
1802 * ppc-opc.c (insert_bdm): Correct description of "at" branch
1803 hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
1804 (extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
1805 (BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
1806 (BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
1807 (PPCCOM32, PPCCOM64): Delete.
1808 (NOPOWER4, POWER4): Define.
1809 (powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
1810 and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
1811 are enabled for power4 rather than ppc64.
1815 * ppc-opc.c (powerpc_operands): Add WS field. Use for tlbre, tlbwe.
1819 * s390-dis.c (init_disasm): Use renamed architecture defines.
1823 * ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola
1828 * po/tr.po: Updated translation.
1832 * alpha-opc.c (alpha_opcodes): Fix thinko in ret pseudo
1837 * alpha-opc.c (alpha_opcodes): Add simple pseudos for
1838 lda, ldah, jmp, ret.
1842 * po/da.po: Updated translation.
1846 * cgen-asm.in (parse_insn_normal): Change call from
1847 @arch@_cgen_parse_operand to cd->parse_operand, to
1848 facilitate CGEN_ASM_INIT_HOOK doing useful work.
1852 * sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not
1857 * Makefile.am: "make dep-am".
1858 * Makefile.in: Regenerate.
1859 * aclocal.m4: Regenerate.
1860 * config.in: Regenerate.
1861 * configure: Regenerate.
1865 * configure.in <bfd_sh_arc>: For sh-* and shl-*, enable sh64
1866 support only for sh-*-*elf*, shl-*-*elf*, sh-*-linux* and
1868 * configure: Regenerate.
1872 * cgen-dis.c: Add prototypes for count_decodable_bits
1873 and add_insn_to_hash_chain.
1877 * configure.in <bfd_sh_arc>: Enable sh64 support on sh-*.
1878 * configure: Rebuilt.
1882 * or32-opc.c: Fix compile time warning messages.
1883 * or32-dis.c: Fix compile time warning messages.
1887 Contribute sh64-elf.
1889 * sh64-opc.c: Regenerate.
1891 * sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its
1892 purpose is more obvious.
1893 * sh64-opc.c (shmedia_table): Ditto.
1894 * sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto.
1895 (print_insn_shmedia): Ditto.
1897 * sh64-opc.c: Adjust comments to reflect reality: replace bits
1898 3:0 with zeros (not "reserved"), replace "rrrrrr" with
1899 "gggggg" for two-operand floating point opcodes. Remove
1902 * sh64-dis.c (print_insn_shmedia) <failing read_memory_func>:
1903 Correct printing of .byte:s. Return number of printed bytes or
1905 (print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto. Print as .byte:s
1906 to next four-byte-alignment if insn or data is not aligned.
1908 * sh64-dis.c: Update comments and fix comment formatting.
1909 (initialize_shmedia_opcode_mask_table) <case A_IMMM>:
1910 Abort instead of setting length to 0.
1911 (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
1912 crange_bsearch_cmpl, sh64_get_contents_type,
1913 sh64_address_in_cranges): Move to bfd/elf32-sh64.c.
1915 * sh64-opc.c: Remove #if 0:d entries for instructions not found in
1916 SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo.
1918 * sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed
1919 address with same prefix as SHcompact.
1920 In the disassembler, use a .cranges section for linked executables.
1921 * sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file
1922 and update for using structure in info->private_data.
1923 (struct sh64_disassemble_info): New.
1924 (is_shmedia_p): Delete.
1925 (crange_qsort_cmpb): New function.
1926 (crange_qsort_cmpl, crange_bsearch_cmpb): New functions.
1927 (crange_bsearch_cmpl, sh64_address_in_cranges): New functions.
1928 (init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions.
1929 (sh64_get_contents_type, sh64_address_is_shmedia): New functions.
1930 (print_insn_shmedia): Correct displaying of address after MOVI/SHORI
1931 pair. Display addresses for linked executables only.
1932 (print_insn_sh64x_media): Initialize info->private_data by calling
1933 init_sh64_disasm_info.
1934 (print_insn_sh64x): Ditto. Find out type of contents by calling
1935 sh64_contents_type_disasm. Display data regions using ".long" and
1936 ".byte" similar to unrecognized opcodes.
1938 * sh64-dis.c (is_shmedia_p): Check info->section and look for ISA
1939 information in section flags before considering symbols. Don't
1940 assume an info->mach setting of bfd_mach_sh5 means SHmedia code.
1941 * configure.in (bfd_sh_arch): Check presence of sh64 insns by
1942 matching $target $canon_targets instead of looking at the
1943 now-removed -DINCLUDE_SHMEDIA in $targ_cflags.
1944 * configure: Regenerate.
1946 * sh64-opc.c (shmedia_creg_table): New.
1947 * sh64-opc.h (shmedia_creg_info): New type.
1948 (shmedia_creg_table): Declare.
1949 * sh64-dis.c (creg_name): New function.
1950 (print_insn_shmedia): Use it.
1951 * disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map
1952 bfd_mach_sh5 to print_insn_sh64 if big-endian and to
1953 print_insn_sh64l if little-endian.
1954 * sh64-dis.c (print_insn_shmedia): Make r unsigned.
1955 (print_insn_sh64l): New.
1956 (print_insn_sh64x): New.
1957 (print_insn_sh64x_media): New.
1958 (print_insn_sh64): Break out code to print_insn_sh64x and
1959 print_insn_sh64x_media.
1961 * sh64-opc.h: New file
1962 * sh64-opc.c: New file
1963 * sh64-dis.c: New file
1964 * Makefile.am: Add sh64 targets.
1965 (HFILES): Add sh64-opc.h.
1966 (CFILES): Add sh64-opc.c and sh64-dis.c.
1967 (ALL_MACHINES): Add sh64 files.
1968 * Makefile.in: Regenerate.
1969 * configure.in: Add support for sh64 to bfd_sh_arch.
1970 * configure: Regenerate.
1971 * disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define.
1972 (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to
1974 * sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4.
1975 * po/POTFILES.in: Regenerate.
1976 * po/opcodes.pot: Regenerate.
1980 * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
1984 * sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS.
1988 * Makefile.am: Run "make dep-am"
1989 * Makefile.in: Regenerate.
1993 * or32-dis.c: New file.
1994 * or32-opc.c: New file.
1995 * configure.in: Add support for or32.
1996 * configure: Regenerate.
1997 * Makefile.am: Add support for or32.
1998 * Makefile.in: Regenerate.
1999 * disassemble.c: Add support for or32.
2000 * po/POTFILES.in: Regenerate.
2001 * po/opcodes.pot: Regenerate.
2005 * configure: Regenerated.
2009 * po/fr.po: Updated version.
2013 * po/es.po: Updated version.
2017 * po/da.po: New version.
2021 * po/da.po: New file: Spanish translation.
2022 * configure.in (ALL_LINGUAS): Add da.
2023 * configure: Regenerate.
2027 * fr30-asm.c: Regenerate.
2028 * fr30-desc.c: Likewise.
2029 * fr30-desc.h: Likewise.
2030 * fr30-dis.c: Likewise.
2031 * fr30-ibld.c: Likewise.
2032 * fr30-opc.c: Likewise.
2033 * fr30-opc.h: Likewise.
2034 * m32r-asm.c: Likewise.
2035 * m32r-desc.c: Likewise.
2036 * m32r-desc.h: Likewise.
2037 * m32r-dis.c: Likewise.
2038 * m32r-ibld.c: Likewise.
2039 * m32r-opc.c: Likewise.
2040 * m32r-opc.h: Likewise.
2041 * m32r-opinst.c: Likewise.
2042 * openrisc-asm.c: Likewise.
2043 * openrisc-desc.c: Likewise.
2044 * openrisc-desc.h: Likewise.
2045 * openrisc-dis.c: Likewise.
2046 * openrisc-ibld.c: Likewise.
2047 * openrisc-opc.c: Likewise.
2048 * openrisc-opc.h: Likewise.
2049 * xstormy16-desc.c: Likewise.
2053 * alpha-dis.c (print_insn_alpha): Also mask the base opcode for
2058 * Makefile.am: Run "make dep-am".
2059 * Makefile.in: Regenerate.
2060 * po/POTFILES.in: Regenerate.
2064 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
2065 * arm-dis.c (print_insn_arm): Don't handle 'h' case.
2069 * arm-opc.h (arm_opcodes): Add bxj instruction.
2073 * po/opcodes.pot: Regenerate.
2074 * po/fr.po: Regenerate.
2075 * po/sv.po: Regenerate.
2076 * po/tr.po: Regenerate.
2080 * po/tr.po: Import new version.
2084 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
2085 * arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
2090 * xstormy16-asm.c: Regenerate.
2091 * xstormy16-desc.c: Likewise.
2092 * xstormy16-desc.h: Likewise.
2093 * xstormy16-dis.c: Likewise.
2094 * xstormy16-opc.c: Likewise.
2095 * xstormy16-opc.h: Likewise.
2099 * po/es.po: New file: Spanish translation.
2100 * configure.in (ALL_LINGUAS): Add es.
2101 * configure: Regenerate.
2103 For older changes see ChangeLog-0001
2109 version-control: never