1 /* BFD support for handling relocation entries.
2 Copyright (C) 1990-2019 Free Software Foundation, Inc.
3 Written by Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 BFD maintains relocations in much the same way it maintains
27 symbols: they are left alone until required, then read in
28 en-masse and translated into an internal form. A common
29 routine <<bfd_perform_relocation>> acts upon the
30 canonical form to do the fixup.
32 Relocations are maintained on a per section basis,
33 while symbols are maintained on a per BFD basis.
35 All that a back end has to do to fit the BFD interface is to create
36 a <<struct reloc_cache_entry>> for each relocation
37 in a particular section, and fill in the right bits of the structures.
46 /* DO compile in the reloc_code name table from libbfd.h. */
47 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. Note - the value 2 is used so that it
69 . will not be mistaken for the boolean TRUE or FALSE values. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok. If this type is
91 . returned, the error_message argument to bfd_perform_relocation
95 . bfd_reloc_status_type;
97 .typedef const struct reloc_howto_struct reloc_howto_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's idea of
287 . an external reloc number is stored in this field. *}
290 . {* The encoded size of the item to be relocated. This is *not* a
291 . power-of-two measure. Use bfd_get_reloc_size to find the size
292 . of the item in bytes. *}
293 . unsigned int size:3;
295 . {* The number of bits in the field to be relocated. This is used
296 . when doing overflow checking. *}
297 . unsigned int bitsize:7;
299 . {* The value the final relocation is shifted right by. This drops
300 . unwanted data from the relocation. *}
301 . unsigned int rightshift:6;
303 . {* The bit position of the reloc value in the destination.
304 . The relocated value is left shifted by this amount. *}
305 . unsigned int bitpos:6;
307 . {* What type of overflow error should be checked for when
309 . ENUM_BITFIELD (complain_overflow) complain_on_overflow:2;
311 . {* The relocation value should be negated before applying. *}
312 . unsigned int negate:1;
314 . {* The relocation is relative to the item being relocated. *}
315 . unsigned int pc_relative:1;
317 . {* Some formats record a relocation addend in the section contents
318 . rather than with the relocation. For ELF formats this is the
319 . distinction between USE_REL and USE_RELA (though the code checks
320 . for USE_REL == 1/0). The value of this field is TRUE if the
321 . addend is recorded with the section contents; when performing a
322 . partial link (ld -r) the section contents (the data) will be
323 . modified. The value of this field is FALSE if addends are
324 . recorded with the relocation (in arelent.addend); when performing
325 . a partial link the relocation will be modified.
326 . All relocations for all ELF USE_RELA targets should set this field
327 . to FALSE (values of TRUE should be looked on with suspicion).
328 . However, the converse is not true: not all relocations of all ELF
329 . USE_REL targets set this field to TRUE. Why this is so is peculiar
330 . to each particular target. For relocs that aren't used in partial
331 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
332 . unsigned int partial_inplace:1;
334 . {* When some formats create PC relative instructions, they leave
335 . the value of the pc of the place being relocated in the offset
336 . slot of the instruction, so that a PC relative relocation can
337 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
338 . Some formats leave the displacement part of an instruction
339 . empty (e.g., ELF); this flag signals the fact. *}
340 . unsigned int pcrel_offset:1;
342 . {* src_mask selects the part of the instruction (or data) to be used
343 . in the relocation sum. If the target relocations don't have an
344 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
345 . dst_mask to extract the addend from the section contents. If
346 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
347 . field should normally be zero. Non-zero values for ELF USE_RELA
348 . targets should be viewed with suspicion as normally the value in
349 . the dst_mask part of the section contents should be ignored. *}
352 . {* dst_mask selects which parts of the instruction (or data) are
353 . replaced with a relocated value. *}
356 . {* If this field is non null, then the supplied function is
357 . called rather than the normal function. This allows really
358 . strange relocation methods to be accommodated. *}
359 . bfd_reloc_status_type (*special_function)
360 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
363 . {* The textual name of the relocation type. *}
374 The HOWTO macro fills in a reloc_howto_type (a typedef for
375 const struct reloc_howto_struct).
377 .#define HOWTO(type, right, size, bits, pcrel, left, ovf, func, name, \
378 . inplace, src_mask, dst_mask, pcrel_off) \
379 . { (unsigned) type, size < 0 ? -size : size, bits, right, left, ovf, \
380 . size < 0, pcrel, inplace, pcrel_off, src_mask, dst_mask, func, name }
383 This is used to fill in an empty howto entry in an array.
385 .#define EMPTY_HOWTO(C) \
386 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
387 . NULL, FALSE, 0, 0, FALSE)
396 unsigned int bfd_get_reloc_size (reloc_howto_type *);
399 For a reloc_howto_type that operates on a fixed number of bytes,
400 this returns the number of bytes operated on.
404 bfd_get_reloc_size (reloc_howto_type *howto)
424 How relocs are tied together in an <<asection>>:
426 .typedef struct relent_chain
429 . struct relent_chain *next;
435 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
436 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
443 bfd_reloc_status_type bfd_check_overflow
444 (enum complain_overflow how,
445 unsigned int bitsize,
446 unsigned int rightshift,
447 unsigned int addrsize,
451 Perform overflow checking on @var{relocation} which has
452 @var{bitsize} significant bits and will be shifted right by
453 @var{rightshift} bits, on a machine with addresses containing
454 @var{addrsize} significant bits. The result is either of
455 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
459 bfd_reloc_status_type
460 bfd_check_overflow (enum complain_overflow how,
461 unsigned int bitsize,
462 unsigned int rightshift,
463 unsigned int addrsize,
466 bfd_vma fieldmask, addrmask, signmask, ss, a;
467 bfd_reloc_status_type flag = bfd_reloc_ok;
469 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
470 we'll be permissive: extra bits in the field mask will
471 automatically extend the address mask for purposes of the
473 fieldmask = N_ONES (bitsize);
474 signmask = ~fieldmask;
475 addrmask = N_ONES (addrsize) | (fieldmask << rightshift);
476 a = (relocation & addrmask) >> rightshift;
480 case complain_overflow_dont:
483 case complain_overflow_signed:
484 /* If any sign bits are set, all sign bits must be set. That
485 is, A must be a valid negative address after shifting. */
486 signmask = ~ (fieldmask >> 1);
489 case complain_overflow_bitfield:
490 /* Bitfields are sometimes signed, sometimes unsigned. We
491 explicitly allow an address wrap too, which means a bitfield
492 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
493 if the value has some, but not all, bits set outside the
496 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
497 flag = bfd_reloc_overflow;
500 case complain_overflow_unsigned:
501 /* We have an overflow if the address does not fit in the field. */
502 if ((a & signmask) != 0)
503 flag = bfd_reloc_overflow;
515 bfd_reloc_offset_in_range
518 bfd_boolean bfd_reloc_offset_in_range
519 (reloc_howto_type *howto,
522 bfd_size_type offset);
525 Returns TRUE if the reloc described by @var{HOWTO} can be
526 applied at @var{OFFSET} octets in @var{SECTION}.
530 /* HOWTO describes a relocation, at offset OCTET. Return whether the
531 relocation field is within SECTION of ABFD. */
534 bfd_reloc_offset_in_range (reloc_howto_type *howto,
539 bfd_size_type octet_end = bfd_get_section_limit_octets (abfd, section);
540 bfd_size_type reloc_size = bfd_get_reloc_size (howto);
542 /* The reloc field must be contained entirely within the section.
543 Allow zero length fields (marker relocs or NONE relocs where no
544 relocation will be performed) at the end of the section. */
545 return octet <= octet_end && octet + reloc_size <= octet_end;
548 /* Read and return the section contents at DATA converted to a host
549 integer (bfd_vma). The number of bytes read is given by the HOWTO. */
552 read_reloc (bfd *abfd, bfd_byte *data, reloc_howto_type *howto)
557 return bfd_get_8 (abfd, data);
560 return bfd_get_16 (abfd, data);
563 return bfd_get_32 (abfd, data);
570 return bfd_get_64 (abfd, data);
574 return bfd_get_24 (abfd, data);
582 /* Convert VAL to target format and write to DATA. The number of
583 bytes written is given by the HOWTO. */
586 write_reloc (bfd *abfd, bfd_vma val, bfd_byte *data, reloc_howto_type *howto)
591 bfd_put_8 (abfd, val, data);
595 bfd_put_16 (abfd, val, data);
599 bfd_put_32 (abfd, val, data);
607 bfd_put_64 (abfd, val, data);
612 bfd_put_24 (abfd, val, data);
620 /* Apply RELOCATION value to target bytes at DATA, according to
624 apply_reloc (bfd *abfd, bfd_byte *data, reloc_howto_type *howto,
627 bfd_vma val = read_reloc (abfd, data, howto);
630 relocation = -relocation;
632 val = ((val & ~howto->dst_mask)
633 | (((val & howto->src_mask) + relocation) & howto->dst_mask));
635 write_reloc (abfd, val, data, howto);
640 bfd_perform_relocation
643 bfd_reloc_status_type bfd_perform_relocation
645 arelent *reloc_entry,
647 asection *input_section,
649 char **error_message);
652 If @var{output_bfd} is supplied to this function, the
653 generated image will be relocatable; the relocations are
654 copied to the output file after they have been changed to
655 reflect the new state of the world. There are two ways of
656 reflecting the results of partial linkage in an output file:
657 by modifying the output data in place, and by modifying the
658 relocation record. Some native formats (e.g., basic a.out and
659 basic coff) have no way of specifying an addend in the
660 relocation type, so the addend has to go in the output data.
661 This is no big deal since in these formats the output data
662 slot will always be big enough for the addend. Complex reloc
663 types with addends were invented to solve just this problem.
664 The @var{error_message} argument is set to an error message if
665 this return @code{bfd_reloc_dangerous}.
669 bfd_reloc_status_type
670 bfd_perform_relocation (bfd *abfd,
671 arelent *reloc_entry,
673 asection *input_section,
675 char **error_message)
678 bfd_reloc_status_type flag = bfd_reloc_ok;
679 bfd_size_type octets;
680 bfd_vma output_base = 0;
681 reloc_howto_type *howto = reloc_entry->howto;
682 asection *reloc_target_output_section;
685 symbol = *(reloc_entry->sym_ptr_ptr);
687 /* If we are not producing relocatable output, return an error if
688 the symbol is not defined. An undefined weak symbol is
689 considered to have a value of zero (SVR4 ABI, p. 4-27). */
690 if (bfd_is_und_section (symbol->section)
691 && (symbol->flags & BSF_WEAK) == 0
692 && output_bfd == NULL)
693 flag = bfd_reloc_undefined;
695 /* If there is a function supplied to handle this relocation type,
696 call it. It'll return `bfd_reloc_continue' if further processing
698 if (howto && howto->special_function)
700 bfd_reloc_status_type cont;
702 /* Note - we do not call bfd_reloc_offset_in_range here as the
703 reloc_entry->address field might actually be valid for the
704 backend concerned. It is up to the special_function itself
705 to call bfd_reloc_offset_in_range if needed. */
706 cont = howto->special_function (abfd, reloc_entry, symbol, data,
707 input_section, output_bfd,
709 if (cont != bfd_reloc_continue)
713 if (bfd_is_abs_section (symbol->section)
714 && output_bfd != NULL)
716 reloc_entry->address += input_section->output_offset;
720 /* PR 17512: file: 0f67f69d. */
722 return bfd_reloc_undefined;
724 /* Is the address of the relocation really within the section? */
725 octets = reloc_entry->address * bfd_octets_per_byte (abfd);
726 if (!bfd_reloc_offset_in_range (howto, abfd, input_section, octets))
727 return bfd_reloc_outofrange;
729 /* Work out which section the relocation is targeted at and the
730 initial relocation command value. */
732 /* Get symbol value. (Common symbols are special.) */
733 if (bfd_is_com_section (symbol->section))
736 relocation = symbol->value;
738 reloc_target_output_section = symbol->section->output_section;
740 /* Convert input-section-relative symbol value to absolute. */
741 if ((output_bfd && ! howto->partial_inplace)
742 || reloc_target_output_section == NULL)
745 output_base = reloc_target_output_section->vma;
747 relocation += output_base + symbol->section->output_offset;
749 /* Add in supplied addend. */
750 relocation += reloc_entry->addend;
752 /* Here the variable relocation holds the final address of the
753 symbol we are relocating against, plus any addend. */
755 if (howto->pc_relative)
757 /* This is a PC relative relocation. We want to set RELOCATION
758 to the distance between the address of the symbol and the
759 location. RELOCATION is already the address of the symbol.
761 We start by subtracting the address of the section containing
764 If pcrel_offset is set, we must further subtract the position
765 of the location within the section. Some targets arrange for
766 the addend to be the negative of the position of the location
767 within the section; for example, i386-aout does this. For
768 i386-aout, pcrel_offset is FALSE. Some other targets do not
769 include the position of the location; for example, ELF.
770 For those targets, pcrel_offset is TRUE.
772 If we are producing relocatable output, then we must ensure
773 that this reloc will be correctly computed when the final
774 relocation is done. If pcrel_offset is FALSE we want to wind
775 up with the negative of the location within the section,
776 which means we must adjust the existing addend by the change
777 in the location within the section. If pcrel_offset is TRUE
778 we do not want to adjust the existing addend at all.
780 FIXME: This seems logical to me, but for the case of
781 producing relocatable output it is not what the code
782 actually does. I don't want to change it, because it seems
783 far too likely that something will break. */
786 input_section->output_section->vma + input_section->output_offset;
788 if (howto->pcrel_offset)
789 relocation -= reloc_entry->address;
792 if (output_bfd != NULL)
794 if (! howto->partial_inplace)
796 /* This is a partial relocation, and we want to apply the relocation
797 to the reloc entry rather than the raw data. Modify the reloc
798 inplace to reflect what we now know. */
799 reloc_entry->addend = relocation;
800 reloc_entry->address += input_section->output_offset;
805 /* This is a partial relocation, but inplace, so modify the
808 If we've relocated with a symbol with a section, change
809 into a ref to the section belonging to the symbol. */
811 reloc_entry->address += input_section->output_offset;
814 if (abfd->xvec->flavour == bfd_target_coff_flavour
815 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
816 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
818 /* For m68k-coff, the addend was being subtracted twice during
819 relocation with -r. Removing the line below this comment
820 fixes that problem; see PR 2953.
822 However, Ian wrote the following, regarding removing the line below,
823 which explains why it is still enabled: --djm
825 If you put a patch like that into BFD you need to check all the COFF
826 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
827 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
828 problem in a different way. There may very well be a reason that the
829 code works as it does.
831 Hmmm. The first obvious point is that bfd_perform_relocation should
832 not have any tests that depend upon the flavour. It's seem like
833 entirely the wrong place for such a thing. The second obvious point
834 is that the current code ignores the reloc addend when producing
835 relocatable output for COFF. That's peculiar. In fact, I really
836 have no idea what the point of the line you want to remove is.
838 A typical COFF reloc subtracts the old value of the symbol and adds in
839 the new value to the location in the object file (if it's a pc
840 relative reloc it adds the difference between the symbol value and the
841 location). When relocating we need to preserve that property.
843 BFD handles this by setting the addend to the negative of the old
844 value of the symbol. Unfortunately it handles common symbols in a
845 non-standard way (it doesn't subtract the old value) but that's a
846 different story (we can't change it without losing backward
847 compatibility with old object files) (coff-i386 does subtract the old
848 value, to be compatible with existing coff-i386 targets, like SCO).
850 So everything works fine when not producing relocatable output. When
851 we are producing relocatable output, logically we should do exactly
852 what we do when not producing relocatable output. Therefore, your
853 patch is correct. In fact, it should probably always just set
854 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
855 add the value into the object file. This won't hurt the COFF code,
856 which doesn't use the addend; I'm not sure what it will do to other
857 formats (the thing to check for would be whether any formats both use
858 the addend and set partial_inplace).
860 When I wanted to make coff-i386 produce relocatable output, I ran
861 into the problem that you are running into: I wanted to remove that
862 line. Rather than risk it, I made the coff-i386 relocs use a special
863 function; it's coff_i386_reloc in coff-i386.c. The function
864 specifically adds the addend field into the object file, knowing that
865 bfd_perform_relocation is not going to. If you remove that line, then
866 coff-i386.c will wind up adding the addend field in twice. It's
867 trivial to fix; it just needs to be done.
869 The problem with removing the line is just that it may break some
870 working code. With BFD it's hard to be sure of anything. The right
871 way to deal with this is simply to build and test at least all the
872 supported COFF targets. It should be straightforward if time and disk
873 space consuming. For each target:
875 2) generate some executable, and link it using -r (I would
876 probably use paranoia.o and link against newlib/libc.a, which
877 for all the supported targets would be available in
878 /usr/cygnus/progressive/H-host/target/lib/libc.a).
879 3) make the change to reloc.c
880 4) rebuild the linker
882 6) if the resulting object files are the same, you have at least
884 7) if they are different you have to figure out which version is
887 relocation -= reloc_entry->addend;
888 reloc_entry->addend = 0;
892 reloc_entry->addend = relocation;
897 /* FIXME: This overflow checking is incomplete, because the value
898 might have overflowed before we get here. For a correct check we
899 need to compute the value in a size larger than bitsize, but we
900 can't reasonably do that for a reloc the same size as a host
902 FIXME: We should also do overflow checking on the result after
903 adding in the value contained in the object file. */
904 if (howto->complain_on_overflow != complain_overflow_dont
905 && flag == bfd_reloc_ok)
906 flag = bfd_check_overflow (howto->complain_on_overflow,
909 bfd_arch_bits_per_address (abfd),
912 /* Either we are relocating all the way, or we don't want to apply
913 the relocation to the reloc entry (probably because there isn't
914 any room in the output format to describe addends to relocs). */
916 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
917 (OSF version 1.3, compiler version 3.11). It miscompiles the
931 x <<= (unsigned long) s.i0;
935 printf ("succeeded (%lx)\n", x);
939 relocation >>= (bfd_vma) howto->rightshift;
941 /* Shift everything up to where it's going to be used. */
942 relocation <<= (bfd_vma) howto->bitpos;
944 /* Wait for the day when all have the mask in them. */
947 i instruction to be left alone
948 o offset within instruction
949 r relocation offset to apply
958 (( i i i i i o o o o o from bfd_get<size>
959 and S S S S S) to get the size offset we want
960 + r r r r r r r r r r) to get the final value to place
961 and D D D D D to chop to right size
962 -----------------------
965 ( i i i i i o o o o o from bfd_get<size>
966 and N N N N N ) get instruction
967 -----------------------
973 -----------------------
974 = R R R R R R R R R R put into bfd_put<size>
977 data = (bfd_byte *) data + octets;
978 apply_reloc (abfd, data, howto, relocation);
984 bfd_install_relocation
987 bfd_reloc_status_type bfd_install_relocation
989 arelent *reloc_entry,
990 void *data, bfd_vma data_start,
991 asection *input_section,
992 char **error_message);
995 This looks remarkably like <<bfd_perform_relocation>>, except it
996 does not expect that the section contents have been filled in.
997 I.e., it's suitable for use when creating, rather than applying
1000 For now, this function should be considered reserved for the
1004 bfd_reloc_status_type
1005 bfd_install_relocation (bfd *abfd,
1006 arelent *reloc_entry,
1008 bfd_vma data_start_offset,
1009 asection *input_section,
1010 char **error_message)
1013 bfd_reloc_status_type flag = bfd_reloc_ok;
1014 bfd_size_type octets;
1015 bfd_vma output_base = 0;
1016 reloc_howto_type *howto = reloc_entry->howto;
1017 asection *reloc_target_output_section;
1021 symbol = *(reloc_entry->sym_ptr_ptr);
1023 /* If there is a function supplied to handle this relocation type,
1024 call it. It'll return `bfd_reloc_continue' if further processing
1026 if (howto && howto->special_function)
1028 bfd_reloc_status_type cont;
1030 /* Note - we do not call bfd_reloc_offset_in_range here as the
1031 reloc_entry->address field might actually be valid for the
1032 backend concerned. It is up to the special_function itself
1033 to call bfd_reloc_offset_in_range if needed. */
1034 /* XXX - The special_function calls haven't been fixed up to deal
1035 with creating new relocations and section contents. */
1036 cont = howto->special_function (abfd, reloc_entry, symbol,
1037 /* XXX - Non-portable! */
1038 ((bfd_byte *) data_start
1039 - data_start_offset),
1040 input_section, abfd, error_message);
1041 if (cont != bfd_reloc_continue)
1045 if (bfd_is_abs_section (symbol->section))
1047 reloc_entry->address += input_section->output_offset;
1048 return bfd_reloc_ok;
1051 /* No need to check for howto != NULL if !bfd_is_abs_section as
1052 it will have been checked in `bfd_perform_relocation already'. */
1054 /* Is the address of the relocation really within the section? */
1055 octets = reloc_entry->address * bfd_octets_per_byte (abfd);
1056 if (!bfd_reloc_offset_in_range (howto, abfd, input_section, octets))
1057 return bfd_reloc_outofrange;
1059 /* Work out which section the relocation is targeted at and the
1060 initial relocation command value. */
1062 /* Get symbol value. (Common symbols are special.) */
1063 if (bfd_is_com_section (symbol->section))
1066 relocation = symbol->value;
1068 reloc_target_output_section = symbol->section->output_section;
1070 /* Convert input-section-relative symbol value to absolute. */
1071 if (! howto->partial_inplace)
1074 output_base = reloc_target_output_section->vma;
1076 relocation += output_base + symbol->section->output_offset;
1078 /* Add in supplied addend. */
1079 relocation += reloc_entry->addend;
1081 /* Here the variable relocation holds the final address of the
1082 symbol we are relocating against, plus any addend. */
1084 if (howto->pc_relative)
1086 /* This is a PC relative relocation. We want to set RELOCATION
1087 to the distance between the address of the symbol and the
1088 location. RELOCATION is already the address of the symbol.
1090 We start by subtracting the address of the section containing
1093 If pcrel_offset is set, we must further subtract the position
1094 of the location within the section. Some targets arrange for
1095 the addend to be the negative of the position of the location
1096 within the section; for example, i386-aout does this. For
1097 i386-aout, pcrel_offset is FALSE. Some other targets do not
1098 include the position of the location; for example, ELF.
1099 For those targets, pcrel_offset is TRUE.
1101 If we are producing relocatable output, then we must ensure
1102 that this reloc will be correctly computed when the final
1103 relocation is done. If pcrel_offset is FALSE we want to wind
1104 up with the negative of the location within the section,
1105 which means we must adjust the existing addend by the change
1106 in the location within the section. If pcrel_offset is TRUE
1107 we do not want to adjust the existing addend at all.
1109 FIXME: This seems logical to me, but for the case of
1110 producing relocatable output it is not what the code
1111 actually does. I don't want to change it, because it seems
1112 far too likely that something will break. */
1115 input_section->output_section->vma + input_section->output_offset;
1117 if (howto->pcrel_offset && howto->partial_inplace)
1118 relocation -= reloc_entry->address;
1121 if (! howto->partial_inplace)
1123 /* This is a partial relocation, and we want to apply the relocation
1124 to the reloc entry rather than the raw data. Modify the reloc
1125 inplace to reflect what we now know. */
1126 reloc_entry->addend = relocation;
1127 reloc_entry->address += input_section->output_offset;
1132 /* This is a partial relocation, but inplace, so modify the
1135 If we've relocated with a symbol with a section, change
1136 into a ref to the section belonging to the symbol. */
1137 reloc_entry->address += input_section->output_offset;
1140 if (abfd->xvec->flavour == bfd_target_coff_flavour
1141 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
1142 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
1145 /* For m68k-coff, the addend was being subtracted twice during
1146 relocation with -r. Removing the line below this comment
1147 fixes that problem; see PR 2953.
1149 However, Ian wrote the following, regarding removing the line below,
1150 which explains why it is still enabled: --djm
1152 If you put a patch like that into BFD you need to check all the COFF
1153 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1154 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1155 problem in a different way. There may very well be a reason that the
1156 code works as it does.
1158 Hmmm. The first obvious point is that bfd_install_relocation should
1159 not have any tests that depend upon the flavour. It's seem like
1160 entirely the wrong place for such a thing. The second obvious point
1161 is that the current code ignores the reloc addend when producing
1162 relocatable output for COFF. That's peculiar. In fact, I really
1163 have no idea what the point of the line you want to remove is.
1165 A typical COFF reloc subtracts the old value of the symbol and adds in
1166 the new value to the location in the object file (if it's a pc
1167 relative reloc it adds the difference between the symbol value and the
1168 location). When relocating we need to preserve that property.
1170 BFD handles this by setting the addend to the negative of the old
1171 value of the symbol. Unfortunately it handles common symbols in a
1172 non-standard way (it doesn't subtract the old value) but that's a
1173 different story (we can't change it without losing backward
1174 compatibility with old object files) (coff-i386 does subtract the old
1175 value, to be compatible with existing coff-i386 targets, like SCO).
1177 So everything works fine when not producing relocatable output. When
1178 we are producing relocatable output, logically we should do exactly
1179 what we do when not producing relocatable output. Therefore, your
1180 patch is correct. In fact, it should probably always just set
1181 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1182 add the value into the object file. This won't hurt the COFF code,
1183 which doesn't use the addend; I'm not sure what it will do to other
1184 formats (the thing to check for would be whether any formats both use
1185 the addend and set partial_inplace).
1187 When I wanted to make coff-i386 produce relocatable output, I ran
1188 into the problem that you are running into: I wanted to remove that
1189 line. Rather than risk it, I made the coff-i386 relocs use a special
1190 function; it's coff_i386_reloc in coff-i386.c. The function
1191 specifically adds the addend field into the object file, knowing that
1192 bfd_install_relocation is not going to. If you remove that line, then
1193 coff-i386.c will wind up adding the addend field in twice. It's
1194 trivial to fix; it just needs to be done.
1196 The problem with removing the line is just that it may break some
1197 working code. With BFD it's hard to be sure of anything. The right
1198 way to deal with this is simply to build and test at least all the
1199 supported COFF targets. It should be straightforward if time and disk
1200 space consuming. For each target:
1202 2) generate some executable, and link it using -r (I would
1203 probably use paranoia.o and link against newlib/libc.a, which
1204 for all the supported targets would be available in
1205 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1206 3) make the change to reloc.c
1207 4) rebuild the linker
1209 6) if the resulting object files are the same, you have at least
1211 7) if they are different you have to figure out which version is
1213 relocation -= reloc_entry->addend;
1214 /* FIXME: There should be no target specific code here... */
1215 if (strcmp (abfd->xvec->name, "coff-z8k") != 0)
1216 reloc_entry->addend = 0;
1220 reloc_entry->addend = relocation;
1224 /* FIXME: This overflow checking is incomplete, because the value
1225 might have overflowed before we get here. For a correct check we
1226 need to compute the value in a size larger than bitsize, but we
1227 can't reasonably do that for a reloc the same size as a host
1229 FIXME: We should also do overflow checking on the result after
1230 adding in the value contained in the object file. */
1231 if (howto->complain_on_overflow != complain_overflow_dont)
1232 flag = bfd_check_overflow (howto->complain_on_overflow,
1235 bfd_arch_bits_per_address (abfd),
1238 /* Either we are relocating all the way, or we don't want to apply
1239 the relocation to the reloc entry (probably because there isn't
1240 any room in the output format to describe addends to relocs). */
1242 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1243 (OSF version 1.3, compiler version 3.11). It miscompiles the
1257 x <<= (unsigned long) s.i0;
1259 printf ("failed\n");
1261 printf ("succeeded (%lx)\n", x);
1265 relocation >>= (bfd_vma) howto->rightshift;
1267 /* Shift everything up to where it's going to be used. */
1268 relocation <<= (bfd_vma) howto->bitpos;
1270 /* Wait for the day when all have the mask in them. */
1273 i instruction to be left alone
1274 o offset within instruction
1275 r relocation offset to apply
1284 (( i i i i i o o o o o from bfd_get<size>
1285 and S S S S S) to get the size offset we want
1286 + r r r r r r r r r r) to get the final value to place
1287 and D D D D D to chop to right size
1288 -----------------------
1291 ( i i i i i o o o o o from bfd_get<size>
1292 and N N N N N ) get instruction
1293 -----------------------
1299 -----------------------
1300 = R R R R R R R R R R put into bfd_put<size>
1303 data = (bfd_byte *) data_start + (octets - data_start_offset);
1304 apply_reloc (abfd, data, howto, relocation);
1308 /* This relocation routine is used by some of the backend linkers.
1309 They do not construct asymbol or arelent structures, so there is no
1310 reason for them to use bfd_perform_relocation. Also,
1311 bfd_perform_relocation is so hacked up it is easier to write a new
1312 function than to try to deal with it.
1314 This routine does a final relocation. Whether it is useful for a
1315 relocatable link depends upon how the object format defines
1318 FIXME: This routine ignores any special_function in the HOWTO,
1319 since the existing special_function values have been written for
1320 bfd_perform_relocation.
1322 HOWTO is the reloc howto information.
1323 INPUT_BFD is the BFD which the reloc applies to.
1324 INPUT_SECTION is the section which the reloc applies to.
1325 CONTENTS is the contents of the section.
1326 ADDRESS is the address of the reloc within INPUT_SECTION.
1327 VALUE is the value of the symbol the reloc refers to.
1328 ADDEND is the addend of the reloc. */
1330 bfd_reloc_status_type
1331 _bfd_final_link_relocate (reloc_howto_type *howto,
1333 asection *input_section,
1340 bfd_size_type octets = address * bfd_octets_per_byte (input_bfd);
1342 /* Sanity check the address. */
1343 if (!bfd_reloc_offset_in_range (howto, input_bfd, input_section, octets))
1344 return bfd_reloc_outofrange;
1346 /* This function assumes that we are dealing with a basic relocation
1347 against a symbol. We want to compute the value of the symbol to
1348 relocate to. This is just VALUE, the value of the symbol, plus
1349 ADDEND, any addend associated with the reloc. */
1350 relocation = value + addend;
1352 /* If the relocation is PC relative, we want to set RELOCATION to
1353 the distance between the symbol (currently in RELOCATION) and the
1354 location we are relocating. Some targets (e.g., i386-aout)
1355 arrange for the contents of the section to be the negative of the
1356 offset of the location within the section; for such targets
1357 pcrel_offset is FALSE. Other targets (e.g., ELF) simply leave
1358 the contents of the section as zero; for such targets
1359 pcrel_offset is TRUE. If pcrel_offset is FALSE we do not need to
1360 subtract out the offset of the location within the section (which
1361 is just ADDRESS). */
1362 if (howto->pc_relative)
1364 relocation -= (input_section->output_section->vma
1365 + input_section->output_offset);
1366 if (howto->pcrel_offset)
1367 relocation -= address;
1370 return _bfd_relocate_contents (howto, input_bfd, relocation,
1372 + address * bfd_octets_per_byte (input_bfd));
1375 /* Relocate a given location using a given value and howto. */
1377 bfd_reloc_status_type
1378 _bfd_relocate_contents (reloc_howto_type *howto,
1384 bfd_reloc_status_type flag;
1385 unsigned int rightshift = howto->rightshift;
1386 unsigned int bitpos = howto->bitpos;
1389 relocation = -relocation;
1391 /* Get the value we are going to relocate. */
1392 x = read_reloc (input_bfd, location, howto);
1394 /* Check for overflow. FIXME: We may drop bits during the addition
1395 which we don't check for. We must either check at every single
1396 operation, which would be tedious, or we must do the computations
1397 in a type larger than bfd_vma, which would be inefficient. */
1398 flag = bfd_reloc_ok;
1399 if (howto->complain_on_overflow != complain_overflow_dont)
1401 bfd_vma addrmask, fieldmask, signmask, ss;
1404 /* Get the values to be added together. For signed and unsigned
1405 relocations, we assume that all values should be truncated to
1406 the size of an address. For bitfields, all the bits matter.
1407 See also bfd_check_overflow. */
1408 fieldmask = N_ONES (howto->bitsize);
1409 signmask = ~fieldmask;
1410 addrmask = (N_ONES (bfd_arch_bits_per_address (input_bfd))
1411 | (fieldmask << rightshift));
1412 a = (relocation & addrmask) >> rightshift;
1413 b = (x & howto->src_mask & addrmask) >> bitpos;
1414 addrmask >>= rightshift;
1416 switch (howto->complain_on_overflow)
1418 case complain_overflow_signed:
1419 /* If any sign bits are set, all sign bits must be set.
1420 That is, A must be a valid negative address after
1422 signmask = ~(fieldmask >> 1);
1425 case complain_overflow_bitfield:
1426 /* Much like the signed check, but for a field one bit
1427 wider. We allow a bitfield to represent numbers in the
1428 range -2**n to 2**n-1, where n is the number of bits in the
1429 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1430 can't overflow, which is exactly what we want. */
1432 if (ss != 0 && ss != (addrmask & signmask))
1433 flag = bfd_reloc_overflow;
1435 /* We only need this next bit of code if the sign bit of B
1436 is below the sign bit of A. This would only happen if
1437 SRC_MASK had fewer bits than BITSIZE. Note that if
1438 SRC_MASK has more bits than BITSIZE, we can get into
1439 trouble; we would need to verify that B is in range, as
1440 we do for A above. */
1441 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
1444 /* Set all the bits above the sign bit. */
1447 /* Now we can do the addition. */
1450 /* See if the result has the correct sign. Bits above the
1451 sign bit are junk now; ignore them. If the sum is
1452 positive, make sure we did not have all negative inputs;
1453 if the sum is negative, make sure we did not have all
1454 positive inputs. The test below looks only at the sign
1455 bits, and it really just
1456 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1458 We mask with addrmask here to explicitly allow an address
1459 wrap-around. The Linux kernel relies on it, and it is
1460 the only way to write assembler code which can run when
1461 loaded at a location 0x80000000 away from the location at
1462 which it is linked. */
1463 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
1464 flag = bfd_reloc_overflow;
1467 case complain_overflow_unsigned:
1468 /* Checking for an unsigned overflow is relatively easy:
1469 trim the addresses and add, and trim the result as well.
1470 Overflow is normally indicated when the result does not
1471 fit in the field. However, we also need to consider the
1472 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1473 input is 0x80000000, and bfd_vma is only 32 bits; then we
1474 will get sum == 0, but there is an overflow, since the
1475 inputs did not fit in the field. Instead of doing a
1476 separate test, we can check for this by or-ing in the
1477 operands when testing for the sum overflowing its final
1479 sum = (a + b) & addrmask;
1480 if ((a | b | sum) & signmask)
1481 flag = bfd_reloc_overflow;
1489 /* Put RELOCATION in the right bits. */
1490 relocation >>= (bfd_vma) rightshift;
1491 relocation <<= (bfd_vma) bitpos;
1493 /* Add RELOCATION to the right bits of X. */
1494 x = ((x & ~howto->dst_mask)
1495 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
1497 /* Put the relocated value back in the object file. */
1498 write_reloc (input_bfd, x, location, howto);
1502 /* Clear a given location using a given howto, by applying a fixed relocation
1503 value and discarding any in-place addend. This is used for fixed-up
1504 relocations against discarded symbols, to make ignorable debug or unwind
1505 information more obvious. */
1507 bfd_reloc_status_type
1508 _bfd_clear_contents (reloc_howto_type *howto,
1510 asection *input_section,
1517 if (!bfd_reloc_offset_in_range (howto, input_bfd, input_section, off))
1518 return bfd_reloc_outofrange;
1520 /* Get the value we are going to relocate. */
1521 location = buf + off;
1522 x = read_reloc (input_bfd, location, howto);
1524 /* Zero out the unwanted bits of X. */
1525 x &= ~howto->dst_mask;
1527 /* For a range list, use 1 instead of 0 as placeholder. 0
1528 would terminate the list, hiding any later entries. */
1529 if (strcmp (bfd_section_name (input_section), ".debug_ranges") == 0
1530 && (howto->dst_mask & 1) != 0)
1533 /* Put the relocated value back in the object file. */
1534 write_reloc (input_bfd, x, location, howto);
1535 return bfd_reloc_ok;
1541 howto manager, , typedef arelent, Relocations
1546 When an application wants to create a relocation, but doesn't
1547 know what the target machine might call it, it can find out by
1548 using this bit of code.
1557 The insides of a reloc code. The idea is that, eventually, there
1558 will be one enumerator for every type of relocation we ever do.
1559 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1560 return a howto pointer.
1562 This does mean that the application must determine the correct
1563 enumerator value; you can't get a howto pointer from a random set
1584 Basic absolute relocations of N bits.
1599 PC-relative relocations. Sometimes these are relative to the address
1600 of the relocation itself; sometimes they are relative to the start of
1601 the section containing the relocation. It depends on the specific target.
1606 Section relative relocations. Some targets need this for DWARF2.
1609 BFD_RELOC_32_GOT_PCREL
1611 BFD_RELOC_16_GOT_PCREL
1613 BFD_RELOC_8_GOT_PCREL
1619 BFD_RELOC_LO16_GOTOFF
1621 BFD_RELOC_HI16_GOTOFF
1623 BFD_RELOC_HI16_S_GOTOFF
1627 BFD_RELOC_64_PLT_PCREL
1629 BFD_RELOC_32_PLT_PCREL
1631 BFD_RELOC_24_PLT_PCREL
1633 BFD_RELOC_16_PLT_PCREL
1635 BFD_RELOC_8_PLT_PCREL
1643 BFD_RELOC_LO16_PLTOFF
1645 BFD_RELOC_HI16_PLTOFF
1647 BFD_RELOC_HI16_S_PLTOFF
1661 BFD_RELOC_68K_GLOB_DAT
1663 BFD_RELOC_68K_JMP_SLOT
1665 BFD_RELOC_68K_RELATIVE
1667 BFD_RELOC_68K_TLS_GD32
1669 BFD_RELOC_68K_TLS_GD16
1671 BFD_RELOC_68K_TLS_GD8
1673 BFD_RELOC_68K_TLS_LDM32
1675 BFD_RELOC_68K_TLS_LDM16
1677 BFD_RELOC_68K_TLS_LDM8
1679 BFD_RELOC_68K_TLS_LDO32
1681 BFD_RELOC_68K_TLS_LDO16
1683 BFD_RELOC_68K_TLS_LDO8
1685 BFD_RELOC_68K_TLS_IE32
1687 BFD_RELOC_68K_TLS_IE16
1689 BFD_RELOC_68K_TLS_IE8
1691 BFD_RELOC_68K_TLS_LE32
1693 BFD_RELOC_68K_TLS_LE16
1695 BFD_RELOC_68K_TLS_LE8
1697 Relocations used by 68K ELF.
1700 BFD_RELOC_32_BASEREL
1702 BFD_RELOC_16_BASEREL
1704 BFD_RELOC_LO16_BASEREL
1706 BFD_RELOC_HI16_BASEREL
1708 BFD_RELOC_HI16_S_BASEREL
1714 Linkage-table relative.
1719 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1722 BFD_RELOC_32_PCREL_S2
1724 BFD_RELOC_16_PCREL_S2
1726 BFD_RELOC_23_PCREL_S2
1728 These PC-relative relocations are stored as word displacements --
1729 i.e., byte displacements shifted right two bits. The 30-bit word
1730 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1731 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1732 signed 16-bit displacement is used on the MIPS, and the 23-bit
1733 displacement is used on the Alpha.
1740 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1741 the target word. These are used on the SPARC.
1748 For systems that allocate a Global Pointer register, these are
1749 displacements off that register. These relocation types are
1750 handled specially, because the value the register will have is
1751 decided relatively late.
1756 BFD_RELOC_SPARC_WDISP22
1762 BFD_RELOC_SPARC_GOT10
1764 BFD_RELOC_SPARC_GOT13
1766 BFD_RELOC_SPARC_GOT22
1768 BFD_RELOC_SPARC_PC10
1770 BFD_RELOC_SPARC_PC22
1772 BFD_RELOC_SPARC_WPLT30
1774 BFD_RELOC_SPARC_COPY
1776 BFD_RELOC_SPARC_GLOB_DAT
1778 BFD_RELOC_SPARC_JMP_SLOT
1780 BFD_RELOC_SPARC_RELATIVE
1782 BFD_RELOC_SPARC_UA16
1784 BFD_RELOC_SPARC_UA32
1786 BFD_RELOC_SPARC_UA64
1788 BFD_RELOC_SPARC_GOTDATA_HIX22
1790 BFD_RELOC_SPARC_GOTDATA_LOX10
1792 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1794 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1796 BFD_RELOC_SPARC_GOTDATA_OP
1798 BFD_RELOC_SPARC_JMP_IREL
1800 BFD_RELOC_SPARC_IRELATIVE
1802 SPARC ELF relocations. There is probably some overlap with other
1803 relocation types already defined.
1806 BFD_RELOC_SPARC_BASE13
1808 BFD_RELOC_SPARC_BASE22
1810 I think these are specific to SPARC a.out (e.g., Sun 4).
1820 BFD_RELOC_SPARC_OLO10
1822 BFD_RELOC_SPARC_HH22
1824 BFD_RELOC_SPARC_HM10
1826 BFD_RELOC_SPARC_LM22
1828 BFD_RELOC_SPARC_PC_HH22
1830 BFD_RELOC_SPARC_PC_HM10
1832 BFD_RELOC_SPARC_PC_LM22
1834 BFD_RELOC_SPARC_WDISP16
1836 BFD_RELOC_SPARC_WDISP19
1844 BFD_RELOC_SPARC_DISP64
1847 BFD_RELOC_SPARC_PLT32
1849 BFD_RELOC_SPARC_PLT64
1851 BFD_RELOC_SPARC_HIX22
1853 BFD_RELOC_SPARC_LOX10
1861 BFD_RELOC_SPARC_REGISTER
1865 BFD_RELOC_SPARC_SIZE32
1867 BFD_RELOC_SPARC_SIZE64
1869 BFD_RELOC_SPARC_WDISP10
1874 BFD_RELOC_SPARC_REV32
1876 SPARC little endian relocation
1878 BFD_RELOC_SPARC_TLS_GD_HI22
1880 BFD_RELOC_SPARC_TLS_GD_LO10
1882 BFD_RELOC_SPARC_TLS_GD_ADD
1884 BFD_RELOC_SPARC_TLS_GD_CALL
1886 BFD_RELOC_SPARC_TLS_LDM_HI22
1888 BFD_RELOC_SPARC_TLS_LDM_LO10
1890 BFD_RELOC_SPARC_TLS_LDM_ADD
1892 BFD_RELOC_SPARC_TLS_LDM_CALL
1894 BFD_RELOC_SPARC_TLS_LDO_HIX22
1896 BFD_RELOC_SPARC_TLS_LDO_LOX10
1898 BFD_RELOC_SPARC_TLS_LDO_ADD
1900 BFD_RELOC_SPARC_TLS_IE_HI22
1902 BFD_RELOC_SPARC_TLS_IE_LO10
1904 BFD_RELOC_SPARC_TLS_IE_LD
1906 BFD_RELOC_SPARC_TLS_IE_LDX
1908 BFD_RELOC_SPARC_TLS_IE_ADD
1910 BFD_RELOC_SPARC_TLS_LE_HIX22
1912 BFD_RELOC_SPARC_TLS_LE_LOX10
1914 BFD_RELOC_SPARC_TLS_DTPMOD32
1916 BFD_RELOC_SPARC_TLS_DTPMOD64
1918 BFD_RELOC_SPARC_TLS_DTPOFF32
1920 BFD_RELOC_SPARC_TLS_DTPOFF64
1922 BFD_RELOC_SPARC_TLS_TPOFF32
1924 BFD_RELOC_SPARC_TLS_TPOFF64
1926 SPARC TLS relocations
1935 BFD_RELOC_SPU_IMM10W
1939 BFD_RELOC_SPU_IMM16W
1943 BFD_RELOC_SPU_PCREL9a
1945 BFD_RELOC_SPU_PCREL9b
1947 BFD_RELOC_SPU_PCREL16
1957 BFD_RELOC_SPU_ADD_PIC
1962 BFD_RELOC_ALPHA_GPDISP_HI16
1964 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1965 "addend" in some special way.
1966 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1967 writing; when reading, it will be the absolute section symbol. The
1968 addend is the displacement in bytes of the "lda" instruction from
1969 the "ldah" instruction (which is at the address of this reloc).
1971 BFD_RELOC_ALPHA_GPDISP_LO16
1973 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1974 with GPDISP_HI16 relocs. The addend is ignored when writing the
1975 relocations out, and is filled in with the file's GP value on
1976 reading, for convenience.
1979 BFD_RELOC_ALPHA_GPDISP
1981 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1982 relocation except that there is no accompanying GPDISP_LO16
1986 BFD_RELOC_ALPHA_LITERAL
1988 BFD_RELOC_ALPHA_ELF_LITERAL
1990 BFD_RELOC_ALPHA_LITUSE
1992 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1993 the assembler turns it into a LDQ instruction to load the address of
1994 the symbol, and then fills in a register in the real instruction.
1996 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1997 section symbol. The addend is ignored when writing, but is filled
1998 in with the file's GP value on reading, for convenience, as with the
2001 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2002 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2003 but it generates output not based on the position within the .got
2004 section, but relative to the GP value chosen for the file during the
2007 The LITUSE reloc, on the instruction using the loaded address, gives
2008 information to the linker that it might be able to use to optimize
2009 away some literal section references. The symbol is ignored (read
2010 as the absolute section symbol), and the "addend" indicates the type
2011 of instruction using the register:
2012 1 - "memory" fmt insn
2013 2 - byte-manipulation (byte offset reg)
2014 3 - jsr (target of branch)
2017 BFD_RELOC_ALPHA_HINT
2019 The HINT relocation indicates a value that should be filled into the
2020 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2021 prediction logic which may be provided on some processors.
2024 BFD_RELOC_ALPHA_LINKAGE
2026 The LINKAGE relocation outputs a linkage pair in the object file,
2027 which is filled by the linker.
2030 BFD_RELOC_ALPHA_CODEADDR
2032 The CODEADDR relocation outputs a STO_CA in the object file,
2033 which is filled by the linker.
2036 BFD_RELOC_ALPHA_GPREL_HI16
2038 BFD_RELOC_ALPHA_GPREL_LO16
2040 The GPREL_HI/LO relocations together form a 32-bit offset from the
2044 BFD_RELOC_ALPHA_BRSGP
2046 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2047 share a common GP, and the target address is adjusted for
2048 STO_ALPHA_STD_GPLOAD.
2053 The NOP relocation outputs a NOP if the longword displacement
2054 between two procedure entry points is < 2^21.
2059 The BSR relocation outputs a BSR if the longword displacement
2060 between two procedure entry points is < 2^21.
2065 The LDA relocation outputs a LDA if the longword displacement
2066 between two procedure entry points is < 2^16.
2071 The BOH relocation outputs a BSR if the longword displacement
2072 between two procedure entry points is < 2^21, or else a hint.
2075 BFD_RELOC_ALPHA_TLSGD
2077 BFD_RELOC_ALPHA_TLSLDM
2079 BFD_RELOC_ALPHA_DTPMOD64
2081 BFD_RELOC_ALPHA_GOTDTPREL16
2083 BFD_RELOC_ALPHA_DTPREL64
2085 BFD_RELOC_ALPHA_DTPREL_HI16
2087 BFD_RELOC_ALPHA_DTPREL_LO16
2089 BFD_RELOC_ALPHA_DTPREL16
2091 BFD_RELOC_ALPHA_GOTTPREL16
2093 BFD_RELOC_ALPHA_TPREL64
2095 BFD_RELOC_ALPHA_TPREL_HI16
2097 BFD_RELOC_ALPHA_TPREL_LO16
2099 BFD_RELOC_ALPHA_TPREL16
2101 Alpha thread-local storage relocations.
2106 BFD_RELOC_MICROMIPS_JMP
2108 The MIPS jump instruction.
2111 BFD_RELOC_MIPS16_JMP
2113 The MIPS16 jump instruction.
2116 BFD_RELOC_MIPS16_GPREL
2118 MIPS16 GP relative reloc.
2123 High 16 bits of 32-bit value; simple reloc.
2128 High 16 bits of 32-bit value but the low 16 bits will be sign
2129 extended and added to form the final result. If the low 16
2130 bits form a negative number, we need to add one to the high value
2131 to compensate for the borrow when the low bits are added.
2139 BFD_RELOC_HI16_PCREL
2141 High 16 bits of 32-bit pc-relative value
2143 BFD_RELOC_HI16_S_PCREL
2145 High 16 bits of 32-bit pc-relative value, adjusted
2147 BFD_RELOC_LO16_PCREL
2149 Low 16 bits of pc-relative value
2152 BFD_RELOC_MIPS16_GOT16
2154 BFD_RELOC_MIPS16_CALL16
2156 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2157 16-bit immediate fields
2159 BFD_RELOC_MIPS16_HI16
2161 MIPS16 high 16 bits of 32-bit value.
2163 BFD_RELOC_MIPS16_HI16_S
2165 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2166 extended and added to form the final result. If the low 16
2167 bits form a negative number, we need to add one to the high value
2168 to compensate for the borrow when the low bits are added.
2170 BFD_RELOC_MIPS16_LO16
2175 BFD_RELOC_MIPS16_TLS_GD
2177 BFD_RELOC_MIPS16_TLS_LDM
2179 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2181 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2183 BFD_RELOC_MIPS16_TLS_GOTTPREL
2185 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2187 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2189 MIPS16 TLS relocations
2192 BFD_RELOC_MIPS_LITERAL
2194 BFD_RELOC_MICROMIPS_LITERAL
2196 Relocation against a MIPS literal section.
2199 BFD_RELOC_MICROMIPS_7_PCREL_S1
2201 BFD_RELOC_MICROMIPS_10_PCREL_S1
2203 BFD_RELOC_MICROMIPS_16_PCREL_S1
2205 microMIPS PC-relative relocations.
2208 BFD_RELOC_MIPS16_16_PCREL_S1
2210 MIPS16 PC-relative relocation.
2213 BFD_RELOC_MIPS_21_PCREL_S2
2215 BFD_RELOC_MIPS_26_PCREL_S2
2217 BFD_RELOC_MIPS_18_PCREL_S3
2219 BFD_RELOC_MIPS_19_PCREL_S2
2221 MIPS PC-relative relocations.
2224 BFD_RELOC_MICROMIPS_GPREL16
2226 BFD_RELOC_MICROMIPS_HI16
2228 BFD_RELOC_MICROMIPS_HI16_S
2230 BFD_RELOC_MICROMIPS_LO16
2232 microMIPS versions of generic BFD relocs.
2235 BFD_RELOC_MIPS_GOT16
2237 BFD_RELOC_MICROMIPS_GOT16
2239 BFD_RELOC_MIPS_CALL16
2241 BFD_RELOC_MICROMIPS_CALL16
2243 BFD_RELOC_MIPS_GOT_HI16
2245 BFD_RELOC_MICROMIPS_GOT_HI16
2247 BFD_RELOC_MIPS_GOT_LO16
2249 BFD_RELOC_MICROMIPS_GOT_LO16
2251 BFD_RELOC_MIPS_CALL_HI16
2253 BFD_RELOC_MICROMIPS_CALL_HI16
2255 BFD_RELOC_MIPS_CALL_LO16
2257 BFD_RELOC_MICROMIPS_CALL_LO16
2261 BFD_RELOC_MICROMIPS_SUB
2263 BFD_RELOC_MIPS_GOT_PAGE
2265 BFD_RELOC_MICROMIPS_GOT_PAGE
2267 BFD_RELOC_MIPS_GOT_OFST
2269 BFD_RELOC_MICROMIPS_GOT_OFST
2271 BFD_RELOC_MIPS_GOT_DISP
2273 BFD_RELOC_MICROMIPS_GOT_DISP
2275 BFD_RELOC_MIPS_SHIFT5
2277 BFD_RELOC_MIPS_SHIFT6
2279 BFD_RELOC_MIPS_INSERT_A
2281 BFD_RELOC_MIPS_INSERT_B
2283 BFD_RELOC_MIPS_DELETE
2285 BFD_RELOC_MIPS_HIGHEST
2287 BFD_RELOC_MICROMIPS_HIGHEST
2289 BFD_RELOC_MIPS_HIGHER
2291 BFD_RELOC_MICROMIPS_HIGHER
2293 BFD_RELOC_MIPS_SCN_DISP
2295 BFD_RELOC_MICROMIPS_SCN_DISP
2297 BFD_RELOC_MIPS_REL16
2299 BFD_RELOC_MIPS_RELGOT
2303 BFD_RELOC_MICROMIPS_JALR
2305 BFD_RELOC_MIPS_TLS_DTPMOD32
2307 BFD_RELOC_MIPS_TLS_DTPREL32
2309 BFD_RELOC_MIPS_TLS_DTPMOD64
2311 BFD_RELOC_MIPS_TLS_DTPREL64
2313 BFD_RELOC_MIPS_TLS_GD
2315 BFD_RELOC_MICROMIPS_TLS_GD
2317 BFD_RELOC_MIPS_TLS_LDM
2319 BFD_RELOC_MICROMIPS_TLS_LDM
2321 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2323 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2325 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2327 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2329 BFD_RELOC_MIPS_TLS_GOTTPREL
2331 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2333 BFD_RELOC_MIPS_TLS_TPREL32
2335 BFD_RELOC_MIPS_TLS_TPREL64
2337 BFD_RELOC_MIPS_TLS_TPREL_HI16
2339 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2341 BFD_RELOC_MIPS_TLS_TPREL_LO16
2343 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2347 MIPS ELF relocations.
2353 BFD_RELOC_MIPS_JUMP_SLOT
2355 MIPS ELF relocations (VxWorks and PLT extensions).
2359 BFD_RELOC_MOXIE_10_PCREL
2361 Moxie ELF relocations.
2373 BFD_RELOC_FT32_RELAX
2381 BFD_RELOC_FT32_DIFF32
2383 FT32 ELF relocations.
2387 BFD_RELOC_FRV_LABEL16
2389 BFD_RELOC_FRV_LABEL24
2395 BFD_RELOC_FRV_GPREL12
2397 BFD_RELOC_FRV_GPRELU12
2399 BFD_RELOC_FRV_GPREL32
2401 BFD_RELOC_FRV_GPRELHI
2403 BFD_RELOC_FRV_GPRELLO
2411 BFD_RELOC_FRV_FUNCDESC
2413 BFD_RELOC_FRV_FUNCDESC_GOT12
2415 BFD_RELOC_FRV_FUNCDESC_GOTHI
2417 BFD_RELOC_FRV_FUNCDESC_GOTLO
2419 BFD_RELOC_FRV_FUNCDESC_VALUE
2421 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2423 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2425 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2427 BFD_RELOC_FRV_GOTOFF12
2429 BFD_RELOC_FRV_GOTOFFHI
2431 BFD_RELOC_FRV_GOTOFFLO
2433 BFD_RELOC_FRV_GETTLSOFF
2435 BFD_RELOC_FRV_TLSDESC_VALUE
2437 BFD_RELOC_FRV_GOTTLSDESC12
2439 BFD_RELOC_FRV_GOTTLSDESCHI
2441 BFD_RELOC_FRV_GOTTLSDESCLO
2443 BFD_RELOC_FRV_TLSMOFF12
2445 BFD_RELOC_FRV_TLSMOFFHI
2447 BFD_RELOC_FRV_TLSMOFFLO
2449 BFD_RELOC_FRV_GOTTLSOFF12
2451 BFD_RELOC_FRV_GOTTLSOFFHI
2453 BFD_RELOC_FRV_GOTTLSOFFLO
2455 BFD_RELOC_FRV_TLSOFF
2457 BFD_RELOC_FRV_TLSDESC_RELAX
2459 BFD_RELOC_FRV_GETTLSOFF_RELAX
2461 BFD_RELOC_FRV_TLSOFF_RELAX
2463 BFD_RELOC_FRV_TLSMOFF
2465 Fujitsu Frv Relocations.
2469 BFD_RELOC_MN10300_GOTOFF24
2471 This is a 24bit GOT-relative reloc for the mn10300.
2473 BFD_RELOC_MN10300_GOT32
2475 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2478 BFD_RELOC_MN10300_GOT24
2480 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2483 BFD_RELOC_MN10300_GOT16
2485 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2488 BFD_RELOC_MN10300_COPY
2490 Copy symbol at runtime.
2492 BFD_RELOC_MN10300_GLOB_DAT
2496 BFD_RELOC_MN10300_JMP_SLOT
2500 BFD_RELOC_MN10300_RELATIVE
2502 Adjust by program base.
2504 BFD_RELOC_MN10300_SYM_DIFF
2506 Together with another reloc targeted at the same location,
2507 allows for a value that is the difference of two symbols
2508 in the same section.
2510 BFD_RELOC_MN10300_ALIGN
2512 The addend of this reloc is an alignment power that must
2513 be honoured at the offset's location, regardless of linker
2516 BFD_RELOC_MN10300_TLS_GD
2518 BFD_RELOC_MN10300_TLS_LD
2520 BFD_RELOC_MN10300_TLS_LDO
2522 BFD_RELOC_MN10300_TLS_GOTIE
2524 BFD_RELOC_MN10300_TLS_IE
2526 BFD_RELOC_MN10300_TLS_LE
2528 BFD_RELOC_MN10300_TLS_DTPMOD
2530 BFD_RELOC_MN10300_TLS_DTPOFF
2532 BFD_RELOC_MN10300_TLS_TPOFF
2534 Various TLS-related relocations.
2536 BFD_RELOC_MN10300_32_PCREL
2538 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2541 BFD_RELOC_MN10300_16_PCREL
2543 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2554 BFD_RELOC_386_GLOB_DAT
2556 BFD_RELOC_386_JUMP_SLOT
2558 BFD_RELOC_386_RELATIVE
2560 BFD_RELOC_386_GOTOFF
2564 BFD_RELOC_386_TLS_TPOFF
2566 BFD_RELOC_386_TLS_IE
2568 BFD_RELOC_386_TLS_GOTIE
2570 BFD_RELOC_386_TLS_LE
2572 BFD_RELOC_386_TLS_GD
2574 BFD_RELOC_386_TLS_LDM
2576 BFD_RELOC_386_TLS_LDO_32
2578 BFD_RELOC_386_TLS_IE_32
2580 BFD_RELOC_386_TLS_LE_32
2582 BFD_RELOC_386_TLS_DTPMOD32
2584 BFD_RELOC_386_TLS_DTPOFF32
2586 BFD_RELOC_386_TLS_TPOFF32
2588 BFD_RELOC_386_TLS_GOTDESC
2590 BFD_RELOC_386_TLS_DESC_CALL
2592 BFD_RELOC_386_TLS_DESC
2594 BFD_RELOC_386_IRELATIVE
2596 BFD_RELOC_386_GOT32X
2598 i386/elf relocations
2601 BFD_RELOC_X86_64_GOT32
2603 BFD_RELOC_X86_64_PLT32
2605 BFD_RELOC_X86_64_COPY
2607 BFD_RELOC_X86_64_GLOB_DAT
2609 BFD_RELOC_X86_64_JUMP_SLOT
2611 BFD_RELOC_X86_64_RELATIVE
2613 BFD_RELOC_X86_64_GOTPCREL
2615 BFD_RELOC_X86_64_32S
2617 BFD_RELOC_X86_64_DTPMOD64
2619 BFD_RELOC_X86_64_DTPOFF64
2621 BFD_RELOC_X86_64_TPOFF64
2623 BFD_RELOC_X86_64_TLSGD
2625 BFD_RELOC_X86_64_TLSLD
2627 BFD_RELOC_X86_64_DTPOFF32
2629 BFD_RELOC_X86_64_GOTTPOFF
2631 BFD_RELOC_X86_64_TPOFF32
2633 BFD_RELOC_X86_64_GOTOFF64
2635 BFD_RELOC_X86_64_GOTPC32
2637 BFD_RELOC_X86_64_GOT64
2639 BFD_RELOC_X86_64_GOTPCREL64
2641 BFD_RELOC_X86_64_GOTPC64
2643 BFD_RELOC_X86_64_GOTPLT64
2645 BFD_RELOC_X86_64_PLTOFF64
2647 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2649 BFD_RELOC_X86_64_TLSDESC_CALL
2651 BFD_RELOC_X86_64_TLSDESC
2653 BFD_RELOC_X86_64_IRELATIVE
2655 BFD_RELOC_X86_64_PC32_BND
2657 BFD_RELOC_X86_64_PLT32_BND
2659 BFD_RELOC_X86_64_GOTPCRELX
2661 BFD_RELOC_X86_64_REX_GOTPCRELX
2663 x86-64/elf relocations
2666 BFD_RELOC_NS32K_IMM_8
2668 BFD_RELOC_NS32K_IMM_16
2670 BFD_RELOC_NS32K_IMM_32
2672 BFD_RELOC_NS32K_IMM_8_PCREL
2674 BFD_RELOC_NS32K_IMM_16_PCREL
2676 BFD_RELOC_NS32K_IMM_32_PCREL
2678 BFD_RELOC_NS32K_DISP_8
2680 BFD_RELOC_NS32K_DISP_16
2682 BFD_RELOC_NS32K_DISP_32
2684 BFD_RELOC_NS32K_DISP_8_PCREL
2686 BFD_RELOC_NS32K_DISP_16_PCREL
2688 BFD_RELOC_NS32K_DISP_32_PCREL
2693 BFD_RELOC_PDP11_DISP_8_PCREL
2695 BFD_RELOC_PDP11_DISP_6_PCREL
2700 BFD_RELOC_PJ_CODE_HI16
2702 BFD_RELOC_PJ_CODE_LO16
2704 BFD_RELOC_PJ_CODE_DIR16
2706 BFD_RELOC_PJ_CODE_DIR32
2708 BFD_RELOC_PJ_CODE_REL16
2710 BFD_RELOC_PJ_CODE_REL32
2712 Picojava relocs. Not all of these appear in object files.
2723 BFD_RELOC_PPC_B16_BRTAKEN
2725 BFD_RELOC_PPC_B16_BRNTAKEN
2729 BFD_RELOC_PPC_BA16_BRTAKEN
2731 BFD_RELOC_PPC_BA16_BRNTAKEN
2735 BFD_RELOC_PPC_GLOB_DAT
2737 BFD_RELOC_PPC_JMP_SLOT
2739 BFD_RELOC_PPC_RELATIVE
2741 BFD_RELOC_PPC_LOCAL24PC
2743 BFD_RELOC_PPC_EMB_NADDR32
2745 BFD_RELOC_PPC_EMB_NADDR16
2747 BFD_RELOC_PPC_EMB_NADDR16_LO
2749 BFD_RELOC_PPC_EMB_NADDR16_HI
2751 BFD_RELOC_PPC_EMB_NADDR16_HA
2753 BFD_RELOC_PPC_EMB_SDAI16
2755 BFD_RELOC_PPC_EMB_SDA2I16
2757 BFD_RELOC_PPC_EMB_SDA2REL
2759 BFD_RELOC_PPC_EMB_SDA21
2761 BFD_RELOC_PPC_EMB_MRKREF
2763 BFD_RELOC_PPC_EMB_RELSEC16
2765 BFD_RELOC_PPC_EMB_RELST_LO
2767 BFD_RELOC_PPC_EMB_RELST_HI
2769 BFD_RELOC_PPC_EMB_RELST_HA
2771 BFD_RELOC_PPC_EMB_BIT_FLD
2773 BFD_RELOC_PPC_EMB_RELSDA
2775 BFD_RELOC_PPC_VLE_REL8
2777 BFD_RELOC_PPC_VLE_REL15
2779 BFD_RELOC_PPC_VLE_REL24
2781 BFD_RELOC_PPC_VLE_LO16A
2783 BFD_RELOC_PPC_VLE_LO16D
2785 BFD_RELOC_PPC_VLE_HI16A
2787 BFD_RELOC_PPC_VLE_HI16D
2789 BFD_RELOC_PPC_VLE_HA16A
2791 BFD_RELOC_PPC_VLE_HA16D
2793 BFD_RELOC_PPC_VLE_SDA21
2795 BFD_RELOC_PPC_VLE_SDA21_LO
2797 BFD_RELOC_PPC_VLE_SDAREL_LO16A
2799 BFD_RELOC_PPC_VLE_SDAREL_LO16D
2801 BFD_RELOC_PPC_VLE_SDAREL_HI16A
2803 BFD_RELOC_PPC_VLE_SDAREL_HI16D
2805 BFD_RELOC_PPC_VLE_SDAREL_HA16A
2807 BFD_RELOC_PPC_VLE_SDAREL_HA16D
2809 BFD_RELOC_PPC_16DX_HA
2811 BFD_RELOC_PPC_REL16DX_HA
2813 BFD_RELOC_PPC64_HIGHER
2815 BFD_RELOC_PPC64_HIGHER_S
2817 BFD_RELOC_PPC64_HIGHEST
2819 BFD_RELOC_PPC64_HIGHEST_S
2821 BFD_RELOC_PPC64_TOC16_LO
2823 BFD_RELOC_PPC64_TOC16_HI
2825 BFD_RELOC_PPC64_TOC16_HA
2829 BFD_RELOC_PPC64_PLTGOT16
2831 BFD_RELOC_PPC64_PLTGOT16_LO
2833 BFD_RELOC_PPC64_PLTGOT16_HI
2835 BFD_RELOC_PPC64_PLTGOT16_HA
2837 BFD_RELOC_PPC64_ADDR16_DS
2839 BFD_RELOC_PPC64_ADDR16_LO_DS
2841 BFD_RELOC_PPC64_GOT16_DS
2843 BFD_RELOC_PPC64_GOT16_LO_DS
2845 BFD_RELOC_PPC64_PLT16_LO_DS
2847 BFD_RELOC_PPC64_SECTOFF_DS
2849 BFD_RELOC_PPC64_SECTOFF_LO_DS
2851 BFD_RELOC_PPC64_TOC16_DS
2853 BFD_RELOC_PPC64_TOC16_LO_DS
2855 BFD_RELOC_PPC64_PLTGOT16_DS
2857 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2859 BFD_RELOC_PPC64_ADDR16_HIGH
2861 BFD_RELOC_PPC64_ADDR16_HIGHA
2863 BFD_RELOC_PPC64_REL16_HIGH
2865 BFD_RELOC_PPC64_REL16_HIGHA
2867 BFD_RELOC_PPC64_REL16_HIGHER
2869 BFD_RELOC_PPC64_REL16_HIGHERA
2871 BFD_RELOC_PPC64_REL16_HIGHEST
2873 BFD_RELOC_PPC64_REL16_HIGHESTA
2875 BFD_RELOC_PPC64_ADDR64_LOCAL
2877 BFD_RELOC_PPC64_ENTRY
2879 BFD_RELOC_PPC64_REL24_NOTOC
2883 BFD_RELOC_PPC64_D34_LO
2885 BFD_RELOC_PPC64_D34_HI30
2887 BFD_RELOC_PPC64_D34_HA30
2889 BFD_RELOC_PPC64_PCREL34
2891 BFD_RELOC_PPC64_GOT_PCREL34
2893 BFD_RELOC_PPC64_PLT_PCREL34
2895 BFD_RELOC_PPC64_ADDR16_HIGHER34
2897 BFD_RELOC_PPC64_ADDR16_HIGHERA34
2899 BFD_RELOC_PPC64_ADDR16_HIGHEST34
2901 BFD_RELOC_PPC64_ADDR16_HIGHESTA34
2903 BFD_RELOC_PPC64_REL16_HIGHER34
2905 BFD_RELOC_PPC64_REL16_HIGHERA34
2907 BFD_RELOC_PPC64_REL16_HIGHEST34
2909 BFD_RELOC_PPC64_REL16_HIGHESTA34
2913 BFD_RELOC_PPC64_PCREL28
2915 Power(rs6000) and PowerPC relocations.
2924 BFD_RELOC_PPC_DTPMOD
2926 BFD_RELOC_PPC_TPREL16
2928 BFD_RELOC_PPC_TPREL16_LO
2930 BFD_RELOC_PPC_TPREL16_HI
2932 BFD_RELOC_PPC_TPREL16_HA
2936 BFD_RELOC_PPC_DTPREL16
2938 BFD_RELOC_PPC_DTPREL16_LO
2940 BFD_RELOC_PPC_DTPREL16_HI
2942 BFD_RELOC_PPC_DTPREL16_HA
2944 BFD_RELOC_PPC_DTPREL
2946 BFD_RELOC_PPC_GOT_TLSGD16
2948 BFD_RELOC_PPC_GOT_TLSGD16_LO
2950 BFD_RELOC_PPC_GOT_TLSGD16_HI
2952 BFD_RELOC_PPC_GOT_TLSGD16_HA
2954 BFD_RELOC_PPC_GOT_TLSLD16
2956 BFD_RELOC_PPC_GOT_TLSLD16_LO
2958 BFD_RELOC_PPC_GOT_TLSLD16_HI
2960 BFD_RELOC_PPC_GOT_TLSLD16_HA
2962 BFD_RELOC_PPC_GOT_TPREL16
2964 BFD_RELOC_PPC_GOT_TPREL16_LO
2966 BFD_RELOC_PPC_GOT_TPREL16_HI
2968 BFD_RELOC_PPC_GOT_TPREL16_HA
2970 BFD_RELOC_PPC_GOT_DTPREL16
2972 BFD_RELOC_PPC_GOT_DTPREL16_LO
2974 BFD_RELOC_PPC_GOT_DTPREL16_HI
2976 BFD_RELOC_PPC_GOT_DTPREL16_HA
2978 BFD_RELOC_PPC64_TPREL16_DS
2980 BFD_RELOC_PPC64_TPREL16_LO_DS
2982 BFD_RELOC_PPC64_TPREL16_HIGH
2984 BFD_RELOC_PPC64_TPREL16_HIGHA
2986 BFD_RELOC_PPC64_TPREL16_HIGHER
2988 BFD_RELOC_PPC64_TPREL16_HIGHERA
2990 BFD_RELOC_PPC64_TPREL16_HIGHEST
2992 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2994 BFD_RELOC_PPC64_DTPREL16_DS
2996 BFD_RELOC_PPC64_DTPREL16_LO_DS
2998 BFD_RELOC_PPC64_DTPREL16_HIGH
3000 BFD_RELOC_PPC64_DTPREL16_HIGHA
3002 BFD_RELOC_PPC64_DTPREL16_HIGHER
3004 BFD_RELOC_PPC64_DTPREL16_HIGHERA
3006 BFD_RELOC_PPC64_DTPREL16_HIGHEST
3008 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
3010 BFD_RELOC_PPC64_TPREL34
3012 BFD_RELOC_PPC64_DTPREL34
3014 BFD_RELOC_PPC64_GOT_TLSGD34
3016 BFD_RELOC_PPC64_GOT_TLSLD34
3018 BFD_RELOC_PPC64_GOT_TPREL34
3020 BFD_RELOC_PPC64_GOT_DTPREL34
3022 BFD_RELOC_PPC64_TLS_PCREL
3024 PowerPC and PowerPC64 thread-local storage relocations.
3029 IBM 370/390 relocations
3034 The type of reloc used to build a constructor table - at the moment
3035 probably a 32 bit wide absolute relocation, but the target can choose.
3036 It generally does map to one of the other relocation types.
3039 BFD_RELOC_ARM_PCREL_BRANCH
3041 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
3042 not stored in the instruction.
3044 BFD_RELOC_ARM_PCREL_BLX
3046 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
3047 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3048 field in the instruction.
3050 BFD_RELOC_THUMB_PCREL_BLX
3052 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
3053 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3054 field in the instruction.
3056 BFD_RELOC_ARM_PCREL_CALL
3058 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
3060 BFD_RELOC_ARM_PCREL_JUMP
3062 ARM 26-bit pc-relative branch for B or conditional BL instruction.
3065 BFD_RELOC_THUMB_PCREL_BRANCH5
3067 ARM 5-bit pc-relative branch for Branch Future instructions.
3070 BFD_RELOC_THUMB_PCREL_BFCSEL
3072 ARM 6-bit pc-relative branch for BFCSEL instruction.
3075 BFD_RELOC_ARM_THUMB_BF17
3077 ARM 17-bit pc-relative branch for Branch Future instructions.
3080 BFD_RELOC_ARM_THUMB_BF13
3082 ARM 13-bit pc-relative branch for BFCSEL instruction.
3085 BFD_RELOC_ARM_THUMB_BF19
3087 ARM 19-bit pc-relative branch for Branch Future Link instruction.
3090 BFD_RELOC_ARM_THUMB_LOOP12
3092 ARM 12-bit pc-relative branch for Low Overhead Loop instructions.
3095 BFD_RELOC_THUMB_PCREL_BRANCH7
3097 BFD_RELOC_THUMB_PCREL_BRANCH9
3099 BFD_RELOC_THUMB_PCREL_BRANCH12
3101 BFD_RELOC_THUMB_PCREL_BRANCH20
3103 BFD_RELOC_THUMB_PCREL_BRANCH23
3105 BFD_RELOC_THUMB_PCREL_BRANCH25
3107 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
3108 The lowest bit must be zero and is not stored in the instruction.
3109 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
3110 "nn" one smaller in all cases. Note further that BRANCH23
3111 corresponds to R_ARM_THM_CALL.
3114 BFD_RELOC_ARM_OFFSET_IMM
3116 12-bit immediate offset, used in ARM-format ldr and str instructions.
3119 BFD_RELOC_ARM_THUMB_OFFSET
3121 5-bit immediate offset, used in Thumb-format ldr and str instructions.
3124 BFD_RELOC_ARM_TARGET1
3126 Pc-relative or absolute relocation depending on target. Used for
3127 entries in .init_array sections.
3129 BFD_RELOC_ARM_ROSEGREL32
3131 Read-only segment base relative address.
3133 BFD_RELOC_ARM_SBREL32
3135 Data segment base relative address.
3137 BFD_RELOC_ARM_TARGET2
3139 This reloc is used for references to RTTI data from exception handling
3140 tables. The actual definition depends on the target. It may be a
3141 pc-relative or some form of GOT-indirect relocation.
3143 BFD_RELOC_ARM_PREL31
3145 31-bit PC relative address.
3151 BFD_RELOC_ARM_MOVW_PCREL
3153 BFD_RELOC_ARM_MOVT_PCREL
3155 BFD_RELOC_ARM_THUMB_MOVW
3157 BFD_RELOC_ARM_THUMB_MOVT
3159 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3161 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3163 Low and High halfword relocations for MOVW and MOVT instructions.
3166 BFD_RELOC_ARM_GOTFUNCDESC
3168 BFD_RELOC_ARM_GOTOFFFUNCDESC
3170 BFD_RELOC_ARM_FUNCDESC
3172 BFD_RELOC_ARM_FUNCDESC_VALUE
3174 BFD_RELOC_ARM_TLS_GD32_FDPIC
3176 BFD_RELOC_ARM_TLS_LDM32_FDPIC
3178 BFD_RELOC_ARM_TLS_IE32_FDPIC
3180 ARM FDPIC specific relocations.
3183 BFD_RELOC_ARM_JUMP_SLOT
3185 BFD_RELOC_ARM_GLOB_DAT
3191 BFD_RELOC_ARM_RELATIVE
3193 BFD_RELOC_ARM_GOTOFF
3197 BFD_RELOC_ARM_GOT_PREL
3199 Relocations for setting up GOTs and PLTs for shared libraries.
3202 BFD_RELOC_ARM_TLS_GD32
3204 BFD_RELOC_ARM_TLS_LDO32
3206 BFD_RELOC_ARM_TLS_LDM32
3208 BFD_RELOC_ARM_TLS_DTPOFF32
3210 BFD_RELOC_ARM_TLS_DTPMOD32
3212 BFD_RELOC_ARM_TLS_TPOFF32
3214 BFD_RELOC_ARM_TLS_IE32
3216 BFD_RELOC_ARM_TLS_LE32
3218 BFD_RELOC_ARM_TLS_GOTDESC
3220 BFD_RELOC_ARM_TLS_CALL
3222 BFD_RELOC_ARM_THM_TLS_CALL
3224 BFD_RELOC_ARM_TLS_DESCSEQ
3226 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3228 BFD_RELOC_ARM_TLS_DESC
3230 ARM thread-local storage relocations.
3233 BFD_RELOC_ARM_ALU_PC_G0_NC
3235 BFD_RELOC_ARM_ALU_PC_G0
3237 BFD_RELOC_ARM_ALU_PC_G1_NC
3239 BFD_RELOC_ARM_ALU_PC_G1
3241 BFD_RELOC_ARM_ALU_PC_G2
3243 BFD_RELOC_ARM_LDR_PC_G0
3245 BFD_RELOC_ARM_LDR_PC_G1
3247 BFD_RELOC_ARM_LDR_PC_G2
3249 BFD_RELOC_ARM_LDRS_PC_G0
3251 BFD_RELOC_ARM_LDRS_PC_G1
3253 BFD_RELOC_ARM_LDRS_PC_G2
3255 BFD_RELOC_ARM_LDC_PC_G0
3257 BFD_RELOC_ARM_LDC_PC_G1
3259 BFD_RELOC_ARM_LDC_PC_G2
3261 BFD_RELOC_ARM_ALU_SB_G0_NC
3263 BFD_RELOC_ARM_ALU_SB_G0
3265 BFD_RELOC_ARM_ALU_SB_G1_NC
3267 BFD_RELOC_ARM_ALU_SB_G1
3269 BFD_RELOC_ARM_ALU_SB_G2
3271 BFD_RELOC_ARM_LDR_SB_G0
3273 BFD_RELOC_ARM_LDR_SB_G1
3275 BFD_RELOC_ARM_LDR_SB_G2
3277 BFD_RELOC_ARM_LDRS_SB_G0
3279 BFD_RELOC_ARM_LDRS_SB_G1
3281 BFD_RELOC_ARM_LDRS_SB_G2
3283 BFD_RELOC_ARM_LDC_SB_G0
3285 BFD_RELOC_ARM_LDC_SB_G1
3287 BFD_RELOC_ARM_LDC_SB_G2
3289 ARM group relocations.
3294 Annotation of BX instructions.
3297 BFD_RELOC_ARM_IRELATIVE
3299 ARM support for STT_GNU_IFUNC.
3302 BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
3304 BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
3306 BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
3308 BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
3310 Thumb1 relocations to support execute-only code.
3313 BFD_RELOC_ARM_IMMEDIATE
3315 BFD_RELOC_ARM_ADRL_IMMEDIATE
3317 BFD_RELOC_ARM_T32_IMMEDIATE
3319 BFD_RELOC_ARM_T32_ADD_IMM
3321 BFD_RELOC_ARM_T32_IMM12
3323 BFD_RELOC_ARM_T32_ADD_PC12
3325 BFD_RELOC_ARM_SHIFT_IMM
3335 BFD_RELOC_ARM_CP_OFF_IMM
3337 BFD_RELOC_ARM_CP_OFF_IMM_S2
3339 BFD_RELOC_ARM_T32_CP_OFF_IMM
3341 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3343 BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM
3345 BFD_RELOC_ARM_ADR_IMM
3347 BFD_RELOC_ARM_LDR_IMM
3349 BFD_RELOC_ARM_LITERAL
3351 BFD_RELOC_ARM_IN_POOL
3353 BFD_RELOC_ARM_OFFSET_IMM8
3355 BFD_RELOC_ARM_T32_OFFSET_U8
3357 BFD_RELOC_ARM_T32_OFFSET_IMM
3359 BFD_RELOC_ARM_HWLITERAL
3361 BFD_RELOC_ARM_THUMB_ADD
3363 BFD_RELOC_ARM_THUMB_IMM
3365 BFD_RELOC_ARM_THUMB_SHIFT
3367 These relocs are only used within the ARM assembler. They are not
3368 (at present) written to any object files.
3371 BFD_RELOC_SH_PCDISP8BY2
3373 BFD_RELOC_SH_PCDISP12BY2
3381 BFD_RELOC_SH_DISP12BY2
3383 BFD_RELOC_SH_DISP12BY4
3385 BFD_RELOC_SH_DISP12BY8
3389 BFD_RELOC_SH_DISP20BY8
3393 BFD_RELOC_SH_IMM4BY2
3395 BFD_RELOC_SH_IMM4BY4
3399 BFD_RELOC_SH_IMM8BY2
3401 BFD_RELOC_SH_IMM8BY4
3403 BFD_RELOC_SH_PCRELIMM8BY2
3405 BFD_RELOC_SH_PCRELIMM8BY4
3407 BFD_RELOC_SH_SWITCH16
3409 BFD_RELOC_SH_SWITCH32
3423 BFD_RELOC_SH_LOOP_START
3425 BFD_RELOC_SH_LOOP_END
3429 BFD_RELOC_SH_GLOB_DAT
3431 BFD_RELOC_SH_JMP_SLOT
3433 BFD_RELOC_SH_RELATIVE
3437 BFD_RELOC_SH_GOT_LOW16
3439 BFD_RELOC_SH_GOT_MEDLOW16
3441 BFD_RELOC_SH_GOT_MEDHI16
3443 BFD_RELOC_SH_GOT_HI16
3445 BFD_RELOC_SH_GOTPLT_LOW16
3447 BFD_RELOC_SH_GOTPLT_MEDLOW16
3449 BFD_RELOC_SH_GOTPLT_MEDHI16
3451 BFD_RELOC_SH_GOTPLT_HI16
3453 BFD_RELOC_SH_PLT_LOW16
3455 BFD_RELOC_SH_PLT_MEDLOW16
3457 BFD_RELOC_SH_PLT_MEDHI16
3459 BFD_RELOC_SH_PLT_HI16
3461 BFD_RELOC_SH_GOTOFF_LOW16
3463 BFD_RELOC_SH_GOTOFF_MEDLOW16
3465 BFD_RELOC_SH_GOTOFF_MEDHI16
3467 BFD_RELOC_SH_GOTOFF_HI16
3469 BFD_RELOC_SH_GOTPC_LOW16
3471 BFD_RELOC_SH_GOTPC_MEDLOW16
3473 BFD_RELOC_SH_GOTPC_MEDHI16
3475 BFD_RELOC_SH_GOTPC_HI16
3479 BFD_RELOC_SH_GLOB_DAT64
3481 BFD_RELOC_SH_JMP_SLOT64
3483 BFD_RELOC_SH_RELATIVE64
3485 BFD_RELOC_SH_GOT10BY4
3487 BFD_RELOC_SH_GOT10BY8
3489 BFD_RELOC_SH_GOTPLT10BY4
3491 BFD_RELOC_SH_GOTPLT10BY8
3493 BFD_RELOC_SH_GOTPLT32
3495 BFD_RELOC_SH_SHMEDIA_CODE
3501 BFD_RELOC_SH_IMMS6BY32
3507 BFD_RELOC_SH_IMMS10BY2
3509 BFD_RELOC_SH_IMMS10BY4
3511 BFD_RELOC_SH_IMMS10BY8
3517 BFD_RELOC_SH_IMM_LOW16
3519 BFD_RELOC_SH_IMM_LOW16_PCREL
3521 BFD_RELOC_SH_IMM_MEDLOW16
3523 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3525 BFD_RELOC_SH_IMM_MEDHI16
3527 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3529 BFD_RELOC_SH_IMM_HI16
3531 BFD_RELOC_SH_IMM_HI16_PCREL
3535 BFD_RELOC_SH_TLS_GD_32
3537 BFD_RELOC_SH_TLS_LD_32
3539 BFD_RELOC_SH_TLS_LDO_32
3541 BFD_RELOC_SH_TLS_IE_32
3543 BFD_RELOC_SH_TLS_LE_32
3545 BFD_RELOC_SH_TLS_DTPMOD32
3547 BFD_RELOC_SH_TLS_DTPOFF32
3549 BFD_RELOC_SH_TLS_TPOFF32
3553 BFD_RELOC_SH_GOTOFF20
3555 BFD_RELOC_SH_GOTFUNCDESC
3557 BFD_RELOC_SH_GOTFUNCDESC20
3559 BFD_RELOC_SH_GOTOFFFUNCDESC
3561 BFD_RELOC_SH_GOTOFFFUNCDESC20
3563 BFD_RELOC_SH_FUNCDESC
3565 Renesas / SuperH SH relocs. Not all of these appear in object files.
3588 BFD_RELOC_ARC_SECTOFF
3590 BFD_RELOC_ARC_S21H_PCREL
3592 BFD_RELOC_ARC_S21W_PCREL
3594 BFD_RELOC_ARC_S25H_PCREL
3596 BFD_RELOC_ARC_S25W_PCREL
3600 BFD_RELOC_ARC_SDA_LDST
3602 BFD_RELOC_ARC_SDA_LDST1
3604 BFD_RELOC_ARC_SDA_LDST2
3606 BFD_RELOC_ARC_SDA16_LD
3608 BFD_RELOC_ARC_SDA16_LD1
3610 BFD_RELOC_ARC_SDA16_LD2
3612 BFD_RELOC_ARC_S13_PCREL
3618 BFD_RELOC_ARC_32_ME_S
3620 BFD_RELOC_ARC_N32_ME
3622 BFD_RELOC_ARC_SECTOFF_ME
3624 BFD_RELOC_ARC_SDA32_ME
3628 BFD_RELOC_AC_SECTOFF_U8
3630 BFD_RELOC_AC_SECTOFF_U8_1
3632 BFD_RELOC_AC_SECTOFF_U8_2
3634 BFD_RELOC_AC_SECTOFF_S9
3636 BFD_RELOC_AC_SECTOFF_S9_1
3638 BFD_RELOC_AC_SECTOFF_S9_2
3640 BFD_RELOC_ARC_SECTOFF_ME_1
3642 BFD_RELOC_ARC_SECTOFF_ME_2
3644 BFD_RELOC_ARC_SECTOFF_1
3646 BFD_RELOC_ARC_SECTOFF_2
3648 BFD_RELOC_ARC_SDA_12
3650 BFD_RELOC_ARC_SDA16_ST2
3652 BFD_RELOC_ARC_32_PCREL
3658 BFD_RELOC_ARC_GOTPC32
3664 BFD_RELOC_ARC_GLOB_DAT
3666 BFD_RELOC_ARC_JMP_SLOT
3668 BFD_RELOC_ARC_RELATIVE
3670 BFD_RELOC_ARC_GOTOFF
3674 BFD_RELOC_ARC_S21W_PCREL_PLT
3676 BFD_RELOC_ARC_S25H_PCREL_PLT
3678 BFD_RELOC_ARC_TLS_DTPMOD
3680 BFD_RELOC_ARC_TLS_TPOFF
3682 BFD_RELOC_ARC_TLS_GD_GOT
3684 BFD_RELOC_ARC_TLS_GD_LD
3686 BFD_RELOC_ARC_TLS_GD_CALL
3688 BFD_RELOC_ARC_TLS_IE_GOT
3690 BFD_RELOC_ARC_TLS_DTPOFF
3692 BFD_RELOC_ARC_TLS_DTPOFF_S9
3694 BFD_RELOC_ARC_TLS_LE_S9
3696 BFD_RELOC_ARC_TLS_LE_32
3698 BFD_RELOC_ARC_S25W_PCREL_PLT
3700 BFD_RELOC_ARC_S21H_PCREL_PLT
3702 BFD_RELOC_ARC_NPS_CMEM16
3704 BFD_RELOC_ARC_JLI_SECTOFF
3709 BFD_RELOC_BFIN_16_IMM
3711 ADI Blackfin 16 bit immediate absolute reloc.
3713 BFD_RELOC_BFIN_16_HIGH
3715 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3717 BFD_RELOC_BFIN_4_PCREL
3719 ADI Blackfin 'a' part of LSETUP.
3721 BFD_RELOC_BFIN_5_PCREL
3725 BFD_RELOC_BFIN_16_LOW
3727 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3729 BFD_RELOC_BFIN_10_PCREL
3733 BFD_RELOC_BFIN_11_PCREL
3735 ADI Blackfin 'b' part of LSETUP.
3737 BFD_RELOC_BFIN_12_PCREL_JUMP
3741 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3743 ADI Blackfin Short jump, pcrel.
3745 BFD_RELOC_BFIN_24_PCREL_CALL_X
3747 ADI Blackfin Call.x not implemented.
3749 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3751 ADI Blackfin Long Jump pcrel.
3753 BFD_RELOC_BFIN_GOT17M4
3755 BFD_RELOC_BFIN_GOTHI
3757 BFD_RELOC_BFIN_GOTLO
3759 BFD_RELOC_BFIN_FUNCDESC
3761 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3763 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3765 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3767 BFD_RELOC_BFIN_FUNCDESC_VALUE
3769 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3771 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3773 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3775 BFD_RELOC_BFIN_GOTOFF17M4
3777 BFD_RELOC_BFIN_GOTOFFHI
3779 BFD_RELOC_BFIN_GOTOFFLO
3781 ADI Blackfin FD-PIC relocations.
3785 ADI Blackfin GOT relocation.
3787 BFD_RELOC_BFIN_PLTPC
3789 ADI Blackfin PLTPC relocation.
3791 BFD_ARELOC_BFIN_PUSH
3793 ADI Blackfin arithmetic relocation.
3795 BFD_ARELOC_BFIN_CONST
3797 ADI Blackfin arithmetic relocation.
3801 ADI Blackfin arithmetic relocation.
3805 ADI Blackfin arithmetic relocation.
3807 BFD_ARELOC_BFIN_MULT
3809 ADI Blackfin arithmetic relocation.
3813 ADI Blackfin arithmetic relocation.
3817 ADI Blackfin arithmetic relocation.
3819 BFD_ARELOC_BFIN_LSHIFT
3821 ADI Blackfin arithmetic relocation.
3823 BFD_ARELOC_BFIN_RSHIFT
3825 ADI Blackfin arithmetic relocation.
3829 ADI Blackfin arithmetic relocation.
3833 ADI Blackfin arithmetic relocation.
3837 ADI Blackfin arithmetic relocation.
3839 BFD_ARELOC_BFIN_LAND
3841 ADI Blackfin arithmetic relocation.
3845 ADI Blackfin arithmetic relocation.
3849 ADI Blackfin arithmetic relocation.
3853 ADI Blackfin arithmetic relocation.
3855 BFD_ARELOC_BFIN_COMP
3857 ADI Blackfin arithmetic relocation.
3859 BFD_ARELOC_BFIN_PAGE
3861 ADI Blackfin arithmetic relocation.
3863 BFD_ARELOC_BFIN_HWPAGE
3865 ADI Blackfin arithmetic relocation.
3867 BFD_ARELOC_BFIN_ADDR
3869 ADI Blackfin arithmetic relocation.
3872 BFD_RELOC_D10V_10_PCREL_R
3874 Mitsubishi D10V relocs.
3875 This is a 10-bit reloc with the right 2 bits
3878 BFD_RELOC_D10V_10_PCREL_L
3880 Mitsubishi D10V relocs.
3881 This is a 10-bit reloc with the right 2 bits
3882 assumed to be 0. This is the same as the previous reloc
3883 except it is in the left container, i.e.,
3884 shifted left 15 bits.
3888 This is an 18-bit reloc with the right 2 bits
3891 BFD_RELOC_D10V_18_PCREL
3893 This is an 18-bit reloc with the right 2 bits
3899 Mitsubishi D30V relocs.
3900 This is a 6-bit absolute reloc.
3902 BFD_RELOC_D30V_9_PCREL
3904 This is a 6-bit pc-relative reloc with
3905 the right 3 bits assumed to be 0.
3907 BFD_RELOC_D30V_9_PCREL_R
3909 This is a 6-bit pc-relative reloc with
3910 the right 3 bits assumed to be 0. Same
3911 as the previous reloc but on the right side
3916 This is a 12-bit absolute reloc with the
3917 right 3 bitsassumed to be 0.
3919 BFD_RELOC_D30V_15_PCREL
3921 This is a 12-bit pc-relative reloc with
3922 the right 3 bits assumed to be 0.
3924 BFD_RELOC_D30V_15_PCREL_R
3926 This is a 12-bit pc-relative reloc with
3927 the right 3 bits assumed to be 0. Same
3928 as the previous reloc but on the right side
3933 This is an 18-bit absolute reloc with
3934 the right 3 bits assumed to be 0.
3936 BFD_RELOC_D30V_21_PCREL
3938 This is an 18-bit pc-relative reloc with
3939 the right 3 bits assumed to be 0.
3941 BFD_RELOC_D30V_21_PCREL_R
3943 This is an 18-bit pc-relative reloc with
3944 the right 3 bits assumed to be 0. Same
3945 as the previous reloc but on the right side
3950 This is a 32-bit absolute reloc.
3952 BFD_RELOC_D30V_32_PCREL
3954 This is a 32-bit pc-relative reloc.
3957 BFD_RELOC_DLX_HI16_S
3972 BFD_RELOC_M32C_RL_JUMP
3974 BFD_RELOC_M32C_RL_1ADDR
3976 BFD_RELOC_M32C_RL_2ADDR
3978 Renesas M16C/M32C Relocations.
3983 Renesas M32R (formerly Mitsubishi M32R) relocs.
3984 This is a 24 bit absolute address.
3986 BFD_RELOC_M32R_10_PCREL
3988 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3990 BFD_RELOC_M32R_18_PCREL
3992 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3994 BFD_RELOC_M32R_26_PCREL
3996 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3998 BFD_RELOC_M32R_HI16_ULO
4000 This is a 16-bit reloc containing the high 16 bits of an address
4001 used when the lower 16 bits are treated as unsigned.
4003 BFD_RELOC_M32R_HI16_SLO
4005 This is a 16-bit reloc containing the high 16 bits of an address
4006 used when the lower 16 bits are treated as signed.
4010 This is a 16-bit reloc containing the lower 16 bits of an address.
4012 BFD_RELOC_M32R_SDA16
4014 This is a 16-bit reloc containing the small data area offset for use in
4015 add3, load, and store instructions.
4017 BFD_RELOC_M32R_GOT24
4019 BFD_RELOC_M32R_26_PLTREL
4023 BFD_RELOC_M32R_GLOB_DAT
4025 BFD_RELOC_M32R_JMP_SLOT
4027 BFD_RELOC_M32R_RELATIVE
4029 BFD_RELOC_M32R_GOTOFF
4031 BFD_RELOC_M32R_GOTOFF_HI_ULO
4033 BFD_RELOC_M32R_GOTOFF_HI_SLO
4035 BFD_RELOC_M32R_GOTOFF_LO
4037 BFD_RELOC_M32R_GOTPC24
4039 BFD_RELOC_M32R_GOT16_HI_ULO
4041 BFD_RELOC_M32R_GOT16_HI_SLO
4043 BFD_RELOC_M32R_GOT16_LO
4045 BFD_RELOC_M32R_GOTPC_HI_ULO
4047 BFD_RELOC_M32R_GOTPC_HI_SLO
4049 BFD_RELOC_M32R_GOTPC_LO
4058 This is a 20 bit absolute address.
4060 BFD_RELOC_NDS32_9_PCREL
4062 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4064 BFD_RELOC_NDS32_WORD_9_PCREL
4066 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4068 BFD_RELOC_NDS32_15_PCREL
4070 This is an 15-bit reloc with the right 1 bit assumed to be 0.
4072 BFD_RELOC_NDS32_17_PCREL
4074 This is an 17-bit reloc with the right 1 bit assumed to be 0.
4076 BFD_RELOC_NDS32_25_PCREL
4078 This is a 25-bit reloc with the right 1 bit assumed to be 0.
4080 BFD_RELOC_NDS32_HI20
4082 This is a 20-bit reloc containing the high 20 bits of an address
4083 used with the lower 12 bits
4085 BFD_RELOC_NDS32_LO12S3
4087 This is a 12-bit reloc containing the lower 12 bits of an address
4088 then shift right by 3. This is used with ldi,sdi...
4090 BFD_RELOC_NDS32_LO12S2
4092 This is a 12-bit reloc containing the lower 12 bits of an address
4093 then shift left by 2. This is used with lwi,swi...
4095 BFD_RELOC_NDS32_LO12S1
4097 This is a 12-bit reloc containing the lower 12 bits of an address
4098 then shift left by 1. This is used with lhi,shi...
4100 BFD_RELOC_NDS32_LO12S0
4102 This is a 12-bit reloc containing the lower 12 bits of an address
4103 then shift left by 0. This is used with lbisbi...
4105 BFD_RELOC_NDS32_LO12S0_ORI
4107 This is a 12-bit reloc containing the lower 12 bits of an address
4108 then shift left by 0. This is only used with branch relaxations
4110 BFD_RELOC_NDS32_SDA15S3
4112 This is a 15-bit reloc containing the small data area 18-bit signed offset
4113 and shift left by 3 for use in ldi, sdi...
4115 BFD_RELOC_NDS32_SDA15S2
4117 This is a 15-bit reloc containing the small data area 17-bit signed offset
4118 and shift left by 2 for use in lwi, swi...
4120 BFD_RELOC_NDS32_SDA15S1
4122 This is a 15-bit reloc containing the small data area 16-bit signed offset
4123 and shift left by 1 for use in lhi, shi...
4125 BFD_RELOC_NDS32_SDA15S0
4127 This is a 15-bit reloc containing the small data area 15-bit signed offset
4128 and shift left by 0 for use in lbi, sbi...
4130 BFD_RELOC_NDS32_SDA16S3
4132 This is a 16-bit reloc containing the small data area 16-bit signed offset
4135 BFD_RELOC_NDS32_SDA17S2
4137 This is a 17-bit reloc containing the small data area 17-bit signed offset
4138 and shift left by 2 for use in lwi.gp, swi.gp...
4140 BFD_RELOC_NDS32_SDA18S1
4142 This is a 18-bit reloc containing the small data area 18-bit signed offset
4143 and shift left by 1 for use in lhi.gp, shi.gp...
4145 BFD_RELOC_NDS32_SDA19S0
4147 This is a 19-bit reloc containing the small data area 19-bit signed offset
4148 and shift left by 0 for use in lbi.gp, sbi.gp...
4150 BFD_RELOC_NDS32_GOT20
4152 BFD_RELOC_NDS32_9_PLTREL
4154 BFD_RELOC_NDS32_25_PLTREL
4156 BFD_RELOC_NDS32_COPY
4158 BFD_RELOC_NDS32_GLOB_DAT
4160 BFD_RELOC_NDS32_JMP_SLOT
4162 BFD_RELOC_NDS32_RELATIVE
4164 BFD_RELOC_NDS32_GOTOFF
4166 BFD_RELOC_NDS32_GOTOFF_HI20
4168 BFD_RELOC_NDS32_GOTOFF_LO12
4170 BFD_RELOC_NDS32_GOTPC20
4172 BFD_RELOC_NDS32_GOT_HI20
4174 BFD_RELOC_NDS32_GOT_LO12
4176 BFD_RELOC_NDS32_GOTPC_HI20
4178 BFD_RELOC_NDS32_GOTPC_LO12
4182 BFD_RELOC_NDS32_INSN16
4184 BFD_RELOC_NDS32_LABEL
4186 BFD_RELOC_NDS32_LONGCALL1
4188 BFD_RELOC_NDS32_LONGCALL2
4190 BFD_RELOC_NDS32_LONGCALL3
4192 BFD_RELOC_NDS32_LONGJUMP1
4194 BFD_RELOC_NDS32_LONGJUMP2
4196 BFD_RELOC_NDS32_LONGJUMP3
4198 BFD_RELOC_NDS32_LOADSTORE
4200 BFD_RELOC_NDS32_9_FIXED
4202 BFD_RELOC_NDS32_15_FIXED
4204 BFD_RELOC_NDS32_17_FIXED
4206 BFD_RELOC_NDS32_25_FIXED
4208 BFD_RELOC_NDS32_LONGCALL4
4210 BFD_RELOC_NDS32_LONGCALL5
4212 BFD_RELOC_NDS32_LONGCALL6
4214 BFD_RELOC_NDS32_LONGJUMP4
4216 BFD_RELOC_NDS32_LONGJUMP5
4218 BFD_RELOC_NDS32_LONGJUMP6
4220 BFD_RELOC_NDS32_LONGJUMP7
4224 BFD_RELOC_NDS32_PLTREL_HI20
4226 BFD_RELOC_NDS32_PLTREL_LO12
4228 BFD_RELOC_NDS32_PLT_GOTREL_HI20
4230 BFD_RELOC_NDS32_PLT_GOTREL_LO12
4234 BFD_RELOC_NDS32_SDA12S2_DP
4236 BFD_RELOC_NDS32_SDA12S2_SP
4238 BFD_RELOC_NDS32_LO12S2_DP
4240 BFD_RELOC_NDS32_LO12S2_SP
4244 BFD_RELOC_NDS32_DWARF2_OP1
4246 BFD_RELOC_NDS32_DWARF2_OP2
4248 BFD_RELOC_NDS32_DWARF2_LEB
4250 for dwarf2 debug_line.
4252 BFD_RELOC_NDS32_UPDATE_TA
4254 for eliminate 16-bit instructions
4256 BFD_RELOC_NDS32_PLT_GOTREL_LO20
4258 BFD_RELOC_NDS32_PLT_GOTREL_LO15
4260 BFD_RELOC_NDS32_PLT_GOTREL_LO19
4262 BFD_RELOC_NDS32_GOT_LO15
4264 BFD_RELOC_NDS32_GOT_LO19
4266 BFD_RELOC_NDS32_GOTOFF_LO15
4268 BFD_RELOC_NDS32_GOTOFF_LO19
4270 BFD_RELOC_NDS32_GOT15S2
4272 BFD_RELOC_NDS32_GOT17S2
4274 for PIC object relaxation
4279 This is a 5 bit absolute address.
4281 BFD_RELOC_NDS32_10_UPCREL
4283 This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
4285 BFD_RELOC_NDS32_SDA_FP7U2_RELA
4287 If fp were omitted, fp can used as another gp.
4289 BFD_RELOC_NDS32_RELAX_ENTRY
4291 BFD_RELOC_NDS32_GOT_SUFF
4293 BFD_RELOC_NDS32_GOTOFF_SUFF
4295 BFD_RELOC_NDS32_PLT_GOT_SUFF
4297 BFD_RELOC_NDS32_MULCALL_SUFF
4301 BFD_RELOC_NDS32_PTR_COUNT
4303 BFD_RELOC_NDS32_PTR_RESOLVED
4305 BFD_RELOC_NDS32_PLTBLOCK
4307 BFD_RELOC_NDS32_RELAX_REGION_BEGIN
4309 BFD_RELOC_NDS32_RELAX_REGION_END
4311 BFD_RELOC_NDS32_MINUEND
4313 BFD_RELOC_NDS32_SUBTRAHEND
4315 BFD_RELOC_NDS32_DIFF8
4317 BFD_RELOC_NDS32_DIFF16
4319 BFD_RELOC_NDS32_DIFF32
4321 BFD_RELOC_NDS32_DIFF_ULEB128
4323 BFD_RELOC_NDS32_EMPTY
4325 relaxation relative relocation types
4327 BFD_RELOC_NDS32_25_ABS
4329 This is a 25 bit absolute address.
4331 BFD_RELOC_NDS32_DATA
4333 BFD_RELOC_NDS32_TRAN
4335 BFD_RELOC_NDS32_17IFC_PCREL
4337 BFD_RELOC_NDS32_10IFCU_PCREL
4339 For ex9 and ifc using.
4341 BFD_RELOC_NDS32_TPOFF
4343 BFD_RELOC_NDS32_GOTTPOFF
4345 BFD_RELOC_NDS32_TLS_LE_HI20
4347 BFD_RELOC_NDS32_TLS_LE_LO12
4349 BFD_RELOC_NDS32_TLS_LE_20
4351 BFD_RELOC_NDS32_TLS_LE_15S0
4353 BFD_RELOC_NDS32_TLS_LE_15S1
4355 BFD_RELOC_NDS32_TLS_LE_15S2
4357 BFD_RELOC_NDS32_TLS_LE_ADD
4359 BFD_RELOC_NDS32_TLS_LE_LS
4361 BFD_RELOC_NDS32_TLS_IE_HI20
4363 BFD_RELOC_NDS32_TLS_IE_LO12
4365 BFD_RELOC_NDS32_TLS_IE_LO12S2
4367 BFD_RELOC_NDS32_TLS_IEGP_HI20
4369 BFD_RELOC_NDS32_TLS_IEGP_LO12
4371 BFD_RELOC_NDS32_TLS_IEGP_LO12S2
4373 BFD_RELOC_NDS32_TLS_IEGP_LW
4375 BFD_RELOC_NDS32_TLS_DESC
4377 BFD_RELOC_NDS32_TLS_DESC_HI20
4379 BFD_RELOC_NDS32_TLS_DESC_LO12
4381 BFD_RELOC_NDS32_TLS_DESC_20
4383 BFD_RELOC_NDS32_TLS_DESC_SDA17S2
4385 BFD_RELOC_NDS32_TLS_DESC_ADD
4387 BFD_RELOC_NDS32_TLS_DESC_FUNC
4389 BFD_RELOC_NDS32_TLS_DESC_CALL
4391 BFD_RELOC_NDS32_TLS_DESC_MEM
4393 BFD_RELOC_NDS32_REMOVE
4395 BFD_RELOC_NDS32_GROUP
4401 For floating load store relaxation.
4405 BFD_RELOC_V850_9_PCREL
4407 This is a 9-bit reloc
4409 BFD_RELOC_V850_22_PCREL
4411 This is a 22-bit reloc
4414 BFD_RELOC_V850_SDA_16_16_OFFSET
4416 This is a 16 bit offset from the short data area pointer.
4418 BFD_RELOC_V850_SDA_15_16_OFFSET
4420 This is a 16 bit offset (of which only 15 bits are used) from the
4421 short data area pointer.
4423 BFD_RELOC_V850_ZDA_16_16_OFFSET
4425 This is a 16 bit offset from the zero data area pointer.
4427 BFD_RELOC_V850_ZDA_15_16_OFFSET
4429 This is a 16 bit offset (of which only 15 bits are used) from the
4430 zero data area pointer.
4432 BFD_RELOC_V850_TDA_6_8_OFFSET
4434 This is an 8 bit offset (of which only 6 bits are used) from the
4435 tiny data area pointer.
4437 BFD_RELOC_V850_TDA_7_8_OFFSET
4439 This is an 8bit offset (of which only 7 bits are used) from the tiny
4442 BFD_RELOC_V850_TDA_7_7_OFFSET
4444 This is a 7 bit offset from the tiny data area pointer.
4446 BFD_RELOC_V850_TDA_16_16_OFFSET
4448 This is a 16 bit offset from the tiny data area pointer.
4451 BFD_RELOC_V850_TDA_4_5_OFFSET
4453 This is a 5 bit offset (of which only 4 bits are used) from the tiny
4456 BFD_RELOC_V850_TDA_4_4_OFFSET
4458 This is a 4 bit offset from the tiny data area pointer.
4460 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
4462 This is a 16 bit offset from the short data area pointer, with the
4463 bits placed non-contiguously in the instruction.
4465 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
4467 This is a 16 bit offset from the zero data area pointer, with the
4468 bits placed non-contiguously in the instruction.
4470 BFD_RELOC_V850_CALLT_6_7_OFFSET
4472 This is a 6 bit offset from the call table base pointer.
4474 BFD_RELOC_V850_CALLT_16_16_OFFSET
4476 This is a 16 bit offset from the call table base pointer.
4478 BFD_RELOC_V850_LONGCALL
4480 Used for relaxing indirect function calls.
4482 BFD_RELOC_V850_LONGJUMP
4484 Used for relaxing indirect jumps.
4486 BFD_RELOC_V850_ALIGN
4488 Used to maintain alignment whilst relaxing.
4490 BFD_RELOC_V850_LO16_SPLIT_OFFSET
4492 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
4495 BFD_RELOC_V850_16_PCREL
4497 This is a 16-bit reloc.
4499 BFD_RELOC_V850_17_PCREL
4501 This is a 17-bit reloc.
4505 This is a 23-bit reloc.
4507 BFD_RELOC_V850_32_PCREL
4509 This is a 32-bit reloc.
4511 BFD_RELOC_V850_32_ABS
4513 This is a 32-bit reloc.
4515 BFD_RELOC_V850_16_SPLIT_OFFSET
4517 This is a 16-bit reloc.
4519 BFD_RELOC_V850_16_S1
4521 This is a 16-bit reloc.
4523 BFD_RELOC_V850_LO16_S1
4525 Low 16 bits. 16 bit shifted by 1.
4527 BFD_RELOC_V850_CALLT_15_16_OFFSET
4529 This is a 16 bit offset from the call table base pointer.
4531 BFD_RELOC_V850_32_GOTPCREL
4535 BFD_RELOC_V850_16_GOT
4539 BFD_RELOC_V850_32_GOT
4543 BFD_RELOC_V850_22_PLT_PCREL
4547 BFD_RELOC_V850_32_PLT_PCREL
4555 BFD_RELOC_V850_GLOB_DAT
4559 BFD_RELOC_V850_JMP_SLOT
4563 BFD_RELOC_V850_RELATIVE
4567 BFD_RELOC_V850_16_GOTOFF
4571 BFD_RELOC_V850_32_GOTOFF
4586 This is a 8bit DP reloc for the tms320c30, where the most
4587 significant 8 bits of a 24 bit word are placed into the least
4588 significant 8 bits of the opcode.
4591 BFD_RELOC_TIC54X_PARTLS7
4593 This is a 7bit reloc for the tms320c54x, where the least
4594 significant 7 bits of a 16 bit word are placed into the least
4595 significant 7 bits of the opcode.
4598 BFD_RELOC_TIC54X_PARTMS9
4600 This is a 9bit DP reloc for the tms320c54x, where the most
4601 significant 9 bits of a 16 bit word are placed into the least
4602 significant 9 bits of the opcode.
4607 This is an extended address 23-bit reloc for the tms320c54x.
4610 BFD_RELOC_TIC54X_16_OF_23
4612 This is a 16-bit reloc for the tms320c54x, where the least
4613 significant 16 bits of a 23-bit extended address are placed into
4617 BFD_RELOC_TIC54X_MS7_OF_23
4619 This is a reloc for the tms320c54x, where the most
4620 significant 7 bits of a 23-bit extended address are placed into
4624 BFD_RELOC_C6000_PCR_S21
4626 BFD_RELOC_C6000_PCR_S12
4628 BFD_RELOC_C6000_PCR_S10
4630 BFD_RELOC_C6000_PCR_S7
4632 BFD_RELOC_C6000_ABS_S16
4634 BFD_RELOC_C6000_ABS_L16
4636 BFD_RELOC_C6000_ABS_H16
4638 BFD_RELOC_C6000_SBR_U15_B
4640 BFD_RELOC_C6000_SBR_U15_H
4642 BFD_RELOC_C6000_SBR_U15_W
4644 BFD_RELOC_C6000_SBR_S16
4646 BFD_RELOC_C6000_SBR_L16_B
4648 BFD_RELOC_C6000_SBR_L16_H
4650 BFD_RELOC_C6000_SBR_L16_W
4652 BFD_RELOC_C6000_SBR_H16_B
4654 BFD_RELOC_C6000_SBR_H16_H
4656 BFD_RELOC_C6000_SBR_H16_W
4658 BFD_RELOC_C6000_SBR_GOT_U15_W
4660 BFD_RELOC_C6000_SBR_GOT_L16_W
4662 BFD_RELOC_C6000_SBR_GOT_H16_W
4664 BFD_RELOC_C6000_DSBT_INDEX
4666 BFD_RELOC_C6000_PREL31
4668 BFD_RELOC_C6000_COPY
4670 BFD_RELOC_C6000_JUMP_SLOT
4672 BFD_RELOC_C6000_EHTYPE
4674 BFD_RELOC_C6000_PCR_H16
4676 BFD_RELOC_C6000_PCR_L16
4678 BFD_RELOC_C6000_ALIGN
4680 BFD_RELOC_C6000_FPHEAD
4682 BFD_RELOC_C6000_NOCMP
4684 TMS320C6000 relocations.
4689 This is a 48 bit reloc for the FR30 that stores 32 bits.
4693 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4696 BFD_RELOC_FR30_6_IN_4
4698 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4701 BFD_RELOC_FR30_8_IN_8
4703 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4706 BFD_RELOC_FR30_9_IN_8
4708 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4711 BFD_RELOC_FR30_10_IN_8
4713 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4716 BFD_RELOC_FR30_9_PCREL
4718 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4719 short offset into 8 bits.
4721 BFD_RELOC_FR30_12_PCREL
4723 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4724 short offset into 11 bits.
4727 BFD_RELOC_MCORE_PCREL_IMM8BY4
4729 BFD_RELOC_MCORE_PCREL_IMM11BY2
4731 BFD_RELOC_MCORE_PCREL_IMM4BY2
4733 BFD_RELOC_MCORE_PCREL_32
4735 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4739 Motorola Mcore relocations.
4748 BFD_RELOC_MEP_PCREL8A2
4750 BFD_RELOC_MEP_PCREL12A2
4752 BFD_RELOC_MEP_PCREL17A2
4754 BFD_RELOC_MEP_PCREL24A2
4756 BFD_RELOC_MEP_PCABS24A2
4768 BFD_RELOC_MEP_TPREL7
4770 BFD_RELOC_MEP_TPREL7A2
4772 BFD_RELOC_MEP_TPREL7A4
4774 BFD_RELOC_MEP_UIMM24
4776 BFD_RELOC_MEP_ADDR24A4
4778 BFD_RELOC_MEP_GNU_VTINHERIT
4780 BFD_RELOC_MEP_GNU_VTENTRY
4782 Toshiba Media Processor Relocations.
4786 BFD_RELOC_METAG_HIADDR16
4788 BFD_RELOC_METAG_LOADDR16
4790 BFD_RELOC_METAG_RELBRANCH
4792 BFD_RELOC_METAG_GETSETOFF
4794 BFD_RELOC_METAG_HIOG
4796 BFD_RELOC_METAG_LOOG
4798 BFD_RELOC_METAG_REL8
4800 BFD_RELOC_METAG_REL16
4802 BFD_RELOC_METAG_HI16_GOTOFF
4804 BFD_RELOC_METAG_LO16_GOTOFF
4806 BFD_RELOC_METAG_GETSET_GOTOFF
4808 BFD_RELOC_METAG_GETSET_GOT
4810 BFD_RELOC_METAG_HI16_GOTPC
4812 BFD_RELOC_METAG_LO16_GOTPC
4814 BFD_RELOC_METAG_HI16_PLT
4816 BFD_RELOC_METAG_LO16_PLT
4818 BFD_RELOC_METAG_RELBRANCH_PLT
4820 BFD_RELOC_METAG_GOTOFF
4824 BFD_RELOC_METAG_COPY
4826 BFD_RELOC_METAG_JMP_SLOT
4828 BFD_RELOC_METAG_RELATIVE
4830 BFD_RELOC_METAG_GLOB_DAT
4832 BFD_RELOC_METAG_TLS_GD
4834 BFD_RELOC_METAG_TLS_LDM
4836 BFD_RELOC_METAG_TLS_LDO_HI16
4838 BFD_RELOC_METAG_TLS_LDO_LO16
4840 BFD_RELOC_METAG_TLS_LDO
4842 BFD_RELOC_METAG_TLS_IE
4844 BFD_RELOC_METAG_TLS_IENONPIC
4846 BFD_RELOC_METAG_TLS_IENONPIC_HI16
4848 BFD_RELOC_METAG_TLS_IENONPIC_LO16
4850 BFD_RELOC_METAG_TLS_TPOFF
4852 BFD_RELOC_METAG_TLS_DTPMOD
4854 BFD_RELOC_METAG_TLS_DTPOFF
4856 BFD_RELOC_METAG_TLS_LE
4858 BFD_RELOC_METAG_TLS_LE_HI16
4860 BFD_RELOC_METAG_TLS_LE_LO16
4862 Imagination Technologies Meta relocations.
4867 BFD_RELOC_MMIX_GETA_1
4869 BFD_RELOC_MMIX_GETA_2
4871 BFD_RELOC_MMIX_GETA_3
4873 These are relocations for the GETA instruction.
4875 BFD_RELOC_MMIX_CBRANCH
4877 BFD_RELOC_MMIX_CBRANCH_J
4879 BFD_RELOC_MMIX_CBRANCH_1
4881 BFD_RELOC_MMIX_CBRANCH_2
4883 BFD_RELOC_MMIX_CBRANCH_3
4885 These are relocations for a conditional branch instruction.
4887 BFD_RELOC_MMIX_PUSHJ
4889 BFD_RELOC_MMIX_PUSHJ_1
4891 BFD_RELOC_MMIX_PUSHJ_2
4893 BFD_RELOC_MMIX_PUSHJ_3
4895 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4897 These are relocations for the PUSHJ instruction.
4901 BFD_RELOC_MMIX_JMP_1
4903 BFD_RELOC_MMIX_JMP_2
4905 BFD_RELOC_MMIX_JMP_3
4907 These are relocations for the JMP instruction.
4909 BFD_RELOC_MMIX_ADDR19
4911 This is a relocation for a relative address as in a GETA instruction or
4914 BFD_RELOC_MMIX_ADDR27
4916 This is a relocation for a relative address as in a JMP instruction.
4918 BFD_RELOC_MMIX_REG_OR_BYTE
4920 This is a relocation for an instruction field that may be a general
4921 register or a value 0..255.
4925 This is a relocation for an instruction field that may be a general
4928 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4930 This is a relocation for two instruction fields holding a register and
4931 an offset, the equivalent of the relocation.
4933 BFD_RELOC_MMIX_LOCAL
4935 This relocation is an assertion that the expression is not allocated as
4936 a global register. It does not modify contents.
4939 BFD_RELOC_AVR_7_PCREL
4941 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4942 short offset into 7 bits.
4944 BFD_RELOC_AVR_13_PCREL
4946 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4947 short offset into 12 bits.
4951 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4952 program memory address) into 16 bits.
4954 BFD_RELOC_AVR_LO8_LDI
4956 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4957 data memory address) into 8 bit immediate value of LDI insn.
4959 BFD_RELOC_AVR_HI8_LDI
4961 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4962 of data memory address) into 8 bit immediate value of LDI insn.
4964 BFD_RELOC_AVR_HH8_LDI
4966 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4967 of program memory address) into 8 bit immediate value of LDI insn.
4969 BFD_RELOC_AVR_MS8_LDI
4971 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4972 of 32 bit value) into 8 bit immediate value of LDI insn.
4974 BFD_RELOC_AVR_LO8_LDI_NEG
4976 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4977 (usually data memory address) into 8 bit immediate value of SUBI insn.
4979 BFD_RELOC_AVR_HI8_LDI_NEG
4981 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4982 (high 8 bit of data memory address) into 8 bit immediate value of
4985 BFD_RELOC_AVR_HH8_LDI_NEG
4987 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4988 (most high 8 bit of program memory address) into 8 bit immediate value
4989 of LDI or SUBI insn.
4991 BFD_RELOC_AVR_MS8_LDI_NEG
4993 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4994 of 32 bit value) into 8 bit immediate value of LDI insn.
4996 BFD_RELOC_AVR_LO8_LDI_PM
4998 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4999 command address) into 8 bit immediate value of LDI insn.
5001 BFD_RELOC_AVR_LO8_LDI_GS
5003 This is a 16 bit reloc for the AVR that stores 8 bit value
5004 (command address) into 8 bit immediate value of LDI insn. If the address
5005 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
5008 BFD_RELOC_AVR_HI8_LDI_PM
5010 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
5011 of command address) into 8 bit immediate value of LDI insn.
5013 BFD_RELOC_AVR_HI8_LDI_GS
5015 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
5016 of command address) into 8 bit immediate value of LDI insn. If the address
5017 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
5020 BFD_RELOC_AVR_HH8_LDI_PM
5022 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
5023 of command address) into 8 bit immediate value of LDI insn.
5025 BFD_RELOC_AVR_LO8_LDI_PM_NEG
5027 This is a 16 bit reloc for the AVR that stores negated 8 bit value
5028 (usually command address) into 8 bit immediate value of SUBI insn.
5030 BFD_RELOC_AVR_HI8_LDI_PM_NEG
5032 This is a 16 bit reloc for the AVR that stores negated 8 bit value
5033 (high 8 bit of 16 bit command address) into 8 bit immediate value
5036 BFD_RELOC_AVR_HH8_LDI_PM_NEG
5038 This is a 16 bit reloc for the AVR that stores negated 8 bit value
5039 (high 6 bit of 22 bit command address) into 8 bit immediate
5044 This is a 32 bit reloc for the AVR that stores 23 bit value
5049 This is a 16 bit reloc for the AVR that stores all needed bits
5050 for absolute addressing with ldi with overflow check to linktime
5054 This is a 6 bit reloc for the AVR that stores offset for ldd/std
5057 BFD_RELOC_AVR_6_ADIW
5059 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
5064 This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
5065 in .byte lo8(symbol)
5069 This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
5070 in .byte hi8(symbol)
5074 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
5075 in .byte hlo8(symbol)
5079 BFD_RELOC_AVR_DIFF16
5081 BFD_RELOC_AVR_DIFF32
5083 AVR relocations to mark the difference of two local symbols.
5084 These are only needed to support linker relaxation and can be ignored
5085 when not relaxing. The field is set to the value of the difference
5086 assuming no relaxation. The relocation encodes the position of the
5087 second symbol so the linker can determine whether to adjust the field
5090 BFD_RELOC_AVR_LDS_STS_16
5092 This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
5093 lds and sts instructions supported only tiny core.
5097 This is a 6 bit reloc for the AVR that stores an I/O register
5098 number for the IN and OUT instructions
5102 This is a 5 bit reloc for the AVR that stores an I/O register
5103 number for the SBIC, SBIS, SBI and CBI instructions
5106 BFD_RELOC_RISCV_HI20
5108 BFD_RELOC_RISCV_PCREL_HI20
5110 BFD_RELOC_RISCV_PCREL_LO12_I
5112 BFD_RELOC_RISCV_PCREL_LO12_S
5114 BFD_RELOC_RISCV_LO12_I
5116 BFD_RELOC_RISCV_LO12_S
5118 BFD_RELOC_RISCV_GPREL12_I
5120 BFD_RELOC_RISCV_GPREL12_S
5122 BFD_RELOC_RISCV_TPREL_HI20
5124 BFD_RELOC_RISCV_TPREL_LO12_I
5126 BFD_RELOC_RISCV_TPREL_LO12_S
5128 BFD_RELOC_RISCV_TPREL_ADD
5130 BFD_RELOC_RISCV_CALL
5132 BFD_RELOC_RISCV_CALL_PLT
5134 BFD_RELOC_RISCV_ADD8
5136 BFD_RELOC_RISCV_ADD16
5138 BFD_RELOC_RISCV_ADD32
5140 BFD_RELOC_RISCV_ADD64
5142 BFD_RELOC_RISCV_SUB8
5144 BFD_RELOC_RISCV_SUB16
5146 BFD_RELOC_RISCV_SUB32
5148 BFD_RELOC_RISCV_SUB64
5150 BFD_RELOC_RISCV_GOT_HI20
5152 BFD_RELOC_RISCV_TLS_GOT_HI20
5154 BFD_RELOC_RISCV_TLS_GD_HI20
5158 BFD_RELOC_RISCV_TLS_DTPMOD32
5160 BFD_RELOC_RISCV_TLS_DTPREL32
5162 BFD_RELOC_RISCV_TLS_DTPMOD64
5164 BFD_RELOC_RISCV_TLS_DTPREL64
5166 BFD_RELOC_RISCV_TLS_TPREL32
5168 BFD_RELOC_RISCV_TLS_TPREL64
5170 BFD_RELOC_RISCV_ALIGN
5172 BFD_RELOC_RISCV_RVC_BRANCH
5174 BFD_RELOC_RISCV_RVC_JUMP
5176 BFD_RELOC_RISCV_RVC_LUI
5178 BFD_RELOC_RISCV_GPREL_I
5180 BFD_RELOC_RISCV_GPREL_S
5182 BFD_RELOC_RISCV_TPREL_I
5184 BFD_RELOC_RISCV_TPREL_S
5186 BFD_RELOC_RISCV_RELAX
5190 BFD_RELOC_RISCV_SUB6
5192 BFD_RELOC_RISCV_SET6
5194 BFD_RELOC_RISCV_SET8
5196 BFD_RELOC_RISCV_SET16
5198 BFD_RELOC_RISCV_SET32
5200 BFD_RELOC_RISCV_32_PCREL
5207 BFD_RELOC_RL78_NEG16
5209 BFD_RELOC_RL78_NEG24
5211 BFD_RELOC_RL78_NEG32
5213 BFD_RELOC_RL78_16_OP
5215 BFD_RELOC_RL78_24_OP
5217 BFD_RELOC_RL78_32_OP
5225 BFD_RELOC_RL78_DIR3U_PCREL
5229 BFD_RELOC_RL78_GPRELB
5231 BFD_RELOC_RL78_GPRELW
5233 BFD_RELOC_RL78_GPRELL
5237 BFD_RELOC_RL78_OP_SUBTRACT
5239 BFD_RELOC_RL78_OP_NEG
5241 BFD_RELOC_RL78_OP_AND
5243 BFD_RELOC_RL78_OP_SHRA
5247 BFD_RELOC_RL78_ABS16
5249 BFD_RELOC_RL78_ABS16_REV
5251 BFD_RELOC_RL78_ABS32
5253 BFD_RELOC_RL78_ABS32_REV
5255 BFD_RELOC_RL78_ABS16U
5257 BFD_RELOC_RL78_ABS16UW
5259 BFD_RELOC_RL78_ABS16UL
5261 BFD_RELOC_RL78_RELAX
5271 BFD_RELOC_RL78_SADDR
5273 Renesas RL78 Relocations.
5296 BFD_RELOC_RX_DIR3U_PCREL
5308 BFD_RELOC_RX_OP_SUBTRACT
5316 BFD_RELOC_RX_ABS16_REV
5320 BFD_RELOC_RX_ABS32_REV
5324 BFD_RELOC_RX_ABS16UW
5326 BFD_RELOC_RX_ABS16UL
5330 Renesas RX Relocations.
5343 32 bit PC relative PLT address.
5347 Copy symbol at runtime.
5349 BFD_RELOC_390_GLOB_DAT
5353 BFD_RELOC_390_JMP_SLOT
5357 BFD_RELOC_390_RELATIVE
5359 Adjust by program base.
5363 32 bit PC relative offset to GOT.
5369 BFD_RELOC_390_PC12DBL
5371 PC relative 12 bit shifted by 1.
5373 BFD_RELOC_390_PLT12DBL
5375 12 bit PC rel. PLT shifted by 1.
5377 BFD_RELOC_390_PC16DBL
5379 PC relative 16 bit shifted by 1.
5381 BFD_RELOC_390_PLT16DBL
5383 16 bit PC rel. PLT shifted by 1.
5385 BFD_RELOC_390_PC24DBL
5387 PC relative 24 bit shifted by 1.
5389 BFD_RELOC_390_PLT24DBL
5391 24 bit PC rel. PLT shifted by 1.
5393 BFD_RELOC_390_PC32DBL
5395 PC relative 32 bit shifted by 1.
5397 BFD_RELOC_390_PLT32DBL
5399 32 bit PC rel. PLT shifted by 1.
5401 BFD_RELOC_390_GOTPCDBL
5403 32 bit PC rel. GOT shifted by 1.
5411 64 bit PC relative PLT address.
5413 BFD_RELOC_390_GOTENT
5415 32 bit rel. offset to GOT entry.
5417 BFD_RELOC_390_GOTOFF64
5419 64 bit offset to GOT.
5421 BFD_RELOC_390_GOTPLT12
5423 12-bit offset to symbol-entry within GOT, with PLT handling.
5425 BFD_RELOC_390_GOTPLT16
5427 16-bit offset to symbol-entry within GOT, with PLT handling.
5429 BFD_RELOC_390_GOTPLT32
5431 32-bit offset to symbol-entry within GOT, with PLT handling.
5433 BFD_RELOC_390_GOTPLT64
5435 64-bit offset to symbol-entry within GOT, with PLT handling.
5437 BFD_RELOC_390_GOTPLTENT
5439 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
5441 BFD_RELOC_390_PLTOFF16
5443 16-bit rel. offset from the GOT to a PLT entry.
5445 BFD_RELOC_390_PLTOFF32
5447 32-bit rel. offset from the GOT to a PLT entry.
5449 BFD_RELOC_390_PLTOFF64
5451 64-bit rel. offset from the GOT to a PLT entry.
5454 BFD_RELOC_390_TLS_LOAD
5456 BFD_RELOC_390_TLS_GDCALL
5458 BFD_RELOC_390_TLS_LDCALL
5460 BFD_RELOC_390_TLS_GD32
5462 BFD_RELOC_390_TLS_GD64
5464 BFD_RELOC_390_TLS_GOTIE12
5466 BFD_RELOC_390_TLS_GOTIE32
5468 BFD_RELOC_390_TLS_GOTIE64
5470 BFD_RELOC_390_TLS_LDM32
5472 BFD_RELOC_390_TLS_LDM64
5474 BFD_RELOC_390_TLS_IE32
5476 BFD_RELOC_390_TLS_IE64
5478 BFD_RELOC_390_TLS_IEENT
5480 BFD_RELOC_390_TLS_LE32
5482 BFD_RELOC_390_TLS_LE64
5484 BFD_RELOC_390_TLS_LDO32
5486 BFD_RELOC_390_TLS_LDO64
5488 BFD_RELOC_390_TLS_DTPMOD
5490 BFD_RELOC_390_TLS_DTPOFF
5492 BFD_RELOC_390_TLS_TPOFF
5494 s390 tls relocations.
5501 BFD_RELOC_390_GOTPLT20
5503 BFD_RELOC_390_TLS_GOTIE20
5505 Long displacement extension.
5508 BFD_RELOC_390_IRELATIVE
5510 STT_GNU_IFUNC relocation.
5513 BFD_RELOC_SCORE_GPREL15
5516 Low 16 bit for load/store
5518 BFD_RELOC_SCORE_DUMMY2
5522 This is a 24-bit reloc with the right 1 bit assumed to be 0
5524 BFD_RELOC_SCORE_BRANCH
5526 This is a 19-bit reloc with the right 1 bit assumed to be 0
5528 BFD_RELOC_SCORE_IMM30
5530 This is a 32-bit reloc for 48-bit instructions.
5532 BFD_RELOC_SCORE_IMM32
5534 This is a 32-bit reloc for 48-bit instructions.
5536 BFD_RELOC_SCORE16_JMP
5538 This is a 11-bit reloc with the right 1 bit assumed to be 0
5540 BFD_RELOC_SCORE16_BRANCH
5542 This is a 8-bit reloc with the right 1 bit assumed to be 0
5544 BFD_RELOC_SCORE_BCMP
5546 This is a 9-bit reloc with the right 1 bit assumed to be 0
5548 BFD_RELOC_SCORE_GOT15
5550 BFD_RELOC_SCORE_GOT_LO16
5552 BFD_RELOC_SCORE_CALL15
5554 BFD_RELOC_SCORE_DUMMY_HI16
5556 Undocumented Score relocs
5561 Scenix IP2K - 9-bit register number / data address
5565 Scenix IP2K - 4-bit register/data bank number
5567 BFD_RELOC_IP2K_ADDR16CJP
5569 Scenix IP2K - low 13 bits of instruction word address
5571 BFD_RELOC_IP2K_PAGE3
5573 Scenix IP2K - high 3 bits of instruction word address
5575 BFD_RELOC_IP2K_LO8DATA
5577 BFD_RELOC_IP2K_HI8DATA
5579 BFD_RELOC_IP2K_EX8DATA
5581 Scenix IP2K - ext/low/high 8 bits of data address
5583 BFD_RELOC_IP2K_LO8INSN
5585 BFD_RELOC_IP2K_HI8INSN
5587 Scenix IP2K - low/high 8 bits of instruction word address
5589 BFD_RELOC_IP2K_PC_SKIP
5591 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
5595 Scenix IP2K - 16 bit word address in text section.
5597 BFD_RELOC_IP2K_FR_OFFSET
5599 Scenix IP2K - 7-bit sp or dp offset
5601 BFD_RELOC_VPE4KMATH_DATA
5603 BFD_RELOC_VPE4KMATH_INSN
5605 Scenix VPE4K coprocessor - data/insn-space addressing
5608 BFD_RELOC_VTABLE_INHERIT
5610 BFD_RELOC_VTABLE_ENTRY
5612 These two relocations are used by the linker to determine which of
5613 the entries in a C++ virtual function table are actually used. When
5614 the --gc-sections option is given, the linker will zero out the entries
5615 that are not used, so that the code for those functions need not be
5616 included in the output.
5618 VTABLE_INHERIT is a zero-space relocation used to describe to the
5619 linker the inheritance tree of a C++ virtual function table. The
5620 relocation's symbol should be the parent class' vtable, and the
5621 relocation should be located at the child vtable.
5623 VTABLE_ENTRY is a zero-space relocation that describes the use of a
5624 virtual function table entry. The reloc's symbol should refer to the
5625 table of the class mentioned in the code. Off of that base, an offset
5626 describes the entry that is being used. For Rela hosts, this offset
5627 is stored in the reloc's addend. For Rel hosts, we are forced to put
5628 this offset in the reloc's section offset.
5631 BFD_RELOC_IA64_IMM14
5633 BFD_RELOC_IA64_IMM22
5635 BFD_RELOC_IA64_IMM64
5637 BFD_RELOC_IA64_DIR32MSB
5639 BFD_RELOC_IA64_DIR32LSB
5641 BFD_RELOC_IA64_DIR64MSB
5643 BFD_RELOC_IA64_DIR64LSB
5645 BFD_RELOC_IA64_GPREL22
5647 BFD_RELOC_IA64_GPREL64I
5649 BFD_RELOC_IA64_GPREL32MSB
5651 BFD_RELOC_IA64_GPREL32LSB
5653 BFD_RELOC_IA64_GPREL64MSB
5655 BFD_RELOC_IA64_GPREL64LSB
5657 BFD_RELOC_IA64_LTOFF22
5659 BFD_RELOC_IA64_LTOFF64I
5661 BFD_RELOC_IA64_PLTOFF22
5663 BFD_RELOC_IA64_PLTOFF64I
5665 BFD_RELOC_IA64_PLTOFF64MSB
5667 BFD_RELOC_IA64_PLTOFF64LSB
5669 BFD_RELOC_IA64_FPTR64I
5671 BFD_RELOC_IA64_FPTR32MSB
5673 BFD_RELOC_IA64_FPTR32LSB
5675 BFD_RELOC_IA64_FPTR64MSB
5677 BFD_RELOC_IA64_FPTR64LSB
5679 BFD_RELOC_IA64_PCREL21B
5681 BFD_RELOC_IA64_PCREL21BI
5683 BFD_RELOC_IA64_PCREL21M
5685 BFD_RELOC_IA64_PCREL21F
5687 BFD_RELOC_IA64_PCREL22
5689 BFD_RELOC_IA64_PCREL60B
5691 BFD_RELOC_IA64_PCREL64I
5693 BFD_RELOC_IA64_PCREL32MSB
5695 BFD_RELOC_IA64_PCREL32LSB
5697 BFD_RELOC_IA64_PCREL64MSB
5699 BFD_RELOC_IA64_PCREL64LSB
5701 BFD_RELOC_IA64_LTOFF_FPTR22
5703 BFD_RELOC_IA64_LTOFF_FPTR64I
5705 BFD_RELOC_IA64_LTOFF_FPTR32MSB
5707 BFD_RELOC_IA64_LTOFF_FPTR32LSB
5709 BFD_RELOC_IA64_LTOFF_FPTR64MSB
5711 BFD_RELOC_IA64_LTOFF_FPTR64LSB
5713 BFD_RELOC_IA64_SEGREL32MSB
5715 BFD_RELOC_IA64_SEGREL32LSB
5717 BFD_RELOC_IA64_SEGREL64MSB
5719 BFD_RELOC_IA64_SEGREL64LSB
5721 BFD_RELOC_IA64_SECREL32MSB
5723 BFD_RELOC_IA64_SECREL32LSB
5725 BFD_RELOC_IA64_SECREL64MSB
5727 BFD_RELOC_IA64_SECREL64LSB
5729 BFD_RELOC_IA64_REL32MSB
5731 BFD_RELOC_IA64_REL32LSB
5733 BFD_RELOC_IA64_REL64MSB
5735 BFD_RELOC_IA64_REL64LSB
5737 BFD_RELOC_IA64_LTV32MSB
5739 BFD_RELOC_IA64_LTV32LSB
5741 BFD_RELOC_IA64_LTV64MSB
5743 BFD_RELOC_IA64_LTV64LSB
5745 BFD_RELOC_IA64_IPLTMSB
5747 BFD_RELOC_IA64_IPLTLSB
5751 BFD_RELOC_IA64_LTOFF22X
5753 BFD_RELOC_IA64_LDXMOV
5755 BFD_RELOC_IA64_TPREL14
5757 BFD_RELOC_IA64_TPREL22
5759 BFD_RELOC_IA64_TPREL64I
5761 BFD_RELOC_IA64_TPREL64MSB
5763 BFD_RELOC_IA64_TPREL64LSB
5765 BFD_RELOC_IA64_LTOFF_TPREL22
5767 BFD_RELOC_IA64_DTPMOD64MSB
5769 BFD_RELOC_IA64_DTPMOD64LSB
5771 BFD_RELOC_IA64_LTOFF_DTPMOD22
5773 BFD_RELOC_IA64_DTPREL14
5775 BFD_RELOC_IA64_DTPREL22
5777 BFD_RELOC_IA64_DTPREL64I
5779 BFD_RELOC_IA64_DTPREL32MSB
5781 BFD_RELOC_IA64_DTPREL32LSB
5783 BFD_RELOC_IA64_DTPREL64MSB
5785 BFD_RELOC_IA64_DTPREL64LSB
5787 BFD_RELOC_IA64_LTOFF_DTPREL22
5789 Intel IA64 Relocations.
5792 BFD_RELOC_M68HC11_HI8
5794 Motorola 68HC11 reloc.
5795 This is the 8 bit high part of an absolute address.
5797 BFD_RELOC_M68HC11_LO8
5799 Motorola 68HC11 reloc.
5800 This is the 8 bit low part of an absolute address.
5802 BFD_RELOC_M68HC11_3B
5804 Motorola 68HC11 reloc.
5805 This is the 3 bit of a value.
5807 BFD_RELOC_M68HC11_RL_JUMP
5809 Motorola 68HC11 reloc.
5810 This reloc marks the beginning of a jump/call instruction.
5811 It is used for linker relaxation to correctly identify beginning
5812 of instruction and change some branches to use PC-relative
5815 BFD_RELOC_M68HC11_RL_GROUP
5817 Motorola 68HC11 reloc.
5818 This reloc marks a group of several instructions that gcc generates
5819 and for which the linker relaxation pass can modify and/or remove
5822 BFD_RELOC_M68HC11_LO16
5824 Motorola 68HC11 reloc.
5825 This is the 16-bit lower part of an address. It is used for 'call'
5826 instruction to specify the symbol address without any special
5827 transformation (due to memory bank window).
5829 BFD_RELOC_M68HC11_PAGE
5831 Motorola 68HC11 reloc.
5832 This is a 8-bit reloc that specifies the page number of an address.
5833 It is used by 'call' instruction to specify the page number of
5836 BFD_RELOC_M68HC11_24
5838 Motorola 68HC11 reloc.
5839 This is a 24-bit reloc that represents the address with a 16-bit
5840 value and a 8-bit page number. The symbol address is transformed
5841 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
5843 BFD_RELOC_M68HC12_5B
5845 Motorola 68HC12 reloc.
5846 This is the 5 bits of a value.
5848 BFD_RELOC_XGATE_RL_JUMP
5850 Freescale XGATE reloc.
5851 This reloc marks the beginning of a bra/jal instruction.
5853 BFD_RELOC_XGATE_RL_GROUP
5855 Freescale XGATE reloc.
5856 This reloc marks a group of several instructions that gcc generates
5857 and for which the linker relaxation pass can modify and/or remove
5860 BFD_RELOC_XGATE_LO16
5862 Freescale XGATE reloc.
5863 This is the 16-bit lower part of an address. It is used for the '16-bit'
5866 BFD_RELOC_XGATE_GPAGE
5868 Freescale XGATE reloc.
5872 Freescale XGATE reloc.
5874 BFD_RELOC_XGATE_PCREL_9
5876 Freescale XGATE reloc.
5877 This is a 9-bit pc-relative reloc.
5879 BFD_RELOC_XGATE_PCREL_10
5881 Freescale XGATE reloc.
5882 This is a 10-bit pc-relative reloc.
5884 BFD_RELOC_XGATE_IMM8_LO
5886 Freescale XGATE reloc.
5887 This is the 16-bit lower part of an address. It is used for the '16-bit'
5890 BFD_RELOC_XGATE_IMM8_HI
5892 Freescale XGATE reloc.
5893 This is the 16-bit higher part of an address. It is used for the '16-bit'
5896 BFD_RELOC_XGATE_IMM3
5898 Freescale XGATE reloc.
5899 This is a 3-bit pc-relative reloc.
5901 BFD_RELOC_XGATE_IMM4
5903 Freescale XGATE reloc.
5904 This is a 4-bit pc-relative reloc.
5906 BFD_RELOC_XGATE_IMM5
5908 Freescale XGATE reloc.
5909 This is a 5-bit pc-relative reloc.
5911 BFD_RELOC_M68HC12_9B
5913 Motorola 68HC12 reloc.
5914 This is the 9 bits of a value.
5916 BFD_RELOC_M68HC12_16B
5918 Motorola 68HC12 reloc.
5919 This is the 16 bits of a value.
5921 BFD_RELOC_M68HC12_9_PCREL
5923 Motorola 68HC12/XGATE reloc.
5924 This is a PCREL9 branch.
5926 BFD_RELOC_M68HC12_10_PCREL
5928 Motorola 68HC12/XGATE reloc.
5929 This is a PCREL10 branch.
5931 BFD_RELOC_M68HC12_LO8XG
5933 Motorola 68HC12/XGATE reloc.
5934 This is the 8 bit low part of an absolute address and immediately precedes
5935 a matching HI8XG part.
5937 BFD_RELOC_M68HC12_HI8XG
5939 Motorola 68HC12/XGATE reloc.
5940 This is the 8 bit high part of an absolute address and immediately follows
5941 a matching LO8XG part.
5943 BFD_RELOC_S12Z_15_PCREL
5945 Freescale S12Z reloc.
5946 This is a 15 bit relative address. If the most significant bits are all zero
5947 then it may be truncated to 8 bits.
5951 BFD_RELOC_16C_NUM08_C
5955 BFD_RELOC_16C_NUM16_C
5959 BFD_RELOC_16C_NUM32_C
5961 BFD_RELOC_16C_DISP04
5963 BFD_RELOC_16C_DISP04_C
5965 BFD_RELOC_16C_DISP08
5967 BFD_RELOC_16C_DISP08_C
5969 BFD_RELOC_16C_DISP16
5971 BFD_RELOC_16C_DISP16_C
5973 BFD_RELOC_16C_DISP24
5975 BFD_RELOC_16C_DISP24_C
5977 BFD_RELOC_16C_DISP24a
5979 BFD_RELOC_16C_DISP24a_C
5983 BFD_RELOC_16C_REG04_C
5985 BFD_RELOC_16C_REG04a
5987 BFD_RELOC_16C_REG04a_C
5991 BFD_RELOC_16C_REG14_C
5995 BFD_RELOC_16C_REG16_C
5999 BFD_RELOC_16C_REG20_C
6003 BFD_RELOC_16C_ABS20_C
6007 BFD_RELOC_16C_ABS24_C
6011 BFD_RELOC_16C_IMM04_C
6015 BFD_RELOC_16C_IMM16_C
6019 BFD_RELOC_16C_IMM20_C
6023 BFD_RELOC_16C_IMM24_C
6027 BFD_RELOC_16C_IMM32_C
6029 NS CR16C Relocations.
6034 BFD_RELOC_CR16_NUM16
6036 BFD_RELOC_CR16_NUM32
6038 BFD_RELOC_CR16_NUM32a
6040 BFD_RELOC_CR16_REGREL0
6042 BFD_RELOC_CR16_REGREL4
6044 BFD_RELOC_CR16_REGREL4a
6046 BFD_RELOC_CR16_REGREL14
6048 BFD_RELOC_CR16_REGREL14a
6050 BFD_RELOC_CR16_REGREL16
6052 BFD_RELOC_CR16_REGREL20
6054 BFD_RELOC_CR16_REGREL20a
6056 BFD_RELOC_CR16_ABS20
6058 BFD_RELOC_CR16_ABS24
6064 BFD_RELOC_CR16_IMM16
6066 BFD_RELOC_CR16_IMM20
6068 BFD_RELOC_CR16_IMM24
6070 BFD_RELOC_CR16_IMM32
6072 BFD_RELOC_CR16_IMM32a
6074 BFD_RELOC_CR16_DISP4
6076 BFD_RELOC_CR16_DISP8
6078 BFD_RELOC_CR16_DISP16
6080 BFD_RELOC_CR16_DISP20
6082 BFD_RELOC_CR16_DISP24
6084 BFD_RELOC_CR16_DISP24a
6086 BFD_RELOC_CR16_SWITCH8
6088 BFD_RELOC_CR16_SWITCH16
6090 BFD_RELOC_CR16_SWITCH32
6092 BFD_RELOC_CR16_GOT_REGREL20
6094 BFD_RELOC_CR16_GOTC_REGREL20
6096 BFD_RELOC_CR16_GLOB_DAT
6098 NS CR16 Relocations.
6105 BFD_RELOC_CRX_REL8_CMP
6113 BFD_RELOC_CRX_REGREL12
6115 BFD_RELOC_CRX_REGREL22
6117 BFD_RELOC_CRX_REGREL28
6119 BFD_RELOC_CRX_REGREL32
6135 BFD_RELOC_CRX_SWITCH8
6137 BFD_RELOC_CRX_SWITCH16
6139 BFD_RELOC_CRX_SWITCH32
6144 BFD_RELOC_CRIS_BDISP8
6146 BFD_RELOC_CRIS_UNSIGNED_5
6148 BFD_RELOC_CRIS_SIGNED_6
6150 BFD_RELOC_CRIS_UNSIGNED_6
6152 BFD_RELOC_CRIS_SIGNED_8
6154 BFD_RELOC_CRIS_UNSIGNED_8
6156 BFD_RELOC_CRIS_SIGNED_16
6158 BFD_RELOC_CRIS_UNSIGNED_16
6160 BFD_RELOC_CRIS_LAPCQ_OFFSET
6162 BFD_RELOC_CRIS_UNSIGNED_4
6164 These relocs are only used within the CRIS assembler. They are not
6165 (at present) written to any object files.
6169 BFD_RELOC_CRIS_GLOB_DAT
6171 BFD_RELOC_CRIS_JUMP_SLOT
6173 BFD_RELOC_CRIS_RELATIVE
6175 Relocs used in ELF shared libraries for CRIS.
6177 BFD_RELOC_CRIS_32_GOT
6179 32-bit offset to symbol-entry within GOT.
6181 BFD_RELOC_CRIS_16_GOT
6183 16-bit offset to symbol-entry within GOT.
6185 BFD_RELOC_CRIS_32_GOTPLT
6187 32-bit offset to symbol-entry within GOT, with PLT handling.
6189 BFD_RELOC_CRIS_16_GOTPLT
6191 16-bit offset to symbol-entry within GOT, with PLT handling.
6193 BFD_RELOC_CRIS_32_GOTREL
6195 32-bit offset to symbol, relative to GOT.
6197 BFD_RELOC_CRIS_32_PLT_GOTREL
6199 32-bit offset to symbol with PLT entry, relative to GOT.
6201 BFD_RELOC_CRIS_32_PLT_PCREL
6203 32-bit offset to symbol with PLT entry, relative to this relocation.
6206 BFD_RELOC_CRIS_32_GOT_GD
6208 BFD_RELOC_CRIS_16_GOT_GD
6210 BFD_RELOC_CRIS_32_GD
6214 BFD_RELOC_CRIS_32_DTPREL
6216 BFD_RELOC_CRIS_16_DTPREL
6218 BFD_RELOC_CRIS_32_GOT_TPREL
6220 BFD_RELOC_CRIS_16_GOT_TPREL
6222 BFD_RELOC_CRIS_32_TPREL
6224 BFD_RELOC_CRIS_16_TPREL
6226 BFD_RELOC_CRIS_DTPMOD
6228 BFD_RELOC_CRIS_32_IE
6230 Relocs used in TLS code for CRIS.
6233 BFD_RELOC_OR1K_REL_26
6235 BFD_RELOC_OR1K_SLO16
6237 BFD_RELOC_OR1K_PCREL_PG21
6241 BFD_RELOC_OR1K_SLO13
6243 BFD_RELOC_OR1K_GOTPC_HI16
6245 BFD_RELOC_OR1K_GOTPC_LO16
6247 BFD_RELOC_OR1K_GOT16
6249 BFD_RELOC_OR1K_GOT_PG21
6251 BFD_RELOC_OR1K_GOT_LO13
6253 BFD_RELOC_OR1K_PLT26
6255 BFD_RELOC_OR1K_PLTA26
6257 BFD_RELOC_OR1K_GOTOFF_SLO16
6261 BFD_RELOC_OR1K_GLOB_DAT
6263 BFD_RELOC_OR1K_JMP_SLOT
6265 BFD_RELOC_OR1K_RELATIVE
6267 BFD_RELOC_OR1K_TLS_GD_HI16
6269 BFD_RELOC_OR1K_TLS_GD_LO16
6271 BFD_RELOC_OR1K_TLS_GD_PG21
6273 BFD_RELOC_OR1K_TLS_GD_LO13
6275 BFD_RELOC_OR1K_TLS_LDM_HI16
6277 BFD_RELOC_OR1K_TLS_LDM_LO16
6279 BFD_RELOC_OR1K_TLS_LDM_PG21
6281 BFD_RELOC_OR1K_TLS_LDM_LO13
6283 BFD_RELOC_OR1K_TLS_LDO_HI16
6285 BFD_RELOC_OR1K_TLS_LDO_LO16
6287 BFD_RELOC_OR1K_TLS_IE_HI16
6289 BFD_RELOC_OR1K_TLS_IE_AHI16
6291 BFD_RELOC_OR1K_TLS_IE_LO16
6293 BFD_RELOC_OR1K_TLS_IE_PG21
6295 BFD_RELOC_OR1K_TLS_IE_LO13
6297 BFD_RELOC_OR1K_TLS_LE_HI16
6299 BFD_RELOC_OR1K_TLS_LE_AHI16
6301 BFD_RELOC_OR1K_TLS_LE_LO16
6303 BFD_RELOC_OR1K_TLS_LE_SLO16
6305 BFD_RELOC_OR1K_TLS_TPOFF
6307 BFD_RELOC_OR1K_TLS_DTPOFF
6309 BFD_RELOC_OR1K_TLS_DTPMOD
6311 OpenRISC 1000 Relocations.
6314 BFD_RELOC_H8_DIR16A8
6316 BFD_RELOC_H8_DIR16R8
6318 BFD_RELOC_H8_DIR24A8
6320 BFD_RELOC_H8_DIR24R8
6322 BFD_RELOC_H8_DIR32A16
6324 BFD_RELOC_H8_DISP32A16
6329 BFD_RELOC_XSTORMY16_REL_12
6331 BFD_RELOC_XSTORMY16_12
6333 BFD_RELOC_XSTORMY16_24
6335 BFD_RELOC_XSTORMY16_FPTR16
6337 Sony Xstormy16 Relocations.
6342 Self-describing complex relocations.
6354 Infineon Relocations.
6357 BFD_RELOC_VAX_GLOB_DAT
6359 BFD_RELOC_VAX_JMP_SLOT
6361 BFD_RELOC_VAX_RELATIVE
6363 Relocations used by VAX ELF.
6368 Morpho MT - 16 bit immediate relocation.
6372 Morpho MT - Hi 16 bits of an address.
6376 Morpho MT - Low 16 bits of an address.
6378 BFD_RELOC_MT_GNU_VTINHERIT
6380 Morpho MT - Used to tell the linker which vtable entries are used.
6382 BFD_RELOC_MT_GNU_VTENTRY
6384 Morpho MT - Used to tell the linker which vtable entries are used.
6386 BFD_RELOC_MT_PCINSN8
6388 Morpho MT - 8 bit immediate relocation.
6391 BFD_RELOC_MSP430_10_PCREL
6393 BFD_RELOC_MSP430_16_PCREL
6397 BFD_RELOC_MSP430_16_PCREL_BYTE
6399 BFD_RELOC_MSP430_16_BYTE
6401 BFD_RELOC_MSP430_2X_PCREL
6403 BFD_RELOC_MSP430_RL_PCREL
6405 BFD_RELOC_MSP430_ABS8
6407 BFD_RELOC_MSP430X_PCR20_EXT_SRC
6409 BFD_RELOC_MSP430X_PCR20_EXT_DST
6411 BFD_RELOC_MSP430X_PCR20_EXT_ODST
6413 BFD_RELOC_MSP430X_ABS20_EXT_SRC
6415 BFD_RELOC_MSP430X_ABS20_EXT_DST
6417 BFD_RELOC_MSP430X_ABS20_EXT_ODST
6419 BFD_RELOC_MSP430X_ABS20_ADR_SRC
6421 BFD_RELOC_MSP430X_ABS20_ADR_DST
6423 BFD_RELOC_MSP430X_PCR16
6425 BFD_RELOC_MSP430X_PCR20_CALL
6427 BFD_RELOC_MSP430X_ABS16
6429 BFD_RELOC_MSP430_ABS_HI16
6431 BFD_RELOC_MSP430_PREL31
6433 BFD_RELOC_MSP430_SYM_DIFF
6435 msp430 specific relocation codes
6442 BFD_RELOC_NIOS2_CALL26
6444 BFD_RELOC_NIOS2_IMM5
6446 BFD_RELOC_NIOS2_CACHE_OPX
6448 BFD_RELOC_NIOS2_IMM6
6450 BFD_RELOC_NIOS2_IMM8
6452 BFD_RELOC_NIOS2_HI16
6454 BFD_RELOC_NIOS2_LO16
6456 BFD_RELOC_NIOS2_HIADJ16
6458 BFD_RELOC_NIOS2_GPREL
6460 BFD_RELOC_NIOS2_UJMP
6462 BFD_RELOC_NIOS2_CJMP
6464 BFD_RELOC_NIOS2_CALLR
6466 BFD_RELOC_NIOS2_ALIGN
6468 BFD_RELOC_NIOS2_GOT16
6470 BFD_RELOC_NIOS2_CALL16
6472 BFD_RELOC_NIOS2_GOTOFF_LO
6474 BFD_RELOC_NIOS2_GOTOFF_HA
6476 BFD_RELOC_NIOS2_PCREL_LO
6478 BFD_RELOC_NIOS2_PCREL_HA
6480 BFD_RELOC_NIOS2_TLS_GD16
6482 BFD_RELOC_NIOS2_TLS_LDM16
6484 BFD_RELOC_NIOS2_TLS_LDO16
6486 BFD_RELOC_NIOS2_TLS_IE16
6488 BFD_RELOC_NIOS2_TLS_LE16
6490 BFD_RELOC_NIOS2_TLS_DTPMOD
6492 BFD_RELOC_NIOS2_TLS_DTPREL
6494 BFD_RELOC_NIOS2_TLS_TPREL
6496 BFD_RELOC_NIOS2_COPY
6498 BFD_RELOC_NIOS2_GLOB_DAT
6500 BFD_RELOC_NIOS2_JUMP_SLOT
6502 BFD_RELOC_NIOS2_RELATIVE
6504 BFD_RELOC_NIOS2_GOTOFF
6506 BFD_RELOC_NIOS2_CALL26_NOAT
6508 BFD_RELOC_NIOS2_GOT_LO
6510 BFD_RELOC_NIOS2_GOT_HA
6512 BFD_RELOC_NIOS2_CALL_LO
6514 BFD_RELOC_NIOS2_CALL_HA
6516 BFD_RELOC_NIOS2_R2_S12
6518 BFD_RELOC_NIOS2_R2_I10_1_PCREL
6520 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
6522 BFD_RELOC_NIOS2_R2_T1I7_2
6524 BFD_RELOC_NIOS2_R2_T2I4
6526 BFD_RELOC_NIOS2_R2_T2I4_1
6528 BFD_RELOC_NIOS2_R2_T2I4_2
6530 BFD_RELOC_NIOS2_R2_X1I7_2
6532 BFD_RELOC_NIOS2_R2_X2L5
6534 BFD_RELOC_NIOS2_R2_F1I5_2
6536 BFD_RELOC_NIOS2_R2_L5I4X1
6538 BFD_RELOC_NIOS2_R2_T1X1I6
6540 BFD_RELOC_NIOS2_R2_T1X1I6_2
6542 Relocations used by the Altera Nios II core.
6547 PRU LDI 16-bit unsigned data-memory relocation.
6549 BFD_RELOC_PRU_U16_PMEMIMM
6551 PRU LDI 16-bit unsigned instruction-memory relocation.
6555 PRU relocation for two consecutive LDI load instructions that load a
6556 32 bit value into a register. If the higher bits are all zero, then
6557 the second instruction may be relaxed.
6559 BFD_RELOC_PRU_S10_PCREL
6561 PRU QBBx 10-bit signed PC-relative relocation.
6563 BFD_RELOC_PRU_U8_PCREL
6565 PRU 8-bit unsigned relocation used for the LOOP instruction.
6567 BFD_RELOC_PRU_32_PMEM
6569 BFD_RELOC_PRU_16_PMEM
6571 PRU Program Memory relocations. Used to convert from byte addressing to
6572 32-bit word addressing.
6574 BFD_RELOC_PRU_GNU_DIFF8
6576 BFD_RELOC_PRU_GNU_DIFF16
6578 BFD_RELOC_PRU_GNU_DIFF32
6580 BFD_RELOC_PRU_GNU_DIFF16_PMEM
6582 BFD_RELOC_PRU_GNU_DIFF32_PMEM
6584 PRU relocations to mark the difference of two local symbols.
6585 These are only needed to support linker relaxation and can be ignored
6586 when not relaxing. The field is set to the value of the difference
6587 assuming no relaxation. The relocation encodes the position of the
6588 second symbol so the linker can determine whether to adjust the field
6589 value. The PMEM variants encode the word difference, instead of byte
6590 difference between symbols.
6593 BFD_RELOC_IQ2000_OFFSET_16
6595 BFD_RELOC_IQ2000_OFFSET_21
6597 BFD_RELOC_IQ2000_UHI16
6602 BFD_RELOC_XTENSA_RTLD
6604 Special Xtensa relocation used only by PLT entries in ELF shared
6605 objects to indicate that the runtime linker should set the value
6606 to one of its own internal functions or data structures.
6608 BFD_RELOC_XTENSA_GLOB_DAT
6610 BFD_RELOC_XTENSA_JMP_SLOT
6612 BFD_RELOC_XTENSA_RELATIVE
6614 Xtensa relocations for ELF shared objects.
6616 BFD_RELOC_XTENSA_PLT
6618 Xtensa relocation used in ELF object files for symbols that may require
6619 PLT entries. Otherwise, this is just a generic 32-bit relocation.
6621 BFD_RELOC_XTENSA_DIFF8
6623 BFD_RELOC_XTENSA_DIFF16
6625 BFD_RELOC_XTENSA_DIFF32
6627 Xtensa relocations to mark the difference of two local symbols.
6628 These are only needed to support linker relaxation and can be ignored
6629 when not relaxing. The field is set to the value of the difference
6630 assuming no relaxation. The relocation encodes the position of the
6631 first symbol so the linker can determine whether to adjust the field
6634 BFD_RELOC_XTENSA_SLOT0_OP
6636 BFD_RELOC_XTENSA_SLOT1_OP
6638 BFD_RELOC_XTENSA_SLOT2_OP
6640 BFD_RELOC_XTENSA_SLOT3_OP
6642 BFD_RELOC_XTENSA_SLOT4_OP
6644 BFD_RELOC_XTENSA_SLOT5_OP
6646 BFD_RELOC_XTENSA_SLOT6_OP
6648 BFD_RELOC_XTENSA_SLOT7_OP
6650 BFD_RELOC_XTENSA_SLOT8_OP
6652 BFD_RELOC_XTENSA_SLOT9_OP
6654 BFD_RELOC_XTENSA_SLOT10_OP
6656 BFD_RELOC_XTENSA_SLOT11_OP
6658 BFD_RELOC_XTENSA_SLOT12_OP
6660 BFD_RELOC_XTENSA_SLOT13_OP
6662 BFD_RELOC_XTENSA_SLOT14_OP
6664 Generic Xtensa relocations for instruction operands. Only the slot
6665 number is encoded in the relocation. The relocation applies to the
6666 last PC-relative immediate operand, or if there are no PC-relative
6667 immediates, to the last immediate operand.
6669 BFD_RELOC_XTENSA_SLOT0_ALT
6671 BFD_RELOC_XTENSA_SLOT1_ALT
6673 BFD_RELOC_XTENSA_SLOT2_ALT
6675 BFD_RELOC_XTENSA_SLOT3_ALT
6677 BFD_RELOC_XTENSA_SLOT4_ALT
6679 BFD_RELOC_XTENSA_SLOT5_ALT
6681 BFD_RELOC_XTENSA_SLOT6_ALT
6683 BFD_RELOC_XTENSA_SLOT7_ALT
6685 BFD_RELOC_XTENSA_SLOT8_ALT
6687 BFD_RELOC_XTENSA_SLOT9_ALT
6689 BFD_RELOC_XTENSA_SLOT10_ALT
6691 BFD_RELOC_XTENSA_SLOT11_ALT
6693 BFD_RELOC_XTENSA_SLOT12_ALT
6695 BFD_RELOC_XTENSA_SLOT13_ALT
6697 BFD_RELOC_XTENSA_SLOT14_ALT
6699 Alternate Xtensa relocations. Only the slot is encoded in the
6700 relocation. The meaning of these relocations is opcode-specific.
6702 BFD_RELOC_XTENSA_OP0
6704 BFD_RELOC_XTENSA_OP1
6706 BFD_RELOC_XTENSA_OP2
6708 Xtensa relocations for backward compatibility. These have all been
6709 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
6711 BFD_RELOC_XTENSA_ASM_EXPAND
6713 Xtensa relocation to mark that the assembler expanded the
6714 instructions from an original target. The expansion size is
6715 encoded in the reloc size.
6717 BFD_RELOC_XTENSA_ASM_SIMPLIFY
6719 Xtensa relocation to mark that the linker should simplify
6720 assembler-expanded instructions. This is commonly used
6721 internally by the linker after analysis of a
6722 BFD_RELOC_XTENSA_ASM_EXPAND.
6724 BFD_RELOC_XTENSA_TLSDESC_FN
6726 BFD_RELOC_XTENSA_TLSDESC_ARG
6728 BFD_RELOC_XTENSA_TLS_DTPOFF
6730 BFD_RELOC_XTENSA_TLS_TPOFF
6732 BFD_RELOC_XTENSA_TLS_FUNC
6734 BFD_RELOC_XTENSA_TLS_ARG
6736 BFD_RELOC_XTENSA_TLS_CALL
6738 Xtensa TLS relocations.
6743 8 bit signed offset in (ix+d) or (iy+d).
6761 BFD_RELOC_LM32_BRANCH
6763 BFD_RELOC_LM32_16_GOT
6765 BFD_RELOC_LM32_GOTOFF_HI16
6767 BFD_RELOC_LM32_GOTOFF_LO16
6771 BFD_RELOC_LM32_GLOB_DAT
6773 BFD_RELOC_LM32_JMP_SLOT
6775 BFD_RELOC_LM32_RELATIVE
6777 Lattice Mico32 relocations.
6780 BFD_RELOC_MACH_O_SECTDIFF
6782 Difference between two section addreses. Must be followed by a
6783 BFD_RELOC_MACH_O_PAIR.
6785 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
6787 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
6789 BFD_RELOC_MACH_O_PAIR
6791 Pair of relocation. Contains the first symbol.
6793 BFD_RELOC_MACH_O_SUBTRACTOR32
6795 Symbol will be substracted. Must be followed by a BFD_RELOC_32.
6797 BFD_RELOC_MACH_O_SUBTRACTOR64
6799 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6802 BFD_RELOC_MACH_O_X86_64_BRANCH32
6804 BFD_RELOC_MACH_O_X86_64_BRANCH8
6806 PCREL relocations. They are marked as branch to create PLT entry if
6809 BFD_RELOC_MACH_O_X86_64_GOT
6811 Used when referencing a GOT entry.
6813 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
6815 Used when loading a GOT entry with movq. It is specially marked so that
6816 the linker could optimize the movq to a leaq if possible.
6818 BFD_RELOC_MACH_O_X86_64_PCREL32_1
6820 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
6822 BFD_RELOC_MACH_O_X86_64_PCREL32_2
6824 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
6826 BFD_RELOC_MACH_O_X86_64_PCREL32_4
6828 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
6830 BFD_RELOC_MACH_O_X86_64_TLV
6832 Used when referencing a TLV entry.
6836 BFD_RELOC_MACH_O_ARM64_ADDEND
6838 Addend for PAGE or PAGEOFF.
6840 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21
6842 Relative offset to page of GOT slot.
6844 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12
6846 Relative offset within page of GOT slot.
6848 BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT
6850 Address of a GOT entry.
6853 BFD_RELOC_MICROBLAZE_32_LO
6855 This is a 32 bit reloc for the microblaze that stores the
6856 low 16 bits of a value
6858 BFD_RELOC_MICROBLAZE_32_LO_PCREL
6860 This is a 32 bit pc-relative reloc for the microblaze that
6861 stores the low 16 bits of a value
6863 BFD_RELOC_MICROBLAZE_32_ROSDA
6865 This is a 32 bit reloc for the microblaze that stores a
6866 value relative to the read-only small data area anchor
6868 BFD_RELOC_MICROBLAZE_32_RWSDA
6870 This is a 32 bit reloc for the microblaze that stores a
6871 value relative to the read-write small data area anchor
6873 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
6875 This is a 32 bit reloc for the microblaze to handle
6876 expressions of the form "Symbol Op Symbol"
6878 BFD_RELOC_MICROBLAZE_64_NONE
6880 This is a 64 bit reloc that stores the 32 bit pc relative
6881 value in two words (with an imm instruction). No relocation is
6882 done here - only used for relaxing
6884 BFD_RELOC_MICROBLAZE_64_GOTPC
6886 This is a 64 bit reloc that stores the 32 bit pc relative
6887 value in two words (with an imm instruction). The relocation is
6888 PC-relative GOT offset
6890 BFD_RELOC_MICROBLAZE_64_GOT
6892 This is a 64 bit reloc that stores the 32 bit pc relative
6893 value in two words (with an imm instruction). The relocation is
6896 BFD_RELOC_MICROBLAZE_64_PLT
6898 This is a 64 bit reloc that stores the 32 bit pc relative
6899 value in two words (with an imm instruction). The relocation is
6900 PC-relative offset into PLT
6902 BFD_RELOC_MICROBLAZE_64_GOTOFF
6904 This is a 64 bit reloc that stores the 32 bit GOT relative
6905 value in two words (with an imm instruction). The relocation is
6906 relative offset from _GLOBAL_OFFSET_TABLE_
6908 BFD_RELOC_MICROBLAZE_32_GOTOFF
6910 This is a 32 bit reloc that stores the 32 bit GOT relative
6911 value in a word. The relocation is relative offset from
6912 _GLOBAL_OFFSET_TABLE_
6914 BFD_RELOC_MICROBLAZE_COPY
6916 This is used to tell the dynamic linker to copy the value out of
6917 the dynamic object into the runtime process image.
6919 BFD_RELOC_MICROBLAZE_64_TLS
6923 BFD_RELOC_MICROBLAZE_64_TLSGD
6925 This is a 64 bit reloc that stores the 32 bit GOT relative value
6926 of the GOT TLS GD info entry in two words (with an imm instruction). The
6927 relocation is GOT offset.
6929 BFD_RELOC_MICROBLAZE_64_TLSLD
6931 This is a 64 bit reloc that stores the 32 bit GOT relative value
6932 of the GOT TLS LD info entry in two words (with an imm instruction). The
6933 relocation is GOT offset.
6935 BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
6937 This is a 32 bit reloc that stores the Module ID to GOT(n).
6939 BFD_RELOC_MICROBLAZE_32_TLSDTPREL
6941 This is a 32 bit reloc that stores TLS offset to GOT(n+1).
6943 BFD_RELOC_MICROBLAZE_64_TLSDTPREL
6945 This is a 32 bit reloc for storing TLS offset to two words (uses imm
6948 BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
6950 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6951 to two words (uses imm instruction).
6953 BFD_RELOC_MICROBLAZE_64_TLSTPREL
6955 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6956 to two words (uses imm instruction).
6958 BFD_RELOC_MICROBLAZE_64_TEXTPCREL
6960 This is a 64 bit reloc that stores the 32 bit pc relative
6961 value in two words (with an imm instruction). The relocation is
6962 PC-relative offset from start of TEXT.
6964 BFD_RELOC_MICROBLAZE_64_TEXTREL
6966 This is a 64 bit reloc that stores the 32 bit offset
6967 value in two words (with an imm instruction). The relocation is
6968 relative offset from start of TEXT.
6971 BFD_RELOC_AARCH64_RELOC_START
6973 AArch64 pseudo relocation code to mark the start of the AArch64
6974 relocation enumerators. N.B. the order of the enumerators is
6975 important as several tables in the AArch64 bfd backend are indexed
6976 by these enumerators; make sure they are all synced.
6978 BFD_RELOC_AARCH64_NULL
6980 Deprecated AArch64 null relocation code.
6982 BFD_RELOC_AARCH64_NONE
6984 AArch64 null relocation code.
6986 BFD_RELOC_AARCH64_64
6988 BFD_RELOC_AARCH64_32
6990 BFD_RELOC_AARCH64_16
6992 Basic absolute relocations of N bits. These are equivalent to
6993 BFD_RELOC_N and they were added to assist the indexing of the howto
6996 BFD_RELOC_AARCH64_64_PCREL
6998 BFD_RELOC_AARCH64_32_PCREL
7000 BFD_RELOC_AARCH64_16_PCREL
7002 PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
7003 and they were added to assist the indexing of the howto table.
7005 BFD_RELOC_AARCH64_MOVW_G0
7007 AArch64 MOV[NZK] instruction with most significant bits 0 to 15
7008 of an unsigned address/value.
7010 BFD_RELOC_AARCH64_MOVW_G0_NC
7012 AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
7013 an address/value. No overflow checking.
7015 BFD_RELOC_AARCH64_MOVW_G1
7017 AArch64 MOV[NZK] instruction with most significant bits 16 to 31
7018 of an unsigned address/value.
7020 BFD_RELOC_AARCH64_MOVW_G1_NC
7022 AArch64 MOV[NZK] instruction with less significant bits 16 to 31
7023 of an address/value. No overflow checking.
7025 BFD_RELOC_AARCH64_MOVW_G2
7027 AArch64 MOV[NZK] instruction with most significant bits 32 to 47
7028 of an unsigned address/value.
7030 BFD_RELOC_AARCH64_MOVW_G2_NC
7032 AArch64 MOV[NZK] instruction with less significant bits 32 to 47
7033 of an address/value. No overflow checking.
7035 BFD_RELOC_AARCH64_MOVW_G3
7037 AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
7038 of a signed or unsigned address/value.
7040 BFD_RELOC_AARCH64_MOVW_G0_S
7042 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
7043 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7046 BFD_RELOC_AARCH64_MOVW_G1_S
7048 AArch64 MOV[NZ] instruction with most significant bits 16 to 31
7049 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7052 BFD_RELOC_AARCH64_MOVW_G2_S
7054 AArch64 MOV[NZ] instruction with most significant bits 32 to 47
7055 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7058 BFD_RELOC_AARCH64_MOVW_PREL_G0
7060 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
7061 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7064 BFD_RELOC_AARCH64_MOVW_PREL_G0_NC
7066 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
7067 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7070 BFD_RELOC_AARCH64_MOVW_PREL_G1
7072 AArch64 MOVK instruction with most significant bits 16 to 31
7075 BFD_RELOC_AARCH64_MOVW_PREL_G1_NC
7077 AArch64 MOVK instruction with most significant bits 16 to 31
7080 BFD_RELOC_AARCH64_MOVW_PREL_G2
7082 AArch64 MOVK instruction with most significant bits 32 to 47
7085 BFD_RELOC_AARCH64_MOVW_PREL_G2_NC
7087 AArch64 MOVK instruction with most significant bits 32 to 47
7090 BFD_RELOC_AARCH64_MOVW_PREL_G3
7092 AArch64 MOVK instruction with most significant bits 47 to 63
7095 BFD_RELOC_AARCH64_LD_LO19_PCREL
7097 AArch64 Load Literal instruction, holding a 19 bit pc-relative word
7098 offset. The lowest two bits must be zero and are not stored in the
7099 instruction, giving a 21 bit signed byte offset.
7101 BFD_RELOC_AARCH64_ADR_LO21_PCREL
7103 AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
7105 BFD_RELOC_AARCH64_ADR_HI21_PCREL
7107 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
7108 offset, giving a 4KB aligned page base address.
7110 BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
7112 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
7113 offset, giving a 4KB aligned page base address, but with no overflow
7116 BFD_RELOC_AARCH64_ADD_LO12
7118 AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
7119 Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7121 BFD_RELOC_AARCH64_LDST8_LO12
7123 AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
7124 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7126 BFD_RELOC_AARCH64_TSTBR14
7128 AArch64 14 bit pc-relative test bit and branch.
7129 The lowest two bits must be zero and are not stored in the instruction,
7130 giving a 16 bit signed byte offset.
7132 BFD_RELOC_AARCH64_BRANCH19
7134 AArch64 19 bit pc-relative conditional branch and compare & branch.
7135 The lowest two bits must be zero and are not stored in the instruction,
7136 giving a 21 bit signed byte offset.
7138 BFD_RELOC_AARCH64_JUMP26
7140 AArch64 26 bit pc-relative unconditional branch.
7141 The lowest two bits must be zero and are not stored in the instruction,
7142 giving a 28 bit signed byte offset.
7144 BFD_RELOC_AARCH64_CALL26
7146 AArch64 26 bit pc-relative unconditional branch and link.
7147 The lowest two bits must be zero and are not stored in the instruction,
7148 giving a 28 bit signed byte offset.
7150 BFD_RELOC_AARCH64_LDST16_LO12
7152 AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
7153 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7155 BFD_RELOC_AARCH64_LDST32_LO12
7157 AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
7158 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7160 BFD_RELOC_AARCH64_LDST64_LO12
7162 AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
7163 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7165 BFD_RELOC_AARCH64_LDST128_LO12
7167 AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
7168 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7170 BFD_RELOC_AARCH64_GOT_LD_PREL19
7172 AArch64 Load Literal instruction, holding a 19 bit PC relative word
7173 offset of the global offset table entry for a symbol. The lowest two
7174 bits must be zero and are not stored in the instruction, giving a 21
7175 bit signed byte offset. This relocation type requires signed overflow
7178 BFD_RELOC_AARCH64_ADR_GOT_PAGE
7180 Get to the page base of the global offset table entry for a symbol as
7181 part of an ADRP instruction using a 21 bit PC relative value.Used in
7182 conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
7184 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
7186 Unsigned 12 bit byte offset for 64 bit load/store from the page of
7187 the GOT entry for this symbol. Used in conjunction with
7188 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in LP64 ABI only.
7190 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
7192 Unsigned 12 bit byte offset for 32 bit load/store from the page of
7193 the GOT entry for this symbol. Used in conjunction with
7194 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in ILP32 ABI only.
7196 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
7198 Unsigned 16 bit byte offset for 64 bit load/store from the GOT entry
7199 for this symbol. Valid in LP64 ABI only.
7201 BFD_RELOC_AARCH64_MOVW_GOTOFF_G1
7203 Unsigned 16 bit byte higher offset for 64 bit load/store from the GOT entry
7204 for this symbol. Valid in LP64 ABI only.
7206 BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
7208 Unsigned 15 bit byte offset for 64 bit load/store from the page of
7209 the GOT entry for this symbol. Valid in LP64 ABI only.
7211 BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
7213 Scaled 14 bit byte offset to the page base of the global offset table.
7215 BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
7217 Scaled 15 bit byte offset to the page base of the global offset table.
7219 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
7221 Get to the page base of the global offset table entry for a symbols
7222 tls_index structure as part of an adrp instruction using a 21 bit PC
7223 relative value. Used in conjunction with
7224 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
7226 BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
7228 AArch64 TLS General Dynamic
7230 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
7232 Unsigned 12 bit byte offset to global offset table entry for a symbols
7233 tls_index structure. Used in conjunction with
7234 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
7236 BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
7238 AArch64 TLS General Dynamic relocation.
7240 BFD_RELOC_AARCH64_TLSGD_MOVW_G1
7242 AArch64 TLS General Dynamic relocation.
7244 BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
7246 AArch64 TLS INITIAL EXEC relocation.
7248 BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
7250 AArch64 TLS INITIAL EXEC relocation.
7252 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
7254 AArch64 TLS INITIAL EXEC relocation.
7256 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
7258 AArch64 TLS INITIAL EXEC relocation.
7260 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
7262 AArch64 TLS INITIAL EXEC relocation.
7264 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
7266 AArch64 TLS INITIAL EXEC relocation.
7268 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
7270 bit[23:12] of byte offset to module TLS base address.
7272 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
7274 Unsigned 12 bit byte offset to module TLS base address.
7276 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
7278 No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
7280 BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
7282 Unsigned 12 bit byte offset to global offset table entry for a symbols
7283 tls_index structure. Used in conjunction with
7284 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
7286 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
7288 GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP
7291 BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
7293 GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
7295 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
7297 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7300 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
7302 Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
7304 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
7306 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7309 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
7311 Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
7313 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
7315 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7318 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
7320 Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
7322 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
7324 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7327 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
7329 Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
7331 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7333 bit[15:0] of byte offset to module TLS base address.
7335 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
7337 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7339 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7341 bit[31:16] of byte offset to module TLS base address.
7343 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
7345 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7347 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
7349 bit[47:32] of byte offset to module TLS base address.
7351 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
7353 AArch64 TLS LOCAL EXEC relocation.
7355 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
7357 AArch64 TLS LOCAL EXEC relocation.
7359 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
7361 AArch64 TLS LOCAL EXEC relocation.
7363 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
7365 AArch64 TLS LOCAL EXEC relocation.
7367 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
7369 AArch64 TLS LOCAL EXEC relocation.
7371 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
7373 AArch64 TLS LOCAL EXEC relocation.
7375 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
7377 AArch64 TLS LOCAL EXEC relocation.
7379 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
7381 AArch64 TLS LOCAL EXEC relocation.
7383 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
7385 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7388 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
7390 Similar as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.
7392 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
7394 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7397 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
7399 Similar as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.
7401 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
7403 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7406 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
7408 Similar as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.
7410 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
7412 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7415 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
7417 Similar as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.
7419 BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
7421 AArch64 TLS DESC relocation.
7423 BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
7425 AArch64 TLS DESC relocation.
7427 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
7429 AArch64 TLS DESC relocation.
7431 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
7433 AArch64 TLS DESC relocation.
7435 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
7437 AArch64 TLS DESC relocation.
7439 BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
7441 AArch64 TLS DESC relocation.
7443 BFD_RELOC_AARCH64_TLSDESC_OFF_G1
7445 AArch64 TLS DESC relocation.
7447 BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
7449 AArch64 TLS DESC relocation.
7451 BFD_RELOC_AARCH64_TLSDESC_LDR
7453 AArch64 TLS DESC relocation.
7455 BFD_RELOC_AARCH64_TLSDESC_ADD
7457 AArch64 TLS DESC relocation.
7459 BFD_RELOC_AARCH64_TLSDESC_CALL
7461 AArch64 TLS DESC relocation.
7463 BFD_RELOC_AARCH64_COPY
7465 AArch64 TLS relocation.
7467 BFD_RELOC_AARCH64_GLOB_DAT
7469 AArch64 TLS relocation.
7471 BFD_RELOC_AARCH64_JUMP_SLOT
7473 AArch64 TLS relocation.
7475 BFD_RELOC_AARCH64_RELATIVE
7477 AArch64 TLS relocation.
7479 BFD_RELOC_AARCH64_TLS_DTPMOD
7481 AArch64 TLS relocation.
7483 BFD_RELOC_AARCH64_TLS_DTPREL
7485 AArch64 TLS relocation.
7487 BFD_RELOC_AARCH64_TLS_TPREL
7489 AArch64 TLS relocation.
7491 BFD_RELOC_AARCH64_TLSDESC
7493 AArch64 TLS relocation.
7495 BFD_RELOC_AARCH64_IRELATIVE
7497 AArch64 support for STT_GNU_IFUNC.
7499 BFD_RELOC_AARCH64_RELOC_END
7501 AArch64 pseudo relocation code to mark the end of the AArch64
7502 relocation enumerators that have direct mapping to ELF reloc codes.
7503 There are a few more enumerators after this one; those are mainly
7504 used by the AArch64 assembler for the internal fixup or to select
7505 one of the above enumerators.
7507 BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
7509 AArch64 pseudo relocation code to be used internally by the AArch64
7510 assembler and not (currently) written to any object files.
7512 BFD_RELOC_AARCH64_LDST_LO12
7514 AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
7515 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7517 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
7519 AArch64 pseudo relocation code for TLS local dynamic mode. It's to be
7520 used internally by the AArch64 assembler and not (currently) written to
7523 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
7525 Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
7527 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
7529 AArch64 pseudo relocation code for TLS local exec mode. It's to be
7530 used internally by the AArch64 assembler and not (currently) written to
7533 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC
7535 Similar as BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12, but no overflow check.
7537 BFD_RELOC_AARCH64_LD_GOT_LO12_NC
7539 AArch64 pseudo relocation code to be used internally by the AArch64
7540 assembler and not (currently) written to any object files.
7542 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
7544 AArch64 pseudo relocation code to be used internally by the AArch64
7545 assembler and not (currently) written to any object files.
7547 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
7549 AArch64 pseudo relocation code to be used internally by the AArch64
7550 assembler and not (currently) written to any object files.
7552 BFD_RELOC_TILEPRO_COPY
7554 BFD_RELOC_TILEPRO_GLOB_DAT
7556 BFD_RELOC_TILEPRO_JMP_SLOT
7558 BFD_RELOC_TILEPRO_RELATIVE
7560 BFD_RELOC_TILEPRO_BROFF_X1
7562 BFD_RELOC_TILEPRO_JOFFLONG_X1
7564 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
7566 BFD_RELOC_TILEPRO_IMM8_X0
7568 BFD_RELOC_TILEPRO_IMM8_Y0
7570 BFD_RELOC_TILEPRO_IMM8_X1
7572 BFD_RELOC_TILEPRO_IMM8_Y1
7574 BFD_RELOC_TILEPRO_DEST_IMM8_X1
7576 BFD_RELOC_TILEPRO_MT_IMM15_X1
7578 BFD_RELOC_TILEPRO_MF_IMM15_X1
7580 BFD_RELOC_TILEPRO_IMM16_X0
7582 BFD_RELOC_TILEPRO_IMM16_X1
7584 BFD_RELOC_TILEPRO_IMM16_X0_LO
7586 BFD_RELOC_TILEPRO_IMM16_X1_LO
7588 BFD_RELOC_TILEPRO_IMM16_X0_HI
7590 BFD_RELOC_TILEPRO_IMM16_X1_HI
7592 BFD_RELOC_TILEPRO_IMM16_X0_HA
7594 BFD_RELOC_TILEPRO_IMM16_X1_HA
7596 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
7598 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
7600 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
7602 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
7604 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
7606 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
7608 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
7610 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
7612 BFD_RELOC_TILEPRO_IMM16_X0_GOT
7614 BFD_RELOC_TILEPRO_IMM16_X1_GOT
7616 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
7618 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
7620 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
7622 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
7624 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
7626 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
7628 BFD_RELOC_TILEPRO_MMSTART_X0
7630 BFD_RELOC_TILEPRO_MMEND_X0
7632 BFD_RELOC_TILEPRO_MMSTART_X1
7634 BFD_RELOC_TILEPRO_MMEND_X1
7636 BFD_RELOC_TILEPRO_SHAMT_X0
7638 BFD_RELOC_TILEPRO_SHAMT_X1
7640 BFD_RELOC_TILEPRO_SHAMT_Y0
7642 BFD_RELOC_TILEPRO_SHAMT_Y1
7644 BFD_RELOC_TILEPRO_TLS_GD_CALL
7646 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
7648 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
7650 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
7652 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
7654 BFD_RELOC_TILEPRO_TLS_IE_LOAD
7656 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
7658 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
7660 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
7662 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
7664 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
7666 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
7668 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
7670 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
7672 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
7674 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
7676 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
7678 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
7680 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
7682 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
7684 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
7686 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
7688 BFD_RELOC_TILEPRO_TLS_DTPMOD32
7690 BFD_RELOC_TILEPRO_TLS_DTPOFF32
7692 BFD_RELOC_TILEPRO_TLS_TPOFF32
7694 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
7696 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
7698 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
7700 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
7702 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
7704 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
7706 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
7708 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
7710 Tilera TILEPro Relocations.
7712 BFD_RELOC_TILEGX_HW0
7714 BFD_RELOC_TILEGX_HW1
7716 BFD_RELOC_TILEGX_HW2
7718 BFD_RELOC_TILEGX_HW3
7720 BFD_RELOC_TILEGX_HW0_LAST
7722 BFD_RELOC_TILEGX_HW1_LAST
7724 BFD_RELOC_TILEGX_HW2_LAST
7726 BFD_RELOC_TILEGX_COPY
7728 BFD_RELOC_TILEGX_GLOB_DAT
7730 BFD_RELOC_TILEGX_JMP_SLOT
7732 BFD_RELOC_TILEGX_RELATIVE
7734 BFD_RELOC_TILEGX_BROFF_X1
7736 BFD_RELOC_TILEGX_JUMPOFF_X1
7738 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
7740 BFD_RELOC_TILEGX_IMM8_X0
7742 BFD_RELOC_TILEGX_IMM8_Y0
7744 BFD_RELOC_TILEGX_IMM8_X1
7746 BFD_RELOC_TILEGX_IMM8_Y1
7748 BFD_RELOC_TILEGX_DEST_IMM8_X1
7750 BFD_RELOC_TILEGX_MT_IMM14_X1
7752 BFD_RELOC_TILEGX_MF_IMM14_X1
7754 BFD_RELOC_TILEGX_MMSTART_X0
7756 BFD_RELOC_TILEGX_MMEND_X0
7758 BFD_RELOC_TILEGX_SHAMT_X0
7760 BFD_RELOC_TILEGX_SHAMT_X1
7762 BFD_RELOC_TILEGX_SHAMT_Y0
7764 BFD_RELOC_TILEGX_SHAMT_Y1
7766 BFD_RELOC_TILEGX_IMM16_X0_HW0
7768 BFD_RELOC_TILEGX_IMM16_X1_HW0
7770 BFD_RELOC_TILEGX_IMM16_X0_HW1
7772 BFD_RELOC_TILEGX_IMM16_X1_HW1
7774 BFD_RELOC_TILEGX_IMM16_X0_HW2
7776 BFD_RELOC_TILEGX_IMM16_X1_HW2
7778 BFD_RELOC_TILEGX_IMM16_X0_HW3
7780 BFD_RELOC_TILEGX_IMM16_X1_HW3
7782 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
7784 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
7786 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
7788 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
7790 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
7792 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
7794 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
7796 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
7798 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
7800 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
7802 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
7804 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
7806 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
7808 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
7810 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
7812 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
7814 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
7816 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
7818 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
7820 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
7822 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
7824 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
7826 BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
7828 BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
7830 BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
7832 BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
7834 BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
7836 BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
7838 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
7840 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
7842 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
7844 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
7846 BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
7848 BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
7850 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
7852 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
7854 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
7856 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
7858 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
7860 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
7862 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
7864 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
7866 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
7868 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
7870 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
7872 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
7874 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
7876 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
7878 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
7880 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
7882 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
7884 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
7886 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
7888 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
7890 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
7892 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
7894 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
7896 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
7898 BFD_RELOC_TILEGX_TLS_DTPMOD64
7900 BFD_RELOC_TILEGX_TLS_DTPOFF64
7902 BFD_RELOC_TILEGX_TLS_TPOFF64
7904 BFD_RELOC_TILEGX_TLS_DTPMOD32
7906 BFD_RELOC_TILEGX_TLS_DTPOFF32
7908 BFD_RELOC_TILEGX_TLS_TPOFF32
7910 BFD_RELOC_TILEGX_TLS_GD_CALL
7912 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
7914 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
7916 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
7918 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
7920 BFD_RELOC_TILEGX_TLS_IE_LOAD
7922 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
7924 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
7926 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
7928 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
7930 Tilera TILE-Gx Relocations.
7939 BFD_RELOC_BPF_DISP16
7941 BFD_RELOC_BPF_DISP32
7943 Linux eBPF relocations.
7946 BFD_RELOC_EPIPHANY_SIMM8
7948 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
7950 BFD_RELOC_EPIPHANY_SIMM24
7952 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
7954 BFD_RELOC_EPIPHANY_HIGH
7956 Adapteva EPIPHANY - 16 most-significant bits of absolute address
7958 BFD_RELOC_EPIPHANY_LOW
7960 Adapteva EPIPHANY - 16 least-significant bits of absolute address
7962 BFD_RELOC_EPIPHANY_SIMM11
7964 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
7966 BFD_RELOC_EPIPHANY_IMM11
7968 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
7970 BFD_RELOC_EPIPHANY_IMM8
7972 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
7975 BFD_RELOC_VISIUM_HI16
7977 BFD_RELOC_VISIUM_LO16
7979 BFD_RELOC_VISIUM_IM16
7981 BFD_RELOC_VISIUM_REL16
7983 BFD_RELOC_VISIUM_HI16_PCREL
7985 BFD_RELOC_VISIUM_LO16_PCREL
7987 BFD_RELOC_VISIUM_IM16_PCREL
7992 BFD_RELOC_WASM32_LEB128
7994 BFD_RELOC_WASM32_LEB128_GOT
7996 BFD_RELOC_WASM32_LEB128_GOT_CODE
7998 BFD_RELOC_WASM32_LEB128_PLT
8000 BFD_RELOC_WASM32_PLT_INDEX
8002 BFD_RELOC_WASM32_ABS32_CODE
8004 BFD_RELOC_WASM32_COPY
8006 BFD_RELOC_WASM32_CODE_POINTER
8008 BFD_RELOC_WASM32_INDEX
8010 BFD_RELOC_WASM32_PLT_SIG
8012 WebAssembly relocations.
8015 BFD_RELOC_CKCORE_NONE
8017 BFD_RELOC_CKCORE_ADDR32
8019 BFD_RELOC_CKCORE_PCREL_IMM8BY4
8021 BFD_RELOC_CKCORE_PCREL_IMM11BY2
8023 BFD_RELOC_CKCORE_PCREL_IMM4BY2
8025 BFD_RELOC_CKCORE_PCREL32
8027 BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2
8029 BFD_RELOC_CKCORE_GNU_VTINHERIT
8031 BFD_RELOC_CKCORE_GNU_VTENTRY
8033 BFD_RELOC_CKCORE_RELATIVE
8035 BFD_RELOC_CKCORE_COPY
8037 BFD_RELOC_CKCORE_GLOB_DAT
8039 BFD_RELOC_CKCORE_JUMP_SLOT
8041 BFD_RELOC_CKCORE_GOTOFF
8043 BFD_RELOC_CKCORE_GOTPC
8045 BFD_RELOC_CKCORE_GOT32
8047 BFD_RELOC_CKCORE_PLT32
8049 BFD_RELOC_CKCORE_ADDRGOT
8051 BFD_RELOC_CKCORE_ADDRPLT
8053 BFD_RELOC_CKCORE_PCREL_IMM26BY2
8055 BFD_RELOC_CKCORE_PCREL_IMM16BY2
8057 BFD_RELOC_CKCORE_PCREL_IMM16BY4
8059 BFD_RELOC_CKCORE_PCREL_IMM10BY2
8061 BFD_RELOC_CKCORE_PCREL_IMM10BY4
8063 BFD_RELOC_CKCORE_ADDR_HI16
8065 BFD_RELOC_CKCORE_ADDR_LO16
8067 BFD_RELOC_CKCORE_GOTPC_HI16
8069 BFD_RELOC_CKCORE_GOTPC_LO16
8071 BFD_RELOC_CKCORE_GOTOFF_HI16
8073 BFD_RELOC_CKCORE_GOTOFF_LO16
8075 BFD_RELOC_CKCORE_GOT12
8077 BFD_RELOC_CKCORE_GOT_HI16
8079 BFD_RELOC_CKCORE_GOT_LO16
8081 BFD_RELOC_CKCORE_PLT12
8083 BFD_RELOC_CKCORE_PLT_HI16
8085 BFD_RELOC_CKCORE_PLT_LO16
8087 BFD_RELOC_CKCORE_ADDRGOT_HI16
8089 BFD_RELOC_CKCORE_ADDRGOT_LO16
8091 BFD_RELOC_CKCORE_ADDRPLT_HI16
8093 BFD_RELOC_CKCORE_ADDRPLT_LO16
8095 BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2
8097 BFD_RELOC_CKCORE_TOFFSET_LO16
8099 BFD_RELOC_CKCORE_DOFFSET_LO16
8101 BFD_RELOC_CKCORE_PCREL_IMM18BY2
8103 BFD_RELOC_CKCORE_DOFFSET_IMM18
8105 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
8107 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
8109 BFD_RELOC_CKCORE_GOTOFF_IMM18
8111 BFD_RELOC_CKCORE_GOT_IMM18BY4
8113 BFD_RELOC_CKCORE_PLT_IMM18BY4
8115 BFD_RELOC_CKCORE_PCREL_IMM7BY4
8117 BFD_RELOC_CKCORE_TLS_LE32
8119 BFD_RELOC_CKCORE_TLS_IE32
8121 BFD_RELOC_CKCORE_TLS_GD32
8123 BFD_RELOC_CKCORE_TLS_LDM32
8125 BFD_RELOC_CKCORE_TLS_LDO32
8127 BFD_RELOC_CKCORE_TLS_DTPMOD32
8129 BFD_RELOC_CKCORE_TLS_DTPOFF32
8131 BFD_RELOC_CKCORE_TLS_TPOFF32
8133 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
8135 BFD_RELOC_CKCORE_NOJSRI
8137 BFD_RELOC_CKCORE_CALLGRAPH
8139 BFD_RELOC_CKCORE_IRELATIVE
8141 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4
8143 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4
8156 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
8161 bfd_reloc_type_lookup
8162 bfd_reloc_name_lookup
8165 reloc_howto_type *bfd_reloc_type_lookup
8166 (bfd *abfd, bfd_reloc_code_real_type code);
8167 reloc_howto_type *bfd_reloc_name_lookup
8168 (bfd *abfd, const char *reloc_name);
8171 Return a pointer to a howto structure which, when
8172 invoked, will perform the relocation @var{code} on data from the
8178 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
8180 return BFD_SEND (abfd, reloc_type_lookup, (abfd, code));
8184 bfd_reloc_name_lookup (bfd *abfd, const char *reloc_name)
8186 return BFD_SEND (abfd, reloc_name_lookup, (abfd, reloc_name));
8189 static reloc_howto_type bfd_howto_32 =
8190 HOWTO (0, 00, 2, 32, FALSE, 0, complain_overflow_dont, 0, "VRT32", FALSE, 0xffffffff, 0xffffffff, TRUE);
8194 bfd_default_reloc_type_lookup
8197 reloc_howto_type *bfd_default_reloc_type_lookup
8198 (bfd *abfd, bfd_reloc_code_real_type code);
8201 Provides a default relocation lookup routine for any architecture.
8206 bfd_default_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
8210 case BFD_RELOC_CTOR:
8211 /* The type of reloc used in a ctor, which will be as wide as the
8212 address - so either a 64, 32, or 16 bitter. */
8213 switch (bfd_arch_bits_per_address (abfd))
8219 return &bfd_howto_32;
8235 bfd_get_reloc_code_name
8238 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
8241 Provides a printable name for the supplied relocation code.
8242 Useful mainly for printing error messages.
8246 bfd_get_reloc_code_name (bfd_reloc_code_real_type code)
8248 if (code > BFD_RELOC_UNUSED)
8250 return bfd_reloc_code_real_names[code];
8255 bfd_generic_relax_section
8258 bfd_boolean bfd_generic_relax_section
8261 struct bfd_link_info *,
8265 Provides default handling for relaxing for back ends which
8270 bfd_generic_relax_section (bfd *abfd ATTRIBUTE_UNUSED,
8271 asection *section ATTRIBUTE_UNUSED,
8272 struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
8275 if (bfd_link_relocatable (link_info))
8276 (*link_info->callbacks->einfo)
8277 (_("%P%F: --relax and -r may not be used together\n"));
8285 bfd_generic_gc_sections
8288 bfd_boolean bfd_generic_gc_sections
8289 (bfd *, struct bfd_link_info *);
8292 Provides default handling for relaxing for back ends which
8293 don't do section gc -- i.e., does nothing.
8297 bfd_generic_gc_sections (bfd *abfd ATTRIBUTE_UNUSED,
8298 struct bfd_link_info *info ATTRIBUTE_UNUSED)
8305 bfd_generic_lookup_section_flags
8308 bfd_boolean bfd_generic_lookup_section_flags
8309 (struct bfd_link_info *, struct flag_info *, asection *);
8312 Provides default handling for section flags lookup
8313 -- i.e., does nothing.
8314 Returns FALSE if the section should be omitted, otherwise TRUE.
8318 bfd_generic_lookup_section_flags (struct bfd_link_info *info ATTRIBUTE_UNUSED,
8319 struct flag_info *flaginfo,
8320 asection *section ATTRIBUTE_UNUSED)
8322 if (flaginfo != NULL)
8324 _bfd_error_handler (_("INPUT_SECTION_FLAGS are not supported"));
8332 bfd_generic_merge_sections
8335 bfd_boolean bfd_generic_merge_sections
8336 (bfd *, struct bfd_link_info *);
8339 Provides default handling for SEC_MERGE section merging for back ends
8340 which don't have SEC_MERGE support -- i.e., does nothing.
8344 bfd_generic_merge_sections (bfd *abfd ATTRIBUTE_UNUSED,
8345 struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
8352 bfd_generic_get_relocated_section_contents
8355 bfd_byte *bfd_generic_get_relocated_section_contents
8357 struct bfd_link_info *link_info,
8358 struct bfd_link_order *link_order,
8360 bfd_boolean relocatable,
8364 Provides default handling of relocation effort for back ends
8365 which can't be bothered to do it efficiently.
8370 bfd_generic_get_relocated_section_contents (bfd *abfd,
8371 struct bfd_link_info *link_info,
8372 struct bfd_link_order *link_order,
8374 bfd_boolean relocatable,
8377 bfd *input_bfd = link_order->u.indirect.section->owner;
8378 asection *input_section = link_order->u.indirect.section;
8380 arelent **reloc_vector;
8383 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
8387 /* Read in the section. */
8388 if (!bfd_get_full_section_contents (input_bfd, input_section, &data))
8394 if (reloc_size == 0)
8397 reloc_vector = (arelent **) bfd_malloc (reloc_size);
8398 if (reloc_vector == NULL)
8401 reloc_count = bfd_canonicalize_reloc (input_bfd,
8405 if (reloc_count < 0)
8408 if (reloc_count > 0)
8412 for (parent = reloc_vector; *parent != NULL; parent++)
8414 char *error_message = NULL;
8416 bfd_reloc_status_type r;
8418 symbol = *(*parent)->sym_ptr_ptr;
8419 /* PR ld/19628: A specially crafted input file
8420 can result in a NULL symbol pointer here. */
8423 link_info->callbacks->einfo
8424 /* xgettext:c-format */
8425 (_("%X%P: %pB(%pA): error: relocation for offset %V has no value\n"),
8426 abfd, input_section, (* parent)->address);
8430 /* Zap reloc field when the symbol is from a discarded
8431 section, ignoring any addend. Do the same when called
8432 from bfd_simple_get_relocated_section_contents for
8433 undefined symbols in debug sections. This is to keep
8434 debug info reasonably sane, in particular so that
8435 DW_FORM_ref_addr to another file's .debug_info isn't
8436 confused with an offset into the current file's
8438 if ((symbol->section != NULL && discarded_section (symbol->section))
8439 || (symbol->section == bfd_und_section_ptr
8440 && (input_section->flags & SEC_DEBUGGING) != 0
8441 && link_info->input_bfds == link_info->output_bfd))
8444 static reloc_howto_type none_howto
8445 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
8446 "unused", FALSE, 0, 0, FALSE);
8448 off = (*parent)->address * bfd_octets_per_byte (input_bfd);
8449 _bfd_clear_contents ((*parent)->howto, input_bfd,
8450 input_section, data, off);
8451 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
8452 (*parent)->addend = 0;
8453 (*parent)->howto = &none_howto;
8457 r = bfd_perform_relocation (input_bfd,
8461 relocatable ? abfd : NULL,
8466 asection *os = input_section->output_section;
8468 /* A partial link, so keep the relocs. */
8469 os->orelocation[os->reloc_count] = *parent;
8473 if (r != bfd_reloc_ok)
8477 case bfd_reloc_undefined:
8478 (*link_info->callbacks->undefined_symbol)
8479 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
8480 input_bfd, input_section, (*parent)->address, TRUE);
8482 case bfd_reloc_dangerous:
8483 BFD_ASSERT (error_message != NULL);
8484 (*link_info->callbacks->reloc_dangerous)
8485 (link_info, error_message,
8486 input_bfd, input_section, (*parent)->address);
8488 case bfd_reloc_overflow:
8489 (*link_info->callbacks->reloc_overflow)
8491 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
8492 (*parent)->howto->name, (*parent)->addend,
8493 input_bfd, input_section, (*parent)->address);
8495 case bfd_reloc_outofrange:
8497 This error can result when processing some partially
8498 complete binaries. Do not abort, but issue an error
8500 link_info->callbacks->einfo
8501 /* xgettext:c-format */
8502 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
8503 abfd, input_section, * parent);
8506 case bfd_reloc_notsupported:
8508 This error can result when processing a corrupt binary.
8509 Do not abort. Issue an error message instead. */
8510 link_info->callbacks->einfo
8511 /* xgettext:c-format */
8512 (_("%X%P: %pB(%pA): relocation \"%pR\" is not supported\n"),
8513 abfd, input_section, * parent);
8517 /* PR 17512; file: 90c2a92e.
8518 Report unexpected results, without aborting. */
8519 link_info->callbacks->einfo
8520 /* xgettext:c-format */
8521 (_("%X%P: %pB(%pA): relocation \"%pR\" returns an unrecognized value %x\n"),
8522 abfd, input_section, * parent, r);
8530 free (reloc_vector);
8534 free (reloc_vector);
8540 _bfd_generic_set_reloc
8543 void _bfd_generic_set_reloc
8547 unsigned int count);
8550 Installs a new set of internal relocations in SECTION.
8554 _bfd_generic_set_reloc (bfd *abfd ATTRIBUTE_UNUSED,
8559 section->orelocation = relptr;
8560 section->reloc_count = count;
8565 _bfd_unrecognized_reloc
8568 bfd_boolean _bfd_unrecognized_reloc
8571 unsigned int r_type);
8574 Reports an unrecognized reloc.
8575 Written as a function in order to reduce code duplication.
8576 Returns FALSE so that it can be called from a return statement.
8580 _bfd_unrecognized_reloc (bfd * abfd, sec_ptr section, unsigned int r_type)
8582 /* xgettext:c-format */
8583 _bfd_error_handler (_("%pB: unrecognized relocation type %#x in section `%pA'"),
8584 abfd, r_type, section);
8586 /* PR 21803: Suggest the most likely cause of this error. */
8587 _bfd_error_handler (_("is this version of the linker - %s - out of date ?"),
8588 BFD_VERSION_STRING);
8590 bfd_set_error (bfd_error_bad_value);
8595 _bfd_norelocs_bfd_reloc_type_lookup
8597 bfd_reloc_code_real_type code ATTRIBUTE_UNUSED)
8599 return (reloc_howto_type *) _bfd_ptr_bfd_null_error (abfd);
8603 _bfd_norelocs_bfd_reloc_name_lookup (bfd *abfd,
8604 const char *reloc_name ATTRIBUTE_UNUSED)
8606 return (reloc_howto_type *) _bfd_ptr_bfd_null_error (abfd);
8610 _bfd_nodynamic_canonicalize_dynamic_reloc (bfd *abfd,
8611 arelent **relp ATTRIBUTE_UNUSED,
8612 asymbol **symp ATTRIBUTE_UNUSED)
8614 return _bfd_long_bfd_n1_error (abfd);