3 * write.c (fixup_segment): Revert previous delta.
4 * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Also force the
5 generation of relocations for fixups against weak symbols.
9 * write.c (fixup_segment): Do not assume we know the section a
10 defined weak symbol is in.
11 * config/tc-arm.c (relax_adr, relax_branch, md_apply_fix): Treat
12 weak symbols as not known to be in the same section, even if they
17 * config/tc-tic6x.h (tic6x_label_list): New.
18 (tic6x_segment_info_type): Keep a list of labels and a current
19 frag instead of a boolean for whether labels seen and a count of
21 (tic6x_frag_info, TC_FRAG_TYPE, TC_FRAG_INIT, tic6x_frag_init,
22 md_do_align, tic6x_do_align, md_end, tic6x_end): New.
23 * config/tc-tic6x.c (tic6x_frob_label): Put label on list.
24 (tic6x_cleanup): Correct comment.
25 (tic6x_free_label_list): New.
26 (tic6x_cons_align): Free label list and update for
27 tic6x_segment_info_type changes.
28 (tic6x_do_align): New.
29 (md_assemble): Handle list of labels and saved frag for execute
30 packet. Create machine-dependent frag for new execute packet and
31 adjust labels accordingly.
32 (tic6x_adjust_section, tic6x_frag_init, tic6x_end): New.
33 (md_convert_frag, md_estimate_size_before_relax): Update comments.
38 * config/tc-i386-intel.c (intel_state): Add is_indirect.
39 (i386_intel_operand): Initialize intel_state.is_indirect. Check
40 intel_state.is_indirect for "call|jmp [symbol]".
44 * po/gas.pot: Updated by the Translation project.
48 * config/tc-i386.c (i386_is_register): Removed.
49 (x86_cons): Don't use i386_is_register.
50 (parse_register): Likewise.
51 * config/tc-i386-intel.c (i386_intel_simplify): Likewise.
52 (i386_intel_operand): Likewise.
56 * config/tc-i386.c (tc_x86_parse_to_dw2regnum): Don't use
61 * config/tc-i386.c (i386_is_register): Remove is_intel_syntax.
63 (parse_register): Likewise.
64 (tc_x86_parse_to_dw2regnum): Likewise.
65 * config/tc-i386-intel.c (i386_intel_simplify): Likewise.
66 (i386_intel_operand): Likewise.
71 * config/tc-i386-intel.c (i386_intel_simplify_register): New.
72 (i386_intel_simplify): Use i386_is_register and
73 i386_intel_simplify_register. Set X_md for O_register and
74 check X_md for O_constant.
75 (i386_intel_operand): Use i386_is_register.
77 * config/tc-i386.c (i386_is_register): New.
78 (x86_cons): Initialize the X_md field. Use i386_is_register.
79 (parse_register): Use i386_is_register.
80 (tc_x86_parse_to_dw2regnum): Likewise.
84 * expr.c (expr): Initialize the X_md field.
88 * config/tc-tic6x.c (OPTION_MGENERATE_REL): New.
89 (md_longopts): Add -mgenerate-rel.
90 (tic6x_generate_rela): New.
91 (md_parse_option): Handle -mgenerate-rel.
92 (md_show_usage): Add comment that -mgenerate-rel is undocumented.
93 (tic6x_init_after_args): New.
94 (md_apply_fix): Correct shift calculations for SB-relative
96 (md_pcrel_from): Change to tic6x_pcrel_from_section. Do not
97 adjust addresses for relocations referencing symbols in other
99 (tc_gen_reloc): Adjust addend calculations for REL relocations.
100 * config/tc-tic6x.h (MD_PCREL_FROM_SECTION,
101 tic6x_pcrel_from_section, tc_init_after_args,
102 tic6x_init_after_args): New.
107 * macro.c (macro_expand_body): Do not treat LOCAL as a keyword in
108 altmacro mode if found inside a quoted string.
112 * config/bfin-lex.l (parse_int): Change index() to strchr().
117 * config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
118 matcher to accept and unconditional 32-bit add instruction.
119 (pa_build_unwind_subspace): Cope with error conditions not
120 allowing the start symbol to be set.
124 * config/tc-arm.c (arm_convert_symbolic_attribute): Add support for
125 new tag names in v2.08 of ARM ABI.
126 * doc/c-arm.texi: Document new tag names in ABI.
130 * config/tc-alpha.c: Includes vms/egps.h on EVAX.
131 (s_alpha_comm): Used new EGPS macros from egps.h
132 (RGPS__V_NO_SHIFT, EGPS__V_MASK): New local macros.
133 (s_alpha_section_word): Add comments. Use new EGPS macros.
134 Adjust for modified bfd_vms_set_section_flags function.
139 * config/tc-ppc.c (ppc_elf_cons): Clear frag contents.
143 * as.c (create_obj_attrs_section): Remove unused variable addr.
144 * listing.c (listing_listing): Remove unused variable message.
145 * read.c: Remove unnecessary register type qualifiers.
146 (s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
151 * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
152 atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
153 atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
154 atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
155 atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
156 atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
157 atmega88pa, attiny461a, attiny84a, m3000.
158 Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
159 atmega8hvd, attiny327, m3000f, m3000s, m3001b.
160 * doc/c-avr.texi: Same.
164 * config/tc-arm.c (make_mapping_symbol): Handle the case
165 that multiple mapping symbols have the same value 0.
169 * configure: Regenerate.
173 * po/ru.po: New Russian translation.
174 * configure.in (ALL_LINGUAS): Add ru.
175 * configure: Regenerate.
180 * input-scrub.c (input_scrub_next_buffer): Use memmove instead
181 of memcpy to copy overlap memory.
185 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
186 (TARGET_CPU_HFILES): Add config/tc-tic6x.h.
187 * Makefile.in: Regenerate.
188 * NEWS: Add news entry for TI C6X support.
189 * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
190 TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
191 operands if TC_KEEP_OPERAND_SPACES.
192 * configure.tgt (tic6x-*-*): New.
193 * config/tc-ia64.h (TC_PREDICATE_START_CHAR,
194 TC_PREDICATE_END_CHAR): Define.
195 * config/tc-tic6x.c, config/tc-tic6x.h: New.
196 * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
197 * doc/Makefile.in: Regenerate.
198 * doc/all.texi (TIC6X): Define.
199 * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
200 * doc/c-tic6x.texi: New.
204 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
208 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
209 with operand_size_mismatch.
210 (operand_size_match): Updated.
211 (match_template): Likewise.
215 * config/tc-i386.c (i386_error): New.
216 (_i386_insn): Replace err_msg with error.
217 (operand_size_match): Set error instead of err_msg on failure.
218 (operand_type_match): Likewise.
219 (operand_type_register_match): Likewise.
220 (VEX_check_operands): Likewise.
221 (match_template): Likewise. Use error instead of err_msg with
226 * config/tc-arm.c (make_mapping_symbol): Hanle the case
227 that two mapping symbols have the same value.
231 * doc/c-arm.texi (.setfp): Correct example.
236 * config/tc-arm.c (reloc_names): New relocation names.
237 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
238 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
239 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
243 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
244 cases, and not only for .eh_frame.
246 * dw2gencfi.c (output_cie): Make it more explicit which code paths
247 belong to .eh_frame only.
251 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
252 assembler constants on 64-bit hosts.
256 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
257 Strip trailing whitespace.
261 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
262 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
264 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
268 * doc/as.texinfo: Add Blackfin options.
269 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
270 * config/tc-bfin.c (md_show_usage): Show usage for all
271 Blackfin specific options.
276 * listing.c (listing_newline): Correct backslash quote logic.
280 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
281 (ELF_TARGET_FORMAT64): Define.
285 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
289 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
290 reading uninitialized data.
294 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
298 * configure.tgt: Fix mep cpu case.
302 * config/tc-arm.c (do_t_strexd): Remove
303 operand[1] != operand[2] contraint.
307 * config/tc-arm.c (neon_select_shape): No need to match
308 the remaining operands in the shape when one operand does
313 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
318 * cgen.c: Whitespace fixes.
319 (weak_operand_overflow_check): Formatting fix.
323 * config/tc-i386.c (match_template): Update error messages.
327 * config/tc-i386.c (_i386_insn): Add err_msg.
328 (operand_size_match): Set err_msg on failure.
329 (operand_type_match): Likewise.
330 (operand_type_register_match): Likewise.
331 (VEX_check_operands): Likewise.
332 (match_template): Likewise. Use i.err_msg with as_bad.
336 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
337 mips_fix_loongson2f_jump): New variables.
338 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
339 -mno-fix-loongson2f-nop/jump.
340 (md_parse_option): Initialize variables via above options.
341 (options): New enums for the above options.
342 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
343 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
345 (append_insn): call fix_loongson2f().
346 (mips_handle_align): Replace the implicit nops.
347 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
348 for the new mips_handle_align().
349 * doc/c-mips.texi: Document the new options.
353 * config/tc-arm.c (do_rd_rm_rn): Added warning
359 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
360 (avr_cons_fix_new): Handle fixups of a single byte.
365 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
366 compiler's predefines.
370 * configure.tgt: Whiltespace. Sort moxie entry.
374 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
375 * doc/c-arm.texi: Likewise.
379 * config/tc-arm.c (asm_opcode): operands type
381 (BAD_PC_ADDRESSING): New macro message.
382 (BAD_PC_WRITEBACK): Likewise.
383 (MIX_ARM_THUMB_OPERANDS): New macro.
384 (operand_parse_code): Added enum values.
385 (parse_operands): Added thumb/arm distinction,
386 plus new enum values handling.
387 (encode_arm_addr_mode_2): Validations enhanced.
388 (encode_arm_addr_mode_3): Likewise.
389 (do_rm_rd_rn): Likewise.
390 (encode_thumb32_addr_mode): Likewise.
391 (do_t_ldrex): Likewise.
392 (do_t_ldst): Likewise.
393 (do_t_strex): Likewise.
394 (md_assemble): Call parse_operands with
402 (insns): Updated insns operands.
407 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
408 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
409 (pseudo_func): Add an entry for slotcount.
410 (md_begin): Initialize slotcount pseudo symbol.
411 (ia64_parse_name): Handle @slotcount parameter.
412 (ia64_gen_real_reloc_type): Handle slotcount.
413 (md_apply_fix): Ditto.
414 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
418 * config/tc-xtensa.c (istack_init): Don't call memset.
422 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
427 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
431 * config/tc-i386.c (build_modrm_byte): Reformat.
435 * config/tc-i386.c: Update copyright.
440 * config/tc-i386.c (vec_imm4) New operand type.
442 (VEX_check_operands): New.
443 (check_reverse): Call VEX_check_operands.
444 (build_modrm_byte): Reintroduce code for 5
445 operand insns. Fix whitespace.
449 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
454 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
455 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
456 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
460 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
461 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
462 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
463 BFD_RELOC_ARM_PCREL_CALL)
467 * config/tc-xtensa.c (frag_format_size): Generalize logic to
468 handle more instruction sizes and fetch widths.
469 (branch_align_power): Likewise.
470 (text_align_power): Likewise.
471 (bytes_to_stretch): Likewise.
475 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
476 (ppc_mach): Handle titan.
477 * doc/c-ppc.texi: Mention -mtitan.
481 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
483 (xtensa_fetch_width) ...this.
487 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
488 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
489 * Makefile.in: Regenerate.
493 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
494 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
495 * config/tc-i386.h (processor_type): Same.
496 * doc/c-i386.texi: Change amdfam15 to bdver1.
501 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
506 * NEWS: Mention new feature.
507 * config/obj-coff.c (obj_coff_section): Accept digits and use
508 to override default section alignment power if specified.
509 * doc/as.texinfo (.section directive): Update documentation.
513 * config/tc-i386.c (avxscalar): New.
514 (OPTION_MAVXSCALAR): Likewise.
515 (build_vex_prefix): Select vector_length for scalar instructions
517 (md_longopts): Add OPTION_MAVXSCALAR.
518 (md_parse_option): Handle OPTION_MAVXSCALAR.
519 (md_show_usage): Add -mavxscalar=.
521 * doc/c-i386.texi: Document -mavxscalar=.
525 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
530 * write.h (fix_at_start): Declare.
531 * write.c (fix_new_internal): Add at_beginning parameter.
532 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
533 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
534 (fix_new, fix_new_exp): Update accordingly.
535 (fix_at_start): New function.
536 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
537 (ppc_ref): New function, for OBJ_XCOFF.
538 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
539 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
543 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
544 on 64-bit Solaris/x86.
545 Include obj-format.h earlier.
549 * config/tc-s390.c (s390_elf_final_processing): New function.
550 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
551 (s390_elf_final_processing): Added prototype.
557 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
558 code to handle round-to-zero for VCVT conversions.
559 (do_neon_cvt): New. Call do_neon_cvt_1.
560 (do_neon_cvtr): New. Call do_neon_cvt_1.
561 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
566 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
570 * config/tc-i386.c (md_assemble): Before accessing the IMM field
571 check that it's not an XOP insn.
575 * config/bfin-aux.h: Remove argument names in function
577 * config/bfin-lex.l (parse_int): Fix shadowed variable name
579 * config/bfin-parse.y (value_match): Remove argument names
581 (notethat): Likewise.
586 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
590 * config/tc-h8300.c (h8300_elf_section): New function - issue a
591 warning message if a new section is created without setting any
593 (md_pseudo_table): Intercept section creation pseudos.
594 (md_pcrel_from): Replace abort with an error message.
595 * config/obj-elf.c (obj_elf_section_name): Export this function.
596 * config/obj-elf.h (obj_elf_section_name): Prototype.
601 * listing.c (print_source): Add one to line number.
605 * Makefile.in: Regenerate.
606 * configure: Regenerate.
607 * doc/Makefile.in: Regenerate.
611 * version.c (parse_args): Change to "Copyright 2010".
615 * config/tc-i386.c (cpu_arch): Add amdfam15.
616 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
617 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
618 * doc/c-i386.texi: Add amdfam15.
622 * config/tc-arm.c (do_neon_logic): Accept imm value
623 in the third operand too.
624 (operand_parse_code): OP_RNDQ_IMVNb renamed to
626 (parse_operands): OP_NILO case removed, applied renaming.
627 (insns): Neon shape changed for some logic instructions.
631 * config/tc-arm.c (do_neon_ldx_stx): Added
632 validation for vector load/store insns.
636 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
640 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
641 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
642 (NEON_ENCODE): New macro.
643 (check_neon_suffixes): New macro.
644 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
645 (do_vfp_nsyn_opcode): Likewise.
646 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
647 (do_vfp_nsyn_cmp): Likewise.
648 (do_neon_shl_imm): Likewise.
649 (do_neon_qshl_imm): Likewise.
650 (neon_dyadic_misc): Likewise.
651 (do_neon_mac_maybe_scalar): Likewise.
652 (do_neon_qdmulh): Likewise.
653 (do_neon_qmovn): Likewise.
654 (do_neon_qmovun): Likewise.
655 (do_neon_movn): Likewise.
656 (neon_mac_reg_scalar_long): Likewise.
657 (do_neon_vmull): Likewise.
658 (do_neon_trn): Likewise.
659 (do_neon_ldx_stx): Likewise.
660 (neon_dp_fixup): Changed signature and set the flag.
661 (neon_three_same): Call the above with new signature.
662 (neon_two_same): Likewise.
663 (neon_imm_shift): Likewise.
664 (neon_mul_mac): Likewise.
665 (do_neon_abs_neg): Likewise.
666 (neon_mixed_length): Likewise.
667 (do_neon_ext): Likewise.
668 (do_neon_mov): Likewise.
669 (do_neon_tbl_tbx): Likewise.
670 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
671 (neon_compare): Likewise.
672 (do_neon_shll): Likewise.
673 (do_neon_cvt): Likewise.
674 (do_neon_mvn): Likewise.
675 (do_neon_dup): Likewise.
676 (md_assemble): Call check_neon_suffixes ().
678 For older changes see ChangeLog-2009
684 version-control: never