3 * hppa-dis.c (print_insn_hppa): Handle 'X' operand.
5 * hppa-dis.c (print_insn_hppa): Handle 'B' operand.
7 * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands.
9 * hppa-dis.c (print_insn_hppa): Handle 'l' operand.
11 * hppa-dis.c (print_insn_hppa): Handle 'g' operand.
15 * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer.
17 * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
20 * hppa-dis.c: (print_insn_hppa): Handle 'fX'.
22 * hppa-dis.c: (print_insn_hppa): Add missing break after
25 * hppa-dis.c: Finish constifying various completers, register
30 * configure.in (Canonicalization of target names): Remove adding
31 ${CONFIG_SHELL} in front of $ac_config_sub, since autoconfig 2.14
32 generates $ac_config_sub with a ${CONFIG_SHELL} already.
33 * configure: Regenerate.
37 * hppa-dis.c (print_insn_hppa): Escape '%' in output strings.
39 * hppa-dis.c (print_insn_hppa): Handle 'Z' argument.
43 * sh-opc.h: Add mulu.w and muls.w patterns. These are the correct
44 names for the mulu and muls patterns.
50 * disassemble.c (disassembler): Handle bfd_arch_pj.
51 * configure.in: Handle bfd_pj_arch.
52 * Makefile.am: Rebuild dependencies.
53 (CFILES): Add pj-dis.c and pj-opc.c.
54 (ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
55 * configure, Makefile.in: Rebuild.
59 * i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
63 * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31.
67 * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
68 * m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
69 * m32r-opinst.c: Rebuild.
73 * hppa-dis.c (print_insn_hppa): Replace 'f' by 'v'. Prefix float
76 * hppa-dis.c (print_insn_hppa): Add args q, %, !, and |.
78 * hppa-dis.c (MASK_10, read_write_names, add_compl_names,
79 extract_10U_store): New.
80 (print_insn_hppa): Add new completers.
82 * hppa-dis.c (signed_unsigned_names,mix_half_names,
83 saturation_names): New.
84 (print_insn_hppa): Add completer codes 'a', 'ch', 'cH', 'cS', and 'c*'.
86 * hppa-dis.c (print_insn_hppa): Place completers behind prefix 'c'.
88 * hppa-dis.c (print_insn_hppa): Add cases for '.', '~'. '$'. and '!'
90 * hppa-dis.c (print_insn_hppa): Look at next arg instead of bits
91 to decide to print a space.
95 * i386-dis.c: Add AMD athlon instruction support.
100 * dis-buf.c (buffer_read_memory): Rewrite expression to avoid
101 overflow at end of address space.
102 (generic_print_address): Use sprintf_vma.
106 * Makefile.am: Rename .dep* files to DEP*. Change DEP variable to
107 MKDEP. Rebuild dependencies.
108 * Makefile.in: Rebuild.
112 * hppa-dis.c (compare_cond_64_names, cmpib_cond_64_names,
113 add_cond_64_names, wide_add_cond_names, logical_cond_64_names,
114 unit_cond_64_names, shift_cond_64_names, bb_cond_64_names): New.
115 (print_insn_hppa): Add 64 bit condition completers.
119 * hppa-dis.c (print_insn_hppa): Change condition args to use
124 * hppa-dis.c (print_insn_hppa): Remove unnecessary test in 'E'
130 * configure.bat: Remove; obsolete.
134 * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.
135 (generic_strcat_address): Add cast to avoid warning.
136 * i386-dis.c: Initialize all structure fields to avoid warnings.
137 Add ATTRIBUTE_UNUSED as appropriate.
141 * sparc-dis.c (print_insn_sparc): Differentiate between
142 addition and oring when guessing symbol for comment.
146 * arm-dis.c (print_insn_arm): Display hex equivalent of rotated
151 * i386-dis.c: Mention intel mode specials in macro char comment.
155 * alpha-dis.c: Don't include <stdlib.h>.
156 * arm-dis.c: Include "sysdep.h".
157 * tic30-dis.c: Don't include <stdlib.h> or <string.h>. Include
159 * Makefile.am: Rebuild dependencies.
160 * Makefile.in: Rebuild.
164 * arm-dis.c (print_insn_arm): Add detection of IMB and IMBRange
169 * arm-dis.c (arm_regnames): Turn into a pointer to a register
171 (arm_regnames_standard): New variable: Array of ARM register
172 names according to ARM instruction set nomenclature.
173 (arm_regnames_apcs): New variable: Array of ARM register names
174 according to ARM Procedure Call Standard.
175 (arm_regnames_raw): New variable: Array of ARM register names
176 using just 'r' and the register number.
177 (arm_toggle_regnames): New function: Toggle the chosen register set
179 (parse_disassembler_options): New function: Parse any target
180 disassembler command line options.
181 (print_insn_big_arm): Call parse_disassembler_options if any
183 (print_insn_little_arm): Call parse_disassembler_options if any
188 * i386-dis.c (FWAIT_OPCODE): Define.
189 (used_prefixes): New static variable.
190 (fetch_data): Don't print an error message if we have already
191 fetched some bytes successfully.
192 (ckprefix): Clear used_prefixes. Use FWAIT_OPCODE, not 0x9b.
193 (prefix_name): New static function.
194 (print_insn_i386): If setjmp fails, indicating a data error, but
195 we have managed to fetch some bytes, print the first one as a
196 prefix or a .byte pseudo-op. If fwait is followed by a non
197 floating point instruction, print the first prefix. Set
198 used_prefixes when prefixes are used. If any prefixes were not
199 used after disassembling the instruction, print the first prefix
200 instead of printing the instruction.
201 (putop): Set used_prefixes when prefixes are used.
202 (append_seg, OP_E, OP_G, OP_REG, OP_I, OP_sI, OP_J): Likewise.
203 (OP_DIR, OP_SIMD_Suffix): Likewise.
207 * sparc-opc.c: Fix up set, setsw, setuw operand kinds.
208 Support signx %reg, clruw %reg.
212 * sparc-opc.c: Add aliases Solaris as supports.
216 * Makefile.am (CFILES): Add arc-{dis,opc}.c and v850-{dis,opc}.c.
217 * Makefile.in: Regenerated.
221 * arm-dis.c (print_insn_arm): Make LDRH/LDRB consistent with LDR
222 when target is PC-relative.
226 * m68k-opc.c: Rename MACL/MSACL to MAC/MSAC. Add MACM/MSACM. Add
229 * m68k-dis.c (fetch_arg): Add places `n', `o'.
231 * m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
232 Add mcf5206e to appropriate instructions.
233 Add alias for MAC, MSAC.
235 * m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
238 * m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
239 macw, remsl, remul for mcf5307. Change mcf5200 --> mcf.
241 * m68k-dis.c: Add format `u' and places `h', `m', `M'.
245 * i386-dis.c (Ed): Define.
246 (dis386_twobyte_att, dis386_twobyte_intel): Use Ed for movd.
248 (OP_rm): Rename to OP_Rd.
251 (putop): Add const to template and p.
252 (print_insn_x86): Delete.
253 (print_insn_i386): Merge old function print_insn_x86. Add const
255 (struct dis386): Add const to name.
256 (dis386_att, dis386_intel): Add const.
257 (dis386_twobyte_att, dis386_twobyte_intel): Add const.
258 (names32, names16, names8, names_seg, index16): Add const.
259 (grps, prefix_user_table, float_reg): Add const.
260 (float_mem_att, float_mem_intel): Add const.
261 (oappend): Add const to s.
262 (OP_REG): Add const to s.
263 (ptr_reg): Add const to s.
264 (dofloat): Add const to dp.
265 (OP_C): Don't skip modrm, it's now done in OP_Rd.
268 (OP_Rd): Check for valid mod. Call Op_E to print.
269 (OP_E): Handle d_mode arg. Check for bad sfence,lea,lds etc.
270 (OP_MS): Check for valid mod. Call Op_EM to print.
271 (OP_3DNowSuffix): Set obufp and use oappend rather than
272 strcat. Call BadOp() for errors.
273 (OP_SIMD_Suffix): Likewise.
274 (BadOp): New function.
278 * i386-dis.c (dis386_intel): Remove macro chars, except for
279 jEcxz. Change cWtR and cRtd to cW and cR.
280 (dis386_twobyte_intel): Remove macro chars here too.
281 (putop): Handle R and W macros for intel mode.
283 * i386-dis.c (SIMD_Fixup): New function.
284 (dis386_twobyte_att): Use it on movlps and movhps, and change
285 Ev to EX on these insns. Change movmskps Ev, XM to Gv, EX.
286 (dis386_twobyte_intel): Same here.
288 * i386-dis.c (Av): Remove.
292 (OP_SIMD_Suffix): New function.
293 (OP_DIR): Remove dead code.
294 (eAX_reg..eDI_reg): Renumber.
295 (onebyte_has_modrm): Table numbering comments.
296 (INTERNAL_DISASSEMBLER_ERROR): Move to before print_insn_x86.
297 (print_insn_x86): Move all prefix oappends to after uses_f3_prefix
298 checks. Print error on invalid dp->bytemode2. Remove simd_cmp,
299 and handle SIMD cmp insns in OP_SIMD_Suffix.
300 (info->bytes_per_line): Bump from 5 to 6.
302 (OP_E): Use INTERNAL_DISASSEMBLER_ERROR. Handle sfence.
303 (OP_3DNowSuffix): Ensure mnemonic index unsigned.
306 * i386-dis.c (XM, EX, None): Define.
307 (OP_XMM, OP_EX, OP_None): New functions.
308 (USE_GROUPS, USE_PREFIX_USER_TABLE): Define.
309 (GRP14): Rename to GRPAMD.
310 (GRP*): Add USE_GROUPS flag.
312 (dis386_twobyte_att, dis386_twobyte_intel): Add SIMD insns.
313 (twobyte_has_modrm): Add SIMD entries.
314 (twobyte_uses_f3_prefix, simd_cmp_op, prefix_user_table): New.
315 (grps): Add SIMD insns.
316 (print_insn_x86): New vars uses_f3_prefix and simd_cmp. Don't
317 oappend repz if uses_f3_prefix. Add code to handle new groups for
321 * i386-dis.c (dis386_att, dis386_intel): Change 0xE8 call insn
322 operand from Av to Jv.
326 * mcore-dis.c (print_insn_mcore): Use .short to display
327 unidentified instructions, not .word.
331 * aclocal.m4, configure: Updated for new version of libtool.
335 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
336 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
340 * hppa-dis.c (print_insn_hppa, case '3'): New case for PA2.0
345 * fr30-desc.c,fr30-desc.h,fr30-ibld.c: Rebuild.
346 * m32r-desc.c,m32r-desc.h,m32r-opinst.c: Rebuild.
350 * opintl.h (LC_MESSAGES): Never define.
354 * i386-dis.c (intel_syntax, open_char, close_char): Make static.
355 (separator_char, scale_char): Likewise.
356 (print_insn_x86): Likewise.
357 (print_insn_i386): Likewise. Add declaration.
361 * fr30-dis.c: Rebuild.
362 * m32r-dis.c: Rebuild.
366 * m68k-opc.c: Change compare instructions to use "@s" rather than
367 ";s" when used with an immediate operand.
371 * cgen-opc.c (cgen_set_cpu): Delete.
372 (cgen_lookup_insn): max_insn_size renamed to max_insn_bitsize.
373 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c,fr30-opc.h:
375 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h:
377 * po/opcodes.pot: Rebuild.
381 * d30v-opc.c (mvtsys): Remove FLAG_LKR.
385 * cgen-opc.c (cgen_set_cpu): New arg `isa'. All callers updated.
386 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): New fns.
387 (cgen_get_insn_operands): Rewrite test for hardcoded/operand index.
388 * fr30-asm.c,fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c: Rebuild.
389 * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c: Rebuild.
390 * m32r-opinst.c: Rebuild.
394 * cgen-opc.c (cgen_hw_lookup_by_name): Rewrite.
395 (cgen_hw_lookup_by_num): Rewrite.
396 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
397 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
398 * m32r-opinst.c: Rebuild.
402 * alpha-opc.c: Add sqrt+flags patterns. Add EV6 PALcode insns.
403 (insert_jhint): Fix insertion mask.
404 * alpha-dis.c (print_insn_alpha): Disassemble EV6 PALcode insns.
408 * Makefile.in: Rebuild.
412 * i960c-asm.c,i960c-dis.c,i960c-opc.c,i960c-opc.h: Delete.
413 * i960-dis.c (print_insn_i960): Rename from print_insn_i960_orig.
414 * Makefile.am: Remove references to them.
415 (HFILES): Add fr30-desc.h,m32r-desc.h.
416 (CFILES): Add fr30-desc.c,fr30-ibld.c,m32r-desc.c,m32r-ibld.c,
418 (ALL_MACHINES): Update.
419 * configure.in: Redo handling of cgen_files.
420 (bfd_i960_arch): Delete i960c-*.lo files.
421 * configure: Regenerate.
422 * cgen-asm.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
423 (hash_insn_array): Rewrite.
424 * cgen-dis.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
425 (hash_insn_array): Rewrite.
426 * cgen-opc.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
427 (cgen_lookup_insn,cgen_get_insn_operands): Define here.
428 (cgen_lookup_get_insn_operands): Ditto.
429 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
430 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
431 * po/POTFILES.in: Rebuild.
432 * po/opcodes.pot: Rebuild.
436 * Makefile.am: Rebuild dependencies.
437 (HFILES): Add fr30-opc.h.
438 (CFILES): Add fr30-asm.c, fr30-dis.c, fr30-opc.c.
439 * Makefile.in: Rebuild.
441 * configure.in: Change AC_PREREQ to 2.13. Remove AM_CYGWIN32.
442 Change AM_EXEEXT to AC_EXEEXT and AM_PROG_INSTALL to
444 * acconfig.h: Remove.
445 * configure: Rebuild with current autoconf/automake.
446 * aclocal.m4: Likewise.
447 * config.in: Likewise.
448 * Makefile.in: Likewise.
452 * m68k-opc.c: Correct move (not movew) to status word on 5200.
456 * disassemble.c (disassembler): Handle bfd_mach_i386_i386_intel_syntax.
457 * i386-dis.c (x_mode): Define.
461 (dis386_twobyte): Remove.
462 (dis386_twobyte_att): New.
463 (dis386_twobyte_intel): New.
464 (print_insn_x86): Use new arrays.
466 (float_mem_intel): New.
467 (float_mem_att): New.
468 (dofloat): Use new float_mem arrays.
469 (print_insn_i386_att): New.
470 (print_insn_i386_intel): New.
471 (print_insn_i386): Handle bfd_mach_i386_i386_intel_syntax.
472 (putop): Handle intel syntax.
473 (OP_indirE): Handle intel syntax.
474 (OP_E): Handle intel syntax.
475 (OP_I): Handle intel syntax.
476 (OP_sI): Handle intel syntax.
477 (OP_OFF): Handle intel syntax.
483 * fr30-opc.h,fr30-opc.c: Rebuild.
484 * i960c-opc.h,i960c-opc.c: Rebuild.
485 * m32r-opc.c: Rebuild.
489 * hppa-dis.c: revert HP merge changes until HP gives us
494 * arm-dis.c (print_insn_arm): Display ARM syntax for PC relative
495 offsets as well as symbloic address.
499 * hppa-dis.c: fix comments and some indentation.
503 * fr30-opc.c,i960c-opc.c: Regenerate.
507 * fr30-opc.c: Regenerate.
511 * m32r-dis.c: Regenerate.
515 * fr30-asm.c,fr30-dis.c,fr30-opc.h,fr30-opc.c: Regenerate.
516 * i960c-asm.c,i960c-dis.c,i960c-opc.h,i960c-opc.c: Regenerate.
517 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
521 * configure.in: Require autoconf 2.12.1 or higher.
525 * mips16-opc.c: Mark branch insns with MIPS16_INSN_BRANCH.
529 * fr30-opc.c: Regenerated.
533 * mips-dis.c (set_mips_isa_type): Handle bfd_mach_mips4111.
537 * fr30-opc.c,fr30-opc.h: Regenerated.
541 * fr30-opc.c,fr30-opc.h: Regenerated.
545 * fr30-opc.c,fr30-opc.h: Regenerated.
549 * m32r-opc.c: Regenerate.
553 * dis-buf.c (generic_strcat_address): reformat to GNU coding
554 conventions. change sprintf call to an sprintf_vma call.
558 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
562 The following changes were made by
566 merge in changes by HP; HP did not create ChangeLog entries.
568 * dis-buf.c (generic_strcat_address): new function.
570 * hppa-dis.c: Changes to improve hppa disassembly.
571 Changed formatting in : reg_names, fp_reg_names,control_reg,
572 New variables : sign_extension_names, deposit_names, conversion_names
573 float_test_names, compare_cond_names_double, add_cond_names_double,
574 logical_cond_names_double, unit_cond_names_double,
575 branch_push_pop_names, saturation_names, shift_names, mix_names,
576 New Macros : GET_COMPL_O, GET_PUSH_POP,MERGED_REG
577 Move some definitions to libhppa.h: GET_FIELD, GET_BIT
578 (fput_const): renamed as fput_hex_const
580 - use the macros fputs_filtered and
581 fput_decimal_const whenever possible; calls to sign_extend require
582 2 params -- add a missing second param of 0.
583 - Some new code ifdefed for LOCAL_ONLY, all related to figuring out
584 architecture version number of current machine. HP folks are
585 trying to handle situation where the target program was compiled
586 for PA 1.x (32-bit), but is running on a PA 2.0 machine and
588 - added new cases : 'g', 'B', 'm'
589 - added cases specifically for PA 2.0
590 - changed the following cases : '"', 'n', 'N', 'p', 'Z',
591 - calls to fput_const become calls to fput_hex_const
595 * Makefile.am (CFILES): Add i960c-asm, i960c-dis.c, i960c-opc.c.
596 (ALL_MACHINES): Add i960c-asm.lo, i960c-dis.lo, i960-opc.lo.
597 (i960-asm.lo, i960c-dis.lo, i960c-opc.lo): New Makefile rules.
598 * Makefile.in: Rebuilt.
599 * configure.in (bfd_i960_arch): Add i960c-opc.lo, i960-asm.o,
601 * i960-dis.c (print_insn_i960): Rename to print_insn_i960_orig.
602 * i960c-asm.c, i960c-dis.c, i960c-opc.c, i960c-opc.h: New files.
606 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
610 * mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
612 * ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions.
617 * fr30-opc.c: Regenerate.
621 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
625 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
629 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
633 * cgen-dis.c (hash_insn_array): CGEN_INSN_VALUE ->
634 CGEN_INSN_BASE_VALUE.
635 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
636 * fr30-opc.c,fr30-opc.h,fr30-asm.c,fr30-dis.c: Regenerate.
640 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Regenerated.
644 * fr30-asm.c,fr30-dis.c: Regenerated.
648 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
652 * fr30-opc.c: Regenerated.
656 * fr30-opc.c: Regenerated.
657 * fr30-opc.h: Regenerated.
658 * fr30-dis.c: Regenerated.
659 * fr30-asm.c: Regenerated.
663 * mips-opc.c (sync.p,sync.l): Swap insn values.
667 * fr30-opc.c: Regenerate.
671 * fr30-opc.c: Regenerated.
672 * fr30-opc.h: Regenerated.
676 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Rebuild.
677 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Rebuild.
681 * fr30-opc.c: Regenerated.
685 * fr30-opc.c: Regenerated.
686 * fr30-opc.h: Regenerated.
687 * fr30-dis.c: Regenerated.
688 * fr30-asm.c: Regenerated.
692 * po/opcodes.pot: Regenerated.
693 * fr30-opc.c: Regenerated.
694 * fr30-opc.h: Regenerated.
695 * fr30-dis.c: Regenerated.
696 * fr30-asm.c: Regenerated.
700 * disassemble.c (disassembler): Add support for FR30 target.
704 * m32r-dis.c,m32r-opc.c,m32r-opc.h: Rebuild.
705 * fr30-dis.c,fr30-opc.c,fr30-opc.h: Rebuild.
709 * po/opcodes.pot: Regenerate.
710 * po/POTFILES.in: Regenerate.
711 * fr30-opc.c: Regenerate.
712 * fr30-opc.h: Regenerate.
716 * m32r-asm.c: Regenerate.
720 * configure.in: Added case for bfd_fr30_arch.
721 * Makefile.am (CFILES): Added fr30-asm.c, fr30-dis.c, fr30-opc.c.
722 (ALL_MACHINES): Added fr30-asm.lo, fr30-dis.lo, fr30-opc.lo.
723 (CLEANFILES): Added stamp-fr30.
725 * fr30-asm.c: New file.
726 * fr30-dis.c: New file.
727 * fr30-opc.c: New file.
728 * fr30-opc.h: New file.
729 * po/POTFILES.in: Regenerated
730 * po/opcodes.pot: Regenerated
734 * configure.in: detect cygwin* instead of cygwin32*
735 * configure: regenerate
739 * mips-opc.c (IS_M): Added.
743 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
747 * m32r-opc.h,m32r-opc.c: Regenerate.
751 * i386-dis.c (OP_3DNowSuffix): New static function.
754 (dis386_twobyte): Add GRP14, femms, and 3DNow entries.
755 (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow.
756 (insn_codep): New static variable.
757 (print_insn_x86): Init insn_codep after prefixes.
758 (grps): Add GRP14 entries for prefetch, prefetchw.
762 * i386-dis.c (Suffix3DNow): New table.
766 * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
770 * d10v-dis.c (print_operand): If num is nonzero, then
771 add OPERAND_ACC1, not OPERAND_ACC0.
775 * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
780 * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit
785 * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.
789 * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move
794 * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf
796 (print_insn_little_arm): Detect Thumb symbols in elf object
801 * alpha-dis.c (print_insn_alpha): Use the machine type to
802 decide which PALcode set to include.
806 * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.
810 * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS,
811 MSUB and MSUBS instructions.
815 * ppc-opc.c (powerpc_operands): Omit parens around additions in
821 * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a,
822 +, -, and d for ColdFire.
825 * ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
826 (extract_mbe): Likewise.
830 * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes.
832 * m10300-opc.c: First cut at UDF instructions.
836 * m32r-opc.c: Regenerate (remove semantic descriptions).
840 * arm-dis.c (print_insn_big_arm): Fix indentation.
841 (print_insn_little_arm): Likewise.
845 * arm-dis.c (print_insn_big_arm): Check for thumb symbol
847 (print_insn_little_arm): Likewise.
851 Move all global state data into opcode table struct, and treat
852 opcode table as something that is "opened/closed".
853 * cgen-asm.c (all fns): New first arg of opcode table descriptor.
854 (cgen_asm_init): Delete.
855 (cgen_set_parse_operand_fn): New function.
856 * cgen-dis.c (all fns): New first arg of opcode table descriptor.
857 (cgen_dis_init): Delete.
858 * cgen-opc.c (all fns): New first arg of opcode table descriptor.
859 (cgen_current_{opcode_table_mach,endian}): Delete.
860 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
864 * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
869 * m10300-opc.c: Add entries for "no_match_operands" field in
874 * m32r-asm.c,m32r-opc.c: Regenerate (-Wall cleanups).
878 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
882 * i386-dis.c (ckprefix): Handle fwait specially only when it isn't
884 (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
886 (OP_J): Remove unnecessary subtraction when 16-bit displacement
887 will be masked later.
891 * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.
895 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
899 * m10300-dis.c: Only recognize instructions from the currently
901 * m10300-opc.c: Add field indicating the particular variant of
902 the mn10300 each instruction is available on.
906 * configure.in: For bfd_vax_arch, build vax-dis.lo.
907 * Makefile.am: Rebuild dependencies.
908 (CFILES): Add vax-dis.c.
909 (ALL_MACHINES): Add vax-dis.lo.
910 * aclocal.m4: Rebuild with current libtool.
911 * configure, Makefile.in: Rebuild.
915 * vax-dis.c: New file, from work by Pauline Middelink
917 * disassemble.c (ARCH_vax): Define if ARCH_all.
918 (disassembler): Add case for ARCH_vax.
919 * makefile.vms: Support compilation on vms/vax.
923 * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities
924 related to sign extension and the size of ints.
928 * m10300-opc.c: Support one operand "asr", "lsr" and "asl"
929 instructions. Support (sp) addressing mode by expanding it into
934 * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
938 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
942 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
947 * mips-dis.c (print_insn_little_mips): Previously, instruction
948 printing references the symbol table to determine whether the
949 instruction resides in a block regular instructions or mips16
950 instructions. However, when the disassembler gets used in other
951 environments where the symbol table is not present, we no longer
952 rely in the symbol table, rather, use the low bit of the
953 instructions address to guess. There should be no change for usage
954 of the disassembler in host based programs, gdb, objdump.
955 (print_insn_big_mips): ditto.
956 (print_insn_mips): ditto
960 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
964 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
968 * i386-dis.c (index16): Add '%' to register names. Use ','
973 * i386-dis.c: Don't print opcode suffix when we can figure out the
974 size (and gas can!) by register operands, or from the default
976 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
978 (dis386, dis386_twobyte, grps): Use new suffix macros.
979 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
980 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
981 order of cmps operands to agree with Intel docs. Correct operand
982 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
983 agree with Intel docs.
984 (print_insn_x86): Print orphan fwait before other prefixes.
985 Return correct byte count for orphan fwait with prefixes. Don't
986 print `bound' operands in reverse order.
987 (ckprefix): Stop accumulating prefixes if we get fwait.
988 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
992 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
993 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
997 Fix problems when bfd_vma is wider than long.
998 * i386-dis.c: Make op_address and start_pc unsigned.
999 (set_op): Make parameter unsigned.
1000 (print_insn_x86): Cast to bfd_vma when passing a value to
1002 * ns32k-dis.c (CORE_ADDR): Don't define.
1003 (print_insn_ns32k): Change type of addr to bfd_vma. Use
1004 bfd_scan_vma to read back address.
1005 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
1007 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
1008 (NEXTULONG): New definition.
1009 (print_insn_m68k): Avoid overflow when computing third argument of
1011 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
1012 Use disp instead of val to store offset values.
1013 (print_indexed): Use base_disp instead of word to store base
1014 displacement, to avoid overflow.
1015 * m10300-dis.c (disassemble): Cast value to long when computing
1016 pc-relative address, to get correct sign extension.
1020 * m32r-opc.c: Regenerate.
1024 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
1029 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
1033 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
1035 (OP_DSreg): Rename from OP_DSSI.
1036 (OP_ESreg): Rename from OP_ESDI.
1037 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
1039 (append_seg): Rename from append_prefix.
1040 (ptr_reg): New function.
1041 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
1043 (PREFIX_ADDR): Rename from PREFIX_ADR.
1044 (float_reg): Add non-broken opcodes for people who don't want
1049 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
1054 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
1058 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
1059 0; produce error message for shifts of size 32 (or 64 for 64-bit
1060 shifts), because the hardware doesn't support them.
1064 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
1065 LONG_2, LONG_2b formats to use this new operand.
1069 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
1073 * sparc-dis.c (print_insn_sparc): big endian instruction / little
1074 endian data support.
1078 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
1079 and SHORT_B3b formats to use Rb instead of Ra.
1081 Add FLAG_MUL16 to MUL2XH opcode.
1083 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
1084 to existing 1.1.1 parallelisation prohibition procedure.
1088 * m32r-asm.c,m32r-dis.c: Regenerate.
1092 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
1093 with a shift count of 0.
1097 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1098 (cgen_hw_lookup_by_num): New function.
1102 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
1106 * sparc-dis.c (print_insn_sparc): Always fetch instructions
1107 as big-endian on SPARClite.
1111 * d30v-opc.c (pre_defined_register): Remove alias for r0.
1115 * po/Make-in (install-info): New target.
1119 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
1120 * configure: Rebuild.
1124 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
1125 variety of ISA2 instructions to set bottom ten bits of trap code.
1129 * Makefile.am (config.status): Add explicit target so that
1130 config.status depends upon bfd/configure.in.
1131 * Makefile.in: Rebuild.
1135 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
1136 instructions to set bottom ten bits of break code.
1137 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
1138 for above optional argument.
1142 * makefile.vms: Run dec c with /nodebug.
1146 * Makefile.in: Rebuilt.
1147 * Makefile.am: Regenerated dependencies with mkdep.
1149 * opintl.h (_): Define as dgettext.
1153 * cgen-asm.c: Internationalised.
1154 * m32r-asm.c: Internationalised.
1155 * m32r-dis.c: Internationalised.
1156 * m32r-opc.c: Internationalised.
1158 * aclocal.m4: Regenerated.
1159 * configure: Regenerated.
1160 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
1161 * Makefile.in: Rebuild.
1162 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
1163 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
1167 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
1169 * aclocal.m4, configure: Rebuild with current tools.
1173 * opintl.h: New file - contains internationalisation macros used
1174 by source files in this directory.
1175 * po/: New subdirectory - contains internationalisation files.
1176 * po/Make-in: New file - Makefile constructor.
1177 * po/POTFILES.in: New file - list of files in opcodes directory
1178 that should be scan for internationalisation macros.
1179 * po/opcodes.pot: New file - list of internationisation strings
1180 found in files mentioned in po/POTFILES.in.
1181 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
1182 entry. Add intl directory to include paths.
1183 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
1184 HAVE_STRCPY, HAVE_LC_MESSAGES
1185 * configure.in: Add rule to build Makefile in po subdirectory.
1186 * Makefile.in: Rebuilt.
1187 * aclocal.m4: Rebuilt.
1188 * config.in: Rebuilt.
1189 * configure: Rebuilt.
1190 * alpha-opc.c: Internationalised.
1191 * arc-dis.c: Internationalised.
1192 * arc-opc.c: Internationalised.
1193 * arm-dis.c: Internationalised.
1194 * cgen-asm.c: Internationalised.
1195 * d30v-dis.c: Internationalised.
1196 * dis-buf.c: Internationalised.
1197 * h8300-dis.c: Internationalised.
1198 * h8500-dis.c: Internationalised.
1199 * i386-dis.c: Internationalised.
1200 * m10200-dis.c: Internationalised.
1201 * m10300-dis.c: Internationalised.
1202 * m68k-dis.c: Internationalised.
1203 * m88k-dis.c: Internationalised.
1204 * mips-dis.c: Internationalised.
1205 * ns32k-dis.c: Internationalised.
1206 * opintl.h: Internationalised.
1207 * ppc-opc.c: Internationalised.
1208 * sparc-dis.c: Internationalised.
1209 * v850-dis.c: Internationalised.
1210 * v850-opc.c: Internationalised.
1214 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
1215 (asm_hash_table_entries): New variable.
1216 (cgen_asm_init): Free asm_hash_table_entries.
1217 (hash_insn_array,hash_insn_list): New functions.
1218 (build_asm_hash_table): Use them. Hash macro insns as well.
1219 (cgen_asm_lookup_insn): Update.
1220 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
1221 (dis_hash_table_entries): New variable.
1222 (cgen_dis_init): Free dis_hash_table_entries.
1223 (hash_insn_array,hash_insn_list): New functions.
1224 (build_dis_hash_table): Use them. Hash macro insns as well.
1225 (cgen_dis_lookup_insn): Update.
1226 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
1227 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
1228 (cgen_macro_insn_count): New function.
1229 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
1233 * i386-dis.c (OP_DSSI): Print segment override.
1237 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
1242 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
1243 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
1244 * configure.in: Define and substitute WIN32LDFLAGS and
1246 * aclocal.m4: Rebuild with new libtool.
1247 * configure, Makefile.in: Rebuild.
1251 * m32r-opc.c: Regenerate.
1255 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
1256 before trying to copy it.
1257 * Makefile.in: Rebuild.
1261 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
1265 * ns32k-dis.c (bit_extract_simple): New function to extract bits
1266 from an arbitrary valid buffer instead of fetching them on demand
1268 (invalid_float): use bit_extract_simple() instead of bit_extract().
1273 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
1278 * Branched binutils 2.9.
1282 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
1283 disassembling last 4 bytes of a section.
1287 Fix some gcc -Wall warnings:
1288 * arc-dis.c (print_insn): Add casts to avoid warnings.
1289 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
1290 * d10v-dis.c (dis_long, dis_2_short): Likewise.
1291 * m10200-dis.c (disassemble): Likewise.
1292 * m10300-dis.c (disassemble): Likewise.
1293 * ns32k-dis.c (print_insn_ns32k): Likewise.
1294 * ppc-opc.c (insert_ral, insert_ram): Likewise.
1295 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
1296 * cgen-opc.c (cgen_keyword_search_next): Likewise.
1297 * d10v-dis.c (dis_long, dis_2_short): Likewise.
1298 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
1299 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
1300 * tic80-dis.c (print_one_instruction): Likewise.
1301 * w65-dis.c (print_operand): Likewise.
1302 * z8k-dis.c (fetch_data): Likewise.
1303 * a29k-dis.c: Add return type for find_byte_func_type.
1304 * arc-opc.c: Include <stdio.h>. Remove declarations of
1305 insert_multshift and extract_multshift.
1306 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
1308 (extract_value): Fully parenthesize expression.
1309 * h8500-dis.c (print_insn_h8500): Initialize local variables.
1310 * h8500-opc.h (h8500_table): Fully bracket initializer.
1311 * w65-opc.h (optable): Likewise.
1312 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
1313 * i386-dis.c (OP_E): Initialize local variables.
1314 * m10200-dis.c (print_insn_mn10200): Likewise.
1315 * mips-dis.c (print_insn_mips16): Likewise.
1316 * sh-dis.c (print_insn_shx): Likewise.
1317 * v850-dis.c (print_insn_v850): Likewise.
1318 * ns32k-dis.c (print_insn_arg): Declare.
1319 (get_displacement, invalid_float): Declare.
1320 (list_search, sign_extend, flip_bytes): Declare return type.
1321 (get_displacement): Likewise.
1322 (print_insn_arg): Likewise. Make d int. Fix sprintf format
1324 (print_insn_ns32k): Make i unsigned.
1325 (invalid_float): Make static. Declare type of val.
1326 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
1327 on each for iteration.
1328 * tic30-dis.c (get_indirect_operand): Likewise.
1329 * z8k-dis.c (print_insn_z8001): Declare return type.
1330 (print_insn_z8002): Likewise.
1331 (unparse_instr): Fix sprintf format strings.
1335 * mips-opc.c: Add "sync.l" and "sync.p".
1339 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
1340 default m68k variant to recognize.
1342 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
1343 (ctrl, cobr, mem, ea): Likewise.
1344 (print_addr): Likewise. Remove cast.
1345 (ea): Cast argument of print_addr to bfd_vma.
1347 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
1349 (cgen_parse_unsigned_integer): Likewise.
1350 (cgen_parse_address): Likewise.
1354 * i960-dis.c (ctrl): Add full braces to structure initialization.
1355 (cobr, mem, reg): Likewise.
1356 (ea): Correct parenthesization in expression.
1358 * cgen-asm.c: Include <ctype.h>.
1359 (build_asm_hash_table): Remove unused local variable i.
1360 (cgen_parse_keyword): Add casts to avoid warnings.
1362 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
1363 symbol. Fix indentation.
1364 (print_insn_little_arm): Likewise.
1368 * configure.in: Use AM_DISABLE_SHARED.
1369 * aclocal.m4, configure: Rebuild with libtool 1.2.
1373 These patches are courtesy of Jonathan Walton and Tony Thompson
1376 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
1379 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
1380 both the offset and the label closest to the destination.
1384 * m32r-opc.h: Regenerate.
1388 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
1392 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
1393 assume that info->symbols is non-empty.
1397 * alpha-opc.c (cvtqs) There is no such thing.
1398 (cvttq): Missing most of the /*d variants.
1402 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
1403 delayed branches or jumps.
1407 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
1409 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
1410 * tic30-dis.c (print_branch): Likewise.
1414 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
1415 saved_symbol code as it is no longer needed.
1419 * cgen-asm.c: Include symcat.h.
1420 * cgen-dis.c,cgen-opc.c: Ditto.
1421 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
1425 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
1429 * m32r-opc.[ch]: Regenerate.
1433 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
1434 arguments. Don't perform validation here.
1435 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
1439 * m32r-opc.c: Regenerate.
1443 * Makefile.am (AUTOMAKE_OPTIONS): Define.
1444 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
1448 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
1452 * configure.in: Get the version number from BFD.
1453 * configure: Rebuild.
1456 * Makefile.am (libopcodes_la_LDFLAGS): Define.
1457 * Makefile.in: Rebuild.
1461 * m32r-opc.c: Regenerate.
1462 * m32r-opc.h: Regenerate.
1466 * m32r-opc.c: Regenerate.
1470 Fix rac to accept only a0:
1471 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
1472 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
1473 Introduce OPERAND_GPR.
1474 * d10v-dis.c (print_operand): Likewise.
1478 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
1479 (cgen_hw_lookup): Make result const.
1480 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1484 * configure, aclocal.m4: Rebuild with new libtool.
1488 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
1489 instructions use a PC relative branch, not absolute.
1493 * configure.in: Set libtool_enable_shared rather than
1494 libtool_shared. Remove diversion hack.
1495 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
1499 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
1500 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1504 * tic30-dis.c: New file.
1505 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
1506 * configure.in: Handle bfd_tic30_arch.
1507 * Makefile.am: Rebuild dependencies.
1508 (CFILES): Add tic30-dis.c
1509 (ALL_MACHINES): Add tic30-dis.lo.
1510 * configure, Makefile.in: Rebuild.
1514 * m32r-opc.h (HAVE_CPU_M32R): Define.
1518 * v850-opc.c (insertion routines): If both alignment and size is
1519 wrong then report this.
1523 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
1524 Only recognize instructions for the current target_processor.
1528 * d10v-dis.c (PC_MASK): Correct value.
1529 (print_operand): If there's a reloc, don't calculate the
1530 address because they could be in different sections.
1534 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
1535 instruction after the 4650's "mul" instruction; nobody's using the
1536 4010 these days. If object files someday indicate which processor
1537 variant they're intended for, we can do a better job at this.
1541 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
1542 table provided entry size. Use CGEN_INSN_MNEMONIC.
1543 (cgen_parse_keyword): Rewrite.
1544 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
1545 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
1546 * cgen-opc.c: Clean up pass over `struct foo' usage.
1547 (cgen_keyword_lookup_value): Handle "" entry.
1548 (cgen_keyword_add): Likewise.
1552 * mips-opc.c: Add FP_D to s.d instruction flags.
1556 * m68k-opc.c (halt, pulse): Enable them on the 68060.
1560 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
1561 PC relative offset forms before the 15 bit forms. An assembler command
1562 line option now chooses the default.
1566 * d30v-opc.c (d30v_opcode_table): Set new flags bits
1567 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
1571 * configure: Only build libopcodes shared if --enable-shared's value
1572 was `yes', or was set to `*opcodes*'.
1573 * aclocal.m4: Likewise.
1574 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
1575 original source of this bit of code. It's not clear what the best fix
1580 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
1581 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
1582 offset forms before the 15 bit forms, to default to the long forms.
1586 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
1590 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
1591 symbol if none is present.
1592 (print_insn_big_arm): Prevent examination of stored symbol if
1597 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
1601 * disassemble.c: Remove disasm_symaddr() function.
1603 * arm-dis.c: Use info->symbol instead of info->flags to determine
1604 if disassmbly should be in Thumb or Arm mode.
1608 * arm-dis.c: Add support for disassembling Thumb opcodes.
1609 (print_insn_thumb): New function.
1611 * disassemble.c (disasm_symaddr): New function.
1613 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
1614 (thumb_opcodes): Table of Thumb opcodes.
1618 * m68k-opc.c (btst): Change Dd@s to Dd;b.
1620 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
1621 and 'v' as operand types.
1625 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
1627 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
1628 which has a two word opcode with a one word argument.
1632 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
1633 unsigned, not signed.
1634 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
1638 * d10v-dis.c (print_operand):
1639 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
1643 * d10v-opc.c (OPERAND_FLAG): Split into:
1644 (OPERAND_FFLAG, OPERAND_CFLAG) .
1650 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
1651 field for all INSN_MACRO's.
1652 * mips16-opc.c: same
1656 * mips-opc.c (sync,cache): These are 3900 insns.
1660 sh-opc.h (sh_table): Remove ftst/nan.
1664 * mips-opc.c (ffc, ffs): Fix mask.
1668 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
1673 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1674 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1678 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1679 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1683 * v850-dis.c (disassemble): Replace // with /* ... */
1687 * sparc-opc.c: Add wr & rd for v9a asr's.
1688 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
1689 (v9a_asr_reg_names): New variable.
1694 * sparc-opc.c (v9notv9a): New insn type.
1695 (IMPDEP): Move to the end to not conflict with edge8 et al.
1700 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
1704 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
1708 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
1709 of disassemble_info structure to determine if an overlay address
1710 has a matching symbol in low memory.
1712 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
1713 new symbol_at_address_func field in disassemble_info structure.
1717 * v850-opc.c (extract_d22): Use signed arithmatic.
1721 * mips-opc.c: Three op mult is not an ISA insn.
1725 * mips-opc.c: Fix formatting.
1729 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
1730 than assuming that char is signed. Explicitly sign extend 16 bit
1731 values, rather than assuming that short is 16 bits.
1732 (OP_sI, OP_J, OP_DIR): Likewise.
1736 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
1741 * v850-opc.c: Fix typo in comment.
1743 * v850-dis.c (disassemble): Add test of processor type when
1744 determining opcodes.
1748 * configure.in: Use a diversion to set enable_shared before the
1749 arguments are parsed.
1750 * configure: Rebuild.
1754 * m68k-opc.c (TBL1): Use ! rather than `.
1755 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
1759 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
1761 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
1763 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
1766 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
1767 * aclocal.m4: Rebuild with new libtool.
1768 * configure: Rebuild.
1772 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
1776 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
1780 * v850-opc.c (v850_opcodes): Further rearrangements.
1784 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
1788 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
1793 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
1797 * v850-opc.c: Initialise processors field of v850_opcode structure.
1801 Merge changes from Martin Hunt:
1803 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
1805 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
1806 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
1807 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
1809 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
1811 * d30v-dis.c (print_insn): First operand of d*i (delayed
1812 branch) instructions is relative.
1814 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
1815 (d30v_operand_table): Add IMM6S3 type.
1816 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
1818 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
1819 and cmp instructions.
1821 * d30v-opc.c: Correct entries for repeat*, and sat*.
1822 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
1823 types. Correct several formats.
1825 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
1827 * d30v-opc.c (pre_defined_registers): Change control registers.
1829 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
1830 SHORT_C2. Manual was incorrect.
1832 * d30v-dis.c (lookup_opcode): Return value now indicates
1833 if an opcode has a short and a long form. Used for deciding
1834 to append a ".s" or ".l".
1835 (print_insn): Append a ".s" to an instruction if it is
1836 the short form and ".l" if it is a long form. Do not append
1837 anything if the instruction has only one possible size.
1839 * d30v-opc.c: Change mulx2h to require an even register.
1840 New form: SHORT_A2; a SHORT_A form that needs an even
1841 register as the first operand.
1843 * d30v-dis.c (print_insn_d30v): Fix problem where the last
1844 instruction was not being disassembled if there were an odd
1845 number of instructions.
1847 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
1851 * v850-dis.c (disassemble): Improved display of register lists.
1855 * sparc-opc.c (sparc_opcodes): Fix assembler args to
1856 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
1857 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
1858 fandnot1s, fandnot2s.
1862 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
1866 * cgen-asm.c (cgen_parse_address): New argument resultp.
1867 All callers updated.
1868 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
1872 * mn10200-dis.c (disassemble): PC relative instructions are
1873 relative to the next instruction, not the current instruction.
1877 * v850-dis.c (disassemble): Only signed extend values that are not
1878 returned by extract functions.
1879 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
1883 * v850-opc.c: Update comments. Remove use of
1884 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
1888 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
1892 * configure: Rebuilt with latest devo autoconf for NT support.
1896 * v850-dis.c (disassemble): Use curly brace syntax for register
1899 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
1900 where r0 is being used as a destination register.
1904 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
1908 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
1912 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
1913 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
1918 * configure (cgen_files): Add support for v850e target.
1919 * configure.in (cgen_files): Add support for v850e target.
1923 * configure (cgen_files): Add support for v850ea target.
1924 * configure.in (cgen_files): Add support for v850ea target.
1928 * configure.in (bfd_arc_arch): Add.
1929 * configure: Rebuild.
1930 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
1931 * Makefile.in: Rebuild.
1932 * arc-dis.c, arc-opc.c: New files.
1933 * disassemble.c (ARCH_all): Define ARCH_arc.
1934 (disassembler): Add ARC support.
1938 * v850-dis.c (disassemble): Add support for v850EA instructions.
1940 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
1941 (v850_opcodes): Add v850EA instructions.
1943 * v850-dis.c (disassemble): Add support for v850E instructions.
1945 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
1946 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
1947 insert_spe, extract_spe): New Functions.
1948 (v850_opcodes): Add v850E instructions.
1950 * v850-opc.c: Reorganised and re-layed out to improve readability
1955 * configure: Rebuild with autoconf 2.12.1.
1959 * aclocal.m4, configure: Rebuild with new automake patches.
1963 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
1964 * acinclude.m4: Just include acinclude.m4 from BFD.
1965 * aclocal.m4, configure: Rebuild.
1969 * Makefile.am: New file, based on old Makefile.in.
1970 * acconfig.h: New file.
1971 * acinclude.m4: New file.
1972 * stamp-h.in: New file.
1973 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
1974 Removed shared library handling; now handled by libtool. Replace
1975 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
1976 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
1977 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
1978 handling in AC_OUTPUT.
1979 * dep-in.sed: Change .o to .lo.
1980 * Makefile.in: Now built with automake.
1981 * aclocal.m4: Now built with aclocal.
1982 * config.in, configure: Rebuild.
1986 * mips-opc.c: Fix typo/thinko in "eret" instruction.
1990 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
1992 * sparc-dis.c (sorted_opcodes): New static local.
1993 (struct opcode_hash): `opcode' is pointer to const element.
1994 (build_hash): First arg is now table of sorted pointers.
1995 (print_insn_sparc): Sort opcodes by sorting table of pointers.
1996 (compare_opcodes): Update.
2000 * cgen-opc.c: #include <ctype.h>.
2001 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
2002 Handle case insensitive hashing.
2003 (hash_keyword_value): Change type of `value' to unsigned int.
2007 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
2008 precision FP, mark it as such. Likewise for double precision
2009 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
2014 * ppc-opc.c (extract_nsi): make unsigned expression signed before
2016 (UNUSED): remove one level of parens, so MSVC doesn't choke on
2017 nesting depth when all the macros are expanded.
2021 * sparc-opc.c: The fcmp v9a instructions take an integer register
2022 as a destination, not a floating point register. From Christian
2027 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
2028 syntax. From Roman Hodek
2031 * i386-dis.c (twobyte_has_modrm): Fix pand.
2035 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
2039 * arm-dis.c: Add prototypes for arm_decode_shift and
2044 * mips-opc.c: Add r3900 insns.
2048 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
2049 print delay slot instructions on the same line. When using a PC
2050 relative load, add a comment with the value being loaded if it can
2055 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
2056 to pushS/popS for segment regs and byte constant so that
2057 pushw/popw printed when in 16 bit data mode.
2059 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
2060 print cbtw, cwtd in 16 bit data mode.
2061 * i386-dis.c (putop): extra case W to support above.
2063 * i386-dis.c (print_insn_x86): print addr32 prefix when given
2064 address size prefix in 16 bit address mode.
2068 * sh-dis.c: Reindent. Rename local variable fprintf to
2073 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
2077 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
2079 * mips16-opc.c (mip16_opcodes): same.
2083 * m68k-opc.c (moveb): Change $d to %d.
2087 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
2088 (twobyte_has_modrm): Likewise.
2090 (OP_MMX, OP_EM, OP_MS): New static functions.
2092 * i386-dis.c: Revert patch of April 4. The output now matches
2097 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
2102 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
2106 * Makefile.in (install): Depend upon installdirs.
2107 (installdirs): New target.
2112 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
2113 * configure: Rebuild.
2117 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
2118 Delete string{,s}.h support.
2122 * cgen-asm.c (cgen_parse_operand_fn): New global.
2123 (cgen_parse_{{,un}signed_integer,address}): Update call to
2124 cgen_parse_operand_fn.
2125 (cgen_init_parse_operand): New function.
2126 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
2127 from cgen_asm_init_parse.
2128 (m32r_cgen_assemble_insn): New operand `errmsg'.
2129 Delete call to as_bad, return error message to caller.
2130 (m32r_cgen_asm_hash_keywords): #if 0 out.
2134 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
2136 [case 'J']: Fix typo in register name.
2140 * configure.in: Substitute SHLIB_LIBS.
2141 * configure: Rebuild.
2142 * Makefile.in (SHLIB_LIBS): New variable.
2143 ($(SHLIB)): Use $(SHLIB_LIBS).
2147 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
2149 * cgen-opc.c (hash_keyword_name): Improve algorithm.
2151 * disassemble.c (disassembler): Handle m32r.
2155 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
2156 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
2157 * Makefile.in (CFILES): Add them.
2158 (ALL_MACHINES): Add them.
2159 (dependencies): Regenerate.
2160 * configure.in (cgen_files): New variable.
2161 (bfd_m32r_arch): Add entry.
2162 * configure: Regenerate.
2166 * configure.in: Correct file names for bfd_mn10[23]00_arch.
2167 * configure: Rebuild.
2169 * Makefile.in: Rebuild dependencies.
2171 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
2173 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
2178 * Branched binutils 2.8.
2182 * m10200-dis.c: Rename from mn10200-dis.c.
2183 * m10200-opc.c: Rename from mn10200-opc.c.
2184 * m10300-dis.c: Rename from mn10300-dis.c
2185 * m10300-opc.c: Rename from mn10300-opc.c.
2186 * Makefile.in: Update accordingly.
2188 * mips16-opc.c: Add mul and dmul macros.
2192 * makefile.vms: Update CFLAGS, add clean target.
2196 * mips-opc.c: Add "wait". From Ralf Baechle
2199 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
2200 * configure, config.in: Rebuild.
2201 * sysdep.h: Include <stdlib.h> if it exists.
2202 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
2204 * Makefile.in: Rebuild dependencies.
2208 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
2211 * mips-opc.c: Add cast when setting mips_opcodes.
2215 * v850-dis.c (disassemble): Fix sign extension problem.
2216 * v850-opc.c (extract_d*): Fix sign extension problems to make
2217 disassembly calculate branch offsets correctly.
2221 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
2223 * mips-opc.c: Add dctr and dctw.
2227 * d30v-dis.c (print_insn): Change the way signed constants
2232 * Makefile.in (BFD_H): New variable.
2233 (HFILES): New variable.
2234 (CFILES): Add all C files.
2235 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
2236 Delete old dependencies, and build new ones.
2237 * dep-in.sed: New file.
2241 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
2245 * mn10200-opc.c: Change "trap" to "syscall".
2246 * mn10300-opc.c: Add new "syscall" instruction.
2250 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
2251 mulul insns on the coldfire.
2255 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
2256 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
2257 (print_insn_little_arm): Likewise.
2262 * i386-dis.c (fetch_data): Add prototype.
2263 * m68k-dis.c (fetch_data): Add prototype.
2264 (dummy_print_address): Add prototype. Make static.
2265 * ppc-opc.c (valid_bo): Add prototype.
2266 * sparc-dis.c (build_hash_table): Add prototype.
2267 (is_delayed_branch, compute_arch_mask): Add prototypes.
2268 (print_insn_sparc): Make several local variables const.
2269 (compare_opcodes): Change arguments to const PTR. Add prototype.
2270 * sparc-opc.c (arg): Change name field to be const.
2271 (lookup_name, lookup_value): Add prototypes. Change table and
2272 name parameters to be const.
2273 (sparc_encode_asi): Change name parameter to be const.
2274 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
2275 (sparc_encode_sparclet_cpreg): Likewise.
2276 (sparc_decode_asi): Change return type to be const.
2277 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
2278 (sparc_decode_sparclet_cpreg): Likewise.
2282 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
2283 Solaris doesn't like the combined options, and the -f is
2285 (stamp-tshlink, install): Likewise.
2289 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
2294 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
2298 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
2303 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
2307 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
2311 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
2315 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
2316 floatformat_to_double to make portable.
2317 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
2322 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
2323 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
2327 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
2328 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
2332 * tic80-opc.c (LSI_SCALED): Renamed from this ...
2333 (OFF_SL_BR_SCALED): ... to this, and added the flag
2334 TIC80_OPERAND_BASEREL to the flags word.
2335 (tic80_opcodes): Replace all occurances of LSI_SCALED with
2340 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
2341 Change mips_opcodes from const array to a pointer,
2342 and change bfd_mips_num_opcodes from const int to int,
2343 so that we can increase the size of the mips opcodes table
2348 * tic80-opc.c (tic80_predefined_symbols): Revert change to
2349 store BITNUM values in the table in one's complement form
2350 to match behavior when assembler is given a raw numeric
2351 value for a BITNUM operand.
2352 * tic80-dis.c (print_operand_bitnum): Ditto.
2356 * d30v-opc.c: Removed references to FLAG_X.
2360 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
2364 * Makefile.in: Added d30v object files.
2365 * configure: (bfd_d30v_arch) Rebuilt.
2366 * configure.in: (bfd_d30v_arch) Added new case.
2367 * d30v-dis.c: New file.
2368 * d30v-opc.c: New file.
2369 * disassemble.c (disassembler) Add entry for d30v.
2373 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
2374 representations for the floating point BITNUM values.
2378 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
2379 in the table in one's complement form, as they appear in the
2381 (tic80_symbol_to_value): Use macros to access predefined
2383 (tic80_value_to_symbol): Ditto.
2384 (tic80_next_predefined_symbol): New function.
2385 * tic80-dis.c (print_operand_bitnum): Remove code that did
2386 one's complement for BITNUM values.
2390 * makefile.vms: Remove 8 bit characters. Update to latest
2395 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
2399 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
2400 (IMM24_PCREL): Likewise.
2404 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
2405 address for an extended PC relative instruction that is not a
2410 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
2415 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
2416 (tic80_opcodes): Sort entries so that long immediate forms
2417 come after short immediate forms, making it easier for
2418 assembler to select the right one for a given operand.
2422 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
2424 (print_insn_mips16): Likewise.
2428 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
2429 a symbol class that restricts translation to just that
2430 class (general register, condition code, etc).
2434 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
2435 and REG_DEST_E for register operands that have to be
2436 an even numbered register. Add REG_FPA for operands that
2437 are one of the floating point accumulator registers.
2438 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
2439 (tic80_opcodes): Change entries that need even numbered
2440 register operands to use the new operand table entries.
2441 Add "or" entries that are identical to "or.tt" entries.
2445 * mips16-opc.c: Add new cases of exit instruction for
2447 * mips-dis.c (print_mips16_insn_arg): Display floating point
2448 registers in operands of exit instruction. Print `$' before
2449 register names in operands of entry and exit instructions.
2453 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
2454 pairs for all predefined symbols recognized by the assembler.
2455 Also used by the disassembling routines.
2456 (tic80_symbol_to_value): New function.
2457 (tic80_value_to_symbol): New function.
2458 * tic80-dis.c (print_operand_control_register,
2459 print_operand_condition_code, print_operand_bitnum):
2460 Remove private tables and use tic80_value_to_symbol function.
2464 * d10v-dis.c (print_operand): Change address printing
2465 to correctly handle PC wrapping. Fixes PR11490.
2469 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
2474 * mips-dis.c (print_insn_mips16): Set insn_info information.
2475 (print_mips16_insn_arg): Likewise.
2477 * mips-dis.c (print_insn_mips16): Better handling of an extend
2478 opcode followed by an instruction which can not be extended.
2482 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
2483 coldfire moveb instruction to not allow an address register as
2484 destination. Although the documentation does not indicate that
2485 this is invalid, experiments uncovered unexpected behavior.
2486 Added a comment explaining the situation. Thanks to Andreas
2487 Schwab for pointing this out to me.
2491 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
2492 entries are presorted so that entries with the same mnemonic are
2493 adjacent to each other in the table. Sort the entries for each
2494 instruction so that this is true.
2498 * m68k-dis.c: Include <libiberty.h>.
2499 (print_insn_m68k): Sort the opcode table on the most significant
2500 nibble of the opcode.
2504 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
2505 "vsub", "vst", "xnor", and "xor" instructions.
2506 (V_a1): Renamed from V_a, msb of accumulator reg number.
2507 (V_a0): Add macro, lsb of accumulator reg number.
2511 * tic80-dis.c (print_insn_tic80): Broke excessively long
2512 function up into several smaller ones and arranged for
2513 the instruction printing function to be callable recursively
2514 to print vector instructions that have both a load and a
2515 math instruction packed into a single opcode.
2516 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
2517 to explain why it comes after the other vector opcodes.
2521 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
2522 move insns to handle immediate operands.
2526 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
2527 fix operand mask in the "moveml" entries for the coldfire.
2531 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
2532 New macros for building vector instruction opcodes.
2533 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
2534 FMT_LI, which were unused. The field is now a flags field.
2535 Remove some opcodes that are possible, but illegal, such
2536 as long immediate instructions with doubles for immediate
2537 values. Add "vadd" and "vld" instructions.
2541 * tic80-opc.c (tic80_operands): Reorder some table entries to make
2542 the order more logical. Move the shift alias instructions ("rotl",
2543 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
2544 interspersed with the regular sr.x and sl.x instructions. Add
2545 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
2546 "sub", "subu", "swcr", and "trap".
2550 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
2551 (OFF_SL_PC): Renamed from OFF_SL.
2552 (OFF_SS_BR): New operand type for base relative operand.
2553 (OFF_SL_BR): New operand type for base relative operand.
2554 (REG_BASE): New operand type for base register operand.
2555 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
2556 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
2557 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
2559 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
2560 10 char field, padded with spaces on rhs, rather than a string
2561 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
2562 than old TIC80_OPERAND_RELATIVE. Add support for new
2563 TIC80_OPERAND_BASEREL flag bit.
2567 * tic80-dis.c (print_insn_tic80): Print floating point operands
2569 * tic80-opc.c (SPFI): Add single precision floating point
2570 immediate operand type.
2571 (ROTATE): Add rotate operand type for shifts.
2572 (ENDMASK): Add for shifts.
2573 (n): Macro for the 'n' bit.
2574 (i): Macro for the 'i' bit.
2575 (PD): Macro for the 'PD' field.
2576 (P2): Macro for the 'P2' field.
2577 (P1): Macro for the 'P1' field.
2578 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
2583 * mn10200-dis.c (disassemble): Mask off unwanted bits after
2584 adding in current address for pc-relative operands.
2588 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
2589 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
2590 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
2591 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
2592 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
2593 REG_BASE_M_SI, REG_BASE_M_LI respectively.
2594 (REG_SCALED, LSI_SCALED): New operand types.
2595 (E): New macro for 'E' bit at bit 27.
2596 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
2597 opcodes, including the various size flavors (b,h,w,d) for
2598 the direct load and store instructions.
2602 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
2604 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
2605 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
2606 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
2607 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
2608 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
2609 masks with "MASK_* & ~M_*" to get the M bit reset.
2610 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
2614 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
2615 correctly. Add support for printing TIC80_OPERAND_BITNUM and
2616 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
2618 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
2619 CC, SICR, and LICR table entries.
2620 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
2621 "bcnd", and "brcr" opcodes.
2625 * ppc-opc.c (powerpc_operands): Make comment match the
2626 actual fields (no shift field).
2627 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
2628 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
2629 partial implementation, work in progress.
2630 * tic80-opc.c (tic80_operands): Begin construction operands table.
2631 (tic80_opcodes): Continue populating opcodes table and start
2632 filling in the operand indices.
2633 (tic80_num_opcodes): Add this.
2637 * m68k-opc.c: Add #B case for moveq.
2641 * mn10300-dis.c (disassemble): Make sure all variables are initialized
2642 before they are used.
2646 * v850-opc.c (v850_opcodes): Put curly-braces around operands
2647 for "breakpoint" instruction.
2651 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
2652 (dep): Use ALL_CFLAGS rather than CFLAGS.
2656 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
2661 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
2662 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
2666 * mips16-opc.c: Add "abs".
2670 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
2671 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
2672 (disassembler): Add bfd_arch_tic80 support to set disassemble
2673 to print_insn_tic80.
2674 * tic80-dis.c (print_insn_tic80): Add stub.
2678 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
2679 * configure: Regenerate with autoconf.
2680 * tic80-dis.c: Add file.
2681 * tic80-opc.c: Add file.
2685 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
2689 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
2690 (mn10200_opcodes): Use it for some logicals and btst insns.
2691 Add "break" and "trap" instructions.
2693 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
2695 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
2699 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
2700 relative load or add now depends upon whether the instruction is
2705 * mn10200-dis.c: Finish writing disassembler.
2706 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
2707 Fix mask for "jmp (an)".
2709 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
2710 handle endianness issues for mn10300.
2712 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
2716 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
2717 instruction. Fix opcode field for "movb (imm24),dn".
2719 * mn10200-opc.c (mn10200_operands): Fix insertion position
2724 * mn10200-opc.c: Create mn10200 opcode table.
2725 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
2726 but moving along nicely.
2730 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
2734 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
2735 specifiers for fmovem* instructions.
2739 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
2743 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
2748 * mn10300-opc.c: Add some comments explaining the various
2751 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
2755 * m68k-dis.c (print_insn_arg): Handle new < and > operand
2758 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2759 operand specifiers in fmovm* instructions.
2763 * ppc-opc.c (insert_li): Give an error if the offset has the two
2764 least significant bits set.
2768 * mips-dis.c (print_insn_mips16): Separate the instruction from
2769 the arguments with a tab, not a space.
2773 * mn10300-dis.c (disasemble): Finish conversion to '$' as
2776 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
2781 * configure: Rebuild with autoconf 2.12.
2783 Add support for mips16 (16 bit MIPS implementation):
2784 * mips16-opc.c: New file.
2785 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
2786 (mips16_reg_names): New static array.
2787 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
2788 after seeing a 16 bit symbol.
2789 (print_insn_little_mips): Likewise.
2790 (print_insn_mips16): New static function.
2791 (print_mips16_insn_arg): New static function.
2792 * mips-opc.c: Add jalx instruction.
2793 * Makefile.in (mips16-opc.o): New target.
2794 * configure.in: Use mips16-opc.o for bfd_mips_arch.
2795 * configure: Rebuild.
2799 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2800 operand specifiers in *save, *restore and movem* instructions.
2802 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
2805 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
2806 register operands for immediate arithmetic, not, neg, negx, and
2807 set according to condition instructions.
2809 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
2810 specifier of the effective-address operand in immediate forms of
2811 arithmetic instructions. The specifier for the immediate operand
2812 notes how and where the constant will be stored.
2816 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
2819 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
2822 * mn10300-dis.c (disassemble): Prefix registers with '%'.
2826 * mn10300-dis.c (disassemble): Handle register lists.
2828 * mn10300-opc.c: Fix handling of register list operand for
2829 "call", "ret", and "rets" instructions.
2831 * mn10300-dis.c (disassemble): Print PC-relative and memory
2832 addresses symbolically if possible.
2833 * mn10300-opc.c: Distinguish between absolute memory addresses,
2834 pc-relative offsets & random immediates.
2836 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
2838 (disassemble): Handle SPLIT and EXTENDED operands.
2842 * mn10300-dis.c: Rough cut at printing some operands.
2844 * mn10300-dis.c: Start working on disassembler support.
2845 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
2847 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
2849 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
2853 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
2857 * mn10300-opc.c (mn10300_opcodes): Demand parens around
2858 register argument is calls and jmp instructions.
2862 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
2863 getx operand. Fix opcode for mulqu imm,dn.
2867 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
2868 in MN10300_OPERAND_SPLIT operands for how many bits
2869 appear in the basic insn word. Add IMM32_HIGH24,
2870 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
2871 (mn10300_opcodes): Use new operands as needed.
2873 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
2874 for bset, bclr, btst instructions.
2875 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
2877 * mn10300-opc.c (mn10300_operands): Remove many redundant
2878 operands. Update opcode table as appropriate.
2879 (IMM32): Add MN10300_OPERAND_SPLIT flag.
2880 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
2884 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
2885 operands (for indexed load/stores). Fix bitpos for DI
2886 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
2887 few instructions that insert immediates/displacements in the
2888 middle of the instruction. Add IMM8E for 8 bit immediate in
2889 the extended part of an instruction.
2890 (mn10300_operands): Use new opcodes as appropriate.
2894 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
2895 sequential so the assembler never parallelizes it with
2900 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
2901 a data/address register that appears in register field 0
2902 and register field 1.
2903 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
2907 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
2908 standard disassembly.
2910 * alpha-opc.c (alpha_operands): Rearrange flags slot.
2911 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
2912 Recategorize PALcode instructions.
2916 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
2920 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
2921 there are no operand types.
2925 * v850-opc.c (D9_RELAX): Renamed from D9, all references
2927 (v850_operands): Make sure D22 immediately follows D9_RELAX.
2931 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
2935 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
2936 and sst.w instructions.
2938 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
2943 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
2948 * ppc-opc.c (PPCPWR2): Define.
2949 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
2954 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
2955 field for movhu instruction.
2957 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
2958 cast value to "long" not "signed long" to keep hpux10
2963 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
2966 * mn10300-opc.c (FMT*): Remove definitions.
2968 * mn10300-opc.c (mn10300_opcodes): Fix destination register
2969 for shift-by-register opcodes.
2971 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
2972 into [AD][MN][01] for encoding the position of the register
2977 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
2978 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
2982 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
2983 Fix various typos. Add "PAREN" operand.
2984 (MEM, MEM2): Define.
2985 (mn10300_opcodes): Surround all memory addresses with "PAREN"
2986 operands. Fix several typos.
2988 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
2993 * mn10300-opc.c (FMT_XX): Renumber starting at one.
2994 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
2996 (mn10300_opcodes): Break opcode format out into its own field.
2997 Update many operand fields to deal with signed vs unsigned
2998 issues. Fix one or two typos in the "mov" instruction
2999 opcode, mask and/or operand fields.
3003 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
3004 m68851 wasn't reset.
3008 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
3009 all opcodes. Very rough cut at operands for all opcodes.
3011 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
3016 * mn10200-opc.c, mn10300-opc.c: New files.
3017 * mn10200-dis.c, mn10300-dis.c: New files.
3018 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
3019 * disassemble.c: Break mn10x00 support into 10200 and 10300
3021 * configure.in: Likewise.
3022 * configure: Rebuilt.
3026 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
3030 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
3032 * disassemble (ARCH_mn10x00): Define.
3033 (disassembler): Handle bfd_arch_mn10x00.
3034 * configure.in: Recognize bfd_mn10x00_arch.
3035 * configure: Rebuilt.
3039 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
3040 accordingly. Don't declare functions using op_rtn.
3044 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
3045 params to be more standard.
3046 * (disassemble): Print absolute addresses and symbolic names for
3047 branch and jump targets.
3048 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
3050 * (v850_opcodes): Add breakpoint insn.
3054 * m68k-opc.c: Move the fmovemx data register cases before the
3055 other cases, so that they get recognized before the data register
3056 does gets treated as a degenerate register list.
3060 * mips-opc.c: Add a case for "div" and "divu" with two registers
3061 and a destination of $0.
3065 * mips-dis.c (print_insn_arg): Add prototype.
3066 (_print_insn_mips): Ditto.
3070 * mips-dis.c (print_insn_arg): Print condition code registers as
3075 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
3079 * v850-dis.c (disassemble): Make static. Provide prototype.
3083 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
3088 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
3089 ']' characters into the output stream.
3090 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
3091 Add "memop" field to all opcodes (for the disassembler).
3092 Reorder opcodes so that "nop" comes before "mov" and "jr"
3093 comes before "jarl".
3095 * v850-dis.c (print_insn_v850): Fix typo in last change.
3097 * v850-dis.c (print_insn_v850): Properly handle disassembling
3098 a two byte insn at the end of a memory region when the memory
3099 region's size is only two byte aligned.
3101 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
3103 * v850-dis.c (v850_reg_names): Define.
3104 (v850_sreg_names, v850_cc_names): Likewise.
3105 (disassemble): Very rough cut at printing operands (unformatted).
3107 * v850-opc.c (BOP_MASK): Fix.
3108 (v850_opcodes): Fix mask for jarl and jr.
3110 * v850-dis.c: New file. Skeleton for disassembler support.
3111 * Makefile.in Remove v850 references, they're not needed here.
3112 * configure.in: Add v850-dis.o when building v850 toolchains.
3113 * configure: Rebuilt.
3114 * disassemble.c (disassembler): Call v850 disassembler.
3116 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
3117 (insert_d8_6, extract_d8_6): New functions.
3118 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
3119 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
3121 (IF4A, IF4B): Use "D7" instead of "D7S".
3122 (IF4C, IF4D): Use "D8_7" instead of "D8".
3123 (IF4E, IF4F): New. Use "D8_6".
3124 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
3125 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
3127 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
3128 (v850_operands): Change D16 to D16_15, use special insert/extract
3129 routines. New new D16 that uses the generic insert/extract code.
3130 (IF7A, IF7B): Use D16_15.
3131 (IF7C, IF7D): New. Use D16.
3132 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
3134 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
3135 message. Issue an error if the branch offset is odd.
3137 * v850-opc.c: Add notes about needing special insert/extract
3138 for all the load/store insns, except "ld.b" and "st.b".
3140 * v850-opc.c (insert_d22, extract_d22): New functions.
3141 (v850_operands): Use insert_d22 and extract_d22 for
3143 (insert_d9): Fix range check.
3147 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
3148 and set bits field to D9 and D22 operands.
3152 * v850-opc.c (v850_operands): Define SR2 operand.
3153 (v850_opcodes): "ldsr" uses R1,SR2.
3155 * v850-opc.c (v850_opcodes): Fix opcode specs for
3156 sld.w, sst.b, sst.h, sst.w, and nop.
3160 * v850-opc.c (v850_opcodes): Add null opcode to mark the
3161 end of the opcode table.
3165 * d10v-opc.c (pre_defined_registers): Added register pairs,
3166 "r0-r1", "r2-r3", etc.
3170 * v850-opc.c (v850_operands): Make I16 be a signed operand.
3171 Create I16U for an unsigned 16bit mmediate operand.
3172 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
3174 * v850-opc.c (v850_operands): Define EP operand.
3175 (IF4A, IF4B, IF4C, IF4D): Use EP.
3177 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
3178 with immediate operand, "movhi". Tweak "ldsr".
3180 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
3181 correct. Get sld.[bhw] and sst.[bhw] closer.
3183 * v850-opc.c (v850_operands): "not" is a two byte insn
3185 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
3187 * v850-opc.c (v850_operands): D16 inserts at offset 16!
3189 * v850-opc.c (two): Get order of words correct.
3191 * v850-opc.c (v850_operands): I16 inserts at offset 16!
3193 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
3194 register source and destination operands.
3195 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
3197 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
3198 same thinko in "trap" opcode.
3200 * v850-opc.c (v850_opcodes): Add initializer for size field
3203 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
3204 Add D8 for 8-bit unsigned field in short load/store insns.
3205 (IF4A, IF4D): These both need two registers.
3206 (IF4C, IF4D): Define. Use 8-bit unsigned field.
3207 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
3208 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
3209 for "ldsr" and "stsr".
3210 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
3213 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
3214 short store word (sst.w).
3218 * v850-opc.c (v850_operands): Added insert and extract fields,
3219 pointers to functions that handle unusual operand encodings.
3223 * v850-opc.c (v850_opcodes): Enable "trap".
3225 * v850-opc.c (v850_opcodes): Fix order of displacement
3226 and register for "set1", "clr1", "not1", and "tst1".
3230 * v850-opc.c (v850_operands): Add "B3" support.
3231 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
3234 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
3236 * v850-opc.c: Close unterminated comment.
3240 * v850-opc.c (v850_operands): Add flags field.
3241 (v850_opcodes): add move opcodes.
3245 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
3246 * configure: (bfd_v850v_arch) Add new case.
3247 * configure.in: (bfd_v850_arch) Add new case.
3248 * v850-opc.c: New file.
3252 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
3256 * d10v-opc.c: Add additional information to the opcode
3257 table to help determinine which instructions can be done
3262 * mpw-make.sed: Update editing of include pathnames to be
3267 * arm-opc.h: Added "bx" instruction definition.
3271 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
3275 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
3279 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
3283 * makefile.vms: Update for alpha-opc changes.
3287 * i386-dis.c (print_insn_i386): Actually return the correct value.
3288 (ONE, OP_ONE): #ifdef out; not used.
3292 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
3293 Changed subi operand type to treat 0 as 16.
3297 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
3302 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
3303 memory transfer instructions. Add new format string entries %h and %s.
3304 * arm-dis.c: (print_insn_arm): Provide decoding of the new
3309 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
3310 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
3314 * alpha-dis.c (print_insn_alpha_osf): Remove.
3315 (print_insn_alpha_vms): Remove.
3316 (print_insn_alpha): Make globally visible. Chose the register
3317 names based on info->flavour.
3318 * disassemble.c: Always return print_insn_alpha for the alpha.
3322 * d10v-dis.c (dis_long): Handle unknown opcodes.
3326 * d10v-opc.c: Changes to support signed and unsigned numbers.
3327 All instructions with the same name that have long and short forms
3328 now end in ".l" or ".s". Divs added.
3329 * d10v-dis.c: Changes to support signed and unsigned numbers.
3333 * d10v-dis.c: Change all functions to use info->print_address_func.
3337 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
3338 move ccr/sr insns more strict so that the disassembler only
3339 selects them when the addressing mode is data register.
3342 * d10v-opc.c (pre_defined_registers): Declare.
3343 * d10v-dis.c (print_operand): Now uses pre_defined_registers
3344 to pick a better name for the registers.
3348 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
3349 operands for fexpand and fpmerge. From Christian Kuehnke
3354 * alpha-dis.c (print_insn_alpha): No longer the user-visible
3355 print routine. Take new regnames and cpumask arguments.
3356 Kill the environment variable nonsense.
3357 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
3358 (print_insn_alpha_vms): New function. Do VMS style regnames.
3359 * disassemble.c (disassembler): Test bfd flavour to pick
3360 between OSF and VMS routines. Default to OSF.
3364 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
3365 * configure: Rebuild.
3366 * Makefile.in (install): Use @INSTALL_SHLIB@.
3370 * configure: (bfd_d10v_arch) Add new case.
3371 * configure.in: (bfd_d10v_arch) Add new case.
3372 * d10v-dis.c: New file.
3373 * d10v-opc.c: New file.
3374 * disassemble.c (disassembler) Add entry for d10v.
3378 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
3379 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
3383 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
3384 distinguish between variants of the instruction set.
3385 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
3386 distinguish between variants of the instruction set.
3390 * i386-dis.c (print_insn_i8086): New routine to disassemble using
3391 the 8086 instruction set.
3392 * i386-dis.c: General cleanups. Make most things static. Add
3393 prototypes. Get rid of static variables aflags and dflags. Pass
3394 them as args (to almost everything).
3398 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
3400 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
3402 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
3403 if the next arg is marked with SRC_IN_DST. Gross.
3405 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
3406 we're looking for and find EXR.
3408 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
3409 if we're looking for KBIT and we don't find it.
3411 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
3414 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
3415 3bit immediate operands.
3419 * Released binutils 2.7.
3421 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
3426 * alpha-opc.c: Correct second case of "mov" to use OPRL.
3430 * sparc-dis.c (print_insn_sparclite): New routine to print
3431 sparclite instructions.
3435 * m68k-opc.c (m68k_opcodes): Add coldfire support.
3439 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
3440 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
3441 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
3445 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
3446 Use autoconf-set values.
3447 (docdir, oldincludedir): Removed.
3448 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3452 * alpha-opc.c: New file.
3453 * alpha-opc.h: Remove.
3454 * alpha-dis.c: Complete rewrite to use new opcode table.
3455 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
3456 * configure: Rebuild with autoconf 2.10.
3457 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
3458 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
3460 (alpha-opc.o): New target.
3464 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
3465 Set imm_added_to_rs1 even if the source and destination register
3468 * sparc-opc.c: Add some two operand forms of the wr instruction.
3472 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
3475 * disassemble.c (disassembler): Handle H8/S.
3476 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
3480 * sparc-opc.c: Add beq/teq as aliases for be/te.
3482 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
3487 * makefile.vms: New file.
3489 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
3493 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
3498 * i386-dis.c (OP_OFF): Call append_prefix.
3502 * ppc-opc.c (instruction encoding macros): Add explicit casts to
3503 unsigned long to silence a warning from the Solaris PowerPC
3508 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
3512 * sparc-dis.c (X_IMM,X_SIMM): New macros.
3514 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
3515 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
3516 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
3517 cpush, cpusha, cpull sparclet insns.
3521 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
3525 * sparc-opc.c: Set F_FBR on floating point branch instructions.
3526 Set F_FLOAT on other floating point instructions.
3530 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
3532 (powerpc_opcodes): Add 860/821 specific SPRs.
3536 * configure.in: Permit --enable-shared to specify a list of
3537 directories. Set and substitute BFD_PICLIST.
3538 * configure: Rebuild.
3539 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
3540 uses. Set to @BFD_PICLIST@.
3544 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
3545 not "abs", which may be needed for the absolute in something
3546 like btst #0,@10:8. Print L_3 immediates separately from other
3547 immediates. Change ABSMOV reference to ABS8MEM.
3551 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
3552 (current_arch_mask): New static global.
3553 (compute_arch_mask): New static function.
3554 (print_insn_sparc): Delete sparc_v9_p. New static local
3555 current_mach. Resort opcode table if current_mach changes.
3556 Generalize "insn not supported" test.
3557 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
3558 Delete test for v9/!v9.
3559 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
3561 (brfc): Split into CBR and FBR for coprocessor/fp branches.
3562 (brfcx): Renamed to FBRX.
3563 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
3564 coprocessor mnemonics are not supported on the sparclet).
3565 (condf): Renamed to CONDF.
3566 (SLCBCC2): Delete F_ALIAS flag.
3570 * sparc-opc.c (sparc_opcodes): rd must be 0 for
3571 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
3575 * Makefile.in (config.status): Depend upon BFD VERSION file, so
3576 that the shared library version number is set correctly.
3580 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
3582 * configure: Rebuild.
3586 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
3591 * configure: Rebuild with autoconf 2.8.
3595 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
3596 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
3600 * configure.in: Don't set SHLIB or SHLINK to an empty string,
3601 since they appear as targets in Makefile.in.
3602 * configure: Rebuild.
3606 * mpw-make.sed: Edit out shared library support bits.
3610 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
3611 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
3612 (sparc_opcodes): Add sparclet insns.
3613 (sparclet_cpreg_table): New static local.
3614 (sparc_{encode,decode}_sparclet_cpreg): New functions.
3615 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
3619 * i386-dis.c (index16): New static variable.
3620 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
3622 (OP_indirE): Return result of OP_E.
3623 (OP_E): Check for 16 bit addressing mode, and disassemble
3624 correctly. Optimised 32 bit case a little. Don't print
3625 "(base,index,scale)" when sib specifies only an offset.
3629 * configure.in: Set and substitute SHLIB_DEP.
3630 * configure: Rebuild.
3631 * Makefile.in (SHLIB_DEP): New variable.
3632 (LIBIBERTY_LISTS, BFD_LIST): New variables.
3633 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
3634 COMMON_SHLIB, add them to piclist with appropriate modifications.
3635 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
3636 here: just use piclist.
3640 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
3641 (print_insn_sparc): Rewrite v9/not-v9 tests.
3642 (compare_opcodes): Likewise.
3643 * sparc-opc.c (MASK_<ARCH>): Define.
3644 (v6,v7,v8,sparclite,v9,v9a): Redefine.
3645 (sparclet,v6notv9): Define.
3646 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
3647 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
3651 * configure.in: Call AC_PROG_CC before configure.host.
3652 * configure: Rebuild.
3654 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
3658 * i386-dis.c (onebyte_has_modrm): New static array.
3659 (twobyte_has_modrm): New static array.
3660 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
3664 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
3669 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
3674 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
3675 m68010up, not just m68020up | cpu32.
3677 * Makefile.in (SONAME): New variable.
3678 ($(SHLINK)): Make a link to the transformed name, as well.
3679 (stamp-tshlink): New target.
3680 (install): Skip stamp-tshlink during install.
3684 * configure.in: Call AC_ARG_PROGRAM.
3685 * configure: Rebuild.
3686 * Makefile.in (program_transform_name): New variable.
3687 (install): Transform library name before installing it.
3691 * i960-dis.c (mem): Add HX dcinva instruction.
3693 Support for building as a shared library, based on patches from
3695 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
3696 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
3697 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
3698 * configure: Rebuild.
3699 * Makefile.in (ALLLIBS): New variable.
3700 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
3701 (COMMON_SHLIB, SHLINK): New variables.
3702 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
3703 (STAGESTUFF): Remove variable.
3704 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
3705 (stamp-piclist, piclist): New targets.
3706 ($(SHLIB), $(SHLINK)): New targets.
3707 ($(OFILES)): Depend upon stamp-picdir.
3708 (disassemble.o): Build twice if PICFLAG is set.
3709 (MOSTLYCLEAN): Add pic/*.o.
3710 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
3711 (distclean): Remove pic and stamp-picdir.
3712 (install): Install shared libraries.
3713 (stamp-picdir): New target.
3717 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
3718 Print unknown instruction as "unknown", rather than in hex.
3722 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
3726 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
3730 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
3731 when necessary. From Ulrich Drepper
3736 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
3737 sparc_num_opcodes. Update architecture enum values.
3738 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
3739 (sparc_opcode_lookup_arch): New function.
3740 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
3741 (sparc_opcodes): Add v9a shutdown insn.
3745 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
3746 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
3748 (print_insn_sparc64): Deleted.
3749 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
3752 * sparc-opc.c (architecture_pname): Add v9a.
3756 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
3757 incorrectly defined as 0x16 when it should be 0x15.
3758 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
3759 (alpha_insn_set): added cvtst and cvttq float ops. Also added
3760 excb (exception barrier) which is defined in the Alpha
3761 Architecture Handbook version 2.
3762 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
3763 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
3764 disassembled as or, for example.
3768 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
3769 (_print_insn_mips): Change i from int to unsigned int.
3773 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
3774 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
3778 * i386-dis.c: Added Pentium Pro instructions.
3782 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
3787 * sh-opc.h (sh_nibble_type): Added REG_B.
3788 (sh_arg_type): Added A_REG_B.
3789 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
3791 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
3795 * disassemble.c (disassembler): Use new bfd_big_endian macro.
3799 * Makefile.in (distclean): Remove stamp-h. From Ronald
3805 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
3810 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
3811 (sh_table): Added many SH3 opcodes.
3812 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
3816 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
3817 (subco,subco.): Mark this PPC, not PPCCOM.
3821 * configure: Rebuild with autoconf 2.7.
3825 * configure: Rebuild with autoconf 2.6.
3829 * configure.in: Sort list of architectures. Accept but do nothing
3830 for alliant, convex, pyramid, romp, and tahoe.
3834 * a29k-dis.c (print_special): Change num to unsigned int.
3838 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
3843 * configure.in: Call AC_CHECK_PROG to find and cache AR.
3844 * configure: Rebuilt.
3848 * configure.in: Add case for bfd_i860_arch.
3849 * configure: Rebuild.
3853 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
3854 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
3855 (NEXTDOUBLE): Likewise.
3856 (print_insn_m68k): Don't match fmoveml if there is more than one
3857 register in the list.
3858 (print_insn_arg): Handle a place of '8' for a type of 'L'.
3862 * m68k-opc.c: Use #W rather than #w.
3863 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
3867 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
3868 and likewise for all the dbxx opcodes.
3872 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
3876 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
3877 the VR4100 specific instructions to the mips_opcodes structure.
3881 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
3882 ugly Metrowerks bug in CW6, is fixed in CW7.
3886 * ppc-opc.c (whole file): Add flags for common/any support.
3890 * Makefile.in (BISON): Remove macro.
3891 (FLAGS_TO_PASS): Remove BISON.
3897 * m68k-dis.c (print_insn_m68k): Recognize all two-word
3898 instructions that take no args by looking at the match mask.
3899 (print_insn_arg): Always print "%" before register names.
3900 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
3901 [case '_']: Don't print "@#" before address.
3902 [case 'J']: Use "%s" as format string, not register name.
3903 [case 'B']: Treat place == 'C' like 'l' and 'L'.
3907 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
3914 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
3915 (alpha_insn_set): added definitions for VAX floating point
3916 instructions (Unix compilers don't generate these, but handcoded
3917 assembly might still use them).
3919 * alpha-dis.c (print_insn_alpha): added support for disassembling
3920 the miscellaneous instructions in the Alpha instruction set.
3924 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
3925 no longer create sysdep.h, sed ppc-opc.c to work around a
3926 serious Metrowerks C bug.
3927 * mpw-make.in: Remove.
3928 * mpw-make.sed: New file, used by mpw-configure to edit
3929 Makefile.in into an MPW makefile.
3933 * Makefile.in (maintainer-clean): New synonym for realclean.
3937 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
3938 which use '0', '1', and '2' instead. Specify the proper size for
3939 a pmove immediate operand. Correct the pmovefd patterns to be
3940 moves to a register, not from a register.
3941 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
3945 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
3946 %psr, %wim, %tbr as F_NOTV9.
3950 * Makefile.in (Makefile): Just rebuild Makefile when running
3952 (config.h, stamp-h): New targets.
3953 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
3954 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
3955 rebuilding config.h.
3956 * configure: Rebuild.
3958 * mips-opc.c: Change unaligned loads and stores with "t,A"
3959 operands to use "t,A(b)".
3963 * sh-dis.c (print_insn_shx): Add F_FR0 support.
3967 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
3968 until 3 instead of until 2.
3972 * Makefile.in (ALL_CFLAGS): Define.
3973 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
3974 (MOSTLYCLEAN): Add config.log.
3975 (distclean): Don't remove config.log.
3976 * configure.in: Substitute HDEFINES.
3977 * configure: Rebuild.
3981 * sh-opc.h (sh_arg_type): Add F_FR0.
3982 (sh_table, case fmac): Add F_FR0 as first argument.
3986 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
3990 * sparc-dis.c: Remove all references to NO_V9.
3994 * aclocal.m4: Just include ../bfd/aclocal.m4.
3995 * configure: Rebuild.
3999 * sparc-dis.c (X_DISP19): Define.
4000 (print_insn, case 'G'): Use it.
4001 (print_insn, case 'L'): Sign extend displacement.
4005 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
4006 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
4007 host_makefile_frag or frags.
4008 * aclocal.m4: New file.
4009 * configure: Rebuild.
4010 * Makefile.in (INSTALL): Set to @INSTALL@.
4011 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
4012 (INSTALL_DATA): Set to @INSTALL_DATA@.
4014 (AR_FLAGS): Set to rc rather than qc.
4015 (CC): Define as @CC@.
4016 (CFLAGS): Set to @CFLAGS@.
4017 (@host_makefile_frag@): Remove.
4018 (config.status): Remove dependency upon @frags@.
4020 * configure.in: ../bfd/config.bfd now just sets shell variables.
4021 Use them rather than looking through target Makefile fragments.
4022 * configure: Rebuild.
4026 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
4030 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
4031 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
4034 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
4035 (lookup_{name,value}): New functions.
4036 (prefetch_table): New static local.
4037 (sparc_{encode,decode}_prefetch): New functions.
4038 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
4042 * sh-opc.h: Add blank lines to improve readabililty of sh3e
4047 * sh-dis.c: Correct comment on first line of file.
4051 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
4053 * sparc-opc.c (asi, membar): New static locals.
4054 (sparc_{encode,decode}_{asi,membar}): New functions.
4055 (sparc_opcodes, membar insn): Fix.
4056 * sparc-dis.c (print_insn): Call sparc_decode_asi.
4057 Support decoding of membar masks.
4062 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
4066 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
4067 and likewise for the other branches. Add bhs as an alias for bcc,
4068 and likewise for the size variants. Add dbhs as an alias for
4073 * sh-opc.h (FP sts instructions): Update to match reality.
4077 * m68k-dis.c: (fpcr_names): Add % before all register names.
4078 (reg_names): Likewise.
4079 (print_insn_arg): Don't explicitly print % before register names.
4080 Add % before register names in static array names. In case 'r',
4081 print data registers as `@(Dn)', not `Dn@'. When printing a
4082 memory address, don't print @# before it.
4083 (print_indexed): Change base_disp and outer_disp from int to
4084 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
4085 syntax. Sign extend 8 byte displacement correctly.
4086 (print_base): Print using MIT syntax. Print zpc when appropriate.
4087 Change parameter disp from int to bfd_vma.
4089 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
4094 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
4095 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
4096 * sh-opc.h (sh_arg_type): Add new operand types.
4097 (sh_table): Add new opcodes from SH3E Floating Point ISA.
4101 * Makefile.in (distclean): Remove generated file config.h.
4105 * Makefile.in (distclean): Remove generated file config.h.
4109 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
4111 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
4113 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
4114 rather than numopcodes. Use m68k_opcodes rather than removed
4115 opcode function. Don't check F_ALIAS.
4116 (print_insn_arg): Change first parameter to be const char *.
4117 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
4118 (m68k-opc.o): New target.
4119 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
4120 * configure: Rebuild.
4124 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
4125 (opcode_bits, opcode_hash_table): New variables.
4126 (opcodes_initialized): Renamed from opcodes_sorted.
4127 (build_hash_table): New function.
4128 (is_delayed_branch): Use hash table.
4129 (print_insn): Renamed from print_insn_sparc, made static.
4130 Build and use hash table. If !sparc64, ignore sparc64 insns,
4131 and vice-versa if sparc64.
4132 (print_insn_sparc, print_insn_sparc64): New functions.
4133 (compare_opcodes): Move sparc64 opcodes to end.
4134 Print commutative insns with constant second.
4135 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
4139 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
4140 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
4141 avoids printing a delay slot in a delay slot.
4142 * sh-opc.h (sh_table): Fully bracket last entry.
4146 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
4150 * configure.in: Get host_makefile_frag from ${srcdir}.
4152 * configure.in: Autoconfiscated. Check for string[s].h. Create
4153 config.h from config.in. Don't set up sysdep.h link.
4154 * sysdep.h: New file.
4155 * configure, config.in: New files, generated from configure.in.
4156 * Makefile.in: Updated to be processed autoconf-style.
4157 (distclean): Keep sysdep.h. Remove config.log and config.cache.
4158 (Makefile): Depend on config.status.
4159 (config.status): New rule.
4160 * configure.bat: Update Makefile substitutions.
4164 * mips-opc.c (L1): Define.
4165 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
4166 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
4171 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
4172 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
4173 have multiple add units but only a single logical unit.
4175 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
4176 shifted by 18, without any insertion or extraction function.
4177 (insert_cr, extract_cr): Remove.
4181 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
4186 * mpw-config.in: Add sh and i386 configs, remove sparc config.
4187 * sh-opc.h: Add copyright.
4191 * Makefile.in (crunch-m68k): Delete extra target accidentally
4192 checked in a while ago.
4196 * sh-opc.h (sh_table): Add SH3 support.
4200 * sh-opc.h: Added bsrf and braf.
4204 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
4205 bogus [ls]fm{ea,fd} patterns.
4207 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
4208 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
4209 initialize it from memory. Make function static.
4210 (print_insn_{big,little}_arm): New functions.
4211 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
4212 the correct endianness.
4216 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
4221 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
4222 17th, so that it builds again using GCC as the compiler.
4226 * mips-dis.c (print_insn_little_mips): Cast return value from
4227 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
4228 expects an unsigned long, and that might be fewer words of
4229 argument storage (e.g., if bfd_vma is long long on a 32-bit
4231 (print_insn_big_mips): Likewise with bfd_getb32 value.
4232 (_print_insn_mips): Now static.
4236 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
4237 gcc memory hog problem with initializer is fixed.
4241 Merge in support for Mac MPW as a host.
4242 (Old change descriptions retained for informational value.)
4244 * mpw-config.in (archname): Compute from the config.
4245 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
4247 * mpw-config.in (target_arch): Compute from canonical target.
4248 (m68k, mips, powerpc, sparc): Add architectures.
4249 * mpw-make.in (disassemble.c.o): Add.
4250 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
4252 * mpw-config.in (BFD_MACHINES): Set to a default value.
4253 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
4255 * mpw-make.in (CSEARCH): Add extra-include to search path.
4257 * mpw-config.in (varargs.h): Don't create.
4258 (sysdep.h): Create using forward-include.
4259 * mpw-make.in (CSEARCH): Add include/mpw to search path.
4261 * mpw-config.in: New file, MPW version of configure.in.
4262 * mpw-make.in: New file, MPW version of Makefile.in.
4266 * alpha-dis.c (print_insn_alpha): Put empty statement after
4271 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
4272 (low_sign_extend): Likewise.
4273 (get_field): Delete unused function.
4274 (set_field, deposit_14, deposit_21): Likewise.
4278 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
4285 * alpha-opc.h (OSF_ASMCODE): define
4286 print pal-code names as defined in App C of the
4287 Alpha Architecture Reference Manual
4289 * alpha-dis.c: cleaned up output
4290 print stylized code forms as defined in App A.4.3 of the
4291 Alpha Architecture Reference Manual
4295 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
4297 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
4302 * m68k-dis.c (opcode): New function. Returns address of opcode
4303 table entry given index, even if the opcode table was split to
4304 work around gcc bugs.
4305 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
4307 (BREAK_UP_BIG_DECL): Make secondary array static and const.
4308 (reg_names): Now const.
4309 (print_insn_arg): Arrays cacheFieldName and names now const.
4310 (print_indexed): Array scales now const.
4314 * ppc-opc.c: Sort recently added instructions by minor opcode
4315 number within major opcode number.
4319 * hppa-dis.c: Include libhppa.h.
4323 * mips-opc.c: Change dli to use M_DLI, and add dla.
4327 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
4331 * mips-opc.c: Add r4650 mul instruction.
4335 * mips-opc.c: Add uld and usd macros for unaligned double load and
4340 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
4341 mfdcr, mtdcr, icbt, iccci.
4345 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
4346 signed char fields to shorts, more portable.
4350 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
4351 char fields as signed chars, since they may have negative values.
4355 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
4361 * ppc-opc.c (extract_bdm): Correct parenthezisation.
4362 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
4367 * ppc-opc.c: Changes based on patch from David Edelsohn
4369 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
4372 (insert_tbr): New static function.
4373 (extract_tbr): New static function.
4374 (XFXFXM_MASK, XFXM): Define.
4375 (XSPRBAT_MASK, XSPRG_MASK): Define.
4376 (powerpc_opcodes): Add instructions to access special registers by
4377 name. Add mtcr and mftbu.
4381 * mips-opc.c (P3): Define.
4382 (mips_opcodes): Add mad and madu.
4384 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
4386 * configure.in: Add W65 support.
4387 * disassemble.c: Likewise.
4388 * w65-opc.h, w65-dis.c: New files.
4392 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
4397 * mips-opc.c: Add dli as a synonym for li.
4401 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
4402 print something for reserved opcode values, even if it won't
4405 * mips-dis.c (_print_insn_mips): When initializing, shift right
4406 and mask, to avoid sign extension problems on the Alpha.
4408 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
4413 * sh-opc.h (mov.l gbr): Get direction right.
4414 * sh-dis.c (print_insn_shx): New function.
4415 (print_insn_shl, print_insn_sh): Call print_insn_shx to
4416 print opcodes with right byte order.
4420 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
4421 to avoid conflicts with getopt.
4425 * hppa-dis.c (print_insn_hppa): Read the instruction using
4426 bfd_getb32, so that it works on a little endian or 64 bit host.
4427 Remove unused local variable op.
4431 * mips-opc.c: Use or instead of addu for pseudo-op move, since
4432 addu does not work correctly if -mips3.
4436 * a29k-dis.c (print_special): Add special register names defined
4437 on 29030, 29040 and 29050.
4438 (print_insn): Handle new operand type 'I'.
4442 * Makefile.in (INSTALL): Use top level install.sh script.
4446 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
4447 that it works on a little endian host.
4451 * configure.in: Use ${config_shell} when running config.bfd.
4455 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
4459 * a29k-dis.c (print_insn): Print the opcode.
4463 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
4467 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
4471 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
4472 which store a value into memory.
4476 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
4477 * arm-dis.c, arm-opc.h: New files.
4481 * Makefile.in (ns32k-dis.o): Add dependency.
4482 * ns32k-dis.c (print_insn_arg): Declare initialized local as
4483 string, not as array of chars.
4487 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
4489 * sparc-opc.c: Added sparclite extended FP operations, and
4490 versions of v9 impdep* instructions permitting specification of
4495 * i960-dis.c (reg_names): Now const.
4496 (struct sparse_tabent): New type, copied from array type in mem
4498 (ctrl): Local static array ctrl_tab now const.
4499 (cobr): Local static array cobr_tab now const.
4500 (mem): Local variables reg1, reg2, reg3 now point to const. Local
4501 static variable mem_tab no longer explicitly initialized. Changed
4502 mem_init to const array of struct sparse_tabent.
4503 (reg): Local static variable reg_tab no longer explicitly
4504 initialized. Changed reg_init to const array of struct
4506 (ea): Local static array scale_tab now const.
4508 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
4513 * configure.bat: the disassember needs to be enabled for
4514 "objdump -d" to work in djgpp.
4518 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
4519 (invalid_float): Enabled general version, doesn't require running
4520 on ns32k host. Changed to take char* argument, and test for
4521 explicitly specified sizes, instead of using sizeof() on host CPU
4523 (INVALID_FLOAT): Cast first argument.
4524 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
4525 list_P032, list_M032): Now const.
4526 (optlist, list_search): Made appropriate arguments now point to
4528 (print_insn_arg): Changed static array of one-character-string
4529 pointers into a static const array of characters; fixed sprintf
4530 statement accordingly.
4534 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
4535 from distribution. A ns32k-dis.c from a previous distribution has
4536 been brought up to date and supports the new interface.
4538 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
4540 * configure.in: add bfd_ns32k_arch target support.
4542 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
4543 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
4547 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
4552 * h8300-dis.c, mips-dis.c: Don't use true and false.
4556 * configure.in: Change --with-targets to --enable-targets.
4560 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
4561 opcodes to the first instruction with that opcode, to speed
4567 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
4571 * configure.bat: update to latest makefile.in
4575 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
4576 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
4577 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
4578 slot insn is in a delay slot.
4579 * z8k-opc.h: (resflg): Fix patterns.
4580 * h8500-opc.h Fix CR insn patterns.
4584 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
4585 "cmpl" before POWER versions, so that gas -many uses them.
4589 * disassemble.c: New file.
4590 * Makefile.in (OFILES): Add disassemble.o.
4591 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
4592 * configure.in: Define ARCHDEFS in Makefile. Code taken from
4593 binutils/configure.in.
4595 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
4596 opcode being examined.
4600 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
4601 (insert_ral, insert_ram, insert_ras): New functions.
4602 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
4603 RAS for store with update.
4607 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
4612 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
4617 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
4621 * ppc-opc.c (powerpc_operands): The signedp field has been
4622 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
4623 instead. Add new operand SISIGNOPT.
4624 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
4626 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
4631 * i386-dis.c (struct private): Renamed to dis_private. `private'
4632 is a reserved word for dynix cc.
4636 * configure.in: Change error message to refer to bfd/config.bfd
4637 rather than bfd/configure.in.
4641 * ppc-opc.c: Define POWER2 as short alias flag.
4642 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
4647 * i960-dis.c (print_insn_i960): Don't read a second word for
4648 opcodes 0, 1, 2 and 3.
4652 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
4656 * m68881-ext.c: Removed; no longer used.
4657 * Makefile.in: Changed accordingly.
4659 * m68k-dis.c (ext_format_68881): Don't declare.
4660 (print_insn_m68k): If an instruction uses place 'i', it uses at
4661 least four fixed bytes.
4662 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
4663 extended float, convert to double using floatformat_to_double, not
4664 ieee_extended_to_double, and fetch the data before converting it.
4668 * mips-opc.c: It's sqrt.s, not sqrt.w. From
4673 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
4674 PowerPC uses bdnz[l][a].
4678 * dis-buf.c, i386-dis.c: Include sysdep.h.
4682 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
4684 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
4685 by Motorola PowerPC 601 with PPC_OPCODE_601.
4686 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
4687 Disassemble Motorola PowerPC 601 instructions as well as normal
4688 PowerPC instructions.
4692 * i960-dis.c (reg, mem): Just use a static array instead of
4697 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
4698 condition name index if this is for a negated condition.
4700 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
4701 Floating point format for 'H' operand is backwards from normal
4702 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
4703 operands (fmpyadd and fmpysub), handle bizarre register
4704 translation correctly for single precision format.
4706 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
4707 or 'I' operands if the next format specifier is 'M' (fcmp
4708 condition completer).
4712 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
4713 single number giving a bitmask for the MB and ME fields of an M
4714 form instruction. Change NB to accept 32, and turn it into 0;
4715 also turn 0 into 32 when disassembling. Seperated SH from NB.
4716 (insert_mbe, extract_mbe): New functions.
4717 (insert_nb, extract_nb): New functions.
4718 (SC_MASK): Mask out SA and LK bits.
4719 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
4720 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
4721 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
4722 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
4723 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
4724 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
4725 (powerpc_macros): Define table of macro definitions.
4726 (powerpc_num_macros): Define.
4728 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
4729 if PPC_OPERAND_NEXT is set.
4733 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
4734 char. Retrieve contents using bfd_getl32 instead of shifting.
4738 * ppc-opc.c: New file. Opcode table for PowerPC, including
4739 opcodes for POWER (RS/6000).
4740 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
4741 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
4742 (CFILES): Add ppc-dis.c.
4743 (ppc-dis.o, ppc-opc.o): New targets.
4744 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
4748 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
4749 No space before 'u', 'f', or 'N'.
4753 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
4754 farther than we should.
4756 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
4760 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
4764 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
4765 needs it, to prevent reading past the end of a section.
4769 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
4770 Removed t,A case for la; always use t,A(b) case.
4775 * mips-dis.c (print_insn_arg): Handle 'k'.
4776 * mips-opc.c: Make cache use k, not t.
4780 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
4781 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
4782 FLOAT_FORMAT_CODE to put out floating point register names.
4786 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
4790 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
4794 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
4795 larger than 32. Moved dsxx32 variants first for disassembler.
4799 * z8kgen.c, z8k-opc.h: Add full lda information.
4803 * hppa-dis.c (print_insn_hppa): Do not emit a space after
4804 movb instructions. Any necessary space will be emitted by
4805 the code to handle nullification completers.
4809 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
4813 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
4814 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
4818 * mips-opc.c: Correct lwu opcode value (book had it wrong).
4822 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
4823 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
4827 * m88k-dis.c (m88kdis): comment change. Remove space after
4829 (printop): handle new arg types DEC and XREG for m88110.
4833 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
4834 type for absolute branch addresses. Delete special
4835 "ble" and "be" code in 'W' operand code.
4839 * mips-opc.c: Set hazard information correctly for branch
4840 likely instructions.
4844 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
4845 info->fprintf_func for printing and info->print_address_func for
4850 * mips-opc.c: Set INSN_TRAP for tXX instructions.
4855 Corrected second case of "b" for disassembler.
4859 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
4860 to BFD swapping routines to correspond to BFD name changes.
4864 * mips-opc.c: Change div machine instruction to be z,s,t rather
4865 than s,t. Change div macro to be d,v,t rather than d,s,t.
4866 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
4867 rem and remu which generates only the corresponding div
4868 instruction. This is for compatibility with the MIPS assembler,
4869 which only generates the simple machine instruction when an
4870 explicit destination of $0 is used.
4871 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
4876 WR_31 hazard for bal, bgezal, bltzal.
4880 * hppa-dis.c (print_insn_hppa): Use print function
4881 from within the disassemble_info, not fprintf_filtered.
4885 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
4890 * mips-opc.c ("absu"): Removed.
4895 * mips-opc.c: Added r6000 and r4000 instructions and macros.
4896 Changed hazard information to distinguish between memory load
4897 delays and coprocessor load delays.
4901 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
4905 * configure.in: Don't pass cpu to config.bfd.
4909 * m88k-dis.c (m88kdis): Make class unsigned.
4913 * alpha-dis.c (print_insn_alpha): One branch format case was
4914 missing the instruction name.
4918 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
4919 Add the arch-specific auxiliary files.
4920 (OFILES): Remove the arch-specific auxiliary files
4921 and use BFD_MACHINES instead of DIS_LIBS.
4922 * configure.in: Set BFD_MACHINES based on --with-targets option.
4926 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
4931 * sparc-opc.c: Change CONST to const to deal with gcc
4932 -Dconst=__const -traditional.
4937 coprocessor instructions out of #if 0, and made them use new
4942 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
4946 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
4947 instruction, for use by the disassembler.
4949 * sparc-dis.c (SEX): Add sign extension macro. Replace many
4950 hand-coded sign extensions that depended on 32-bit host ints.
4951 FIXME, we still depend on big-endian host bitfield ordering.
4952 (sparc_print_insn): Set the insn_info_valid field, and the
4953 other fields that describe the instruction being printed.
4957 * sparc-opc.c (call): Accept all 6 addressing modes valid for
4958 `jmp' instead of just one of them.
4962 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
4963 (fput_fp_reg_r): Renamed from fput_reg_r.
4964 (fput_fp_reg): New function.
4965 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
4967 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
4969 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
4973 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
4975 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
4976 don't output a space.
4978 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
4982 * mips-opc.c: New file, containing opcode table from
4983 ../include/opcode/mips.h.
4984 * Makefile.in: Add it.
4988 * m88k-dis.c: New file, moved in from gdb and changed to use the
4989 new dis-asm.h disassembler interface.
4990 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
4991 (m88k-dis.o): New target.
4995 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
4996 argument string const char * to correspond to opcode/mips.h.
5000 * mips-dis.c: Updated to account for name changes in new version
5002 * Makefile.in: Added header file dependencies.
5006 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
5010 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
5011 extend, rather than shifts.
5015 * Makefile.in: Undo 15 June change.
5019 * m68k-dis.c (print_insn_arg): Change return value to byte count
5021 * m68k-dis.c: Re-write to detect invalid operands before
5022 printing anything, so we can handle this the same way we
5023 handle invalid opcodes.
5027 * sh-dis.c, sh-opc.h: Understand some more opcodes.
5031 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
5036 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
5038 * configure.in: Do make sysdep.h link.
5039 * Makefile.in: Search ../include. Don't search ../bfd.
5044 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
5045 Do not print a space before the completers specified by
5050 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
5051 defined, since gdb has been fixed.
5054 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
5055 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
5056 be a *disassemble_info, not a *FILE.
5057 * hppa-dis.c: Support 'd', '!', and 'a'.
5058 * hppa-dis.c: Support 's' to extract a 2 bit space register.
5059 * hppa-dis.c: Delete cases which are no longer needed.
5063 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
5067 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
5072 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
5073 * configure.in: No longer need to configure to get sysdep.h.
5078 * hppa-dis.c: Support 'I', 'J', and 'K' in output
5079 templates for 1.1 FP computational instructions.
5083 * h8500-dis.c (print_insn_h8500): Address argument is type
5085 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
5088 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
5089 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
5091 * sparc-dis.c (compare_opcodes): Move static declaration to
5096 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
5097 instruction, remove unimp hack from 'l' argument.
5101 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
5107 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
5112 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
5113 arrays of string pointers to 2-d arrays of chars, to save
5118 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
5119 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
5123 * hppa-dis.c: New file from Utah, adapted to new disassembler
5125 * Makefile.in: Include it.
5129 * sh-dis.c, sh-opc.h: New files.
5133 * alpha-dis.c, alpha-opc.h: New files.
5137 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
5142 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
5146 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
5151 * sparc-dis.c: Use fprintf_func a few places where I forgot,
5152 and double percent signs a few places.
5154 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
5156 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
5157 Use info->print_address_func not print_address.
5159 * dis-buf.c (generic_print_address): New function.
5163 * Makefile.in: Add sparc-dis.c.
5164 sparc-dis.c: New file, merges binutils and gdb versions as follows:
5166 Add `add' instruction to the set that get checked
5167 for a preceding `sethi' in order to print an absolute address.
5168 * (print_insn): Disassembly prefers real instructions.
5169 (is_delayed_branch): Speed up.
5170 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
5171 Still missing some float ops, and needs testing.
5172 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
5173 F_ALIAS. Use printf, not fprintf, when not passing a file
5175 (compare_opcodes): Check that identical instructions have
5176 identical opcodes, complain otherwise.
5179 * Include reg_names.
5181 Use dis-asm.h/read_memory_func interface.
5185 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
5186 deliberately return non-zero to setjmp from longjmp. Otherwise
5187 this code fails to compile.
5191 * m68k-dis.c: Fix prototype for fetch_arg().
5195 * dis-buf.c: New file, for new read_memory_func interface.
5196 Makefile.in (OFILES): Include it.
5197 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
5198 Use new read_memory_func interface.
5202 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
5203 * h8500-opc.h: Fix couple of opcodes.
5205 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
5207 * Makefile.in: add dvi & installcheck targets
5211 * Makefile.in: Update for h8500-dis.c.
5215 * h8500-dis.c, h8500-opc.h: New files
5219 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
5220 ../include/dis-asm.h.
5221 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
5222 and ../gdb/m68k-pinsn.c).
5223 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
5224 and ../gdb/i386-pinsn.c).
5225 * m68881-ext.c: New file. Moved definition of
5226 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
5227 * Makefile.in: Adjust for new files.
5229 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
5230 can be dis-assembled.
5234 * mips-dis.c (print_insn_arg): Now returns void.
5238 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
5239 files that use the macros.
5243 * mips-dis.c: New file, from gdb/mips-pinsn.c.
5244 * Makefile.in (DIS_LIBS): Added mips-dis.o.
5245 (CFILES): Added mips-dis.c.
5249 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
5250 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
5254 * Makefile.in: Improve *clean rules.
5255 * configure.in: Allow a default host.
5257 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5259 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
5260 files include other sysdep files
5264 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
5268 * configure.in: For host support, use ../bfd/configure.host
5269 so it stays in sync with the ../bfd/hosts database.
5271 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5273 * configure.in: use cpu-vendor-os triple instead of nested cases
5277 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
5278 *always* the wrong one.
5282 * z8kgen.c: added copyright info
5286 * z8k-dis.c (unparse_instr): prettier tabs
5287 * z8kgen.c -> z8k-opc.h: bug fixes in tables
5289 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
5291 * configure.in: Add ncr* configuration.
5292 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
5293 picayune ANSI compilers happy.
5297 * configure.in (i386): Make i386 and i486 synonymous for now.
5298 * configure.in (i[34]86-*-sysv4): Add my_host definition.
5302 * Makefile.in (install): Fix typo.
5306 * Makefile.in (make): Remove obsolete crud.
5307 (sparc-opc.o): Avoid Sun Make VPATH bug.
5311 * Makefile.in: since there are no SUBDIRS, remove rule and
5312 references of subdir_do.
5316 * Makefile.in (install): Get the library name right here too.
5317 Don't install bfd.h, since it's unrelated to this library. No
5318 subdirs to recurse into, either.
5319 (CFILES): The source file has a .c suffix, not .o.
5321 * sparc-opc.c: New file, moved from BFD.
5322 * Makefile.in (OFILES): Build it.
5326 * z8k-dis.c: fixed forward refferences of some declarations.
5330 * Makefile.in: get the name of the library right
5334 * z8k-dis.c: knows how to disassemble z8k stuff
5335 * z8k-opc.h: new file full of z8000 opcodes
5339 version-control: never