3 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
4 accept Power E500MC instructions.
5 (print_ppc_disassembler_options): Document -Me500mc.
6 * ppc-opc.c (DUIS, DUI, T): New.
7 (XRT, XRTRA): Likewise.
9 (powerpc_opcodes): Add new Power E500MC instructions.
13 * s390-dis.c (init_disasm): Evaluate disassembler_options.
14 (print_s390_disassembler_options): New function.
15 * disassemble.c (disassembler_usage): Invoke
16 print_s390_disassembler_options.
20 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
21 of local variables used for mnemonic parsing: prefix, suffix and
26 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
27 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
28 (s390_crb_extensions): New extensions table.
29 (insertExpandedMnemonic): Handle '$' tag.
30 * s390-opc.txt: Remove conditional jump variants which can now
31 be expanded automatically.
32 Replace '*' tag with '$' in the compare and branch instructions.
36 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
37 (PREFIX_VEX_3AXX): Likewis.
41 * i386-opc.tbl: Remove 4 extra blank lines.
45 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
46 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
47 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
48 * i386-opc.tbl: Likewise.
50 * i386-opc.h (CpuCLMUL): Renamed to ...
53 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
55 * i386-init.h: Regenerated.
59 * i386-dis.c (OP_E_register): New.
60 (OP_E_memory): Likewise.
62 (OP_EX_Vex): Likewise.
63 (OP_EX_VexW): Likewise.
64 (OP_XMM_Vex): Likewise.
65 (OP_XMM_VexW): Likewise.
66 (OP_REG_VexI4): Likewise.
67 (PCLMUL_Fixup): Likewise.
68 (VEXI4_Fixup): Likewise.
69 (VZERO_Fixup): Likewise.
70 (VCMP_Fixup): Likewise.
71 (VPERMIL2_Fixup): Likewise.
72 (rex_original): Likewise.
73 (rex_ignored): Likewise.
96 (xmmq_mode): Likewise.
97 (ymmq_mode): Likewise.
99 (vex128_mode): Likewise.
100 (vex256_mode): Likewise.
101 (USE_VEX_C4_TABLE): Likewise.
102 (USE_VEX_C5_TABLE): Likewise.
103 (USE_VEX_LEN_TABLE): Likewise.
104 (VEX_C4_TABLE): Likewise.
105 (VEX_C5_TABLE): Likewise.
106 (VEX_LEN_TABLE): Likewise.
107 (REG_VEX_XX): Likewise.
108 (MOD_VEX_XXX): Likewise.
109 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
110 (PREFIX_0F3A44): Likewise.
111 (PREFIX_0F3ADF): Likewise.
112 (PREFIX_VEX_XXX): Likewise.
114 (VEX_OF38): Likewise.
115 (VEX_OF3A): Likewise.
116 (VEX_LEN_XXX): Likewise.
118 (need_vex): Likewise.
119 (need_vex_reg): Likewise.
120 (vex_i4_done): Likewise.
121 (vex_table): Likewise.
122 (vex_len_table): Likewise.
123 (OP_REG_VexI4): Likewise.
124 (vex_cmp_op): Likewise.
125 (pclmul_op): Likewise.
126 (vpermil2_op): Likewise.
129 (PREFIX_0F38F0): Likewise.
130 (PREFIX_0F3A60): Likewise.
131 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
132 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
133 and PREFIX_VEX_XXX entries.
134 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
135 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
137 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
138 Add MOD_VEX_XXX entries.
139 (ckprefix): Initialize rex_original and rex_ignored. Store the
140 REX byte in rex_original.
141 (get_valid_dis386): Handle the implicit prefix in VEX prefix
142 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
143 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
144 calling get_valid_dis386. Use rex_original and rex_ignored when
146 (putop): Handle "XY".
147 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
149 (OP_E_extended): Updated to use OP_E_register and
151 (OP_XMM): Handle VEX.
153 (XMM_Fixup): Likewise.
154 (CMP_Fixup): Use ARRAY_SIZE.
156 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
157 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
158 (operand_type_init): Add OPERAND_TYPE_REGYMM and
159 OPERAND_TYPE_VEX_IMM4.
160 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
161 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
162 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
163 VexImmExt and SSE2AVX.
164 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
166 * i386-opc.h (CpuAVX): New.
168 (CpuCLMUL): Likewise.
179 (Vex3Sources): Likewise.
180 (VexImmExt): Likewise.
184 (Vex_Imm4): Likewise.
185 (Implicit1stXmm0): Likewise.
188 (ByteOkIntel): Likewise.
191 (Unspecified): Likewise.
193 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
194 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
195 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
196 vex3sources, veximmext and sse2avx.
197 (i386_operand_type): Add regymm, ymmword and vex_imm4.
199 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
201 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
203 * i386-init.h: Regenerated.
204 * i386-tbl.h: Likewise.
209 * bfin-dis.c (bu32): Typedef.
210 (enum const_forms_t): Add c_uimm32 and c_huimm32.
211 (constant_formats[]): Add uimm32 and huimm16.
216 (luimm16_val): Define.
217 (struct saved_state): Define.
218 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
219 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
220 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
222 (decode_LDIMMhalf_0): Print out the whole register value.
225 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
226 multiply and multiply-accumulate to data register instruction.
228 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
229 c_imm32, c_huimm32e): Define.
230 (constant_formats): Add flags for printing decimal, leading spaces, and
232 (comment, parallel): Add global flags in all disassembly.
233 (fmtconst): Take advantage of new flags, and print default in hex.
234 (fmtconst_val): Likewise.
235 (decode_macfunc): Be consistant with spaces, tabs, comments,
236 capitalization in disassembly, fix minor coding style issues.
237 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
238 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
239 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
240 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
241 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
242 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
243 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
244 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
245 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
246 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
247 _print_insn_bfin, print_insn_bfin): Likewise.
251 * aclocal.m4: Regenerate.
252 * configure: Likewise.
253 * Makefile.in: Likewise.
257 * Makefile.am: Run "make dep-am".
258 * Makefile.in: Regenerate.
259 * configure: Regenerate.
263 * ppc-opc.c (powerpc_opcodes): Order and format.
267 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
268 * i386-tbl.h: Regenerated.
272 * i386-opc.tbl: Disallow 16-bit near indirect branches for
274 * i386-tbl.h: Regenerated.
278 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
279 and Fword for far indirect jmp. Allow Reg16 and Word for near
280 indirect jmp on x86-64. Disallow Fword for lcall.
281 * i386-tbl.h: Re-generate.
285 * cr16-opc.c (cr16_num_optab): Defined
289 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
290 * i386-init.h: Regenerated.
295 * configure.in (SHARED_LIBADD): Select the correct host specific
296 file extension for shared libraries.
297 * configure: Regenerate.
301 * i386-opc.h (RegFlat): New.
302 * i386-reg.tbl (flat): Add.
303 * i386-tbl.h: Re-generate.
307 * i386-dis.c (a_mode): New.
308 (cond_jump_mode): Adjust.
309 (Ma): Change to a_mode.
310 (intel_operand_size): Handle a_mode.
311 * i386-opc.tbl: Allow Dword and Qword for bound.
312 * i386-tbl.h: Re-generate.
316 * i386-gen.c (process_i386_registers): Process new fields.
317 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
318 unsigned char. Add dw2_regnum and Dw2Inval.
319 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
321 * i386-tbl.h: Re-generate.
325 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
326 * i386-init.h: Updated.
330 * i386-gen.c (cpu_flags): Add CpuXsave.
332 * i386-opc.h (CpuXsave): New.
334 (i386_cpu_flags): Add cpuxsave.
336 * i386-dis.c (MOD_0FAE_REG_4): New.
337 (RM_0F01_REG_2): Likewise.
338 (MOD_0FAE_REG_5): Updated.
339 (RM_0F01_REG_3): Likewise.
340 (reg_table): Use MOD_0FAE_REG_4.
341 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
343 (rm_table): Add RM_0F01_REG_2.
345 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
346 * i386-init.h: Regenerated.
347 * i386-tbl.h: Likewise.
351 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
352 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
353 * i386-tbl.h: Re-generate.
358 * configure: Regenerated.
362 * mips-dis.c: Update copyright.
363 (mips_arch_choices): Add Octeon.
364 * mips-opc.c: Update copyright.
366 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
370 * ppc-opc.c: Support optional L form mtmsr.
374 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
378 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
379 * i386-init.h: Regenerated.
383 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
384 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
388 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
389 (cpu_flags): Likewise.
391 * i386-opc.h (CpuMMX2): Removed.
394 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
395 * i386-init.h: Regenerated.
396 * i386-tbl.h: Likewise.
400 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
402 * i386-init.h: Regenerated.
406 * i386-opc.tbl: Use Qword on movddup.
407 * i386-tbl.h: Regenerated.
411 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
412 * i386-tbl.h: Regenerated.
416 * i386-dis.c (Mx): New.
417 (PREFIX_0FC3): Likewise.
418 (PREFIX_0FC7_REG_6): Updated.
419 (dis386_twobyte): Use PREFIX_0FC3.
420 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
421 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
426 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
427 (operand_types): Add Mem.
429 * i386-opc.h (IntelSyntax): New.
430 * i386-opc.h (Mem): New.
432 (Opcode_Modifier_Max): Updated.
433 (i386_opcode_modifier): Add intelsyntax.
434 (i386_operand_type): Add mem.
436 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
439 * i386-reg.tbl: Add size for accumulator.
441 * i386-init.h: Regenerated.
442 * i386-tbl.h: Likewise.
446 * i386-opc.h (Byte): Fix a typo.
451 * i386-gen.c (operand_type_init): Add Dword to
452 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
453 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
455 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
456 Xmmword, Unspecified and Anysize.
457 (set_bitfield): Make Mmword an alias of Qword. Make Oword
460 * i386-opc.h (CheckSize): Removed.
468 (i386_opcode_modifier): Remove checksize, byte, word, dword,
472 (Unspecified): Likewise.
474 (i386_operand_type): Add byte, word, dword, fword, qword,
475 tbyte xmmword, unspecified and anysize.
477 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
478 Tbyte, Xmmword, Unspecified and Anysize.
480 * i386-reg.tbl: Add size for accumulator.
482 * i386-init.h: Regenerated.
483 * i386-tbl.h: Likewise.
487 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
489 (reg_table): Updated.
490 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
491 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
495 * i386-gen.c (set_bitfield): Use fail () on error.
499 * i386-gen.c (lineno): New.
500 (filename): Likewise.
501 (set_bitfield): Report filename and line numer on error.
502 (process_i386_opcodes): Set filename and update lineno.
503 (process_i386_registers): Likewise.
507 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
510 * i386-opc.h (IntelMnemonic): Renamed to ..
512 (Opcode_Modifier_Max): Updated.
513 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
516 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
517 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
518 * i386-tbl.h: Regenerated.
522 * i386-gen.c: Update copyright to 2008.
523 * i386-opc.h: Likewise.
524 * i386-opc.tbl: Likewise.
526 * i386-init.h: Regenerated.
527 * i386-tbl.h: Likewise.
531 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
532 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
533 * i386-tbl.h: Regenerated.
537 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
539 (cpu_flags): Likewise.
541 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
542 (CpuSSE4_2_Or_ABM): Likewise.
544 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
546 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
547 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
548 and CpuPadLock, respectively.
549 * i386-init.h: Regenerated.
550 * i386-tbl.h: Likewise.
554 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
556 * i386-opc.h (No_xSuf): Removed.
557 (CheckSize): Updated.
559 * i386-tbl.h: Regenerated.
563 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
564 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
566 (cpu_flags): Add CpuSSE4_2_Or_ABM.
568 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
570 (i386_cpu_flags): Add cpusse4_2_or_abm.
572 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
573 CpuABM|CpuSSE4_2 on popcnt.
574 * i386-init.h: Regenerated.
575 * i386-tbl.h: Likewise.
579 * i386-opc.h: Update comments.
583 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
584 * i386-opc.h: Likewise.
585 * i386-opc.tbl: Likewise.
590 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
591 Byte, Word, Dword, QWord and Xmmword.
593 * i386-opc.h (No_xSuf): New.
594 (CheckSize): Likewise.
601 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
602 Dword, QWord and Xmmword.
604 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
606 * i386-tbl.h: Regenerated.
610 * m88k-dis.c (instructions): Fix fcvt.* instructions.
613 For older changes see ChangeLog-2007
619 version-control: never