3 * configure.in (sim_gen): Dependent on target, select type of
4 generator. Always select old style generator.
6 configure: Re-generate.
8 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
10 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
11 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
12 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
13 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
14 SIM_@sim_gen@_*, set by autoconf.
18 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
20 * interp.c (ColdReset): Remove #ifdef HASFPU, check
21 CURRENT_FLOATING_POINT instead.
23 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
24 (address_translation): Raise exception InstructionFetch when
25 translation fails and isINSTRUCTION.
27 * interp.c (sim_open, sim_write, sim_monitor, store_word,
28 sim_engine_run): Change type of of vaddr and paddr to
30 (address_translation, prefetch, load_memory, store_memory,
31 cache_op): Change type of vAddr and pAddr to address_word.
33 * gencode.c (build_instruction): Change type of vaddr and paddr to
38 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
39 macro to obtain result of ALU op.
43 * interp.c (sim_info): Call profile_print.
47 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
49 * sim-main.h (WITH_PROFILE): Do not define, defined in
50 common/sim-config.h. Use sim-profile module.
51 (simPROFILE): Delete defintion.
53 * interp.c (PROFILE): Delete definition.
54 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
55 (sim_close): Delete code writing profile histogram.
56 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
58 (sim_engine_run): Delete code profiling the PC.
62 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
64 * interp.c (sim_monitor): Make register pointers of type
67 * sim-main.h: Make registers of type unsigned_word not
73 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
74 ...): Move to sim-main.h
77 * interp.c (sync_operation): Rename from SyncOperation, make
78 global, add SD argument.
79 (prefetch): Rename from Prefetch, make global, add SD argument.
80 (decode_coproc): Make global.
82 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
84 * gencode.c (build_instruction): Generate DecodeCoproc not
87 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
88 (SizeFGR): Move to sim-main.h
89 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
90 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
91 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
93 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
94 FP_RM_TOMINF, GETRM): Move to sim-main.h.
95 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
96 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
97 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
98 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
100 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
102 (sim-alu.h): Include.
103 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
104 (sim_cia): Typedef to instruction_address.
108 * Makefile.in (interp.o): Rename generated file engine.c to
115 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
119 * gencode.c (build_instruction): For "FPSQRT", output correct
120 number of arguments to Recip.
124 * Makefile.in (interp.o): Depends on sim-main.h
126 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
128 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
129 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
130 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
131 STATE, DSSTATE): Define
132 (GPR, FGRIDX, ..): Define.
134 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
135 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
136 (GPR, FGRIDX, ...): Delete macros.
138 * interp.c: Update names to match defines from sim-main.h
142 * interp.c (sim_monitor): Add SD argument.
143 (sim_warning): Delete. Replace calls with calls to
145 (sim_error): Delete. Replace calls with sim_io_error.
146 (open_trace, writeout32, writeout16, getnum): Add SD argument.
147 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
148 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
150 (mips_size): Rename from sim_size. Add SD argument.
152 * interp.c (simulator): Delete global variable.
153 (callback): Delete global variable.
154 (mips_option_handler, sim_open, sim_write, sim_read,
155 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
156 sim_size,sim_monitor): Use sim_io_* not callback->*.
157 (sim_open): ZALLOC simulator struct.
158 (PROFILE): Do not define.
162 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
163 support.h with corresponding code.
165 * sim-main.h (word64, uword64), support.h: Move definition to
167 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
170 * Makefile.in: Update dependencies
171 * interp.c: Do not include.
175 * interp.c (address_translation, load_memory, store_memory,
176 cache_op): Rename to from AddressTranslation et.al., make global,
179 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
182 * interp.c (SignalException): Rename to signal_exception, make
185 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
187 * sim-main.h (SignalException, SignalExceptionInterrupt,
188 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
189 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
190 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
193 * interp.c, support.h: Use.
197 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
198 to value_fpr / store_fpr. Add SD argument.
199 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
200 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
202 * sim-main.h (ValueFPR, StoreFPR): Define.
206 * interp.c (sim_engine_run): Check consistency between configure
207 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
210 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
211 (mips_fpu): Configure WITH_FLOATING_POINT.
212 (mips_endian): Configure WITH_TARGET_ENDIAN.
217 * configure: Regenerated to track ../common/aclocal.m4 changes.
222 * interp.c (MAX_REG): Allow up-to 128 registers.
223 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
224 (REGISTER_SA): Ditto.
225 (sim_open): Initialize register_widths for r5900 specific
227 (sim_fetch_register, sim_store_register): Check for request of
228 r5900 specific SA register. Check for request for hi 64 bits of
229 r5900 specific registers.
234 * configure: Regenerated.
238 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
242 * gencode.c (print_igen_insn_models): Assume certain architectures
243 include all mips* instructions.
244 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
247 * Makefile.in (tmp.igen): Add target. Generate igen input from
250 * gencode.c (FEATURE_IGEN): Define.
251 (main): Add --igen option. Generate output in igen format.
252 (process_instructions): Format output according to igen option.
253 (print_igen_insn_format): New function.
254 (print_igen_insn_models): New function.
255 (process_instructions): Only issue warnings and ignore
256 instructions when no FEATURE_IGEN.
260 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
265 * configure: Regenerated to track ../common/aclocal.m4 changes.
269 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
270 SIM_RESERVED_BITS): Delete, moved to common.
271 (SIM_EXTRA_CFLAGS): Update.
275 * configure.in: Configure non-strict memory alignment.
276 * configure: Regenerated to track ../common/aclocal.m4 changes.
280 * configure: Regenerated to track ../common/aclocal.m4 changes.
284 * gencode.c (SDBBP,DERET): Added (3900) insns.
285 (RFE): Turn on for 3900.
286 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
287 (dsstate): Made global.
288 (SUBTARGET_R3900): Added.
289 (CANCELDELAYSLOT): New.
290 (SignalException): Ignore SystemCall rather than ignore and
291 terminate. Add DebugBreakPoint handling.
292 (decode_coproc): New insns RFE, DERET; and new registers Debug
293 and DEPC protected by SUBTARGET_R3900.
294 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
296 * Makefile.in,configure.in: Add mips subtarget option.
301 * gencode.c: Add r3900 (tx39).
304 * gencode.c: Fix some configuration problems by improving
305 the relationship between tx19 and tx39.
310 * gencode.c (build_instruction): Don't need to subtract 4 for
315 * interp.c: Correct some HASFPU problems.
319 * configure: Regenerated to track ../common/aclocal.m4 changes.
323 * interp.c (mips_options): Fix samples option short form, should
328 * interp.c (sim_info): Enable info code. Was just returning.
332 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
337 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
339 (build_instruction): Ditto for LL.
344 * mips/configure.in, mips/gencode: Add tx19/r1900.
347 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
349 * configure: Regenerated to track ../common/aclocal.m4 changes.
354 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
355 for overflow due to ABS of MININT, set result to MAXINT.
356 (build_instruction): For "psrlvw", signextend bit 31.
361 * configure: Regenerated to track ../common/aclocal.m4 changes.
366 * interp.c (sim_open): Add call to sim_analyze_program, update
371 * interp.c (sim_kill): Delete.
372 (sim_create_inferior): Add ABFD argument. Set PC from same.
373 (sim_load): Move code initializing trap handlers from here.
375 (sim_load): Delete, use sim-hload.c.
377 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
381 * configure: Regenerated to track ../common/aclocal.m4 changes.
386 * interp.c (sim_open): Add ABFD argument.
387 (sim_load): Move call to sim_config from here.
388 (sim_open): To here. Check return status.
391 * gencode.c (build_instruction): Do not define x8000000000000000,
392 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
398 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
399 "pdivuw" check for overflow due to signed divide by -1.
404 * gencode.c (build_instruction): Two arg MADD should
405 not assign result to $0.
410 * gencode.c (build_instruction): For "ppac5" use unsigned
411 arrithmetic so that the sign bit doesn't smear when right shifted.
412 (build_instruction): For "pdiv" perform sign extension when
413 storing results in HI and LO.
414 (build_instructions): For "pdiv" and "pdivbw" check for
416 (build_instruction): For "pmfhl.slw" update hi part of dest
417 register as well as low part.
418 (build_instruction): For "pmfhl" portably handle long long values.
419 (build_instruction): For "pmfhl.sh" correctly negative values.
420 Store half words 2 and three in the correct place.
421 (build_instruction): For "psllvw", sign extend value after shift.
426 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
427 * sim/mips/configure.in: Regenerate.
431 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
432 signed8, unsigned8 et.al. types.
435 * gencode.c (build_instruction): For PMULTU* do not sign extend
436 registers. Make generated code easier to debug.
439 * interp.c (SUB_REG_FETCH): Handle both little and big endian
440 hosts when selecting subreg.
445 * gencode.c (type_for_data_len): For 32bit operations concerned
446 with overflow, perform op using 64bits.
447 (build_instruction): For PADD, always compute operation using type
448 returned by type_for_data_len.
449 (build_instruction): For PSUBU, when overflow, saturate to zero as
456 * gencode.c (build_instruction): Handle "pext5" according to
457 version 1.95 of the r5900 ISA.
459 * gencode.c (build_instruction): Handle "ppac5" according to
460 version 1.95 of the r5900 ISA.
463 * interp.c (sim_engine_run): Reset the ZERO register to zero
464 regardless of FEATURE_WARN_ZERO.
465 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
469 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
470 (SignalException): For BreakPoints ignore any mode bits and just
472 (SignalException): Always set the CAUSE register.
476 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
477 exception has been taken.
479 * interp.c: Implement the ERET and mt/f sr instructions.
484 * gencode.c (build_instruction): For paddu, extract unsigned
487 * gencode.c (build_instruction): Saturate padds instead of padd
493 * interp.c (SignalException): Don't bother restarting an
498 * interp.c (SignalException): Really take an interrupt.
499 (interrupt_event): Only deliver interrupts when enabled.
503 * interp.c (sim_info): Only print info when verbose.
504 (sim_info) Use sim_io_printf for output.
508 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
513 * interp.c (sim_do_command): Check for common commands if a
514 simulator specific command fails.
518 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
519 and simBE when DEBUG is defined.
523 * interp.c (interrupt_event): New function. Pass exception event
524 onto exception handler.
526 * configure.in: Check for stdlib.h.
527 * configure: Regenerate.
529 * gencode.c (build_instruction): Add UNUSED attribute to tempS
530 variable declaration.
531 (build_instruction): Initialize memval1.
532 (build_instruction): Add UNUSED attribute to byte, bigend,
534 (build_operands): Ditto.
536 * interp.c: Fix GCC warnings.
537 (sim_get_quit_code): Delete.
539 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
540 * Makefile.in: Ditto.
541 * configure: Re-generate.
543 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
547 * interp.c (mips_option_handler): New function parse argumes using
549 (myname): Replace with STATE_MY_NAME.
550 (sim_open): Delete check for host endianness - performed by
552 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
553 (sim_open): Move much of the initialization from here.
554 (sim_load): To here. After the image has been loaded and
556 (sim_open): Move ColdReset from here.
557 (sim_create_inferior): To here.
558 (sim_open): Make FP check less dependant on host endianness.
560 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
562 * interp.c (sim_set_callbacks): Delete.
564 * interp.c (membank, membank_base, membank_size): Replace with
565 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
566 (sim_open): Remove call to callback->init. gdb/run do this.
570 * sim-main.h (SIM_HAVE_FLATMEM): Define.
572 * interp.c (big_endian_p): Delete, replaced by
573 current_target_byte_order.
577 * interp.c (host_read_long, host_read_word, host_swap_word,
578 host_swap_long): Delete. Using common sim-endian.
579 (sim_fetch_register, sim_store_register): Use H2T.
580 (pipeline_ticks): Delete. Handled by sim-events.
582 (sim_engine_run): Update.
586 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
588 (SignalException): To here. Signal using sim_engine_halt.
589 (sim_stop_reason): Delete, moved to common.
593 * interp.c (sim_open): Add callback argument.
594 (sim_set_callbacks): Delete SIM_DESC argument.
599 * Makefile.in (SIM_OBJS): Add common modules.
601 * interp.c (sim_set_callbacks): Also set SD callback.
602 (set_endianness, xfer_*, swap_*): Delete.
603 (host_read_word, host_read_long, host_swap_word, host_swap_long):
604 Change to functions using sim-endian macros.
605 (control_c, sim_stop): Delete, use common version.
606 (simulate): Convert into.
607 (sim_engine_run): This function.
608 (sim_resume): Delete.
610 * interp.c (simulation): New variable - the simulator object.
611 (sim_kind): Delete global - merged into simulation.
612 (sim_load): Cleanup. Move PC assignment from here.
613 (sim_create_inferior): To here.
615 * sim-main.h: New file.
616 * interp.c (sim-main.h): Include.
620 * configure: Regenerated to track ../common/aclocal.m4 changes.
624 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
628 * gencode.c (build_instruction): DIV instructions: check
629 for division by zero and integer overflow before using
630 host's division operation.
634 * Makefile.in (SIM_OBJS): Add sim-load.o.
635 * interp.c: #include bfd.h.
636 (target_byte_order): Delete.
637 (sim_kind, myname, big_endian_p): New static locals.
638 (sim_open): Set sim_kind, myname. Move call to set_endianness to
639 after argument parsing. Recognize -E arg, set endianness accordingly.
640 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
641 load file into simulator. Set PC from bfd.
642 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
643 (set_endianness): Use big_endian_p instead of target_byte_order.
647 * interp.c (sim_size): Delete prototype - conflicts with
648 definition in remote-sim.h. Correct definition.
652 * configure: Regenerated to track ../common/aclocal.m4 changes.
657 * interp.c (sim_open): New arg `kind'.
659 * configure: Regenerated to track ../common/aclocal.m4 changes.
663 * configure: Regenerated to track ../common/aclocal.m4 changes.
667 * interp.c (sim_open): Set optind to 0 before calling getopt.
671 * configure: Regenerated to track ../common/aclocal.m4 changes.
675 * interp.c : Replace uses of pr_addr with pr_uword64
676 where the bit length is always 64 independent of SIM_ADDR.
677 (pr_uword64) : added.
681 * configure: Re-generate.
685 * configure: Regenerate to track ../common/aclocal.m4 changes.
689 * interp.c (sim_open): New SIM_DESC result. Argument is now
691 (other sim_*): New SIM_DESC argument.
696 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
697 Change values to avoid overloading DOUBLEWORD which is tested
699 * gencode.c: reinstate "offending code".
704 * interp.c: Fix printing of addresses for non-64-bit targets.
705 (pr_addr): Add function to print address based on size.
707 * gencode.c: #ifdef out offending code until a permanent fix
708 can be added. Code is causing build errors for non-5900 mips targets.
714 * gencode.c (process_instructions): Correct test for ISA dependent
715 architecture bits in isa field of MIPS_DECODE.
720 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
725 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
731 * gencode.c (build_mips16_operands): Correct computation of base
732 address for extended PC relative instruction.
737 * Makefile.in, configure, configure.in, gencode.c,
738 interp.c, support.h: add r5900.
743 * interp.c (mips16_entry): Add support for floating point cases.
744 (SignalException): Pass floating point cases to mips16_entry.
745 (ValueFPR): Don't restrict fmt_single and fmt_word to even
747 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
749 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
750 and then set the state to fmt_uninterpreted.
751 (COP_SW): Temporarily set the state to fmt_word while calling
756 * gencode.c (build_instruction): The high order may be set in the
757 comparison flags at any ISA level, not just ISA 4.
761 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
762 COMMON_{PRE,POST}_CONFIG_FRAG instead.
763 * configure.in: sinclude ../common/aclocal.m4.
764 * configure: Regenerated.
768 * configure: Rebuild after change to aclocal.m4.
772 * configure configure.in Makefile.in: Update to new configure
773 scheme which is more compatible with WinGDB builds.
774 * configure.in: Improve comment on how to run autoconf.
775 * configure: Re-run autoconf to get new ../common/aclocal.m4.
776 * Makefile.in: Use autoconf substitution to install common
781 * gencode.c (build_instruction): Use BigEndianCPU instead of
786 * interp.c (sim_monitor): Make output to stdout visible in
787 wingdb's I/O log window.
791 * support.h: Undo previous change to SIGTRAP
796 * interp.c (store_word, load_word): New static functions.
797 (mips16_entry): New static function.
798 (SignalException): Look for mips16 entry and exit instructions.
799 (simulate): Use the correct index when setting fpr_state after
800 doing a pending move.
804 * interp.c: Fix byte-swapping code throughout to work on
805 both little- and big-endian hosts.
809 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
810 with gdb/config/i386/xm-windows.h.
814 * gencode.c (build_instruction): Work around MSVC++ code gen bug
815 that messes up arithmetic shifts.
819 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
820 SIGTRAP and SIGQUIT for _WIN32.
824 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
825 force a 64 bit multiplication.
826 (build_instruction) [OR]: In mips16 mode, don't do anything if the
827 destination register is 0, since that is the default mips16 nop
832 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
833 (build_endian_shift): Don't check proc64.
834 (build_instruction): Always set memval to uword64. Cast op2 to
835 uword64 when shifting it left in memory instructions. Always use
836 the same code for stores--don't special case proc64.
838 * gencode.c (build_mips16_operands): Fix base PC value for PC
840 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
842 * interp.c (simJALDELAYSLOT): Define.
843 (JALDELAYSLOT): Define.
844 (INDELAYSLOT, INJALDELAYSLOT): Define.
845 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
849 * interp.c (sim_open): add flush_cache as a PMON routine
850 (sim_monitor): handle flush_cache by ignoring it
854 * gencode.c (build_instruction): Use !ByteSwapMem instead of
856 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
857 (BigEndianMem): Rename to ByteSwapMem and change sense.
858 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
859 BigEndianMem references to !ByteSwapMem.
860 (set_endianness): New function, with prototype.
861 (sim_open): Call set_endianness.
862 (sim_info): Use simBE instead of BigEndianMem.
863 (xfer_direct_word, xfer_direct_long, swap_direct_word,
864 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
865 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
866 ifdefs, keeping the prototype declaration.
867 (swap_word): Rewrite correctly.
868 (ColdReset): Delete references to CONFIG. Delete endianness related
869 code; moved to set_endianness.
873 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
874 * interp.c (CHECKHILO): Define away.
875 (simSIGINT): New macro.
876 (membank_size): Increase from 1MB to 2MB.
877 (control_c): New function.
878 (sim_resume): Rename parameter signal to signal_number. Add local
879 variable prev. Call signal before and after simulate.
880 (sim_stop_reason): Add simSIGINT support.
881 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
883 (sim_warning): Delete call to SignalException. Do call printf_filtered
885 (AddressTranslation): Add #ifdef DEBUG around debugging message and
886 a call to sim_warning.
890 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
895 Add support for mips16 (16 bit MIPS implementation):
896 * gencode.c (inst_type): Add mips16 instruction encoding types.
897 (GETDATASIZEINSN): Define.
898 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
899 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
901 (MIPS16_DECODE): New table, for mips16 instructions.
902 (bitmap_val): New static function.
903 (struct mips16_op): Define.
904 (mips16_op_table): New table, for mips16 operands.
905 (build_mips16_operands): New static function.
906 (process_instructions): If PC is odd, decode a mips16
907 instruction. Break out instruction handling into new
908 build_instruction function.
909 (build_instruction): New static function, broken out of
910 process_instructions. Check modifiers rather than flags for SHIFT
911 bit count and m[ft]{hi,lo} direction.
912 (usage): Pass program name to fprintf.
913 (main): Remove unused variable this_option_optind. Change
914 ``*loptarg++'' to ``loptarg++''.
915 (my_strtoul): Parenthesize && within ||.
916 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
917 (simulate): If PC is odd, fetch a 16 bit instruction, and
918 increment PC by 2 rather than 4.
919 * configure.in: Add case for mips16*-*-*.
920 * configure: Rebuild.
924 * interp.c: Allow -t to enable tracing in standalone simulator.
925 Fix garbage output in trace file and error messages.
929 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
930 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
931 * configure.in: Simplify using macros in ../common/aclocal.m4.
932 * configure: Regenerated.
933 * tconfig.in: New file.
937 * interp.c: Fix bugs in 64-bit port.
938 Use ansi function declarations for msvc compiler.
939 Initialize and test file pointer in trace code.
940 Prevent duplicate definition of LAST_EMED_REGNUM.
944 * interp.c (xfer_big_long): Prevent unwanted sign extension.
948 * interp.c (SignalException): Check for explicit terminating
950 * gencode.c: Pass instruction value through SignalException()
951 calls for Trap, Breakpoint and Syscall.
955 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
956 only used on those hosts that provide it.
957 * configure.in: Add sqrt() to list of functions to be checked for.
958 * config.in: Re-generated.
959 * configure: Re-generated.
963 * gencode.c (process_instructions): Call build_endian_shift when
964 expanding STORE RIGHT, to fix swr.
965 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
967 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
968 Fix float to int conversions to produce signed values.
972 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
973 (process_instructions): Correct handling of nor instruction.
974 Correct shift count for 32 bit shift instructions. Correct sign
975 extension for arithmetic shifts to not shift the number of bits in
976 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
977 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
979 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
980 It's OK to have a mult follow a mult. What's not OK is to have a
982 (Convert): Comment out incorrect rounding code.
986 * interp.c (sim_monitor): Improved monitor printf
987 simulation. Tidied up simulator warnings, and added "--log" option
988 for directing warning message output.
989 * gencode.c: Use sim_warning() rather than WARNING macro.
993 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
994 getopt1.o, rather than on gencode.c. Link objects together.
995 Don't link against -liberty.
996 (gencode.o, getopt.o, getopt1.o): New targets.
997 * gencode.c: Include <ctype.h> and "ansidecl.h".
998 (AND): Undefine after including "ansidecl.h".
999 (ULONG_MAX): Define if not defined.
1000 (OP_*): Don't define macros; now defined in opcode/mips.h.
1001 (main): Call my_strtoul rather than strtoul.
1002 (my_strtoul): New static function.
1006 * gencode.c (process_instructions): Generate word64 and uword64
1007 instead of `long long' and `unsigned long long' data types.
1008 * interp.c: #include sysdep.h to get signals, and define default
1010 * (Convert): Work around for Visual-C++ compiler bug with type
1012 * support.h: Make things compile under Visual-C++ by using
1013 __int64 instead of `long long'. Change many refs to long long
1014 into word64/uword64 typedefs.
1018 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1019 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1021 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1022 (AC_PROG_INSTALL): Added.
1023 (AC_PROG_CC): Moved to before configure.host call.
1024 * configure: Rebuilt.
1028 * configure.in: Define @SIMCONF@ depending on mips target.
1029 * configure: Rebuild.
1030 * Makefile.in (run): Add @SIMCONF@ to control simulator
1032 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1033 * interp.c: Remove some debugging, provide more detailed error
1034 messages, update memory accesses to use LOADDRMASK.
1038 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1039 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1041 * configure: Rebuild.
1042 * config.in: New file, generated by autoheader.
1043 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1044 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1045 HAVE_ANINT and HAVE_AINT, as appropriate.
1046 * Makefile.in (run): Use @LIBS@ rather than -lm.
1047 (interp.o): Depend upon config.h.
1048 (Makefile): Just rebuild Makefile.
1049 (clean): Remove stamp-h.
1050 (mostlyclean): Make the same as clean, not as distclean.
1051 (config.h, stamp-h): New targets.
1055 * interp.c (ColdReset): Fix boolean test. Make all simulator
1060 * interp.c (xfer_direct_word, xfer_direct_long,
1061 swap_direct_word, swap_direct_long, xfer_big_word,
1062 xfer_big_long, xfer_little_word, xfer_little_long,
1063 swap_word,swap_long): Added.
1064 * interp.c (ColdReset): Provide function indirection to
1065 host<->simulated_target transfer routines.
1066 * interp.c (sim_store_register, sim_fetch_register): Updated to
1067 make use of indirected transfer routines.
1071 * gencode.c (process_instructions): Ensure FP ABS instruction
1073 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1074 system call support.
1078 * interp.c (sim_do_command): Complain if callback structure not
1083 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1084 support for Sun hosts.
1085 * Makefile.in (gencode): Ensure the host compiler and libraries
1086 used for cross-hosted build.
1090 * interp.c, gencode.c: Some more (TODO) tidying.
1094 * gencode.c, interp.c: Replaced explicit long long references with
1095 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1096 * support.h (SET64LO, SET64HI): Macros added.
1100 * configure: Regenerate with autoconf 2.7.
1104 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1105 * support.h: Remove superfluous "1" from #if.
1106 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1110 * interp.c (StoreFPR): Control UndefinedResult() call on
1111 WARN_RESULT manifest.
1115 * gencode.c: Tidied instruction decoding, and added FP instruction
1118 * interp.c: Added dineroIII, and BSD profiling support. Also
1119 run-time FP handling.
1123 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1124 gencode.c, interp.c, support.h: created.