3 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
7 * mn10300.h (MN10300_OPERAND_PCREL): Define.
8 (MN10300_OPERAND_MEMADDR): Define.
12 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
16 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
20 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
24 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
28 * alpha.h: Don't include "bfd.h"; private relocation types are now
29 negative to minimize problems with shared libraries. Organize
30 instruction subsets by AMASK extensions and PALcode
32 (struct alpha_operand): Move flags slot for better packing.
37 * v850.h (V850_OPERAND_RELAX): New operand flag.
42 * mn10300.h (FMT_*): Move operand format definitions
47 * mn10300.h (MN10300_OPERAND_PAREN): Define.
51 * mn10300.h (mn10300_opcode): Add "format" field.
52 (MN10300_OPERAND_*): Define.
57 * mn10200.h, mn10300.h: New files.
61 * mn10x00.h: New file.
66 * v850.h: Add new flag to indicate this instruction uses a PC
72 * h8300.h (stmac): Add missing instruction.
77 * v850.h (v850_opcode): Remove "size" field. Add "memop"
82 * v850.h (V850_OPERAND_EP): Define.
84 * v850.h (v850_opcode): Add size field.
88 * v850.h (v850_operands): Add insert and extract fields, pointers
89 to functions used to handle unusual operand encoding.
90 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
91 V850_OPERAND_SIGNED): Defined.
95 * v850.h (v850_operands): Add flags field.
96 (OPERAND_REG, OPERAND_NUM): Defined.
105 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
106 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
107 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
108 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
109 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
114 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
115 a 3 bit space id instead of a 2 bit space id.
120 * d10v.h: Add some additional defines to support the
121 assembler in determining which operations can be done in parallel.
126 * h8300.h (SN): Define.
127 (eepmov.b): Renamed from "eepmov"
128 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
134 * d10v.h (OPERAND_SHIFT): New operand flag.
138 * d10v.h: Changes for divs, parallel-only instructions, and
143 * d10v.h (pd_reg): Define. Putting the definition here allows
144 the assembler and disassembler to share the same struct.
149 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
160 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
164 * m68k.h (mcf5200): New macro.
165 Document names of coldfire control registers.
169 * h8300.h (SRC_IN_DST): Define.
171 * h8300.h (UNOP3): Mark the register operand in this insn
172 as a source operand, not a destination operand.
173 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
174 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
175 register operand with SRC_IN_DST.
183 * rs6k.h: Remove obsolete file.
187 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
188 fdivp, and fdivrp. Add ffreep.
192 * h8300.h: Reorder various #defines for readability.
193 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
194 (BITOP): Accept additional (unused) argument. All callers changed.
197 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
199 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
200 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
201 (BITOP, EBITOP): Handle new H8/S addressing modes for
203 (UNOP3): Handle new shift/rotate insns on the H8/S.
204 (insns using exr): New instructions.
205 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
209 * h8300.h (add.l): Undo Apr 5th change. The manual I had
214 * h8300.h (START): Remove.
215 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
216 and mov.l insns that can be relaxed.
220 * i386.h: Remove Abs32 from lcall.
224 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
226 Mark X,Y opcode letters as in use.
230 * sparc.h (F_FLOAT, F_FBR): Define.
234 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
236 (ABS8SRC,ABS8DST): Add ABS8MEM.
237 (add.l): Fix reg+reg variant.
238 (eepmov.w): Renamed from eepmovw.
239 (ldc,stc): Fix many cases.
243 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
247 * sparc.h (O): Mark operand letter as in use.
251 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
252 Mark operand letters uU as in use.
256 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
257 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
258 (SPARC_OPCODE_SUPPORTED): New macro.
259 (SPARC_OPCODE_CONFLICT_P): Rewrite.
264 * sparc.h (sparc_opcode_lookup_arch) Make return type in
265 declaration consistent with return type in definition.
269 * i386.h (i386_optab): Remove Data32 from pushf and popf.
273 * i386.h (i386_regtab): Add 80486 test registers.
277 * i960.h (I_HX): Define.
278 (i960_opcodes): Add HX instruction.
282 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
287 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
288 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
289 (bfd_* defines): Delete.
290 (sparc_opcode_archs): Replaces architecture_pname.
291 (sparc_opcode_lookup_arch): Declare.
292 (NUMOPCODES): Delete.
296 * sparc.h (enum sparc_architecture): Add v9a.
297 (ARCHITECTURES_CONFLICT_P): Update.
301 * i386.h: Added Pentium Pro instructions.
305 * m68k.h: Document new 'W' operand place.
309 * hppa.h: Add lci and syncdma instructions.
313 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
318 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
319 assembler's -mcom and -many switches.
323 * i386.h: Fix cmpxchg8b extension opcode description.
327 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
332 * m68k.h: Change comment: split type P into types 0, 1 and 2.
336 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
340 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
346 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
347 declarations. Remove F_ALIAS and flag field of struct
348 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
349 int. Make name and args fields of struct m68k_opcode const.
353 * sparc.h (F_NOTV9): Define.
357 * mips.h (INSN_4010): Define.
361 * m68k.h (TBL1): Reverse sense of "round" argument in result.
364 * m68k.h: Fix argument descriptions of coprocessor
365 instructions to allow only alterable operands where appropriate.
366 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
367 (m68k_opcode_aliases): Add more aliases.
372 * arc.h (struct arc_opcode): New flag value ARC_OPCODE_COND_BRANCH.
373 (ARC_DELAY_{NONE,NORMAL,JUMP): Define delay slot types.
378 * m68k.h: Added explcitly short-sized conditional branches, and a
379 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
380 svr4-based configurations.
385 * arc.h (struct arc_opcode): New members next_asm, next_dis.
386 (ARC_HASH_OPCODE, ARC_HASH_ICODE): Define.
387 (ARC_OPCODE_NEXT_ASM, ARC_OPCODE_NEXT_DIS): Define.
388 (arc_opcode_lookup_asm, arc_opcode_lookup_dis): Add prototypes.
392 * arc.h (arc_get_opcode_mach): Define prototype.
398 * i386.h: added missing Data16/Data32 flags to a few instructions.
402 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
403 (OP_MASK_BCC, OP_SH_BCC): Define.
404 (OP_MASK_PREFX, OP_SH_PREFX): Define.
405 (OP_MASK_CCC, OP_SH_CCC): Define.
406 (INSN_READ_FPR_R): Define.
411 * m68k.h (enum m68k_architecture): Deleted.
412 (struct m68k_opcode_alias): New type.
413 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
414 matching constraints, values and flags. As a side effect of this,
415 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
416 as I know were never used, now may need re-examining.
417 (numopcodes): Now const.
418 (m68k_opcode_aliases, numaliases): New variables.
420 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
421 m68k_opcode_aliases; update declaration of m68k_opcodes.
426 * arc.h (ARC_MACH_BIG): Define.
427 (ARC_MACH_MASK): Update.
428 (ARC_MACH_CPU_MASK): Define.
429 (ARC_OPCODE_CPU, ARC_OPVAL_CPU, ARC_HAVE_CPU): Likewise.
434 * hppa.h (delay_type): Delete unused enumeration.
435 (pa_opcode): Replace unused delayed field with an architecture
437 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
441 * mips.h (INSN_ISA4): Define.
445 * mips.h (M_DLA_AB, M_DLI): Define.
449 * hppa.h (fstwx): Fix single-bit error.
453 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
458 * arc.h (ARC_OPERAND_LIMM): New flag.
459 (ARC_OPERAND_ADDRESS): Likewise.
463 * arc.h (ARC_MACH_{BASE,HOST,GRAPHICS,AUDIO}): Define.
464 (ARC_MACH_MASK, ARC_OPCODE_MACH, ARC_OPVAL_MACH): Define.
465 (ARC_HAVE_MULT_SHIFT): Delete.
466 (ARC_HAVE_MACH): Define.
467 (struct arc_opcode): New field `flags'.
468 (struct arc_operand_value): Ditto.
469 (arc_opcode_supported): New function.
470 (arc_opval_supported): Ditto.
475 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
482 * i386.h (MOV_AX_DISP32): New macro.
483 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
484 of several call/return instructions.
485 (ADDR_PREFIX_OPCODE): New macro.
491 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
492 it pointer to const char;
493 (struct vot, field `name'): ditto.
497 * vax.h: Supply and properly group all values in end sentinel.
501 * mips.h (INSN_ISA, INSN_4650): Define.
506 * arc.h: Misc. cleanup. Merge "modifiers" into flags field.
507 Support multiply/shift insns.
518 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
519 systems with a separate instruction and data cache, such as the
520 29040, these instructions take an optional argument.
524 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
529 * mips.h (INSN_STORE_MEMORY): Define.
533 * sparc.h: Document new operand type 'x'.
537 * i960.h (I_CX2): New instruction category. It includes
538 instructions available on Cx and Jx processors.
539 (I_JX): New instruction category, for JX-only instructions.
540 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
541 Jx-only instructions, in I_JX category.
545 * ns32k.h (endop): Made pointer const too.
549 * ns32k.h: Drop Q operand type as there is no correct use
550 for it. Add I and Z operand types which allow better checking.
554 * h8300.h (xor.l) :fix bit pattern.
555 (L_2): New size of operand.
560 * m68k.h: Move "trap" before "tpcc" to change disassembly.
564 * sparc.h: Include v9 definitions.
568 * m68k.h (m68060): Defined.
569 (m68040up, mfloat, mmmu): Include it.
570 (struct m68k_opcode): Widen `arch' field.
571 (m68k_opcodes): Updated for M68060. Removed comments that were
572 instructions commented out by "JF" years ago.
576 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
577 add a one-bit `flags' field.
578 (F_ALIAS): New macro.
582 * h8300.h (dec, inc): Get encoding right.
586 * ppc.h (struct powerpc_operand): Removed signedp field; just use
588 (PPC_OPERAND_SIGNED): Define.
589 (PPC_OPERAND_SIGNOPT): Define.
593 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
598 * i386.h: Reverse last change. It'll be handled in gas instead.
602 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
603 slower on the 486 and used the implicit shift count despite the
604 explicit operand. The one-operand form is still available to get
605 the shorter form with the implicit shift count.
609 * hppa.h: Fix typo in fstws arg string.
613 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
617 * ppc.h (PPC_OPCODE_601): Define.
621 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
622 (so we can determine valid completers for both addb and addb[tf].)
624 * hppa.h (xmpyu): No floating point format specifier for the
629 * ppc.h (PPC_OPERAND_NEXT): Define.
630 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
631 (struct powerpc_macro): Define.
632 (powerpc_macros, powerpc_num_macros): Declare.
636 * ppc.h: New file. Header file for PowerPC opcode table.
640 * hppa.h: More minor template fixes for sfu and copr (to allow
641 for easier disassembly).
643 * hppa.h: Fix templates for all the sfu and copr instructions.
647 * i386.h (push): Permit Imm16 operand too.
651 * h8300.h (andc): Exists in base arch.
656 * hppa.h: #undef NONE to avoid conflict with hiux include files.
660 * hppa.h: Add FP quadword store instructions.
664 * mips.h: (M_J_A): Added.
669 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
674 * hppa.h: Immediate field in probei instructions is unsigned,
675 not low-sign extended.
679 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
683 * i386.h: Add "fxch" without operand.
687 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
691 * hppa.h: Add gfw and gfr to the opcode table.
695 * m88k.h: extended to handle m88110.
699 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
704 * i960.h (i960_opcodes): Properly bracket initializers.
708 * m88k.h (BOFLAG): rewrite to avoid nested comment.
712 * m68k.h (two): Protect second argument with parentheses.
716 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
717 Deleted old in/out instructions in "#if 0" section.
721 * i386.h (i386_optab): Properly bracket initializers.
725 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
730 * i386.h (lcall): Accept Imm32 operand also.
734 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
739 * mips.h (INSN_*): Changed values. Removed unused definitions.
740 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
741 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
742 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
743 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
744 (M_*): Added new values for r6000 and r4000 macros.
745 (ANY_DELAY): Removed.
749 * mips.h: Added M_LI_S and M_LI_SS.
753 * h8300.h: Get some rare mov.bs correct.
757 * sparc.h: Don't define const ourself; rely on ansidecl.h having
762 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
763 jump instructions, for use in disassemblers.
767 * m88k.h: Make bitfields just unsigned, not unsigned long or
772 * hppa.h: New argument type 'y'. Use in various float instructions.
776 * hppa.h (break): First immediate field is unsigned.
778 * hppa.h: Add rfir instruction.
782 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
786 * mips.h: Reworked the hazard information somewhat, and fixed some
787 bugs in the instruction hazard descriptions.
791 * m88k.h: Corrected a couple of opcodes.
795 * mips.h: Replaced with version from Ralph Campbell and OSF. The
796 new version includes instruction hazard information, but is
797 otherwise reasonably similar.
801 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
806 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
807 Make the tables be the same for the following instructions:
808 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
809 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
810 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
811 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
812 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
815 * hppa.h: Make new and old tables the same for "break", "mtctl",
816 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
817 Fix typo in last patch. Collapse several #ifdefs into a
820 * hppa.h: Delete remaining OLD_TABLE code. Bring some
821 of the comments up-to-date.
823 * hppa.h: Update "free list" of letters and update
824 comments describing each letter's function.
828 * h8300.h: checkpoint, includes H8/300-H opcodes.
833 * hppa.h: Rework single precision FP
834 instructions so that they correctly disassemble code
839 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
840 mov to allow instructions like mov ss,xyz(ecx) to assemble.
844 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
845 gdb will define it for now.
849 * sparc.h: Don't end enumerator list with comma.
854 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
855 ("bc2t"): Correct typo.
856 ("[ls]wc[023]"): Use T rather than t.
857 ("c[0123]"): Define general coprocessor instructions.
861 * m68k.h: Move split point for gcc compilation more towards
866 * rs6k.h: Clean up instructions for primary opcode 19 (many were
867 simply wrong, ics, rfi, & rfsvc were missing).
868 Add "a" to opr_ext for "bb". Doc fix.
873 * mips.h: Add casts, to suppress warnings about shifting too much.
874 * m68k.h: Document the placement code '9'.
878 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
879 allows callers to break up the large initialized struct full of
880 opcodes into two half-sized ones. This permits GCC to compile
881 this module, since it takes exponential space for initializers.
882 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
886 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
887 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
888 initialized structs in it.
893 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
894 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
898 * mips.h: document "i" and "j" operands correctly.
902 * mips.h: Removed endianness dependency.
906 * h8300.h: include info on number of cycles per instruction.
908 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
910 * hppa.h: Move handy aliases to the front. Fix masks for extract
911 and deposit instructions.
915 * i386.h: accept shld and shrd both with and without the shift
916 count argument, which is always %cl.
918 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
920 * i386.h (i386_optab_end, i386_regtab_end): Now const.
921 (one_byte_segment_defaults, two_byte_segment_defaults,
922 i386_prefixtab_end): Ditto.
926 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
931 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
932 always use 16-bit offsets. Makes calculated-size jump tables
937 * i386.h: Fix one-operand forms of in* and out* patterns.
941 * m68k.h: Added CPU32 support.
945 * mips.h (break): Disassemble the argument. Patch from
950 * m68k.h: merged Motorola and MIT syntax.
954 * m68k.h (pmove): make the tests less strict, the 68k book is
959 * m68k.h (m68ec030): Defined as alias for 68030.
960 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
961 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
962 them. Tightened description of "fmovex" to distinguish it from
963 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
964 up descriptions that claimed versions were available for chips not
965 supporting them. Added "pmovefd".
969 * m68k.h: fix where the . goes in divull
973 * m68k.h: the cas2 instruction is supposed to be written with
974 indirection on the last two operands, which can be either data or
975 address registers. Added a new operand type 'r' which accepts
976 either register type. Added new cases for cas2l and cas2w which
977 use them. Corrected masks for cas2 which failed to recognize use
982 * m68k.h: Merged in patches (mostly m68040-specific) from
985 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
986 base). Also cleaned up duplicates, re-ordered instructions for
987 the sake of dis-assembling (so aliases come after standard names).
988 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
992 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
997 * sparc.h: Moved tables to BFD library.
999 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1003 * h8300.h: Finish filling in all the holes in the opcode table,
1004 so that the Lucid C compiler can digest this as well...
1006 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1008 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1009 Fix opcodes on various sizes of fild/fist instructions
1010 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1011 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1013 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1015 * h8300.h: Fill in all the holes in the opcode table so that the
1016 losing HPUX C compiler can digest this...
1018 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1020 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1025 * sparc.h: Add new architecture variant sparclite; add its scan
1026 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1030 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1035 * rs6k.h: New version from IBM (Metin).
1039 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1042 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1044 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1048 * m68k.h (one, two): Cast macro args to unsigned to suppress
1049 complaints from compiler and lint about integer overflow during
1052 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1054 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1056 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1058 * mips.h: Make bitfield layout depend on the HOST compiler,
1059 not on the TARGET system.
1063 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1064 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1067 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1069 * h8300.h: turned op_type enum into #define list
1071 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1073 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1074 similar instructions -- they've been renamed to "fitoq", etc.
1075 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1076 number of arguments.
1077 * h8300.h: Remove extra ; which produces compiler warning.
1079 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1081 * sparc.h: fix opcode for tsubcctv.
1083 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1085 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1087 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1089 * sparc.h (nop): Made the 'lose' field be even tighter,
1090 so only a standard 'nop' is disassembled as a nop.
1092 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
1094 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
1095 disassembled as a nop.
1097 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
1099 * sparc.h: fix a typo.
1101 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
1103 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
1104 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
1105 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
1109 version-control: never