1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
28 /* Structure to hold information about predefined registers. */
35 struct dwarf2_line_info debug_line;
37 /* Generic assembler global variables which must be defined by all
40 /* Characters which always start a comment. */
41 const char comment_chars[] = "#";
43 /* Characters which start a comment at the beginning of a line. */
44 const char line_comment_chars[] = ";#";
46 /* Characters which may be used to separate multiple commands on a
48 const char line_separator_chars[] = ";";
50 /* Characters which are used to indicate an exponent in a floating
52 const char EXP_CHARS[] = "eE";
54 /* Characters which mean that a number is a floating point constant,
56 const char FLT_CHARS[] = "dD";
58 const relax_typeS md_relax_table[] = {
61 {0x7fff, -0x8000, 5, 2},
62 {0x7fffffff, -0x80000000, 7, 0},
64 /* bCC relaxing (uncommon cases) */
66 {0x7fff, -0x8000, 6, 5},
67 {0x7fffffff, -0x80000000, 8, 0},
70 {0x7fff, -0x8000, 5, 7},
71 {0x7fffffff, -0x80000000, 7, 0},
74 {0x7fff, -0x8000, 4, 9},
75 {0x7fffffff, -0x80000000, 6, 0},
79 {0x7fff, -0x8000, 3, 12},
80 {0x7fffffff, -0x80000000, 5, 0},
84 /* Local functions. */
85 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
86 const struct mn10300_operand *,
87 offsetT, char *, unsigned,
89 static unsigned long check_operand PARAMS ((unsigned long,
90 const struct mn10300_operand *,
92 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
93 static boolean data_register_name PARAMS ((expressionS *expressionP));
94 static boolean address_register_name PARAMS ((expressionS *expressionP));
95 static boolean other_register_name PARAMS ((expressionS *expressionP));
96 static void set_arch_mach PARAMS ((int));
98 static int current_machine;
101 #define MAX_INSN_FIXUPS (5)
106 bfd_reloc_code_real_type reloc;
108 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
111 /* We must store the value of each register operand so that we can
112 verify that certain registers do not match. */
113 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
115 const char *md_shortopts = "";
116 struct option md_longopts[] = {
117 {NULL, no_argument, NULL, 0}
119 size_t md_longopts_size = sizeof (md_longopts);
121 /* The target specific pseudo-ops which we support. */
122 const pseudo_typeS md_pseudo_table[] =
124 { "file", dwarf2_directive_file },
125 { "loc", dwarf2_directive_loc },
126 { "am30", set_arch_mach, AM30 },
127 { "am33", set_arch_mach, AM33 },
128 { "mn10300", set_arch_mach, MN103 },
132 #define HAVE_AM33 (current_machine == AM33)
133 #define HAVE_AM30 (current_machine == AM30)
135 /* Opcode hash table. */
136 static struct hash_control *mn10300_hash;
138 /* This table is sorted. Suitable for searching by a binary search. */
139 static const struct reg_name data_registers[] =
146 #define DATA_REG_NAME_CNT \
147 (sizeof (data_registers) / sizeof (struct reg_name))
149 static const struct reg_name address_registers[] =
157 #define ADDRESS_REG_NAME_CNT \
158 (sizeof (address_registers) / sizeof (struct reg_name))
160 static const struct reg_name r_registers[] =
204 #define R_REG_NAME_CNT \
205 (sizeof (r_registers) / sizeof (struct reg_name))
207 static const struct reg_name xr_registers[] =
232 #define XR_REG_NAME_CNT \
233 (sizeof (xr_registers) / sizeof (struct reg_name))
235 static const struct reg_name other_registers[] =
242 #define OTHER_REG_NAME_CNT \
243 (sizeof (other_registers) / sizeof (struct reg_name))
245 /* reg_name_search does a binary search of the given register table
246 to see if "name" is a valid regiter name. Returns the register
247 number from the array on success, or -1 on failure. */
250 reg_name_search (regs, regcount, name)
251 const struct reg_name *regs;
255 int middle, low, high;
263 middle = (low + high) / 2;
264 cmp = strcasecmp (name, regs[middle].name);
270 return regs[middle].value;
276 /* Summary of register_name().
278 * in: Input_line_pointer points to 1st char of operand.
280 * out: A expressionS.
281 * The operand may have been a register: in this case, X_op == O_register,
282 * X_add_number is set to the register number, and truth is returned.
283 * Input_line_pointer->(next non-blank) char after operand, or is in
284 * its original state.
288 r_register_name (expressionP)
289 expressionS *expressionP;
296 /* Find the spelling of the operand. */
297 start = name = input_line_pointer;
299 c = get_symbol_end ();
300 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
302 /* Look to see if it's in the register table. */
305 expressionP->X_op = O_register;
306 expressionP->X_add_number = reg_number;
308 /* Make the rest nice. */
309 expressionP->X_add_symbol = NULL;
310 expressionP->X_op_symbol = NULL;
312 /* Put back the delimiting char. */
313 *input_line_pointer = c;
318 /* Reset the line as if we had not done anything. */
319 /* Put back the delimiting char. */
320 *input_line_pointer = c;
322 /* Reset input_line pointer. */
323 input_line_pointer = start;
328 /* Summary of register_name().
330 * in: Input_line_pointer points to 1st char of operand.
332 * out: A expressionS.
333 * The operand may have been a register: in this case, X_op == O_register,
334 * X_add_number is set to the register number, and truth is returned.
335 * Input_line_pointer->(next non-blank) char after operand, or is in
336 * its original state.
340 xr_register_name (expressionP)
341 expressionS *expressionP;
348 /* Find the spelling of the operand. */
349 start = name = input_line_pointer;
351 c = get_symbol_end ();
352 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
354 /* Look to see if it's in the register table. */
357 expressionP->X_op = O_register;
358 expressionP->X_add_number = reg_number;
360 /* Make the rest nice. */
361 expressionP->X_add_symbol = NULL;
362 expressionP->X_op_symbol = NULL;
364 /* Put back the delimiting char. */
365 *input_line_pointer = c;
370 /* Reset the line as if we had not done anything. */
371 /* Put back the delimiting char. */
372 *input_line_pointer = c;
374 /* Reset input_line pointer. */
375 input_line_pointer = start;
380 /* Summary of register_name().
382 * in: Input_line_pointer points to 1st char of operand.
384 * out: A expressionS.
385 * The operand may have been a register: in this case, X_op == O_register,
386 * X_add_number is set to the register number, and truth is returned.
387 * Input_line_pointer->(next non-blank) char after operand, or is in
388 * its original state.
392 data_register_name (expressionP)
393 expressionS *expressionP;
400 /* Find the spelling of the operand. */
401 start = name = input_line_pointer;
403 c = get_symbol_end ();
404 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
406 /* Look to see if it's in the register table. */
409 expressionP->X_op = O_register;
410 expressionP->X_add_number = reg_number;
412 /* Make the rest nice. */
413 expressionP->X_add_symbol = NULL;
414 expressionP->X_op_symbol = NULL;
416 /* Put back the delimiting char. */
417 *input_line_pointer = c;
422 /* Reset the line as if we had not done anything. */
423 /* Put back the delimiting char. */
424 *input_line_pointer = c;
426 /* Reset input_line pointer. */
427 input_line_pointer = start;
432 /* Summary of register_name().
434 * in: Input_line_pointer points to 1st char of operand.
436 * out: A expressionS.
437 * The operand may have been a register: in this case, X_op == O_register,
438 * X_add_number is set to the register number, and truth is returned.
439 * Input_line_pointer->(next non-blank) char after operand, or is in
440 * its original state.
444 address_register_name (expressionP)
445 expressionS *expressionP;
452 /* Find the spelling of the operand. */
453 start = name = input_line_pointer;
455 c = get_symbol_end ();
456 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
458 /* Look to see if it's in the register table. */
461 expressionP->X_op = O_register;
462 expressionP->X_add_number = reg_number;
464 /* Make the rest nice. */
465 expressionP->X_add_symbol = NULL;
466 expressionP->X_op_symbol = NULL;
468 /* Put back the delimiting char. */
469 *input_line_pointer = c;
474 /* Reset the line as if we had not done anything. */
475 /* Put back the delimiting char. */
476 *input_line_pointer = c;
478 /* Reset input_line pointer. */
479 input_line_pointer = start;
485 /* Summary of register_name().
487 * in: Input_line_pointer points to 1st char of operand.
489 * out: A expressionS.
490 * The operand may have been a register: in this case, X_op == O_register,
491 * X_add_number is set to the register number, and truth is returned.
492 * Input_line_pointer->(next non-blank) char after operand, or is in
493 * its original state.
497 other_register_name (expressionP)
498 expressionS *expressionP;
505 /* Find the spelling of the operand. */
506 start = name = input_line_pointer;
508 c = get_symbol_end ();
509 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
511 /* Look to see if it's in the register table. */
514 expressionP->X_op = O_register;
515 expressionP->X_add_number = reg_number;
517 /* Make the rest nice. */
518 expressionP->X_add_symbol = NULL;
519 expressionP->X_op_symbol = NULL;
521 /* Put back the delimiting char. */
522 *input_line_pointer = c;
527 /* Reset the line as if we had not done anything. */
528 /* Put back the delimiting char. */
529 *input_line_pointer = c;
531 /* Reset input_line pointer. */
532 input_line_pointer = start;
538 md_show_usage (stream)
541 fprintf (stream, _("MN10300 options:\n\
546 md_parse_option (c, arg)
554 md_undefined_symbol (name)
561 md_atof (type, litp, sizep)
567 LITTLENUM_TYPE words[4];
583 return "bad call to md_atof";
586 t = atof_ieee (input_line_pointer, type, words);
588 input_line_pointer = t;
592 for (i = prec - 1; i >= 0; i--)
594 md_number_to_chars (litp, (valueT) words[i], 2);
602 md_convert_frag (abfd, sec, fragP)
607 static unsigned long label_count = 0;
610 subseg_change (sec, 0);
611 if (fragP->fr_subtype == 0)
613 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
614 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
618 else if (fragP->fr_subtype == 1)
620 /* Reverse the condition of the first branch. */
621 int offset = fragP->fr_fix;
622 int opcode = fragP->fr_literal[offset] & 0xff;
659 fragP->fr_literal[offset] = opcode;
661 /* Create a fixup for the reversed conditional branch. */
662 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
663 fix_new (fragP, fragP->fr_fix + 1, 1,
664 symbol_new (buf, sec, 0, fragP->fr_next),
665 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
667 /* Now create the unconditional branch + fixup to the
669 fragP->fr_literal[offset + 2] = 0xcc;
670 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
671 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
675 else if (fragP->fr_subtype == 2)
677 /* Reverse the condition of the first branch. */
678 int offset = fragP->fr_fix;
679 int opcode = fragP->fr_literal[offset] & 0xff;
716 fragP->fr_literal[offset] = opcode;
718 /* Create a fixup for the reversed conditional branch. */
719 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
720 fix_new (fragP, fragP->fr_fix + 1, 1,
721 symbol_new (buf, sec, 0, fragP->fr_next),
722 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
724 /* Now create the unconditional branch + fixup to the
726 fragP->fr_literal[offset + 2] = 0xdc;
727 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
728 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
732 else if (fragP->fr_subtype == 3)
734 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
735 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
739 else if (fragP->fr_subtype == 4)
741 /* Reverse the condition of the first branch. */
742 int offset = fragP->fr_fix;
743 int opcode = fragP->fr_literal[offset + 1] & 0xff;
762 fragP->fr_literal[offset + 1] = opcode;
764 /* Create a fixup for the reversed conditional branch. */
765 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
766 fix_new (fragP, fragP->fr_fix + 2, 1,
767 symbol_new (buf, sec, 0, fragP->fr_next),
768 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
770 /* Now create the unconditional branch + fixup to the
772 fragP->fr_literal[offset + 3] = 0xcc;
773 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
774 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
778 else if (fragP->fr_subtype == 5)
780 /* Reverse the condition of the first branch. */
781 int offset = fragP->fr_fix;
782 int opcode = fragP->fr_literal[offset + 1] & 0xff;
798 fragP->fr_literal[offset + 1] = opcode;
800 /* Create a fixup for the reversed conditional branch. */
801 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
802 fix_new (fragP, fragP->fr_fix + 2, 1,
803 symbol_new (buf, sec, 0, fragP->fr_next),
804 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
806 /* Now create the unconditional branch + fixup to the
808 fragP->fr_literal[offset + 3] = 0xdc;
809 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
810 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
814 else if (fragP->fr_subtype == 6)
816 int offset = fragP->fr_fix;
817 fragP->fr_literal[offset] = 0xcd;
818 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
819 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
823 else if (fragP->fr_subtype == 7)
825 int offset = fragP->fr_fix;
826 fragP->fr_literal[offset] = 0xdd;
827 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
828 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
830 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
831 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
835 else if (fragP->fr_subtype == 8)
837 int offset = fragP->fr_fix;
838 fragP->fr_literal[offset] = 0xfa;
839 fragP->fr_literal[offset + 1] = 0xff;
840 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
841 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
845 else if (fragP->fr_subtype == 9)
847 int offset = fragP->fr_fix;
848 fragP->fr_literal[offset] = 0xfc;
849 fragP->fr_literal[offset + 1] = 0xff;
851 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
852 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
856 else if (fragP->fr_subtype == 10)
858 fragP->fr_literal[fragP->fr_fix] = 0xca;
859 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
860 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
864 else if (fragP->fr_subtype == 11)
866 int offset = fragP->fr_fix;
867 fragP->fr_literal[offset] = 0xcc;
869 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
870 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
874 else if (fragP->fr_subtype == 12)
876 int offset = fragP->fr_fix;
877 fragP->fr_literal[offset] = 0xdc;
879 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
880 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
889 md_section_align (seg, addr)
893 int align = bfd_get_section_alignment (stdoutput, seg);
894 return ((addr + (1 << align) - 1) & (-1 << align));
900 char *prev_name = "";
901 register const struct mn10300_opcode *op;
903 mn10300_hash = hash_new ();
905 /* Insert unique names into hash table. The MN10300 instruction set
906 has many identical opcode names that have different opcodes based
907 on the operands. This hash table then provides a quick index to
908 the first opcode with a particular name in the opcode table. */
910 op = mn10300_opcodes;
913 if (strcmp (prev_name, op->name))
915 prev_name = (char *) op->name;
916 hash_insert (mn10300_hash, op->name, (char *) op);
921 /* This is both a simplification (we don't have to write md_apply_fix)
922 and support for future optimizations (branch shortening and similar
923 stuff in the linker). */
926 /* Set the default machine type. */
927 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
928 as_warn (_("could not set architecture and machine"));
930 current_machine = MN103;
938 struct mn10300_opcode *opcode;
939 struct mn10300_opcode *next_opcode;
940 const unsigned char *opindex_ptr;
941 int next_opindex, relaxable;
942 unsigned long insn, extension, size = 0, real_size;
947 /* Get the opcode. */
948 for (s = str; *s != '\0' && !isspace (*s); s++)
953 /* Find the first opcode with the proper name. */
954 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
957 as_bad (_("Unrecognized opcode: `%s'"), str);
962 while (isspace (*str))
965 input_line_pointer = str;
974 errmsg = _("Invalid opcode/operands");
976 /* Reset the array of register operands. */
977 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
983 insn = opcode->opcode;
986 /* If the instruction is not available on the current machine
987 then it can not possibly match. */
989 && !(opcode->machine == AM33 && HAVE_AM33)
990 && !(opcode->machine == AM30 && HAVE_AM30))
993 for (op_idx = 1, opindex_ptr = opcode->operands;
995 opindex_ptr++, op_idx++)
997 const struct mn10300_operand *operand;
1000 if (next_opindex == 0)
1002 operand = &mn10300_operands[*opindex_ptr];
1006 operand = &mn10300_operands[next_opindex];
1010 while (*str == ' ' || *str == ',')
1013 if (operand->flags & MN10300_OPERAND_RELAX)
1016 /* Gather the operand. */
1017 hold = input_line_pointer;
1018 input_line_pointer = str;
1020 if (operand->flags & MN10300_OPERAND_PAREN)
1022 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1024 input_line_pointer = hold;
1028 input_line_pointer++;
1031 /* See if we can match the operands. */
1032 else if (operand->flags & MN10300_OPERAND_DREG)
1034 if (!data_register_name (&ex))
1036 input_line_pointer = hold;
1041 else if (operand->flags & MN10300_OPERAND_AREG)
1043 if (!address_register_name (&ex))
1045 input_line_pointer = hold;
1050 else if (operand->flags & MN10300_OPERAND_SP)
1052 char *start = input_line_pointer;
1053 char c = get_symbol_end ();
1055 if (strcasecmp (start, "sp") != 0)
1057 *input_line_pointer = c;
1058 input_line_pointer = hold;
1062 *input_line_pointer = c;
1065 else if (operand->flags & MN10300_OPERAND_RREG)
1067 if (!r_register_name (&ex))
1069 input_line_pointer = hold;
1074 else if (operand->flags & MN10300_OPERAND_XRREG)
1076 if (!xr_register_name (&ex))
1078 input_line_pointer = hold;
1083 else if (operand->flags & MN10300_OPERAND_USP)
1085 char *start = input_line_pointer;
1086 char c = get_symbol_end ();
1088 if (strcasecmp (start, "usp") != 0)
1090 *input_line_pointer = c;
1091 input_line_pointer = hold;
1095 *input_line_pointer = c;
1098 else if (operand->flags & MN10300_OPERAND_SSP)
1100 char *start = input_line_pointer;
1101 char c = get_symbol_end ();
1103 if (strcasecmp (start, "ssp") != 0)
1105 *input_line_pointer = c;
1106 input_line_pointer = hold;
1110 *input_line_pointer = c;
1113 else if (operand->flags & MN10300_OPERAND_MSP)
1115 char *start = input_line_pointer;
1116 char c = get_symbol_end ();
1118 if (strcasecmp (start, "msp") != 0)
1120 *input_line_pointer = c;
1121 input_line_pointer = hold;
1125 *input_line_pointer = c;
1128 else if (operand->flags & MN10300_OPERAND_PC)
1130 char *start = input_line_pointer;
1131 char c = get_symbol_end ();
1133 if (strcasecmp (start, "pc") != 0)
1135 *input_line_pointer = c;
1136 input_line_pointer = hold;
1140 *input_line_pointer = c;
1143 else if (operand->flags & MN10300_OPERAND_EPSW)
1145 char *start = input_line_pointer;
1146 char c = get_symbol_end ();
1148 if (strcasecmp (start, "epsw") != 0)
1150 *input_line_pointer = c;
1151 input_line_pointer = hold;
1155 *input_line_pointer = c;
1158 else if (operand->flags & MN10300_OPERAND_PLUS)
1160 if (*input_line_pointer != '+')
1162 input_line_pointer = hold;
1166 input_line_pointer++;
1169 else if (operand->flags & MN10300_OPERAND_PSW)
1171 char *start = input_line_pointer;
1172 char c = get_symbol_end ();
1174 if (strcasecmp (start, "psw") != 0)
1176 *input_line_pointer = c;
1177 input_line_pointer = hold;
1181 *input_line_pointer = c;
1184 else if (operand->flags & MN10300_OPERAND_MDR)
1186 char *start = input_line_pointer;
1187 char c = get_symbol_end ();
1189 if (strcasecmp (start, "mdr") != 0)
1191 *input_line_pointer = c;
1192 input_line_pointer = hold;
1196 *input_line_pointer = c;
1199 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1201 unsigned int value = 0;
1202 if (*input_line_pointer != '[')
1204 input_line_pointer = hold;
1210 input_line_pointer++;
1212 /* We used to reject a null register list here; however,
1213 we accept it now so the compiler can emit "call"
1214 instructions for all calls to named functions.
1216 The linker can then fill in the appropriate bits for the
1217 register list and stack size or change the instruction
1218 into a "calls" if using "call" is not profitable. */
1219 while (*input_line_pointer != ']')
1224 if (*input_line_pointer == ',')
1225 input_line_pointer++;
1227 start = input_line_pointer;
1228 c = get_symbol_end ();
1230 if (strcasecmp (start, "d2") == 0)
1233 *input_line_pointer = c;
1235 else if (strcasecmp (start, "d3") == 0)
1238 *input_line_pointer = c;
1240 else if (strcasecmp (start, "a2") == 0)
1243 *input_line_pointer = c;
1245 else if (strcasecmp (start, "a3") == 0)
1248 *input_line_pointer = c;
1250 else if (strcasecmp (start, "other") == 0)
1253 *input_line_pointer = c;
1256 && strcasecmp (start, "exreg0") == 0)
1259 *input_line_pointer = c;
1262 && strcasecmp (start, "exreg1") == 0)
1265 *input_line_pointer = c;
1268 && strcasecmp (start, "exother") == 0)
1271 *input_line_pointer = c;
1274 && strcasecmp (start, "all") == 0)
1277 *input_line_pointer = c;
1281 input_line_pointer = hold;
1286 input_line_pointer++;
1287 mn10300_insert_operand (&insn, &extension, operand,
1288 value, (char *) NULL, 0, 0);
1292 else if (data_register_name (&ex))
1294 input_line_pointer = hold;
1298 else if (address_register_name (&ex))
1300 input_line_pointer = hold;
1304 else if (other_register_name (&ex))
1306 input_line_pointer = hold;
1310 else if (HAVE_AM33 && r_register_name (&ex))
1312 input_line_pointer = hold;
1316 else if (HAVE_AM33 && xr_register_name (&ex))
1318 input_line_pointer = hold;
1322 else if (*str == ')' || *str == '(')
1324 input_line_pointer = hold;
1336 errmsg = _("illegal operand");
1339 errmsg = _("missing operand");
1345 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1347 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1348 if ((operand->flags & mask) == 0)
1350 input_line_pointer = hold;
1355 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1357 else if (opcode->format == FMT_D2
1358 || opcode->format == FMT_D4
1359 || opcode->format == FMT_S2
1360 || opcode->format == FMT_S4
1361 || opcode->format == FMT_S6
1362 || opcode->format == FMT_D5)
1364 else if (opcode->format == FMT_D7)
1366 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1371 mn10300_insert_operand (&insn, &extension, operand,
1372 ex.X_add_number, (char *) NULL,
1375 /* And note the register number in the register array. */
1376 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1381 /* If this operand can be promoted, and it doesn't
1382 fit into the allocated bitfield for this insn,
1383 then promote it (ie this opcode does not match). */
1385 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1386 && !check_operand (insn, operand, ex.X_add_number))
1388 input_line_pointer = hold;
1393 mn10300_insert_operand (&insn, &extension, operand,
1394 ex.X_add_number, (char *) NULL,
1399 /* If this operand can be promoted, then this opcode didn't
1400 match since we can't know if it needed promotion! */
1401 if (operand->flags & MN10300_OPERAND_PROMOTE)
1403 input_line_pointer = hold;
1408 /* We need to generate a fixup for this expression. */
1409 if (fc >= MAX_INSN_FIXUPS)
1410 as_fatal (_("too many fixups"));
1411 fixups[fc].exp = ex;
1412 fixups[fc].opindex = *opindex_ptr;
1413 fixups[fc].reloc = BFD_RELOC_UNUSED;
1419 str = input_line_pointer;
1420 input_line_pointer = hold;
1422 while (*str == ' ' || *str == ',')
1427 /* Make sure we used all the operands! */
1431 /* If this instruction has registers that must not match, verify
1432 that they do indeed not match. */
1433 if (opcode->no_match_operands)
1437 /* Look at each operand to see if it's marked. */
1438 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1440 if ((1 << i) & opcode->no_match_operands)
1444 /* operand I is marked. Check that it does not match any
1445 operands > I which are marked. */
1446 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1448 if (((1 << j) & opcode->no_match_operands)
1449 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1451 errmsg = _("Invalid register specification.");
1463 next_opcode = opcode + 1;
1464 if (!strcmp (next_opcode->name, opcode->name))
1466 opcode = next_opcode;
1470 as_bad ("%s", errmsg);
1476 while (isspace (*str))
1480 as_bad (_("junk at end of line: `%s'"), str);
1482 input_line_pointer = str;
1484 /* Determine the size of the instruction. */
1485 if (opcode->format == FMT_S0)
1488 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1491 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1494 if (opcode->format == FMT_D6)
1497 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1500 if (opcode->format == FMT_D8)
1503 if (opcode->format == FMT_D9)
1506 if (opcode->format == FMT_S4)
1509 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1512 if (opcode->format == FMT_D2)
1515 if (opcode->format == FMT_D4)
1520 if (relaxable && fc > 0)
1527 /* Handle bra specially. Basically treat it like jmp so
1528 that we automatically handle 8, 16 and 32 bit offsets
1529 correctly as well as jumps to an undefined address.
1531 It is also important to not treat it like other bCC
1532 instructions since the long forms of bra is different
1533 from other bCC instructions. */
1534 if (opcode->opcode == 0xca00)
1546 else if (size == 3 && opcode->opcode == 0xcc0000)
1548 /* bCC (uncommon cases) */
1552 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1553 fixups[0].exp.X_add_symbol,
1554 fixups[0].exp.X_add_number,
1555 (char *)fixups[0].opindex);
1557 /* This is pretty hokey. We basically just care about the
1558 opcode, so we have to write out the first word big endian.
1560 The exception is "call", which has two operands that we
1563 The first operand (the register list) happens to be in the
1564 first instruction word, and will be in the right place if
1565 we output the first word in big endian mode.
1567 The second operand (stack size) is in the extension word,
1568 and we want it to appear as the first character in the extension
1569 word (as it appears in memory). Luckily, writing the extension
1570 word in big endian format will do what we want. */
1571 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1574 number_to_chars_bigendian (f + 4, extension, 4);
1575 number_to_chars_bigendian (f + 8, 0, size - 8);
1578 number_to_chars_bigendian (f + 4, extension, size - 4);
1582 /* Allocate space for the instruction. */
1583 f = frag_more (size);
1585 /* Fill in bytes for the instruction. Note that opcode fields
1586 are written big-endian, 16 & 32bit immediates are written
1587 little endian. Egad. */
1588 if (opcode->format == FMT_S0
1589 || opcode->format == FMT_S1
1590 || opcode->format == FMT_D0
1591 || opcode->format == FMT_D6
1592 || opcode->format == FMT_D7
1593 || opcode->format == FMT_D10
1594 || opcode->format == FMT_D1)
1596 number_to_chars_bigendian (f, insn, size);
1598 else if (opcode->format == FMT_S2
1599 && opcode->opcode != 0xdf0000
1600 && opcode->opcode != 0xde0000)
1602 /* A format S2 instruction that is _not_ "ret" and "retf". */
1603 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1604 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1606 else if (opcode->format == FMT_S2)
1608 /* This must be a ret or retf, which is written entirely in
1609 big-endian format. */
1610 number_to_chars_bigendian (f, insn, 3);
1612 else if (opcode->format == FMT_S4
1613 && opcode->opcode != 0xdc000000)
1615 /* This must be a format S4 "call" instruction. What a pain. */
1616 unsigned long temp = (insn >> 8) & 0xffff;
1617 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1618 number_to_chars_littleendian (f + 1, temp, 2);
1619 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1620 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1622 else if (opcode->format == FMT_S4)
1624 /* This must be a format S4 "jmp" instruction. */
1625 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1626 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1627 number_to_chars_littleendian (f + 1, temp, 4);
1629 else if (opcode->format == FMT_S6)
1631 unsigned long temp = ((insn & 0xffffff) << 8)
1632 | ((extension >> 16) & 0xff);
1633 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1634 number_to_chars_littleendian (f + 1, temp, 4);
1635 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1636 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1638 else if (opcode->format == FMT_D2
1639 && opcode->opcode != 0xfaf80000
1640 && opcode->opcode != 0xfaf00000
1641 && opcode->opcode != 0xfaf40000)
1643 /* A format D2 instruction where the 16bit immediate is
1644 really a single 16bit value, not two 8bit values. */
1645 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1646 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1648 else if (opcode->format == FMT_D2)
1650 /* A format D2 instruction where the 16bit immediate
1651 is really two 8bit immediates. */
1652 number_to_chars_bigendian (f, insn, 4);
1654 else if (opcode->format == FMT_D4)
1656 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
1658 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1659 number_to_chars_littleendian (f + 2, temp, 4);
1661 else if (opcode->format == FMT_D5)
1663 unsigned long temp = (((insn & 0xffff) << 16)
1664 | ((extension >> 8) & 0xffff));
1666 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1667 number_to_chars_littleendian (f + 2, temp, 4);
1668 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1670 else if (opcode->format == FMT_D8)
1672 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1674 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1675 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1676 number_to_chars_littleendian (f + 4, temp >> 8, 2);
1678 else if (opcode->format == FMT_D9)
1680 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1682 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1683 number_to_chars_littleendian (f + 3, temp, 4);
1686 /* Create any fixups. */
1687 for (i = 0; i < fc; i++)
1689 const struct mn10300_operand *operand;
1691 operand = &mn10300_operands[fixups[i].opindex];
1692 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1694 reloc_howto_type *reloc_howto;
1699 reloc_howto = bfd_reloc_type_lookup (stdoutput,
1705 size = bfd_get_reloc_size (reloc_howto);
1707 if (size < 1 || size > 4)
1711 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1712 size, &fixups[i].exp,
1713 reloc_howto->pc_relative,
1718 int reloc, pcrel, reloc_size, offset;
1721 reloc = BFD_RELOC_NONE;
1722 /* How big is the reloc? Remember SPLIT relocs are
1723 implicitly 32bits. */
1724 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1726 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1729 reloc_size = operand->bits;
1731 /* Is the reloc pc-relative? */
1732 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1734 /* Gross. This disgusting hack is to make sure we
1735 get the right offset for the 16/32 bit reloc in
1736 "call" instructions. Basically they're a pain
1737 because the reloc isn't at the end of the instruction. */
1738 if ((size == 5 || size == 7)
1739 && (((insn >> 24) & 0xff) == 0xcd
1740 || ((insn >> 24) & 0xff) == 0xdd))
1743 /* Similarly for certain bit instructions which don't
1744 hav their 32bit reloc at the tail of the instruction. */
1746 && (((insn >> 16) & 0xffff) == 0xfe00
1747 || ((insn >> 16) & 0xffff) == 0xfe01
1748 || ((insn >> 16) & 0xffff) == 0xfe02))
1751 offset = size - reloc_size / 8;
1753 /* Choose a proper BFD relocation type. */
1756 if (reloc_size == 32)
1757 reloc = BFD_RELOC_32_PCREL;
1758 else if (reloc_size == 16)
1759 reloc = BFD_RELOC_16_PCREL;
1760 else if (reloc_size == 8)
1761 reloc = BFD_RELOC_8_PCREL;
1767 if (reloc_size == 32)
1768 reloc = BFD_RELOC_32;
1769 else if (reloc_size == 16)
1770 reloc = BFD_RELOC_16;
1771 else if (reloc_size == 8)
1772 reloc = BFD_RELOC_8;
1777 /* Convert the size of the reloc into what fix_new_exp wants. */
1778 reloc_size = reloc_size / 8;
1779 if (reloc_size == 8)
1781 else if (reloc_size == 16)
1783 else if (reloc_size == 32)
1786 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1787 reloc_size, &fixups[i].exp, pcrel,
1788 ((bfd_reloc_code_real_type) reloc));
1791 fixP->fx_offset += offset;
1796 if (debug_type == DEBUG_DWARF2)
1800 /* First update the notion of the current source line. */
1801 dwarf2_where (&debug_line);
1803 /* We want the offset of the start of this instruction within the
1804 the current frag. */
1805 addr = frag_now->fr_address + frag_now_fix () - real_size;
1807 /* And record the information. */
1808 dwarf2_gen_line_info (addr, &debug_line);
1812 /* If while processing a fixup, a reloc really needs to be created
1813 then it is done here. */
1816 tc_gen_reloc (seg, fixp)
1821 reloc = (arelent *) xmalloc (sizeof (arelent));
1823 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1824 if (reloc->howto == (reloc_howto_type *) NULL)
1826 as_bad_where (fixp->fx_file, fixp->fx_line,
1827 _("reloc %d not supported by object file format"),
1828 (int) fixp->fx_r_type);
1831 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1833 if (fixp->fx_addsy && fixp->fx_subsy)
1836 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1837 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1839 as_bad_where (fixp->fx_file, fixp->fx_line,
1840 "Difference of symbols in different sections is not supported");
1844 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
1845 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1846 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1850 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1851 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1852 reloc->addend = fixp->fx_offset;
1858 md_estimate_size_before_relax (fragp, seg)
1862 if (fragp->fr_subtype == 0)
1864 if (fragp->fr_subtype == 3)
1866 if (fragp->fr_subtype == 6)
1868 if (!S_IS_DEFINED (fragp->fr_symbol)
1869 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1871 fragp->fr_subtype = 7;
1877 if (fragp->fr_subtype == 8)
1879 if (!S_IS_DEFINED (fragp->fr_symbol)
1880 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1882 fragp->fr_subtype = 9;
1888 if (fragp->fr_subtype == 10)
1890 if (!S_IS_DEFINED (fragp->fr_symbol)
1891 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1893 fragp->fr_subtype = 12;
1903 md_pcrel_from (fixp)
1906 return fixp->fx_frag->fr_address;
1908 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
1910 /* The symbol is undefined. Let the linker figure it out. */
1913 return fixp->fx_frag->fr_address + fixp->fx_where;
1918 md_apply_fix3 (fixp, valuep, seg)
1923 /* We shouldn't ever get here because linkrelax is nonzero. */
1929 /* Insert an operand value into an instruction. */
1932 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
1933 unsigned long *insnp;
1934 unsigned long *extensionp;
1935 const struct mn10300_operand *operand;
1941 /* No need to check 32bit operands for a bit. Note that
1942 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1943 if (operand->bits != 32
1944 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1950 bits = operand->bits;
1951 if (operand->flags & MN10300_OPERAND_24BIT)
1954 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1956 max = (1 << (bits - 1)) - 1;
1957 min = - (1 << (bits - 1));
1961 max = (1 << bits) - 1;
1967 if (test < (offsetT) min || test > (offsetT) max)
1970 _("operand out of range (%s not between %ld and %ld)");
1973 sprint_value (buf, test);
1974 if (file == (char *) NULL)
1975 as_warn (err, buf, min, max);
1977 as_warn_where (file, line, err, buf, min, max);
1981 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1983 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1984 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1987 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1989 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1990 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1993 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1995 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1996 << (operand->shift + shift));
1998 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1999 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2000 << (operand->shift + shift + operand->bits));
2004 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2005 << (operand->shift + shift));
2007 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2008 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2009 << (operand->shift + shift + operand->bits));
2013 static unsigned long
2014 check_operand (insn, operand, val)
2016 const struct mn10300_operand *operand;
2019 /* No need to check 32bit operands for a bit. Note that
2020 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2021 if (operand->bits != 32
2022 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2028 bits = operand->bits;
2029 if (operand->flags & MN10300_OPERAND_24BIT)
2032 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2034 max = (1 << (bits - 1)) - 1;
2035 min = - (1 << (bits - 1));
2039 max = (1 << bits) - 1;
2045 if (test < (offsetT) min || test > (offsetT) max)
2054 set_arch_mach (mach)
2057 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2058 as_warn (_("could not set architecture and machine"));
2060 current_machine = mach;
2066 if (debug_type == DEBUG_DWARF2)