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Commit | Line | Data |
---|---|---|
edece237 CV |
1 | 2005-02-21 Corinna Vinschen <[email protected]> |
2 | ||
3 | * iq2000.c: Eliminate need to include gdb/sim-iq2000.h. | |
4 | ||
5 | 2005-02-18 Corinna Vinschen <[email protected]> | |
6 | ||
7 | * configure.ac: Rename from configure.in and pull up to autoconf 2.59. | |
8 | * configure: Regenerate. | |
9 | ||
10 | 2002-03-18 Jeff Johnston <[email protected]> | |
11 | ||
12 | * sem-switch.c: Regenerated. | |
13 | * sem.c: Ditto. | |
14 | ||
15 | 2002-01-28 Jeff Johnston <[email protected]> | |
16 | ||
17 | * arch.c: Regenerated. | |
18 | * arch.h: Ditto. | |
19 | * cpu.c: Ditto. | |
20 | * cpu.h: Ditto. | |
21 | * cpuall.h: Ditto. | |
22 | * decode.c: Ditto. | |
23 | * decode.h: Ditto. | |
24 | * model.c: Ditto. | |
25 | * sem-switch.c: Ditto. | |
26 | * sem.c: Ditto. | |
27 | ||
28 | 2001-11-16 Jeff Johnston <[email protected]> | |
29 | ||
30 | * decode.c: Regenerated after putting orui into machine-specific | |
31 | files. | |
32 | * decode.h: Ditto. | |
33 | * model.c: Ditto. | |
34 | * sem-switch.c: Ditto. | |
35 | * sem.c: Ditto. | |
36 | ||
37 | 2001-11-13 Jeff Johnston <[email protected]> | |
38 | ||
39 | * cpu.h: Regenerated after changing jump and branch operands | |
40 | so that no bit masking is performed. | |
41 | * decode.c: Ditto. | |
42 | * iq2000.c (get_h_pc): Change to return h_pc directly. | |
43 | (set_h_pc): Change to always set the insn mask bit. | |
44 | * sim-if.c (iq2000bf_disassemble_insn): Change to pass the | |
45 | pc untouched. | |
46 | (sim_create_inferior): Changed so starting address is taken | |
47 | directly from link. If not specified, start address is | |
48 | 0 with insn mask set on. | |
49 | ||
50 | 2001-11-08 Jeff Johnston <[email protected]> | |
51 | ||
52 | * cpu.h: Regenerated after making jump operand UINT. | |
53 | * decode.c: Ditto. | |
54 | ||
55 | 2001-10-31 Jeff Johnston <[email protected]> | |
56 | ||
57 | * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw, | |
58 | sb, sh, and sw insns handling of offset operand. | |
59 | * sem.c: Ditto. | |
60 | ||
61 | 2001-10-30 Jeff Johnston <[email protected]> | |
62 | ||
63 | * cpu.c: Regenerated. | |
64 | * cpu.h: Ditto. | |
65 | * decode.c: Ditto. | |
66 | * sem-switch.c: Ditto. | |
67 | * sem.c: Ditto. | |
68 | * iq2000.c (get_h_pc): New routine. | |
69 | (set_h_pc): Ditto. | |
70 | (fetch_str): Translate cpu data addresses to data area. | |
71 | (do_syscall): Ditto. | |
72 | (iq2000bf_fetch_register): Use get_h_pc. | |
73 | (iq2000bf_store_register): Use set_h_pc. | |
74 | * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN | |
75 | on the pc value passed first. | |
76 | * sim-if.c (iq2000bf_disassemble_insn): New function. | |
77 | (sim_open): Add extra memory region for insn memory vs data memory. | |
78 | Also change disassembler to be iq2000bf_disassemble_insn. | |
79 | (sim_create_inferior): Translate start address using INSN2CPU macro. | |
80 | * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros | |
81 | to translate between Harvard and cpu addresses. | |
82 | ||
83 | 2001-10-26 Jeff Johnston <[email protected]> | |
84 | ||
85 | * sem-switch.c: Regenerated after reverting addiu | |
86 | change. | |
87 | * sem.c: Ditto. | |
88 | ||
89 | 2001-10-25 Jeff Johnston <[email protected]> | |
90 | ||
91 | * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until | |
92 | iq10 simulator merged here. | |
93 | * cpu.h: Regenerated after fixing addiu insn. | |
94 | * cpuall.h: Ditto. | |
95 | * decode.c: Ditto. | |
96 | * decode.h: Ditto. | |
97 | * model.c: Ditto. | |
98 | * sem-switch.c: Ditto. | |
99 | * sem.c: Ditto. | |
100 | ||
101 | 2001-09-12 Stan Cox <[email protected]> | |
102 | ||
103 | * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c, | |
104 | sem.c}: Regen'd. | |
105 | * iq2000.c (do_syscall): Support system traps. | |
106 | ||
107 | 2001-07-05 Ben Elliston <[email protected]> | |
108 | ||
109 | * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR). | |
110 | (stamp-cpu): Likewise. | |
111 | ||
112 | 2001-04-02 Ben Elliston <[email protected]> | |
113 | ||
114 | * arch.c, arch.h: Regnerate to track recent cgen improvements. | |
115 | * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise. | |
116 | * model.c, sem-switch.c, sem.c: Likewise. | |
117 | ||
118 | 2001-01-22 Ben Elliston <[email protected]> | |
119 | ||
120 | * cpu.h, decode.c, decode.h, model.c: Regenerate. | |
121 | * sem.c, sem-switch.c: Likewise. | |
122 | ||
123 | * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate. | |
124 | * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise. | |
125 | ||
126 | 2000-07-05 Ben Elliston <[email protected]> | |
127 | ||
128 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
129 | ||
130 | 2000-07-04 Ben Elliston <[email protected]> | |
131 | ||
132 | * sem.c, sem-switch.c: Regenerate. | |
133 | ||
134 | * iq2000.c (do_break): Use sim_engine_halt (). | |
135 | * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate. | |
136 | ||
137 | 2000-07-03 Ben Elliston <[email protected]> | |
138 | ||
139 | * iq2000.c (do_syscall): Examine syscall register (nominally %11). | |
140 | (do_break): Handle breakpoints. | |
141 | * tconfig.in (SIM_HAVE_BREAKPOINTS): Define. | |
142 | (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise. | |
143 | ||
144 | 2000-06-29 Andrew Cagney <[email protected]> | |
145 | ||
146 | * iq2000.c (iq2000bf_fetch_register): Implement. | |
147 | (iq2000bf_store_register): Ditto. | |
148 | ||
149 | 2000-05-17 Ben Elliston <[email protected]> | |
150 | ||
151 | * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE | |
152 | to set the skip count for the (skip ..) rtx. | |
153 | (extract-pbb): Likewise. | |
154 | (extract-pbb): Include the delay slot instruction of all CTI | |
155 | instructions in the pbb, not just those that may nullify their | |
156 | delay slot (eg. likely branches). | |
157 | ||
158 | * sem.c, sem-switch.c: Regenerate. | |
159 | ||
160 | 2000-05-16 Ben Elliston <[email protected]> | |
161 | ||
162 | * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate. | |
163 | * sem.c, sem-switch.c: Likewise. | |
164 | * mloop.in (extract-pbb): Prohibit branch instructions in the | |
165 | delay slot of branch likely instructions. | |
166 | ||
167 | 2000-05-16 Ben Elliston <[email protected]> | |
168 | ||
169 | * Makefile.in: New file. | |
170 | * configure.in: Ditto. | |
171 | * acconfig.h: Ditto. | |
172 | * config.in, configure: Generate. | |
173 | * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto. | |
174 | * decode.c, decode.h: Ditto. | |
175 | * model.c, sem-switch.c, sem.c: Ditto. | |
176 | * mloop.in: New file. | |
177 | * iq2000.c: Ditto. | |
178 | * iq2000-sim.h: Ditto. | |
179 | * sim-if.c: Ditto. | |
180 | * sim-main.h: Ditto. | |
181 | * tconfig.in: Ditto |