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dd3b648e | 1 | /* Target-machine dependent code for the AMD 29000 |
18b46e7c SS |
2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995 |
3 | Free Software Foundation, Inc. | |
dd3b648e RP |
4 | Contributed by Cygnus Support. Written by Jim Kingdon. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
99a7de40 JG |
10 | the Free Software Foundation; either version 2 of the License, or |
11 | (at your option) any later version. | |
dd3b648e RP |
12 | |
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
99a7de40 | 19 | along with this program; if not, write to the Free Software |
6c9638b4 | 20 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
dd3b648e RP |
21 | |
22 | #include "defs.h" | |
23 | #include "gdbcore.h" | |
dd3b648e RP |
24 | #include "frame.h" |
25 | #include "value.h" | |
dd3b648e RP |
26 | #include "symtab.h" |
27 | #include "inferior.h" | |
8f86a4e4 | 28 | #include "gdbcmd.h" |
dd3b648e | 29 | |
946f014b JG |
30 | /* If all these bits in an instruction word are zero, it is a "tag word" |
31 | which precedes a function entry point and gives stack traceback info. | |
32 | This used to be defined as 0xff000000, but that treated 0x00000deb as | |
33 | a tag word, while it is really used as a breakpoint. */ | |
34 | #define TAGWORD_ZERO_MASK 0xff00f800 | |
35 | ||
7730bd5a JG |
36 | extern CORE_ADDR text_start; /* FIXME, kludge... */ |
37 | ||
8f86a4e4 JG |
38 | /* The user-settable top of the register stack in virtual memory. We |
39 | won't attempt to access any stored registers above this address, if set | |
40 | nonzero. */ | |
41 | ||
42 | static CORE_ADDR rstack_high_address = UINT_MAX; | |
43 | ||
dd3b648e | 44 | /* Structure to hold cached info about function prologues. */ |
669caa9c | 45 | |
dd3b648e RP |
46 | struct prologue_info |
47 | { | |
48 | CORE_ADDR pc; /* First addr after fn prologue */ | |
49 | unsigned rsize, msize; /* register stack frame size, mem stack ditto */ | |
50 | unsigned mfp_used : 1; /* memory frame pointer used */ | |
51 | unsigned rsize_valid : 1; /* Validity bits for the above */ | |
52 | unsigned msize_valid : 1; | |
53 | unsigned mfp_valid : 1; | |
54 | }; | |
55 | ||
56 | /* Examine the prologue of a function which starts at PC. Return | |
57 | the first addess past the prologue. If MSIZE is non-NULL, then | |
58 | set *MSIZE to the memory stack frame size. If RSIZE is non-NULL, | |
59 | then set *RSIZE to the register stack frame size (not including | |
60 | incoming arguments and the return address & frame pointer stored | |
61 | with them). If no prologue is found, *RSIZE is set to zero. | |
62 | If no prologue is found, or a prologue which doesn't involve | |
63 | allocating a memory stack frame, then set *MSIZE to zero. | |
64 | ||
65 | Note that both msize and rsize are in bytes. This is not consistent | |
66 | with the _User's Manual_ with respect to rsize, but it is much more | |
67 | convenient. | |
68 | ||
69 | If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory | |
70 | frame pointer is being used. */ | |
669caa9c | 71 | |
dd3b648e RP |
72 | CORE_ADDR |
73 | examine_prologue (pc, rsize, msize, mfp_used) | |
74 | CORE_ADDR pc; | |
75 | unsigned *msize; | |
76 | unsigned *rsize; | |
77 | int *mfp_used; | |
78 | { | |
79 | long insn; | |
80 | CORE_ADDR p = pc; | |
1ab3bf1b | 81 | struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc); |
dd3b648e RP |
82 | struct prologue_info *mi = 0; |
83 | ||
1ab3bf1b | 84 | if (msymbol != NULL) |
07df4831 | 85 | mi = (struct prologue_info *) msymbol -> info; |
dd3b648e RP |
86 | |
87 | if (mi != 0) | |
88 | { | |
89 | int valid = 1; | |
90 | if (rsize != NULL) | |
91 | { | |
92 | *rsize = mi->rsize; | |
93 | valid &= mi->rsize_valid; | |
94 | } | |
95 | if (msize != NULL) | |
96 | { | |
97 | *msize = mi->msize; | |
98 | valid &= mi->msize_valid; | |
99 | } | |
100 | if (mfp_used != NULL) | |
101 | { | |
102 | *mfp_used = mi->mfp_used; | |
103 | valid &= mi->mfp_valid; | |
104 | } | |
105 | if (valid) | |
106 | return mi->pc; | |
107 | } | |
108 | ||
109 | if (rsize != NULL) | |
110 | *rsize = 0; | |
111 | if (msize != NULL) | |
112 | *msize = 0; | |
113 | if (mfp_used != NULL) | |
114 | *mfp_used = 0; | |
115 | ||
116 | /* Prologue must start with subtracting a constant from gr1. | |
117 | Normally this is sub gr1,gr1,<rsize * 4>. */ | |
118 | insn = read_memory_integer (p, 4); | |
119 | if ((insn & 0xffffff00) != 0x25010100) | |
120 | { | |
121 | /* If the frame is large, instead of a single instruction it | |
122 | might be a pair of instructions: | |
123 | const <reg>, <rsize * 4> | |
124 | sub gr1,gr1,<reg> | |
125 | */ | |
126 | int reg; | |
127 | /* Possible value for rsize. */ | |
128 | unsigned int rsize0; | |
129 | ||
130 | if ((insn & 0xff000000) != 0x03000000) | |
131 | { | |
132 | p = pc; | |
133 | goto done; | |
134 | } | |
135 | reg = (insn >> 8) & 0xff; | |
136 | rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff)); | |
137 | p += 4; | |
138 | insn = read_memory_integer (p, 4); | |
139 | if ((insn & 0xffffff00) != 0x24010100 | |
140 | || (insn & 0xff) != reg) | |
141 | { | |
142 | p = pc; | |
143 | goto done; | |
144 | } | |
145 | if (rsize != NULL) | |
146 | *rsize = rsize0; | |
147 | } | |
148 | else | |
149 | { | |
150 | if (rsize != NULL) | |
151 | *rsize = (insn & 0xff); | |
152 | } | |
153 | p += 4; | |
154 | ||
7b2bcbf5 | 155 | /* Next instruction ought to be asgeu V_SPILL,gr1,rab. |
d0b04c6a SG |
156 | * We don't check the vector number to allow for kernel debugging. The |
157 | * kernel will use a different trap number. | |
7b2bcbf5 JG |
158 | * If this insn is missing, we just keep going; Metaware R2.3u compiler |
159 | * generates prologue that intermixes initializations and puts the asgeu | |
160 | * way down. | |
d0b04c6a | 161 | */ |
dd3b648e | 162 | insn = read_memory_integer (p, 4); |
7b2bcbf5 | 163 | if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM)) |
dd3b648e | 164 | { |
7b2bcbf5 | 165 | p += 4; |
dd3b648e | 166 | } |
dd3b648e RP |
167 | |
168 | /* Next instruction usually sets the frame pointer (lr1) by adding | |
169 | <size * 4> from gr1. However, this can (and high C does) be | |
170 | deferred until anytime before the first function call. So it is | |
d0b04c6a SG |
171 | OK if we don't see anything which sets lr1. |
172 | To allow for alternate register sets (gcc -mkernel-registers) the msp | |
173 | register number is a compile time constant. */ | |
174 | ||
dd3b648e RP |
175 | /* Normally this is just add lr1,gr1,<size * 4>. */ |
176 | insn = read_memory_integer (p, 4); | |
177 | if ((insn & 0xffffff00) == 0x15810100) | |
178 | p += 4; | |
179 | else | |
180 | { | |
181 | /* However, for large frames it can be | |
182 | const <reg>, <size *4> | |
183 | add lr1,gr1,<reg> | |
184 | */ | |
185 | int reg; | |
186 | CORE_ADDR q; | |
187 | ||
188 | if ((insn & 0xff000000) == 0x03000000) | |
189 | { | |
190 | reg = (insn >> 8) & 0xff; | |
191 | q = p + 4; | |
192 | insn = read_memory_integer (q, 4); | |
193 | if ((insn & 0xffffff00) == 0x14810100 | |
194 | && (insn & 0xff) == reg) | |
195 | p = q; | |
196 | } | |
197 | } | |
198 | ||
199 | /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory | |
200 | frame pointer is in use. We just check for add lr<anything>,msp,0; | |
201 | we don't check this rsize against the first instruction, and | |
202 | we don't check that the trace-back tag indicates a memory frame pointer | |
203 | is in use. | |
d0b04c6a SG |
204 | To allow for alternate register sets (gcc -mkernel-registers) the msp |
205 | register number is a compile time constant. | |
dd3b648e RP |
206 | |
207 | The recommended instruction is actually "sll lr<whatever>,msp,0". | |
208 | We check for that, too. Originally Jim Kingdon's code seemed | |
209 | to be looking for a "sub" instruction here, but the mask was set | |
210 | up to lose all the time. */ | |
211 | insn = read_memory_integer (p, 4); | |
d0b04c6a SG |
212 | if (((insn & 0xff80ffff) == (0x15800000|(MSP_HW_REGNUM<<8))) /* add */ |
213 | || ((insn & 0xff80ffff) == (0x81800000|(MSP_HW_REGNUM<<8)))) /* sll */ | |
dd3b648e RP |
214 | { |
215 | p += 4; | |
216 | if (mfp_used != NULL) | |
217 | *mfp_used = 1; | |
218 | } | |
219 | ||
220 | /* Next comes a subtraction from msp to allocate a memory frame, | |
221 | but only if a memory frame is | |
222 | being used. We don't check msize against the trace-back tag. | |
223 | ||
d0b04c6a SG |
224 | To allow for alternate register sets (gcc -mkernel-registers) the msp |
225 | register number is a compile time constant. | |
226 | ||
dd3b648e RP |
227 | Normally this is just |
228 | sub msp,msp,<msize> | |
229 | */ | |
230 | insn = read_memory_integer (p, 4); | |
d0b04c6a SG |
231 | if ((insn & 0xffffff00) == |
232 | (0x25000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8))) | |
dd3b648e RP |
233 | { |
234 | p += 4; | |
d0b04c6a | 235 | if (msize != NULL) |
dd3b648e RP |
236 | *msize = insn & 0xff; |
237 | } | |
238 | else | |
239 | { | |
240 | /* For large frames, instead of a single instruction it might | |
241 | be | |
242 | ||
243 | const <reg>, <msize> | |
244 | consth <reg>, <msize> ; optional | |
245 | sub msp,msp,<reg> | |
246 | */ | |
247 | int reg; | |
248 | unsigned msize0; | |
249 | CORE_ADDR q = p; | |
250 | ||
251 | if ((insn & 0xff000000) == 0x03000000) | |
252 | { | |
253 | reg = (insn >> 8) & 0xff; | |
254 | msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff); | |
255 | q += 4; | |
256 | insn = read_memory_integer (q, 4); | |
257 | /* Check for consth. */ | |
258 | if ((insn & 0xff000000) == 0x02000000 | |
259 | && (insn & 0x0000ff00) == reg) | |
260 | { | |
261 | msize0 |= (insn << 8) & 0xff000000; | |
262 | msize0 |= (insn << 16) & 0x00ff0000; | |
263 | q += 4; | |
264 | insn = read_memory_integer (q, 4); | |
265 | } | |
266 | /* Check for sub msp,msp,<reg>. */ | |
d0b04c6a SG |
267 | if ((insn & 0xffffff00) == |
268 | (0x24000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8)) | |
dd3b648e RP |
269 | && (insn & 0xff) == reg) |
270 | { | |
271 | p = q + 4; | |
272 | if (msize != NULL) | |
273 | *msize = msize0; | |
274 | } | |
275 | } | |
276 | } | |
277 | ||
7b2bcbf5 JG |
278 | /* Next instruction might be asgeu V_SPILL,gr1,rab. |
279 | * We don't check the vector number to allow for kernel debugging. The | |
280 | * kernel will use a different trap number. | |
281 | * Metaware R2.3u compiler | |
282 | * generates prologue that intermixes initializations and puts the asgeu | |
283 | * way down after everything else. | |
284 | */ | |
285 | insn = read_memory_integer (p, 4); | |
286 | if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM)) | |
287 | { | |
288 | p += 4; | |
289 | } | |
290 | ||
dd3b648e | 291 | done: |
1ab3bf1b | 292 | if (msymbol != NULL) |
dd3b648e RP |
293 | { |
294 | if (mi == 0) | |
295 | { | |
296 | /* Add a new cache entry. */ | |
297 | mi = (struct prologue_info *)xmalloc (sizeof (struct prologue_info)); | |
07df4831 | 298 | msymbol -> info = (char *)mi; |
dd3b648e RP |
299 | mi->rsize_valid = 0; |
300 | mi->msize_valid = 0; | |
301 | mi->mfp_valid = 0; | |
302 | } | |
303 | /* else, cache entry exists, but info is incomplete. */ | |
304 | mi->pc = p; | |
305 | if (rsize != NULL) | |
306 | { | |
307 | mi->rsize = *rsize; | |
308 | mi->rsize_valid = 1; | |
309 | } | |
310 | if (msize != NULL) | |
311 | { | |
312 | mi->msize = *msize; | |
313 | mi->msize_valid = 1; | |
314 | } | |
315 | if (mfp_used != NULL) | |
316 | { | |
317 | mi->mfp_used = *mfp_used; | |
318 | mi->mfp_valid = 1; | |
319 | } | |
320 | } | |
321 | return p; | |
322 | } | |
323 | ||
324 | /* Advance PC across any function entry prologue instructions | |
325 | to reach some "real" code. */ | |
326 | ||
327 | CORE_ADDR | |
328 | skip_prologue (pc) | |
329 | CORE_ADDR pc; | |
330 | { | |
669caa9c | 331 | return examine_prologue (pc, NULL, NULL, NULL); |
dd3b648e | 332 | } |
669caa9c | 333 | |
d0b04c6a SG |
334 | /* |
335 | * Examine the one or two word tag at the beginning of a function. | |
336 | * The tag word is expect to be at 'p', if it is not there, we fail | |
337 | * by returning 0. The documentation for the tag word was taken from | |
338 | * page 7-15 of the 29050 User's Manual. We are assuming that the | |
339 | * m bit is in bit 22 of the tag word, which seems to be the agreed upon | |
340 | * convention today (1/15/92). | |
341 | * msize is return in bytes. | |
342 | */ | |
669caa9c | 343 | |
d0b04c6a | 344 | static int /* 0/1 - failure/success of finding the tag word */ |
669caa9c | 345 | examine_tag (p, is_trans, argcount, msize, mfp_used) |
d0b04c6a SG |
346 | CORE_ADDR p; |
347 | int *is_trans; | |
669caa9c | 348 | int *argcount; |
d0b04c6a SG |
349 | unsigned *msize; |
350 | int *mfp_used; | |
351 | { | |
352 | unsigned int tag1, tag2; | |
353 | ||
354 | tag1 = read_memory_integer (p, 4); | |
946f014b | 355 | if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */ |
d0b04c6a SG |
356 | return 0; |
357 | if (tag1 & (1<<23)) /* A two word tag */ | |
358 | { | |
48855ed5 | 359 | tag2 = read_memory_integer (p-4, 4); |
d0b04c6a | 360 | if (msize) |
48855ed5 | 361 | *msize = tag2 * 2; |
d0b04c6a SG |
362 | } |
363 | else /* A one word tag */ | |
364 | { | |
365 | if (msize) | |
366 | *msize = tag1 & 0x7ff; | |
367 | } | |
368 | if (is_trans) | |
7f2ffa58 JK |
369 | *is_trans = ((tag1 & (1<<21)) ? 1 : 0); |
370 | /* Note that this includes the frame pointer and the return address | |
371 | register, so the actual number of registers of arguments is two less. | |
372 | argcount can be zero, however, sometimes, for strange assembler | |
373 | routines. */ | |
d0b04c6a SG |
374 | if (argcount) |
375 | *argcount = (tag1 >> 16) & 0x1f; | |
376 | if (mfp_used) | |
377 | *mfp_used = ((tag1 & (1<<22)) ? 1 : 0); | |
669caa9c | 378 | return 1; |
d0b04c6a | 379 | } |
dd3b648e RP |
380 | |
381 | /* Initialize the frame. In addition to setting "extra" frame info, | |
382 | we also set ->frame because we use it in a nonstandard way, and ->pc | |
383 | because we need to know it to get the other stuff. See the diagram | |
d7d35f00 | 384 | of stacks and the frame cache in tm-a29k.h for more detail. */ |
669caa9c | 385 | |
dd3b648e | 386 | static void |
669caa9c | 387 | init_frame_info (innermost_frame, frame) |
dd3b648e | 388 | int innermost_frame; |
669caa9c | 389 | struct frame_info *frame; |
dd3b648e RP |
390 | { |
391 | CORE_ADDR p; | |
392 | long insn; | |
393 | unsigned rsize; | |
394 | unsigned msize; | |
d0b04c6a | 395 | int mfp_used, trans; |
dd3b648e RP |
396 | struct symbol *func; |
397 | ||
669caa9c | 398 | p = frame->pc; |
dd3b648e RP |
399 | |
400 | if (innermost_frame) | |
669caa9c | 401 | frame->frame = read_register (GR1_REGNUM); |
dd3b648e | 402 | else |
669caa9c | 403 | frame->frame = frame->next->frame + frame->next->rsize; |
dd3b648e | 404 | |
161520dc | 405 | #if 0 /* CALL_DUMMY_LOCATION == ON_STACK */ |
dd3b648e RP |
406 | This wont work; |
407 | #else | |
408 | if (PC_IN_CALL_DUMMY (p, 0, 0)) | |
409 | #endif | |
410 | { | |
669caa9c | 411 | frame->rsize = DUMMY_FRAME_RSIZE; |
dd3b648e RP |
412 | /* This doesn't matter since we never try to get locals or args |
413 | from a dummy frame. */ | |
669caa9c | 414 | frame->msize = 0; |
dd3b648e | 415 | /* Dummy frames always use a memory frame pointer. */ |
669caa9c SS |
416 | frame->saved_msp = |
417 | read_register_stack_integer (frame->frame + DUMMY_FRAME_RSIZE - 4, 4); | |
418 | frame->flags |= (TRANSPARENT|MFP_USED); | |
dd3b648e RP |
419 | return; |
420 | } | |
421 | ||
422 | func = find_pc_function (p); | |
423 | if (func != NULL) | |
424 | p = BLOCK_START (SYMBOL_BLOCK_VALUE (func)); | |
425 | else | |
426 | { | |
427 | /* Search backward to find the trace-back tag. However, | |
428 | do not trace back beyond the start of the text segment | |
429 | (just as a sanity check to avoid going into never-never land). */ | |
63dcc380 | 430 | #if 1 |
dd3b648e | 431 | while (p >= text_start |
946f014b | 432 | && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0) |
dd3b648e | 433 | p -= 4; |
63dcc380 JK |
434 | #else /* 0 */ |
435 | char pat[4] = {0, 0, 0, 0}; | |
436 | char mask[4]; | |
437 | char insn_raw[4]; | |
438 | store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK); | |
439 | /* Enable this once target_search is enabled and tested. */ | |
440 | target_search (4, pat, mask, p, -4, text_start, p+1, &p, &insn_raw); | |
441 | insn = extract_unsigned_integer (insn_raw, 4); | |
442 | #endif /* 0 */ | |
443 | ||
dd3b648e RP |
444 | if (p < text_start) |
445 | { | |
446 | /* Couldn't find the trace-back tag. | |
447 | Something strange is going on. */ | |
669caa9c SS |
448 | frame->saved_msp = 0; |
449 | frame->rsize = 0; | |
450 | frame->msize = 0; | |
451 | frame->flags = TRANSPARENT; | |
dd3b648e RP |
452 | return; |
453 | } | |
454 | else | |
455 | /* Advance to the first word of the function, i.e. the word | |
456 | after the trace-back tag. */ | |
457 | p += 4; | |
458 | } | |
eb5b74ca | 459 | |
d0b04c6a | 460 | /* We've found the start of the function. |
eb5b74ca JG |
461 | Try looking for a tag word that indicates whether there is a |
462 | memory frame pointer and what the memory stack allocation is. | |
463 | If one doesn't exist, try using a more exhaustive search of | |
464 | the prologue. */ | |
465 | ||
466 | if (examine_tag(p-4,&trans,(int *)NULL,&msize,&mfp_used)) /* Found good tag */ | |
d0b04c6a SG |
467 | examine_prologue (p, &rsize, 0, 0); |
468 | else /* No tag try prologue */ | |
469 | examine_prologue (p, &rsize, &msize, &mfp_used); | |
470 | ||
669caa9c SS |
471 | frame->rsize = rsize; |
472 | frame->msize = msize; | |
473 | frame->flags = 0; | |
d0b04c6a | 474 | if (mfp_used) |
669caa9c | 475 | frame->flags |= MFP_USED; |
d0b04c6a | 476 | if (trans) |
669caa9c | 477 | frame->flags |= TRANSPARENT; |
dd3b648e RP |
478 | if (innermost_frame) |
479 | { | |
669caa9c | 480 | frame->saved_msp = read_register (MSP_REGNUM) + msize; |
dd3b648e RP |
481 | } |
482 | else | |
483 | { | |
484 | if (mfp_used) | |
669caa9c SS |
485 | frame->saved_msp = |
486 | read_register_stack_integer (frame->frame + rsize - 4, 4); | |
dd3b648e | 487 | else |
669caa9c | 488 | frame->saved_msp = frame->next->saved_msp + msize; |
dd3b648e RP |
489 | } |
490 | } | |
491 | ||
492 | void | |
669caa9c SS |
493 | init_extra_frame_info (frame) |
494 | struct frame_info *frame; | |
dd3b648e | 495 | { |
669caa9c | 496 | if (frame->next == 0) |
dd3b648e RP |
497 | /* Assume innermost frame. May produce strange results for "info frame" |
498 | but there isn't any way to tell the difference. */ | |
669caa9c | 499 | init_frame_info (1, frame); |
17f7e032 JG |
500 | else { |
501 | /* We're in get_prev_frame_info. | |
502 | Take care of everything in init_frame_pc. */ | |
503 | ; | |
504 | } | |
dd3b648e RP |
505 | } |
506 | ||
507 | void | |
669caa9c | 508 | init_frame_pc (fromleaf, frame) |
dd3b648e | 509 | int fromleaf; |
669caa9c | 510 | struct frame_info *frame; |
dd3b648e | 511 | { |
669caa9c SS |
512 | frame->pc = (fromleaf ? SAVED_PC_AFTER_CALL (frame->next) : |
513 | frame->next ? FRAME_SAVED_PC (frame->next) : read_pc ()); | |
514 | init_frame_info (fromleaf, frame); | |
dd3b648e RP |
515 | } |
516 | \f | |
517 | /* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their | |
518 | offsets being relative to the memory stack pointer (high C) or | |
519 | saved_msp (gcc). */ | |
520 | ||
521 | CORE_ADDR | |
522 | frame_locals_address (fi) | |
523 | struct frame_info *fi; | |
524 | { | |
d0b04c6a | 525 | if (fi->flags & MFP_USED) |
dd3b648e RP |
526 | return fi->saved_msp; |
527 | else | |
528 | return fi->saved_msp - fi->msize; | |
529 | } | |
530 | \f | |
531 | /* Routines for reading the register stack. The caller gets to treat | |
532 | the register stack as a uniform stack in memory, from address $gr1 | |
533 | straight through $rfb and beyond. */ | |
534 | ||
535 | /* Analogous to read_memory except the length is understood to be 4. | |
536 | Also, myaddr can be NULL (meaning don't bother to read), and | |
537 | if actual_mem_addr is non-NULL, store there the address that it | |
538 | was fetched from (or if from a register the offset within | |
539 | registers). Set *LVAL to lval_memory or lval_register, depending | |
4d50f90a JK |
540 | on where it came from. The contents written into MYADDR are in |
541 | target format. */ | |
dd3b648e RP |
542 | void |
543 | read_register_stack (memaddr, myaddr, actual_mem_addr, lval) | |
544 | CORE_ADDR memaddr; | |
545 | char *myaddr; | |
546 | CORE_ADDR *actual_mem_addr; | |
547 | enum lval_type *lval; | |
548 | { | |
549 | long rfb = read_register (RFB_REGNUM); | |
550 | long rsp = read_register (RSP_REGNUM); | |
d0b04c6a | 551 | |
d0b04c6a | 552 | /* If we don't do this 'info register' stops in the middle. */ |
8f86a4e4 | 553 | if (memaddr >= rstack_high_address) |
d0b04c6a | 554 | { |
4d50f90a | 555 | /* a bogus value */ |
85494909 | 556 | static char val[] = {~0, ~0, ~0, ~0}; |
d0b04c6a SG |
557 | /* It's in a local register, but off the end of the stack. */ |
558 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
559 | if (myaddr != NULL) | |
4d50f90a JK |
560 | { |
561 | /* Provide bogusness */ | |
562 | memcpy (myaddr, val, 4); | |
563 | } | |
564 | supply_register(regnum, val); /* More bogusness */ | |
d0b04c6a SG |
565 | if (lval != NULL) |
566 | *lval = lval_register; | |
567 | if (actual_mem_addr != NULL) | |
568 | *actual_mem_addr = REGISTER_BYTE (regnum); | |
569 | } | |
946f014b JG |
570 | /* If it's in the part of the register stack that's in real registers, |
571 | get the value from the registers. If it's anywhere else in memory | |
572 | (e.g. in another thread's saved stack), skip this part and get | |
573 | it from real live memory. */ | |
574 | else if (memaddr < rfb && memaddr >= rsp) | |
dd3b648e RP |
575 | { |
576 | /* It's in a register. */ | |
577 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
946f014b | 578 | if (regnum > LR0_REGNUM + 127) |
dd3b648e RP |
579 | error ("Attempt to read register stack out of range."); |
580 | if (myaddr != NULL) | |
581 | read_register_gen (regnum, myaddr); | |
582 | if (lval != NULL) | |
583 | *lval = lval_register; | |
584 | if (actual_mem_addr != NULL) | |
585 | *actual_mem_addr = REGISTER_BYTE (regnum); | |
586 | } | |
587 | else | |
588 | { | |
589 | /* It's in the memory portion of the register stack. */ | |
d0b04c6a | 590 | if (myaddr != NULL) |
4d50f90a | 591 | read_memory (memaddr, myaddr, 4); |
dd3b648e RP |
592 | if (lval != NULL) |
593 | *lval = lval_memory; | |
594 | if (actual_mem_addr != NULL) | |
17f7e032 | 595 | *actual_mem_addr = memaddr; |
dd3b648e RP |
596 | } |
597 | } | |
598 | ||
599 | /* Analogous to read_memory_integer | |
600 | except the length is understood to be 4. */ | |
601 | long | |
602 | read_register_stack_integer (memaddr, len) | |
603 | CORE_ADDR memaddr; | |
604 | int len; | |
605 | { | |
34df79fc JK |
606 | char buf[4]; |
607 | read_register_stack (memaddr, buf, NULL, NULL); | |
608 | return extract_signed_integer (buf, 4); | |
dd3b648e RP |
609 | } |
610 | ||
611 | /* Copy 4 bytes from GDB memory at MYADDR into inferior memory | |
612 | at MEMADDR and put the actual address written into in | |
613 | *ACTUAL_MEM_ADDR. */ | |
614 | static void | |
615 | write_register_stack (memaddr, myaddr, actual_mem_addr) | |
616 | CORE_ADDR memaddr; | |
617 | char *myaddr; | |
618 | CORE_ADDR *actual_mem_addr; | |
619 | { | |
620 | long rfb = read_register (RFB_REGNUM); | |
621 | long rsp = read_register (RSP_REGNUM); | |
d0b04c6a | 622 | /* If we don't do this 'info register' stops in the middle. */ |
8f86a4e4 | 623 | if (memaddr >= rstack_high_address) |
d0b04c6a SG |
624 | { |
625 | /* It's in a register, but off the end of the stack. */ | |
626 | if (actual_mem_addr != NULL) | |
b9163d1a | 627 | *actual_mem_addr = 0; |
d0b04c6a | 628 | } |
8f86a4e4 | 629 | else if (memaddr < rfb) |
dd3b648e RP |
630 | { |
631 | /* It's in a register. */ | |
632 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
633 | if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127) | |
634 | error ("Attempt to read register stack out of range."); | |
635 | if (myaddr != NULL) | |
636 | write_register (regnum, *(long *)myaddr); | |
637 | if (actual_mem_addr != NULL) | |
b9163d1a | 638 | *actual_mem_addr = 0; |
dd3b648e RP |
639 | } |
640 | else | |
641 | { | |
642 | /* It's in the memory portion of the register stack. */ | |
643 | if (myaddr != NULL) | |
644 | write_memory (memaddr, myaddr, 4); | |
645 | if (actual_mem_addr != NULL) | |
17f7e032 | 646 | *actual_mem_addr = memaddr; |
dd3b648e RP |
647 | } |
648 | } | |
649 | \f | |
650 | /* Find register number REGNUM relative to FRAME and put its | |
651 | (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable | |
652 | was optimized out (and thus can't be fetched). If the variable | |
653 | was fetched from memory, set *ADDRP to where it was fetched from, | |
654 | otherwise it was fetched from a register. | |
655 | ||
656 | The argument RAW_BUFFER must point to aligned memory. */ | |
669caa9c | 657 | |
dd3b648e RP |
658 | void |
659 | get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lvalp) | |
660 | char *raw_buffer; | |
661 | int *optimized; | |
662 | CORE_ADDR *addrp; | |
669caa9c | 663 | struct frame_info *frame; |
dd3b648e RP |
664 | int regnum; |
665 | enum lval_type *lvalp; | |
666 | { | |
d0b04c6a | 667 | struct frame_info *fi; |
dd3b648e RP |
668 | CORE_ADDR addr; |
669 | enum lval_type lval; | |
670 | ||
888a18ee JK |
671 | if (!target_has_registers) |
672 | error ("No registers."); | |
673 | ||
674 | /* Probably now redundant with the target_has_registers check. */ | |
d0b04c6a SG |
675 | if (frame == 0) |
676 | return; | |
677 | ||
dd3b648e RP |
678 | /* Once something has a register number, it doesn't get optimized out. */ |
679 | if (optimized != NULL) | |
680 | *optimized = 0; | |
681 | if (regnum == RSP_REGNUM) | |
682 | { | |
683 | if (raw_buffer != NULL) | |
4d50f90a | 684 | { |
669caa9c | 685 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame); |
4d50f90a | 686 | } |
dd3b648e RP |
687 | if (lvalp != NULL) |
688 | *lvalp = not_lval; | |
689 | return; | |
690 | } | |
48b497ed | 691 | else if (regnum == PC_REGNUM && frame->next != NULL) |
dd3b648e RP |
692 | { |
693 | if (raw_buffer != NULL) | |
4d50f90a | 694 | { |
669caa9c | 695 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc); |
4d50f90a | 696 | } |
dd3b648e RP |
697 | |
698 | /* Not sure we have to do this. */ | |
699 | if (lvalp != NULL) | |
700 | *lvalp = not_lval; | |
701 | ||
702 | return; | |
703 | } | |
704 | else if (regnum == MSP_REGNUM) | |
705 | { | |
706 | if (raw_buffer != NULL) | |
707 | { | |
669caa9c | 708 | if (frame->next != NULL) |
4d50f90a | 709 | { |
968dca8d | 710 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), |
669caa9c | 711 | frame->next->saved_msp); |
4d50f90a | 712 | } |
dd3b648e | 713 | else |
4d50f90a | 714 | read_register_gen (MSP_REGNUM, raw_buffer); |
dd3b648e RP |
715 | } |
716 | /* The value may have been computed, not fetched. */ | |
717 | if (lvalp != NULL) | |
718 | *lvalp = not_lval; | |
719 | return; | |
720 | } | |
721 | else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128) | |
722 | { | |
723 | /* These registers are not saved over procedure calls, | |
724 | so just print out the current values. */ | |
725 | if (raw_buffer != NULL) | |
4d50f90a | 726 | read_register_gen (regnum, raw_buffer); |
dd3b648e RP |
727 | if (lvalp != NULL) |
728 | *lvalp = lval_register; | |
729 | if (addrp != NULL) | |
730 | *addrp = REGISTER_BYTE (regnum); | |
731 | return; | |
732 | } | |
733 | ||
669caa9c | 734 | addr = frame->frame + (regnum - LR0_REGNUM) * 4; |
dd3b648e RP |
735 | if (raw_buffer != NULL) |
736 | read_register_stack (addr, raw_buffer, &addr, &lval); | |
737 | if (lvalp != NULL) | |
738 | *lvalp = lval; | |
739 | if (addrp != NULL) | |
740 | *addrp = addr; | |
741 | } | |
742 | \f | |
d0b04c6a | 743 | |
dd3b648e RP |
744 | /* Discard from the stack the innermost frame, |
745 | restoring all saved registers. */ | |
746 | ||
747 | void | |
748 | pop_frame () | |
749 | { | |
669caa9c SS |
750 | struct frame_info *frame = get_current_frame (); |
751 | CORE_ADDR rfb = read_register (RFB_REGNUM); | |
b6c15646 | 752 | CORE_ADDR gr1 = frame->frame + frame->rsize; |
dd3b648e | 753 | CORE_ADDR lr1; |
eb5b74ca JG |
754 | CORE_ADDR original_lr0; |
755 | int must_fix_lr0 = 0; | |
dd3b648e RP |
756 | int i; |
757 | ||
758 | /* If popping a dummy frame, need to restore registers. */ | |
759 | if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM), | |
760 | read_register (SP_REGNUM), | |
669caa9c | 761 | FRAME_FP (frame))) |
dd3b648e | 762 | { |
d0b04c6a | 763 | int lrnum = LR0_REGNUM + DUMMY_ARG/4; |
dd3b648e | 764 | for (i = 0; i < DUMMY_SAVE_SR128; ++i) |
d0b04c6a SG |
765 | write_register (SR_REGNUM (i + 128),read_register (lrnum++)); |
766 | for (i = 0; i < DUMMY_SAVE_SR160; ++i) | |
767 | write_register (SR_REGNUM(i+160), read_register (lrnum++)); | |
6093e5b0 | 768 | for (i = 0; i < DUMMY_SAVE_GREGS; ++i) |
d0b04c6a | 769 | write_register (RETURN_REGNUM + i, read_register (lrnum++)); |
eb5b74ca | 770 | /* Restore the PCs and prepare to restore LR0. */ |
d0b04c6a | 771 | write_register(PC_REGNUM, read_register (lrnum++)); |
eb5b74ca JG |
772 | write_register(NPC_REGNUM, read_register (lrnum++)); |
773 | write_register(PC2_REGNUM, read_register (lrnum++)); | |
774 | original_lr0 = read_register (lrnum++); | |
775 | must_fix_lr0 = 1; | |
dd3b648e RP |
776 | } |
777 | ||
778 | /* Restore the memory stack pointer. */ | |
669caa9c | 779 | write_register (MSP_REGNUM, frame->saved_msp); |
dd3b648e RP |
780 | /* Restore the register stack pointer. */ |
781 | write_register (GR1_REGNUM, gr1); | |
eb5b74ca JG |
782 | |
783 | /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */ | |
784 | if (must_fix_lr0) | |
785 | write_register (LR0_REGNUM, original_lr0); | |
786 | ||
dd3b648e RP |
787 | /* Check whether we need to fill registers. */ |
788 | lr1 = read_register (LR0_REGNUM + 1); | |
789 | if (lr1 > rfb) | |
790 | { | |
791 | /* Fill. */ | |
792 | int num_bytes = lr1 - rfb; | |
793 | int i; | |
669caa9c SS |
794 | long word; |
795 | ||
dd3b648e RP |
796 | write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes); |
797 | write_register (RFB_REGNUM, lr1); | |
798 | for (i = 0; i < num_bytes; i += 4) | |
799 | { | |
800 | /* Note: word is in host byte order. */ | |
801 | word = read_memory_integer (rfb + i, 4); | |
946f014b | 802 | write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word); |
dd3b648e RP |
803 | } |
804 | } | |
dd3b648e | 805 | flush_cached_frames (); |
dd3b648e RP |
806 | } |
807 | ||
808 | /* Push an empty stack frame, to record the current PC, etc. */ | |
809 | ||
810 | void | |
811 | push_dummy_frame () | |
812 | { | |
813 | long w; | |
814 | CORE_ADDR rab, gr1; | |
815 | CORE_ADDR msp = read_register (MSP_REGNUM); | |
eb5b74ca JG |
816 | int lrnum, i; |
817 | CORE_ADDR original_lr0; | |
818 | ||
819 | /* Read original lr0 before changing gr1. This order isn't really needed | |
820 | since GDB happens to have a snapshot of all the regs and doesn't toss | |
821 | it when gr1 is changed. But it's The Right Thing To Do. */ | |
822 | original_lr0 = read_register (LR0_REGNUM); | |
dd3b648e | 823 | |
d0b04c6a | 824 | /* Allocate the new frame. */ |
dd3b648e RP |
825 | gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE; |
826 | write_register (GR1_REGNUM, gr1); | |
827 | ||
161520dc KH |
828 | #ifdef VXWORKS_TARGET |
829 | /* We force re-reading all registers to get the new local registers set | |
830 | after gr1 has been modified. This fix is due to the lack of single | |
831 | register read/write operation in the RPC interface between VxGDB and | |
832 | VxWorks. This really must be changed ! */ | |
833 | ||
834 | vx_read_register (-1); | |
835 | ||
836 | #endif /* VXWORK_TARGET */ | |
837 | ||
dd3b648e RP |
838 | rab = read_register (RAB_REGNUM); |
839 | if (gr1 < rab) | |
840 | { | |
841 | /* We need to spill registers. */ | |
842 | int num_bytes = rab - gr1; | |
843 | CORE_ADDR rfb = read_register (RFB_REGNUM); | |
844 | int i; | |
845 | long word; | |
846 | ||
847 | write_register (RFB_REGNUM, rfb - num_bytes); | |
848 | write_register (RAB_REGNUM, gr1); | |
849 | for (i = 0; i < num_bytes; i += 4) | |
850 | { | |
851 | /* Note: word is in target byte order. */ | |
b9163d1a SG |
852 | read_register_gen (LR0_REGNUM + i / 4, (char *) &word); |
853 | write_memory (rfb - num_bytes + i, (char *) &word, 4); | |
dd3b648e RP |
854 | } |
855 | } | |
856 | ||
857 | /* There are no arguments in to the dummy frame, so we don't need | |
858 | more than rsize plus the return address and lr1. */ | |
859 | write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4); | |
860 | ||
861 | /* Set the memory frame pointer. */ | |
862 | write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp); | |
863 | ||
864 | /* Allocate arg_slop. */ | |
865 | write_register (MSP_REGNUM, msp - 16 * 4); | |
866 | ||
867 | /* Save registers. */ | |
d0b04c6a | 868 | lrnum = LR0_REGNUM + DUMMY_ARG/4; |
dd3b648e | 869 | for (i = 0; i < DUMMY_SAVE_SR128; ++i) |
d0b04c6a SG |
870 | write_register (lrnum++, read_register (SR_REGNUM (i + 128))); |
871 | for (i = 0; i < DUMMY_SAVE_SR160; ++i) | |
872 | write_register (lrnum++, read_register (SR_REGNUM (i + 160))); | |
6093e5b0 | 873 | for (i = 0; i < DUMMY_SAVE_GREGS; ++i) |
d0b04c6a | 874 | write_register (lrnum++, read_register (RETURN_REGNUM + i)); |
eb5b74ca | 875 | /* Save the PCs and LR0. */ |
d0b04c6a | 876 | write_register (lrnum++, read_register (PC_REGNUM)); |
eb5b74ca JG |
877 | write_register (lrnum++, read_register (NPC_REGNUM)); |
878 | write_register (lrnum++, read_register (PC2_REGNUM)); | |
ae682b80 JK |
879 | |
880 | /* Why are we saving LR0? What would clobber it? (the dummy frame should | |
881 | be below it on the register stack, no?). */ | |
eb5b74ca | 882 | write_register (lrnum++, original_lr0); |
d0b04c6a SG |
883 | } |
884 | ||
eb5b74ca JG |
885 | |
886 | ||
887 | /* | |
888 | This routine takes three arguments and makes the cached frames look | |
889 | as if these arguments defined a frame on the cache. This allows the | |
890 | rest of `info frame' to extract the important arguments without much | |
891 | difficulty. Since an individual frame on the 29K is determined by | |
892 | three values (FP, PC, and MSP), we really need all three to do a | |
893 | good job. */ | |
894 | ||
669caa9c | 895 | struct frame_info * |
eb5b74ca JG |
896 | setup_arbitrary_frame (argc, argv) |
897 | int argc; | |
669caa9c | 898 | CORE_ADDR *argv; |
eb5b74ca | 899 | { |
669caa9c | 900 | struct frame_info *frame; |
eb5b74ca JG |
901 | |
902 | if (argc != 3) | |
903 | error ("AMD 29k frame specifications require three arguments: rsp pc msp"); | |
904 | ||
669caa9c | 905 | frame = create_new_frame (argv[0], argv[1]); |
eb5b74ca | 906 | |
669caa9c | 907 | if (!frame) |
eb5b74ca JG |
908 | fatal ("internal: create_new_frame returned invalid frame id"); |
909 | ||
910 | /* Creating a new frame munges the `frame' value from the current | |
911 | GR1, so we restore it again here. FIXME, untangle all this | |
912 | 29K frame stuff... */ | |
669caa9c | 913 | frame->frame = argv[0]; |
eb5b74ca JG |
914 | |
915 | /* Our MSP is in argv[2]. It'd be intelligent if we could just | |
916 | save this value in the FRAME. But the way it's set up (FIXME), | |
917 | we must save our caller's MSP. We compute that by adding our | |
918 | memory stack frame size to our MSP. */ | |
669caa9c | 919 | frame->saved_msp = argv[2] + frame->msize; |
eb5b74ca | 920 | |
669caa9c | 921 | return frame; |
eb5b74ca JG |
922 | } |
923 | ||
18b46e7c SS |
924 | int |
925 | gdb_print_insn_a29k (memaddr, info) | |
926 | bfd_vma memaddr; | |
927 | disassemble_info *info; | |
928 | { | |
929 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
5ad32be2 | 930 | return print_insn_big_a29k (memaddr, info); |
18b46e7c | 931 | else |
5ad32be2 | 932 | return print_insn_little_a29k (memaddr, info); |
18b46e7c SS |
933 | } |
934 | ||
ca0622e7 JK |
935 | enum a29k_processor_types processor_type = a29k_unknown; |
936 | ||
937 | void | |
938 | a29k_get_processor_type () | |
939 | { | |
940 | unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM); | |
941 | ||
942 | /* Most of these don't have freeze mode. */ | |
943 | processor_type = a29k_no_freeze_mode; | |
944 | ||
945 | switch ((cfg_reg >> 28) & 0xf) | |
946 | { | |
947 | case 0: | |
199b2450 | 948 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29000"); |
ca0622e7 JK |
949 | break; |
950 | case 1: | |
199b2450 | 951 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29005"); |
ca0622e7 JK |
952 | break; |
953 | case 2: | |
199b2450 | 954 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29050"); |
ca0622e7 JK |
955 | processor_type = a29k_freeze_mode; |
956 | break; | |
957 | case 3: | |
199b2450 | 958 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29035"); |
ca0622e7 JK |
959 | break; |
960 | case 4: | |
199b2450 | 961 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29030"); |
ca0622e7 JK |
962 | break; |
963 | case 5: | |
199b2450 | 964 | fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*"); |
ca0622e7 JK |
965 | break; |
966 | case 6: | |
199b2450 | 967 | fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*"); |
ca0622e7 JK |
968 | break; |
969 | case 7: | |
199b2450 | 970 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29040"); |
ca0622e7 JK |
971 | break; |
972 | default: | |
199b2450 | 973 | fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n"); |
ca0622e7 JK |
974 | /* Don't bother to print the revision. */ |
975 | return; | |
976 | } | |
199b2450 | 977 | fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f)); |
ca0622e7 | 978 | } |
946f014b | 979 | |
161520dc KH |
980 | #ifdef GET_LONGJMP_TARGET |
981 | /* Figure out where the longjmp will land. We expect that we have just entered | |
982 | longjmp and haven't yet setup the stack frame, so the args are still in the | |
983 | output regs. lr2 (LR2_REGNUM) points at the jmp_buf structure from which we | |
984 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. | |
985 | This routine returns true on success */ | |
986 | ||
987 | int | |
988 | get_longjmp_target(pc) | |
989 | CORE_ADDR *pc; | |
990 | { | |
991 | CORE_ADDR jb_addr; | |
546e6a39 | 992 | char buf[sizeof(CORE_ADDR)]; |
161520dc KH |
993 | |
994 | jb_addr = read_register(LR2_REGNUM); | |
995 | ||
546e6a39 | 996 | if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, (char *) buf, |
161520dc KH |
997 | sizeof(CORE_ADDR))) |
998 | return 0; | |
999 | ||
546e6a39 | 1000 | *pc = extract_address ((PTR) buf, sizeof(CORE_ADDR)); |
161520dc KH |
1001 | return 1; |
1002 | } | |
1003 | #endif /* GET_LONGJMP_TARGET */ | |
1004 | ||
d0b04c6a | 1005 | void |
18b46e7c | 1006 | _initialize_a29k_tdep () |
d0b04c6a | 1007 | { |
34517ebc JG |
1008 | extern CORE_ADDR text_end; |
1009 | ||
18b46e7c SS |
1010 | tm_print_insn = gdb_print_insn_a29k; |
1011 | ||
8f86a4e4 JG |
1012 | /* FIXME, there should be a way to make a CORE_ADDR variable settable. */ |
1013 | add_show_from_set | |
1014 | (add_set_cmd ("rstack_high_address", class_support, var_uinteger, | |
1015 | (char *)&rstack_high_address, | |
1016 | "Set top address in memory of the register stack.\n\ | |
1017 | Attempts to access registers saved above this address will be ignored\n\ | |
1018 | or will produce the value -1.", &setlist), | |
1019 | &showlist); | |
34517ebc JG |
1020 | |
1021 | /* FIXME, there should be a way to make a CORE_ADDR variable settable. */ | |
1022 | add_show_from_set | |
1023 | (add_set_cmd ("call_scratch_address", class_support, var_uinteger, | |
1024 | (char *)&text_end, | |
19327ea5 JG |
1025 | "Set address in memory where small amounts of RAM can be used\n\ |
1026 | when making function calls into the inferior.", &setlist), | |
34517ebc | 1027 | &showlist); |
8f86a4e4 | 1028 | } |