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c906108c SS |
1 | /* Target-machine dependent code for the AMD 29000 |
2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995 | |
3 | Free Software Foundation, Inc. | |
4 | Contributed by Cygnus Support. Written by Jim Kingdon. | |
5 | ||
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "gdbcore.h" | |
25 | #include "frame.h" | |
26 | #include "value.h" | |
27 | #include "symtab.h" | |
28 | #include "inferior.h" | |
29 | #include "gdbcmd.h" | |
30 | ||
31 | /* If all these bits in an instruction word are zero, it is a "tag word" | |
32 | which precedes a function entry point and gives stack traceback info. | |
33 | This used to be defined as 0xff000000, but that treated 0x00000deb as | |
34 | a tag word, while it is really used as a breakpoint. */ | |
35 | #define TAGWORD_ZERO_MASK 0xff00f800 | |
36 | ||
37 | extern CORE_ADDR text_start; /* FIXME, kludge... */ | |
38 | ||
39 | /* The user-settable top of the register stack in virtual memory. We | |
40 | won't attempt to access any stored registers above this address, if set | |
41 | nonzero. */ | |
42 | ||
43 | static CORE_ADDR rstack_high_address = UINT_MAX; | |
44 | ||
45 | ||
46 | /* Should call_function allocate stack space for a struct return? */ | |
47 | /* On the a29k objects over 16 words require the caller to allocate space. */ | |
48 | int | |
49 | a29k_use_struct_convention (gcc_p, type) | |
50 | int gcc_p; | |
51 | struct type *type; | |
52 | { | |
53 | return (TYPE_LENGTH (type) > 16 * 4); | |
54 | } | |
55 | ||
56 | ||
57 | /* Structure to hold cached info about function prologues. */ | |
58 | ||
59 | struct prologue_info | |
60 | { | |
61 | CORE_ADDR pc; /* First addr after fn prologue */ | |
62 | unsigned rsize, msize; /* register stack frame size, mem stack ditto */ | |
c5aa993b JM |
63 | unsigned mfp_used:1; /* memory frame pointer used */ |
64 | unsigned rsize_valid:1; /* Validity bits for the above */ | |
65 | unsigned msize_valid:1; | |
66 | unsigned mfp_valid:1; | |
c906108c SS |
67 | }; |
68 | ||
69 | /* Examine the prologue of a function which starts at PC. Return | |
70 | the first addess past the prologue. If MSIZE is non-NULL, then | |
71 | set *MSIZE to the memory stack frame size. If RSIZE is non-NULL, | |
72 | then set *RSIZE to the register stack frame size (not including | |
73 | incoming arguments and the return address & frame pointer stored | |
74 | with them). If no prologue is found, *RSIZE is set to zero. | |
75 | If no prologue is found, or a prologue which doesn't involve | |
76 | allocating a memory stack frame, then set *MSIZE to zero. | |
77 | ||
78 | Note that both msize and rsize are in bytes. This is not consistent | |
79 | with the _User's Manual_ with respect to rsize, but it is much more | |
80 | convenient. | |
81 | ||
82 | If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory | |
83 | frame pointer is being used. */ | |
84 | ||
85 | CORE_ADDR | |
86 | examine_prologue (pc, rsize, msize, mfp_used) | |
87 | CORE_ADDR pc; | |
88 | unsigned *msize; | |
89 | unsigned *rsize; | |
90 | int *mfp_used; | |
91 | { | |
92 | long insn; | |
93 | CORE_ADDR p = pc; | |
94 | struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc); | |
95 | struct prologue_info *mi = 0; | |
96 | ||
97 | if (msymbol != NULL) | |
c5aa993b | 98 | mi = (struct prologue_info *) msymbol->info; |
c906108c SS |
99 | |
100 | if (mi != 0) | |
101 | { | |
102 | int valid = 1; | |
103 | if (rsize != NULL) | |
104 | { | |
105 | *rsize = mi->rsize; | |
106 | valid &= mi->rsize_valid; | |
107 | } | |
108 | if (msize != NULL) | |
109 | { | |
110 | *msize = mi->msize; | |
111 | valid &= mi->msize_valid; | |
112 | } | |
113 | if (mfp_used != NULL) | |
114 | { | |
115 | *mfp_used = mi->mfp_used; | |
116 | valid &= mi->mfp_valid; | |
117 | } | |
118 | if (valid) | |
119 | return mi->pc; | |
120 | } | |
121 | ||
122 | if (rsize != NULL) | |
123 | *rsize = 0; | |
124 | if (msize != NULL) | |
125 | *msize = 0; | |
126 | if (mfp_used != NULL) | |
127 | *mfp_used = 0; | |
c5aa993b | 128 | |
c906108c SS |
129 | /* Prologue must start with subtracting a constant from gr1. |
130 | Normally this is sub gr1,gr1,<rsize * 4>. */ | |
131 | insn = read_memory_integer (p, 4); | |
132 | if ((insn & 0xffffff00) != 0x25010100) | |
133 | { | |
134 | /* If the frame is large, instead of a single instruction it | |
c5aa993b JM |
135 | might be a pair of instructions: |
136 | const <reg>, <rsize * 4> | |
137 | sub gr1,gr1,<reg> | |
138 | */ | |
c906108c SS |
139 | int reg; |
140 | /* Possible value for rsize. */ | |
141 | unsigned int rsize0; | |
c5aa993b | 142 | |
c906108c SS |
143 | if ((insn & 0xff000000) != 0x03000000) |
144 | { | |
145 | p = pc; | |
146 | goto done; | |
147 | } | |
148 | reg = (insn >> 8) & 0xff; | |
149 | rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff)); | |
150 | p += 4; | |
151 | insn = read_memory_integer (p, 4); | |
152 | if ((insn & 0xffffff00) != 0x24010100 | |
153 | || (insn & 0xff) != reg) | |
154 | { | |
155 | p = pc; | |
156 | goto done; | |
157 | } | |
158 | if (rsize != NULL) | |
159 | *rsize = rsize0; | |
160 | } | |
161 | else | |
162 | { | |
163 | if (rsize != NULL) | |
164 | *rsize = (insn & 0xff); | |
165 | } | |
166 | p += 4; | |
167 | ||
168 | /* Next instruction ought to be asgeu V_SPILL,gr1,rab. | |
169 | * We don't check the vector number to allow for kernel debugging. The | |
170 | * kernel will use a different trap number. | |
171 | * If this insn is missing, we just keep going; Metaware R2.3u compiler | |
172 | * generates prologue that intermixes initializations and puts the asgeu | |
173 | * way down. | |
174 | */ | |
175 | insn = read_memory_integer (p, 4); | |
c5aa993b | 176 | if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM)) |
c906108c SS |
177 | { |
178 | p += 4; | |
179 | } | |
180 | ||
181 | /* Next instruction usually sets the frame pointer (lr1) by adding | |
182 | <size * 4> from gr1. However, this can (and high C does) be | |
183 | deferred until anytime before the first function call. So it is | |
184 | OK if we don't see anything which sets lr1. | |
185 | To allow for alternate register sets (gcc -mkernel-registers) the msp | |
186 | register number is a compile time constant. */ | |
187 | ||
188 | /* Normally this is just add lr1,gr1,<size * 4>. */ | |
189 | insn = read_memory_integer (p, 4); | |
190 | if ((insn & 0xffffff00) == 0x15810100) | |
191 | p += 4; | |
192 | else | |
193 | { | |
194 | /* However, for large frames it can be | |
c5aa993b JM |
195 | const <reg>, <size *4> |
196 | add lr1,gr1,<reg> | |
197 | */ | |
c906108c SS |
198 | int reg; |
199 | CORE_ADDR q; | |
200 | ||
201 | if ((insn & 0xff000000) == 0x03000000) | |
202 | { | |
203 | reg = (insn >> 8) & 0xff; | |
204 | q = p + 4; | |
205 | insn = read_memory_integer (q, 4); | |
206 | if ((insn & 0xffffff00) == 0x14810100 | |
207 | && (insn & 0xff) == reg) | |
208 | p = q; | |
209 | } | |
210 | } | |
211 | ||
212 | /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory | |
213 | frame pointer is in use. We just check for add lr<anything>,msp,0; | |
214 | we don't check this rsize against the first instruction, and | |
215 | we don't check that the trace-back tag indicates a memory frame pointer | |
216 | is in use. | |
217 | To allow for alternate register sets (gcc -mkernel-registers) the msp | |
218 | register number is a compile time constant. | |
219 | ||
220 | The recommended instruction is actually "sll lr<whatever>,msp,0". | |
221 | We check for that, too. Originally Jim Kingdon's code seemed | |
222 | to be looking for a "sub" instruction here, but the mask was set | |
223 | up to lose all the time. */ | |
224 | insn = read_memory_integer (p, 4); | |
c5aa993b JM |
225 | if (((insn & 0xff80ffff) == (0x15800000 | (MSP_HW_REGNUM << 8))) /* add */ |
226 | || ((insn & 0xff80ffff) == (0x81800000 | (MSP_HW_REGNUM << 8)))) /* sll */ | |
c906108c SS |
227 | { |
228 | p += 4; | |
229 | if (mfp_used != NULL) | |
230 | *mfp_used = 1; | |
231 | } | |
232 | ||
233 | /* Next comes a subtraction from msp to allocate a memory frame, | |
234 | but only if a memory frame is | |
235 | being used. We don't check msize against the trace-back tag. | |
236 | ||
237 | To allow for alternate register sets (gcc -mkernel-registers) the msp | |
238 | register number is a compile time constant. | |
239 | ||
240 | Normally this is just | |
241 | sub msp,msp,<msize> | |
c5aa993b | 242 | */ |
c906108c | 243 | insn = read_memory_integer (p, 4); |
c5aa993b JM |
244 | if ((insn & 0xffffff00) == |
245 | (0x25000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8))) | |
c906108c SS |
246 | { |
247 | p += 4; | |
c5aa993b | 248 | if (msize != NULL) |
c906108c SS |
249 | *msize = insn & 0xff; |
250 | } | |
251 | else | |
252 | { | |
253 | /* For large frames, instead of a single instruction it might | |
c5aa993b | 254 | be |
c906108c | 255 | |
c5aa993b JM |
256 | const <reg>, <msize> |
257 | consth <reg>, <msize> ; optional | |
258 | sub msp,msp,<reg> | |
259 | */ | |
c906108c SS |
260 | int reg; |
261 | unsigned msize0; | |
262 | CORE_ADDR q = p; | |
263 | ||
264 | if ((insn & 0xff000000) == 0x03000000) | |
265 | { | |
266 | reg = (insn >> 8) & 0xff; | |
267 | msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff); | |
268 | q += 4; | |
269 | insn = read_memory_integer (q, 4); | |
270 | /* Check for consth. */ | |
271 | if ((insn & 0xff000000) == 0x02000000 | |
272 | && (insn & 0x0000ff00) == reg) | |
273 | { | |
274 | msize0 |= (insn << 8) & 0xff000000; | |
275 | msize0 |= (insn << 16) & 0x00ff0000; | |
276 | q += 4; | |
277 | insn = read_memory_integer (q, 4); | |
278 | } | |
279 | /* Check for sub msp,msp,<reg>. */ | |
c5aa993b JM |
280 | if ((insn & 0xffffff00) == |
281 | (0x24000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8)) | |
c906108c SS |
282 | && (insn & 0xff) == reg) |
283 | { | |
284 | p = q + 4; | |
285 | if (msize != NULL) | |
286 | *msize = msize0; | |
287 | } | |
288 | } | |
289 | } | |
290 | ||
291 | /* Next instruction might be asgeu V_SPILL,gr1,rab. | |
292 | * We don't check the vector number to allow for kernel debugging. The | |
293 | * kernel will use a different trap number. | |
294 | * Metaware R2.3u compiler | |
295 | * generates prologue that intermixes initializations and puts the asgeu | |
296 | * way down after everything else. | |
297 | */ | |
298 | insn = read_memory_integer (p, 4); | |
c5aa993b | 299 | if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM)) |
c906108c SS |
300 | { |
301 | p += 4; | |
302 | } | |
303 | ||
c5aa993b | 304 | done: |
c906108c SS |
305 | if (msymbol != NULL) |
306 | { | |
307 | if (mi == 0) | |
308 | { | |
309 | /* Add a new cache entry. */ | |
c5aa993b JM |
310 | mi = (struct prologue_info *) xmalloc (sizeof (struct prologue_info)); |
311 | msymbol->info = (char *) mi; | |
c906108c SS |
312 | mi->rsize_valid = 0; |
313 | mi->msize_valid = 0; | |
314 | mi->mfp_valid = 0; | |
315 | } | |
316 | /* else, cache entry exists, but info is incomplete. */ | |
317 | mi->pc = p; | |
318 | if (rsize != NULL) | |
319 | { | |
320 | mi->rsize = *rsize; | |
321 | mi->rsize_valid = 1; | |
322 | } | |
323 | if (msize != NULL) | |
324 | { | |
325 | mi->msize = *msize; | |
326 | mi->msize_valid = 1; | |
327 | } | |
328 | if (mfp_used != NULL) | |
329 | { | |
330 | mi->mfp_used = *mfp_used; | |
331 | mi->mfp_valid = 1; | |
332 | } | |
333 | } | |
334 | return p; | |
335 | } | |
336 | ||
337 | /* Advance PC across any function entry prologue instructions | |
338 | to reach some "real" code. */ | |
339 | ||
340 | CORE_ADDR | |
b83266a0 | 341 | a29k_skip_prologue (pc) |
c906108c SS |
342 | CORE_ADDR pc; |
343 | { | |
344 | return examine_prologue (pc, NULL, NULL, NULL); | |
345 | } | |
346 | ||
347 | /* | |
348 | * Examine the one or two word tag at the beginning of a function. | |
349 | * The tag word is expect to be at 'p', if it is not there, we fail | |
350 | * by returning 0. The documentation for the tag word was taken from | |
351 | * page 7-15 of the 29050 User's Manual. We are assuming that the | |
352 | * m bit is in bit 22 of the tag word, which seems to be the agreed upon | |
353 | * convention today (1/15/92). | |
354 | * msize is return in bytes. | |
355 | */ | |
356 | ||
c5aa993b | 357 | static int /* 0/1 - failure/success of finding the tag word */ |
c906108c SS |
358 | examine_tag (p, is_trans, argcount, msize, mfp_used) |
359 | CORE_ADDR p; | |
360 | int *is_trans; | |
361 | int *argcount; | |
362 | unsigned *msize; | |
363 | int *mfp_used; | |
364 | { | |
365 | unsigned int tag1, tag2; | |
366 | ||
367 | tag1 = read_memory_integer (p, 4); | |
368 | if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */ | |
369 | return 0; | |
c5aa993b | 370 | if (tag1 & (1 << 23)) /* A two word tag */ |
c906108c | 371 | { |
c5aa993b JM |
372 | tag2 = read_memory_integer (p - 4, 4); |
373 | if (msize) | |
374 | *msize = tag2 * 2; | |
c906108c | 375 | } |
c5aa993b JM |
376 | else |
377 | /* A one word tag */ | |
c906108c | 378 | { |
c5aa993b JM |
379 | if (msize) |
380 | *msize = tag1 & 0x7ff; | |
c906108c SS |
381 | } |
382 | if (is_trans) | |
c5aa993b | 383 | *is_trans = ((tag1 & (1 << 21)) ? 1 : 0); |
c906108c SS |
384 | /* Note that this includes the frame pointer and the return address |
385 | register, so the actual number of registers of arguments is two less. | |
386 | argcount can be zero, however, sometimes, for strange assembler | |
387 | routines. */ | |
388 | if (argcount) | |
389 | *argcount = (tag1 >> 16) & 0x1f; | |
390 | if (mfp_used) | |
c5aa993b | 391 | *mfp_used = ((tag1 & (1 << 22)) ? 1 : 0); |
c906108c SS |
392 | return 1; |
393 | } | |
394 | ||
395 | /* Initialize the frame. In addition to setting "extra" frame info, | |
396 | we also set ->frame because we use it in a nonstandard way, and ->pc | |
397 | because we need to know it to get the other stuff. See the diagram | |
398 | of stacks and the frame cache in tm-a29k.h for more detail. */ | |
399 | ||
400 | static void | |
401 | init_frame_info (innermost_frame, frame) | |
402 | int innermost_frame; | |
403 | struct frame_info *frame; | |
404 | { | |
405 | CORE_ADDR p; | |
406 | long insn; | |
407 | unsigned rsize; | |
408 | unsigned msize; | |
409 | int mfp_used, trans; | |
410 | struct symbol *func; | |
411 | ||
412 | p = frame->pc; | |
413 | ||
414 | if (innermost_frame) | |
415 | frame->frame = read_register (GR1_REGNUM); | |
416 | else | |
417 | frame->frame = frame->next->frame + frame->next->rsize; | |
c5aa993b JM |
418 | |
419 | #if 0 /* CALL_DUMMY_LOCATION == ON_STACK */ | |
c906108c SS |
420 | This wont work; |
421 | #else | |
422 | if (PC_IN_CALL_DUMMY (p, 0, 0)) | |
423 | #endif | |
424 | { | |
425 | frame->rsize = DUMMY_FRAME_RSIZE; | |
426 | /* This doesn't matter since we never try to get locals or args | |
c5aa993b | 427 | from a dummy frame. */ |
c906108c SS |
428 | frame->msize = 0; |
429 | /* Dummy frames always use a memory frame pointer. */ | |
c5aa993b | 430 | frame->saved_msp = |
c906108c | 431 | read_register_stack_integer (frame->frame + DUMMY_FRAME_RSIZE - 4, 4); |
c5aa993b | 432 | frame->flags |= (TRANSPARENT_FRAME | MFP_USED); |
c906108c SS |
433 | return; |
434 | } | |
c5aa993b | 435 | |
c906108c SS |
436 | func = find_pc_function (p); |
437 | if (func != NULL) | |
438 | p = BLOCK_START (SYMBOL_BLOCK_VALUE (func)); | |
439 | else | |
440 | { | |
441 | /* Search backward to find the trace-back tag. However, | |
c5aa993b JM |
442 | do not trace back beyond the start of the text segment |
443 | (just as a sanity check to avoid going into never-never land). */ | |
c906108c SS |
444 | #if 1 |
445 | while (p >= text_start | |
c5aa993b | 446 | && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0) |
c906108c SS |
447 | p -= 4; |
448 | #else /* 0 */ | |
c5aa993b JM |
449 | char pat[4] = |
450 | {0, 0, 0, 0}; | |
c906108c SS |
451 | char mask[4]; |
452 | char insn_raw[4]; | |
453 | store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK); | |
454 | /* Enable this once target_search is enabled and tested. */ | |
c5aa993b | 455 | target_search (4, pat, mask, p, -4, text_start, p + 1, &p, &insn_raw); |
c906108c SS |
456 | insn = extract_unsigned_integer (insn_raw, 4); |
457 | #endif /* 0 */ | |
458 | ||
459 | if (p < text_start) | |
460 | { | |
461 | /* Couldn't find the trace-back tag. | |
462 | Something strange is going on. */ | |
463 | frame->saved_msp = 0; | |
464 | frame->rsize = 0; | |
465 | frame->msize = 0; | |
466 | frame->flags = TRANSPARENT_FRAME; | |
467 | return; | |
468 | } | |
469 | else | |
470 | /* Advance to the first word of the function, i.e. the word | |
471 | after the trace-back tag. */ | |
472 | p += 4; | |
473 | } | |
474 | ||
475 | /* We've found the start of the function. | |
476 | Try looking for a tag word that indicates whether there is a | |
477 | memory frame pointer and what the memory stack allocation is. | |
478 | If one doesn't exist, try using a more exhaustive search of | |
479 | the prologue. */ | |
480 | ||
c5aa993b JM |
481 | if (examine_tag (p - 4, &trans, (int *) NULL, &msize, &mfp_used)) /* Found good tag */ |
482 | examine_prologue (p, &rsize, 0, 0); | |
483 | else /* No tag try prologue */ | |
484 | examine_prologue (p, &rsize, &msize, &mfp_used); | |
c906108c SS |
485 | |
486 | frame->rsize = rsize; | |
487 | frame->msize = msize; | |
488 | frame->flags = 0; | |
489 | if (mfp_used) | |
c5aa993b | 490 | frame->flags |= MFP_USED; |
c906108c | 491 | if (trans) |
c5aa993b | 492 | frame->flags |= TRANSPARENT_FRAME; |
c906108c SS |
493 | if (innermost_frame) |
494 | { | |
495 | frame->saved_msp = read_register (MSP_REGNUM) + msize; | |
496 | } | |
497 | else | |
498 | { | |
499 | if (mfp_used) | |
c5aa993b JM |
500 | frame->saved_msp = |
501 | read_register_stack_integer (frame->frame + rsize - 4, 4); | |
c906108c | 502 | else |
c5aa993b | 503 | frame->saved_msp = frame->next->saved_msp + msize; |
c906108c SS |
504 | } |
505 | } | |
506 | ||
507 | void | |
508 | init_extra_frame_info (frame) | |
509 | struct frame_info *frame; | |
510 | { | |
511 | if (frame->next == 0) | |
512 | /* Assume innermost frame. May produce strange results for "info frame" | |
513 | but there isn't any way to tell the difference. */ | |
514 | init_frame_info (1, frame); | |
c5aa993b JM |
515 | else |
516 | { | |
7a292a7a | 517 | /* We're in get_prev_frame. |
c906108c SS |
518 | Take care of everything in init_frame_pc. */ |
519 | ; | |
520 | } | |
521 | } | |
522 | ||
523 | void | |
524 | init_frame_pc (fromleaf, frame) | |
525 | int fromleaf; | |
526 | struct frame_info *frame; | |
527 | { | |
528 | frame->pc = (fromleaf ? SAVED_PC_AFTER_CALL (frame->next) : | |
c5aa993b | 529 | frame->next ? FRAME_SAVED_PC (frame->next) : read_pc ()); |
c906108c SS |
530 | init_frame_info (fromleaf, frame); |
531 | } | |
532 | \f | |
533 | /* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their | |
534 | offsets being relative to the memory stack pointer (high C) or | |
535 | saved_msp (gcc). */ | |
536 | ||
537 | CORE_ADDR | |
538 | frame_locals_address (fi) | |
539 | struct frame_info *fi; | |
540 | { | |
c5aa993b | 541 | if (fi->flags & MFP_USED) |
c906108c SS |
542 | return fi->saved_msp; |
543 | else | |
544 | return fi->saved_msp - fi->msize; | |
545 | } | |
546 | \f | |
547 | /* Routines for reading the register stack. The caller gets to treat | |
548 | the register stack as a uniform stack in memory, from address $gr1 | |
549 | straight through $rfb and beyond. */ | |
550 | ||
551 | /* Analogous to read_memory except the length is understood to be 4. | |
552 | Also, myaddr can be NULL (meaning don't bother to read), and | |
553 | if actual_mem_addr is non-NULL, store there the address that it | |
554 | was fetched from (or if from a register the offset within | |
555 | registers). Set *LVAL to lval_memory or lval_register, depending | |
556 | on where it came from. The contents written into MYADDR are in | |
557 | target format. */ | |
558 | void | |
559 | read_register_stack (memaddr, myaddr, actual_mem_addr, lval) | |
560 | CORE_ADDR memaddr; | |
561 | char *myaddr; | |
562 | CORE_ADDR *actual_mem_addr; | |
563 | enum lval_type *lval; | |
564 | { | |
565 | long rfb = read_register (RFB_REGNUM); | |
566 | long rsp = read_register (RSP_REGNUM); | |
567 | ||
568 | /* If we don't do this 'info register' stops in the middle. */ | |
c5aa993b | 569 | if (memaddr >= rstack_high_address) |
c906108c SS |
570 | { |
571 | /* a bogus value */ | |
c5aa993b JM |
572 | static char val[] = |
573 | {~0, ~0, ~0, ~0}; | |
c906108c SS |
574 | /* It's in a local register, but off the end of the stack. */ |
575 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
576 | if (myaddr != NULL) | |
577 | { | |
578 | /* Provide bogusness */ | |
579 | memcpy (myaddr, val, 4); | |
580 | } | |
c5aa993b | 581 | supply_register (regnum, val); /* More bogusness */ |
c906108c SS |
582 | if (lval != NULL) |
583 | *lval = lval_register; | |
584 | if (actual_mem_addr != NULL) | |
585 | *actual_mem_addr = REGISTER_BYTE (regnum); | |
586 | } | |
587 | /* If it's in the part of the register stack that's in real registers, | |
588 | get the value from the registers. If it's anywhere else in memory | |
589 | (e.g. in another thread's saved stack), skip this part and get | |
590 | it from real live memory. */ | |
591 | else if (memaddr < rfb && memaddr >= rsp) | |
592 | { | |
593 | /* It's in a register. */ | |
594 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
595 | if (regnum > LR0_REGNUM + 127) | |
596 | error ("Attempt to read register stack out of range."); | |
597 | if (myaddr != NULL) | |
598 | read_register_gen (regnum, myaddr); | |
599 | if (lval != NULL) | |
600 | *lval = lval_register; | |
601 | if (actual_mem_addr != NULL) | |
602 | *actual_mem_addr = REGISTER_BYTE (regnum); | |
603 | } | |
604 | else | |
605 | { | |
606 | /* It's in the memory portion of the register stack. */ | |
c5aa993b | 607 | if (myaddr != NULL) |
c906108c SS |
608 | read_memory (memaddr, myaddr, 4); |
609 | if (lval != NULL) | |
610 | *lval = lval_memory; | |
611 | if (actual_mem_addr != NULL) | |
612 | *actual_mem_addr = memaddr; | |
613 | } | |
614 | } | |
615 | ||
616 | /* Analogous to read_memory_integer | |
617 | except the length is understood to be 4. */ | |
618 | long | |
619 | read_register_stack_integer (memaddr, len) | |
620 | CORE_ADDR memaddr; | |
621 | int len; | |
622 | { | |
623 | char buf[4]; | |
624 | read_register_stack (memaddr, buf, NULL, NULL); | |
625 | return extract_signed_integer (buf, 4); | |
626 | } | |
627 | ||
628 | /* Copy 4 bytes from GDB memory at MYADDR into inferior memory | |
629 | at MEMADDR and put the actual address written into in | |
630 | *ACTUAL_MEM_ADDR. */ | |
631 | static void | |
632 | write_register_stack (memaddr, myaddr, actual_mem_addr) | |
633 | CORE_ADDR memaddr; | |
634 | char *myaddr; | |
635 | CORE_ADDR *actual_mem_addr; | |
636 | { | |
637 | long rfb = read_register (RFB_REGNUM); | |
638 | long rsp = read_register (RSP_REGNUM); | |
639 | /* If we don't do this 'info register' stops in the middle. */ | |
c5aa993b | 640 | if (memaddr >= rstack_high_address) |
c906108c SS |
641 | { |
642 | /* It's in a register, but off the end of the stack. */ | |
643 | if (actual_mem_addr != NULL) | |
c5aa993b | 644 | *actual_mem_addr = 0; |
c906108c SS |
645 | } |
646 | else if (memaddr < rfb) | |
647 | { | |
648 | /* It's in a register. */ | |
649 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
650 | if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127) | |
651 | error ("Attempt to read register stack out of range."); | |
652 | if (myaddr != NULL) | |
c5aa993b | 653 | write_register (regnum, *(long *) myaddr); |
c906108c SS |
654 | if (actual_mem_addr != NULL) |
655 | *actual_mem_addr = 0; | |
656 | } | |
657 | else | |
658 | { | |
659 | /* It's in the memory portion of the register stack. */ | |
660 | if (myaddr != NULL) | |
661 | write_memory (memaddr, myaddr, 4); | |
662 | if (actual_mem_addr != NULL) | |
663 | *actual_mem_addr = memaddr; | |
664 | } | |
665 | } | |
666 | \f | |
667 | /* Find register number REGNUM relative to FRAME and put its | |
668 | (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable | |
669 | was optimized out (and thus can't be fetched). If the variable | |
670 | was fetched from memory, set *ADDRP to where it was fetched from, | |
671 | otherwise it was fetched from a register. | |
672 | ||
673 | The argument RAW_BUFFER must point to aligned memory. */ | |
674 | ||
675 | void | |
7a292a7a | 676 | a29k_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lvalp) |
c906108c SS |
677 | char *raw_buffer; |
678 | int *optimized; | |
679 | CORE_ADDR *addrp; | |
680 | struct frame_info *frame; | |
681 | int regnum; | |
682 | enum lval_type *lvalp; | |
683 | { | |
684 | struct frame_info *fi; | |
685 | CORE_ADDR addr; | |
686 | enum lval_type lval; | |
687 | ||
688 | if (!target_has_registers) | |
689 | error ("No registers."); | |
690 | ||
691 | /* Probably now redundant with the target_has_registers check. */ | |
692 | if (frame == 0) | |
693 | return; | |
694 | ||
695 | /* Once something has a register number, it doesn't get optimized out. */ | |
696 | if (optimized != NULL) | |
697 | *optimized = 0; | |
698 | if (regnum == RSP_REGNUM) | |
699 | { | |
700 | if (raw_buffer != NULL) | |
701 | { | |
702 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame); | |
703 | } | |
704 | if (lvalp != NULL) | |
705 | *lvalp = not_lval; | |
706 | return; | |
707 | } | |
708 | else if (regnum == PC_REGNUM && frame->next != NULL) | |
709 | { | |
710 | if (raw_buffer != NULL) | |
711 | { | |
712 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc); | |
713 | } | |
714 | ||
715 | /* Not sure we have to do this. */ | |
716 | if (lvalp != NULL) | |
717 | *lvalp = not_lval; | |
718 | ||
719 | return; | |
720 | } | |
721 | else if (regnum == MSP_REGNUM) | |
722 | { | |
723 | if (raw_buffer != NULL) | |
724 | { | |
725 | if (frame->next != NULL) | |
726 | { | |
727 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), | |
728 | frame->next->saved_msp); | |
729 | } | |
730 | else | |
731 | read_register_gen (MSP_REGNUM, raw_buffer); | |
732 | } | |
733 | /* The value may have been computed, not fetched. */ | |
734 | if (lvalp != NULL) | |
735 | *lvalp = not_lval; | |
736 | return; | |
737 | } | |
738 | else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128) | |
739 | { | |
740 | /* These registers are not saved over procedure calls, | |
c5aa993b | 741 | so just print out the current values. */ |
c906108c SS |
742 | if (raw_buffer != NULL) |
743 | read_register_gen (regnum, raw_buffer); | |
744 | if (lvalp != NULL) | |
745 | *lvalp = lval_register; | |
746 | if (addrp != NULL) | |
747 | *addrp = REGISTER_BYTE (regnum); | |
748 | return; | |
749 | } | |
c5aa993b | 750 | |
c906108c SS |
751 | addr = frame->frame + (regnum - LR0_REGNUM) * 4; |
752 | if (raw_buffer != NULL) | |
753 | read_register_stack (addr, raw_buffer, &addr, &lval); | |
754 | if (lvalp != NULL) | |
755 | *lvalp = lval; | |
756 | if (addrp != NULL) | |
757 | *addrp = addr; | |
758 | } | |
759 | \f | |
760 | ||
761 | /* Discard from the stack the innermost frame, | |
762 | restoring all saved registers. */ | |
763 | ||
764 | void | |
765 | pop_frame () | |
766 | { | |
767 | struct frame_info *frame = get_current_frame (); | |
c5aa993b | 768 | CORE_ADDR rfb = read_register (RFB_REGNUM); |
c906108c | 769 | CORE_ADDR gr1 = frame->frame + frame->rsize; |
c5aa993b | 770 | CORE_ADDR lr1; |
c906108c SS |
771 | CORE_ADDR original_lr0; |
772 | int must_fix_lr0 = 0; | |
773 | int i; | |
774 | ||
775 | /* If popping a dummy frame, need to restore registers. */ | |
776 | if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM), | |
777 | read_register (SP_REGNUM), | |
778 | FRAME_FP (frame))) | |
779 | { | |
c5aa993b | 780 | int lrnum = LR0_REGNUM + DUMMY_ARG / 4; |
c906108c | 781 | for (i = 0; i < DUMMY_SAVE_SR128; ++i) |
c5aa993b | 782 | write_register (SR_REGNUM (i + 128), read_register (lrnum++)); |
c906108c | 783 | for (i = 0; i < DUMMY_SAVE_SR160; ++i) |
c5aa993b | 784 | write_register (SR_REGNUM (i + 160), read_register (lrnum++)); |
c906108c SS |
785 | for (i = 0; i < DUMMY_SAVE_GREGS; ++i) |
786 | write_register (RETURN_REGNUM + i, read_register (lrnum++)); | |
787 | /* Restore the PCs and prepare to restore LR0. */ | |
c5aa993b JM |
788 | write_register (PC_REGNUM, read_register (lrnum++)); |
789 | write_register (NPC_REGNUM, read_register (lrnum++)); | |
790 | write_register (PC2_REGNUM, read_register (lrnum++)); | |
c906108c SS |
791 | original_lr0 = read_register (lrnum++); |
792 | must_fix_lr0 = 1; | |
793 | } | |
794 | ||
795 | /* Restore the memory stack pointer. */ | |
796 | write_register (MSP_REGNUM, frame->saved_msp); | |
c5aa993b | 797 | /* Restore the register stack pointer. */ |
c906108c SS |
798 | write_register (GR1_REGNUM, gr1); |
799 | ||
800 | /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */ | |
c5aa993b | 801 | if (must_fix_lr0) |
c906108c SS |
802 | write_register (LR0_REGNUM, original_lr0); |
803 | ||
c5aa993b JM |
804 | /* Check whether we need to fill registers. */ |
805 | lr1 = read_register (LR0_REGNUM + 1); | |
806 | if (lr1 > rfb) | |
807 | { | |
808 | /* Fill. */ | |
c906108c | 809 | int num_bytes = lr1 - rfb; |
c5aa993b | 810 | int i; |
c906108c | 811 | long word; |
c5aa993b JM |
812 | |
813 | write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes); | |
814 | write_register (RFB_REGNUM, lr1); | |
815 | for (i = 0; i < num_bytes; i += 4) | |
816 | { | |
c906108c | 817 | /* Note: word is in host byte order. */ |
c5aa993b JM |
818 | word = read_memory_integer (rfb + i, 4); |
819 | write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word); | |
820 | } | |
c906108c | 821 | } |
c5aa993b | 822 | flush_cached_frames (); |
c906108c SS |
823 | } |
824 | ||
825 | /* Push an empty stack frame, to record the current PC, etc. */ | |
826 | ||
c5aa993b | 827 | void |
c906108c SS |
828 | push_dummy_frame () |
829 | { | |
830 | long w; | |
831 | CORE_ADDR rab, gr1; | |
832 | CORE_ADDR msp = read_register (MSP_REGNUM); | |
833 | int lrnum, i; | |
834 | CORE_ADDR original_lr0; | |
c5aa993b | 835 | |
c906108c SS |
836 | /* Read original lr0 before changing gr1. This order isn't really needed |
837 | since GDB happens to have a snapshot of all the regs and doesn't toss | |
838 | it when gr1 is changed. But it's The Right Thing To Do. */ | |
839 | original_lr0 = read_register (LR0_REGNUM); | |
840 | ||
c5aa993b | 841 | /* Allocate the new frame. */ |
c906108c SS |
842 | gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE; |
843 | write_register (GR1_REGNUM, gr1); | |
844 | ||
845 | #ifdef VXWORKS_TARGET | |
846 | /* We force re-reading all registers to get the new local registers set | |
847 | after gr1 has been modified. This fix is due to the lack of single | |
848 | register read/write operation in the RPC interface between VxGDB and | |
849 | VxWorks. This really must be changed ! */ | |
850 | ||
851 | vx_read_register (-1); | |
852 | ||
853 | #endif /* VXWORK_TARGET */ | |
854 | ||
855 | rab = read_register (RAB_REGNUM); | |
856 | if (gr1 < rab) | |
857 | { | |
858 | /* We need to spill registers. */ | |
859 | int num_bytes = rab - gr1; | |
860 | CORE_ADDR rfb = read_register (RFB_REGNUM); | |
861 | int i; | |
862 | long word; | |
863 | ||
864 | write_register (RFB_REGNUM, rfb - num_bytes); | |
865 | write_register (RAB_REGNUM, gr1); | |
866 | for (i = 0; i < num_bytes; i += 4) | |
867 | { | |
868 | /* Note: word is in target byte order. */ | |
869 | read_register_gen (LR0_REGNUM + i / 4, (char *) &word); | |
870 | write_memory (rfb - num_bytes + i, (char *) &word, 4); | |
871 | } | |
872 | } | |
873 | ||
874 | /* There are no arguments in to the dummy frame, so we don't need | |
875 | more than rsize plus the return address and lr1. */ | |
876 | write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4); | |
877 | ||
878 | /* Set the memory frame pointer. */ | |
879 | write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp); | |
880 | ||
881 | /* Allocate arg_slop. */ | |
882 | write_register (MSP_REGNUM, msp - 16 * 4); | |
883 | ||
884 | /* Save registers. */ | |
c5aa993b | 885 | lrnum = LR0_REGNUM + DUMMY_ARG / 4; |
c906108c SS |
886 | for (i = 0; i < DUMMY_SAVE_SR128; ++i) |
887 | write_register (lrnum++, read_register (SR_REGNUM (i + 128))); | |
888 | for (i = 0; i < DUMMY_SAVE_SR160; ++i) | |
889 | write_register (lrnum++, read_register (SR_REGNUM (i + 160))); | |
890 | for (i = 0; i < DUMMY_SAVE_GREGS; ++i) | |
891 | write_register (lrnum++, read_register (RETURN_REGNUM + i)); | |
892 | /* Save the PCs and LR0. */ | |
893 | write_register (lrnum++, read_register (PC_REGNUM)); | |
894 | write_register (lrnum++, read_register (NPC_REGNUM)); | |
895 | write_register (lrnum++, read_register (PC2_REGNUM)); | |
896 | ||
897 | /* Why are we saving LR0? What would clobber it? (the dummy frame should | |
898 | be below it on the register stack, no?). */ | |
899 | write_register (lrnum++, original_lr0); | |
900 | } | |
901 | ||
902 | ||
903 | ||
904 | /* | |
905 | This routine takes three arguments and makes the cached frames look | |
906 | as if these arguments defined a frame on the cache. This allows the | |
907 | rest of `info frame' to extract the important arguments without much | |
908 | difficulty. Since an individual frame on the 29K is determined by | |
909 | three values (FP, PC, and MSP), we really need all three to do a | |
910 | good job. */ | |
911 | ||
912 | struct frame_info * | |
913 | setup_arbitrary_frame (argc, argv) | |
914 | int argc; | |
915 | CORE_ADDR *argv; | |
916 | { | |
917 | struct frame_info *frame; | |
918 | ||
919 | if (argc != 3) | |
920 | error ("AMD 29k frame specifications require three arguments: rsp pc msp"); | |
921 | ||
922 | frame = create_new_frame (argv[0], argv[1]); | |
923 | ||
924 | if (!frame) | |
925 | fatal ("internal: create_new_frame returned invalid frame id"); | |
c5aa993b | 926 | |
c906108c SS |
927 | /* Creating a new frame munges the `frame' value from the current |
928 | GR1, so we restore it again here. FIXME, untangle all this | |
929 | 29K frame stuff... */ | |
930 | frame->frame = argv[0]; | |
931 | ||
932 | /* Our MSP is in argv[2]. It'd be intelligent if we could just | |
933 | save this value in the FRAME. But the way it's set up (FIXME), | |
934 | we must save our caller's MSP. We compute that by adding our | |
935 | memory stack frame size to our MSP. */ | |
936 | frame->saved_msp = argv[2] + frame->msize; | |
937 | ||
938 | return frame; | |
939 | } | |
940 | ||
941 | int | |
942 | gdb_print_insn_a29k (memaddr, info) | |
943 | bfd_vma memaddr; | |
944 | disassemble_info *info; | |
945 | { | |
946 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
947 | return print_insn_big_a29k (memaddr, info); | |
948 | else | |
949 | return print_insn_little_a29k (memaddr, info); | |
950 | } | |
951 | ||
952 | enum a29k_processor_types processor_type = a29k_unknown; | |
953 | ||
954 | void | |
955 | a29k_get_processor_type () | |
956 | { | |
957 | unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM); | |
958 | ||
959 | /* Most of these don't have freeze mode. */ | |
960 | processor_type = a29k_no_freeze_mode; | |
961 | ||
962 | switch ((cfg_reg >> 28) & 0xf) | |
963 | { | |
964 | case 0: | |
965 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29000"); | |
966 | break; | |
967 | case 1: | |
968 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29005"); | |
969 | break; | |
970 | case 2: | |
971 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29050"); | |
972 | processor_type = a29k_freeze_mode; | |
973 | break; | |
974 | case 3: | |
975 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29035"); | |
976 | break; | |
977 | case 4: | |
978 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29030"); | |
979 | break; | |
980 | case 5: | |
981 | fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*"); | |
982 | break; | |
983 | case 6: | |
984 | fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*"); | |
985 | break; | |
986 | case 7: | |
987 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29040"); | |
988 | break; | |
989 | default: | |
990 | fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n"); | |
991 | /* Don't bother to print the revision. */ | |
992 | return; | |
993 | } | |
994 | fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f)); | |
995 | } | |
996 | ||
997 | #ifdef GET_LONGJMP_TARGET | |
998 | /* Figure out where the longjmp will land. We expect that we have just entered | |
c5aa993b | 999 | longjmp and haven't yet setup the stack frame, so the args are still in the |
c906108c SS |
1000 | output regs. lr2 (LR2_REGNUM) points at the jmp_buf structure from which we |
1001 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. | |
1002 | This routine returns true on success */ | |
1003 | ||
1004 | int | |
c5aa993b | 1005 | get_longjmp_target (pc) |
c906108c SS |
1006 | CORE_ADDR *pc; |
1007 | { | |
1008 | CORE_ADDR jb_addr; | |
c5aa993b | 1009 | char buf[sizeof (CORE_ADDR)]; |
c906108c | 1010 | |
c5aa993b | 1011 | jb_addr = read_register (LR2_REGNUM); |
c906108c | 1012 | |
c5aa993b JM |
1013 | if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, (char *) buf, |
1014 | sizeof (CORE_ADDR))) | |
c906108c SS |
1015 | return 0; |
1016 | ||
c5aa993b | 1017 | *pc = extract_address ((PTR) buf, sizeof (CORE_ADDR)); |
c906108c SS |
1018 | return 1; |
1019 | } | |
1020 | #endif /* GET_LONGJMP_TARGET */ | |
1021 | ||
1022 | void | |
1023 | _initialize_a29k_tdep () | |
1024 | { | |
1025 | extern CORE_ADDR text_end; | |
1026 | ||
1027 | tm_print_insn = gdb_print_insn_a29k; | |
1028 | ||
1029 | /* FIXME, there should be a way to make a CORE_ADDR variable settable. */ | |
1030 | add_show_from_set | |
1031 | (add_set_cmd ("rstack_high_address", class_support, var_uinteger, | |
c5aa993b | 1032 | (char *) &rstack_high_address, |
c906108c SS |
1033 | "Set top address in memory of the register stack.\n\ |
1034 | Attempts to access registers saved above this address will be ignored\n\ | |
1035 | or will produce the value -1.", &setlist), | |
1036 | &showlist); | |
1037 | ||
1038 | /* FIXME, there should be a way to make a CORE_ADDR variable settable. */ | |
1039 | add_show_from_set | |
1040 | (add_set_cmd ("call_scratch_address", class_support, var_uinteger, | |
c5aa993b JM |
1041 | (char *) &text_end, |
1042 | "Set address in memory where small amounts of RAM can be used\n\ | |
c906108c SS |
1043 | when making function calls into the inferior.", &setlist), |
1044 | &showlist); | |
1045 | } |