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41abdfbd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ecf4059f | 2 | Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc. |
41abdfbd JG |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
41abdfbd | 20 | #include "defs.h" |
41abdfbd JG |
21 | #include "frame.h" |
22 | #include "inferior.h" | |
23 | #include "symtab.h" | |
24 | #include "target.h" | |
030fb5cb | 25 | #include "gdbcore.h" |
41abdfbd | 26 | |
2aefe6e4 JK |
27 | #include "xcoffsolib.h" |
28 | ||
41abdfbd | 29 | #include <a.out.h> |
d6434f39 JG |
30 | |
31 | extern struct obstack frame_cache_obstack; | |
32 | ||
41abdfbd | 33 | extern int errno; |
41abdfbd JG |
34 | |
35 | /* Nonzero if we just simulated a single step break. */ | |
36 | int one_stepped; | |
37 | ||
41abdfbd JG |
38 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
39 | ||
40 | static struct sstep_breaks { | |
030fb5cb JK |
41 | /* Address, or 0 if this is not in use. */ |
42 | CORE_ADDR address; | |
43 | /* Shadow contents. */ | |
44 | char data[4]; | |
41abdfbd JG |
45 | } stepBreaks[2]; |
46 | ||
ecf4059f JG |
47 | /* Static function prototypes */ |
48 | ||
ecf4059f JG |
49 | static CORE_ADDR |
50 | find_toc_address PARAMS ((CORE_ADDR pc)); | |
51 | ||
52 | static CORE_ADDR | |
53 | branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)); | |
54 | ||
55 | static void | |
56 | frame_get_cache_fsr PARAMS ((struct frame_info *fi, | |
57 | struct aix_framedata *fdatap)); | |
41abdfbd JG |
58 | |
59 | /* | |
60 | * Calculate the destination of a branch/jump. Return -1 if not a branch. | |
61 | */ | |
ecf4059f | 62 | static CORE_ADDR |
41abdfbd | 63 | branch_dest (opcode, instr, pc, safety) |
ecf4059f JG |
64 | int opcode; |
65 | int instr; | |
66 | CORE_ADDR pc; | |
67 | CORE_ADDR safety; | |
41abdfbd JG |
68 | { |
69 | register long offset; | |
ecf4059f | 70 | CORE_ADDR dest; |
41abdfbd JG |
71 | int immediate; |
72 | int absolute; | |
73 | int ext_op; | |
74 | ||
75 | absolute = (int) ((instr >> 1) & 1); | |
76 | ||
77 | switch (opcode) { | |
78 | case 18 : | |
ecf4059f | 79 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
41abdfbd JG |
80 | |
81 | case 16 : | |
82 | if (opcode != 18) /* br conditional */ | |
83 | immediate = ((instr & ~3) << 16) >> 16; | |
84 | if (absolute) | |
85 | dest = immediate; | |
86 | else | |
87 | dest = pc + immediate; | |
88 | break; | |
89 | ||
90 | case 19 : | |
91 | ext_op = (instr>>1) & 0x3ff; | |
92 | ||
93 | if (ext_op == 16) /* br conditional register */ | |
94 | dest = read_register (LR_REGNUM) & ~3; | |
95 | ||
96 | else if (ext_op == 528) /* br cond to count reg */ | |
9aa31e91 JK |
97 | { |
98 | dest = read_register (CTR_REGNUM) & ~3; | |
99 | ||
100 | /* If we are about to execute a system call, dest is something | |
101 | like 0x22fc or 0x3b00. Upon completion the system call | |
102 | will return to the address in the link register. */ | |
103 | if (dest < TEXT_SEGMENT_BASE) | |
104 | dest = read_register (LR_REGNUM) & ~3; | |
105 | } | |
41abdfbd JG |
106 | else return -1; |
107 | break; | |
108 | ||
109 | default: return -1; | |
110 | } | |
818de002 | 111 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
41abdfbd JG |
112 | } |
113 | ||
114 | ||
115 | ||
116 | /* AIX does not support PT_STEP. Simulate it. */ | |
117 | ||
997cc2c0 | 118 | void |
41abdfbd | 119 | single_step (signal) |
997cc2c0 | 120 | int signal; |
41abdfbd JG |
121 | { |
122 | #define INSNLEN(OPCODE) 4 | |
123 | ||
124 | static char breakp[] = BREAKPOINT; | |
030fb5cb JK |
125 | int ii, insn; |
126 | CORE_ADDR loc; | |
127 | CORE_ADDR breaks[2]; | |
128 | int opcode; | |
41abdfbd JG |
129 | |
130 | if (!one_stepped) { | |
41abdfbd JG |
131 | loc = read_pc (); |
132 | ||
359a097f | 133 | read_memory (loc, (char *) &insn, 4); |
41abdfbd JG |
134 | |
135 | breaks[0] = loc + INSNLEN(insn); | |
136 | opcode = insn >> 26; | |
137 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
138 | ||
818de002 PB |
139 | /* Don't put two breakpoints on the same address. */ |
140 | if (breaks[1] == breaks[0]) | |
141 | breaks[1] = -1; | |
142 | ||
030fb5cb | 143 | stepBreaks[1].address = 0; |
41abdfbd JG |
144 | |
145 | for (ii=0; ii < 2; ++ii) { | |
146 | ||
147 | /* ignore invalid breakpoint. */ | |
148 | if ( breaks[ii] == -1) | |
149 | continue; | |
150 | ||
030fb5cb | 151 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
41abdfbd | 152 | |
030fb5cb | 153 | write_memory (breaks[ii], breakp, 4); |
41abdfbd JG |
154 | stepBreaks[ii].address = breaks[ii]; |
155 | } | |
156 | ||
157 | one_stepped = 1; | |
997cc2c0 | 158 | } else { |
41abdfbd JG |
159 | |
160 | /* remove step breakpoints. */ | |
161 | for (ii=0; ii < 2; ++ii) | |
030fb5cb | 162 | if (stepBreaks[ii].address != 0) |
41abdfbd | 163 | write_memory |
030fb5cb | 164 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
41abdfbd JG |
165 | |
166 | one_stepped = 0; | |
167 | } | |
997cc2c0 | 168 | errno = 0; /* FIXME, don't ignore errors! */ |
030fb5cb | 169 | /* What errors? {read,write}_memory call error(). */ |
41abdfbd | 170 | } |
41abdfbd JG |
171 | |
172 | ||
173 | /* return pc value after skipping a function prologue. */ | |
174 | ||
175 | skip_prologue (pc) | |
ecf4059f | 176 | CORE_ADDR pc; |
41abdfbd | 177 | { |
34df79fc | 178 | char buf[4]; |
41abdfbd | 179 | unsigned int tmp; |
34df79fc | 180 | unsigned long op; |
41abdfbd | 181 | |
34df79fc | 182 | if (target_read_memory (pc, buf, 4)) |
41abdfbd | 183 | return pc; /* Can't access it -- assume no prologue. */ |
34df79fc | 184 | op = extract_unsigned_integer (buf, 4); |
41abdfbd JG |
185 | |
186 | /* Assume that subsequent fetches can fail with low probability. */ | |
187 | ||
188 | if (op == 0x7c0802a6) { /* mflr r0 */ | |
189 | pc += 4; | |
190 | op = read_memory_integer (pc, 4); | |
191 | } | |
41abdfbd JG |
192 | |
193 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
194 | pc += 4; | |
195 | op = read_memory_integer (pc, 4); | |
196 | } | |
197 | ||
198 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
199 | pc += 4; | |
200 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
201 | |
202 | /* At this point, make sure this is not a trampoline function | |
203 | (a function that simply calls another functions, and nothing else). | |
204 | If the next is not a nop, this branch was part of the function | |
205 | prologue. */ | |
206 | ||
207 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
208 | op == 0x0) | |
209 | return pc - 4; /* don't skip over this branch */ | |
41abdfbd JG |
210 | } |
211 | ||
cdb1cc92 ILT |
212 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ |
213 | pc += 4; /* store floating register double */ | |
214 | op = read_memory_integer (pc, 4); | |
215 | } | |
216 | ||
41abdfbd JG |
217 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ |
218 | pc += 4; | |
219 | op = read_memory_integer (pc, 4); | |
220 | } | |
221 | ||
222 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
223 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 224 | (tmp == 0x93e1)) /* st r31,NUM(r1) */ |
41abdfbd JG |
225 | { |
226 | pc += 4; | |
227 | op = read_memory_integer (pc, 4); | |
228 | } | |
229 | ||
230 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
231 | pc += 4; /* l r30, ... */ | |
232 | op = read_memory_integer (pc, 4); | |
233 | } | |
234 | ||
507e4004 | 235 | /* store parameters into stack */ |
818de002 PB |
236 | while( |
237 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
238 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
239 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
240 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
241 | { | |
242 | pc += 4; /* store fpr double */ | |
243 | op = read_memory_integer (pc, 4); | |
244 | } | |
41abdfbd JG |
245 | |
246 | if (op == 0x603f0000) { /* oril r31, r1, 0x0 */ | |
247 | pc += 4; /* this happens if r31 is used as */ | |
248 | op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */ | |
249 | ||
818de002 PB |
250 | tmp = 0; |
251 | while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */ | |
252 | pc += 4; /* st r4, NUM(r31), ... */ | |
41abdfbd | 253 | op = read_memory_integer (pc, 4); |
818de002 | 254 | tmp += 0x20; |
41abdfbd JG |
255 | } |
256 | } | |
507e4004 PB |
257 | #if 0 |
258 | /* I have problems with skipping over __main() that I need to address | |
259 | * sometime. Previously, I used to use misc_function_vector which | |
260 | * didn't work as well as I wanted to be. -MGO */ | |
261 | ||
262 | /* If the first thing after skipping a prolog is a branch to a function, | |
263 | this might be a call to an initializer in main(), introduced by gcc2. | |
264 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
265 | work before calling a function right after a prologue, thus we can | |
266 | single out such gcc2 behaviour. */ | |
267 | ||
268 | ||
269 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
270 | op = read_memory_integer (pc+4, 4); | |
271 | ||
272 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
273 | ||
274 | /* check and see if we are in main. If so, skip over this initializer | |
275 | function as well. */ | |
276 | ||
277 | tmp = find_pc_misc_function (pc); | |
2e4964ad | 278 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
507e4004 PB |
279 | return pc + 8; |
280 | } | |
281 | } | |
282 | #endif /* 0 */ | |
283 | ||
41abdfbd JG |
284 | return pc; |
285 | } | |
286 | ||
818de002 | 287 | |
41abdfbd JG |
288 | /************************************************************************* |
289 | Support for creating pushind a dummy frame into the stack, and popping | |
290 | frames, etc. | |
291 | *************************************************************************/ | |
292 | ||
818de002 PB |
293 | /* The total size of dummy frame is 436, which is; |
294 | ||
295 | 32 gpr's - 128 bytes | |
296 | 32 fpr's - 256 " | |
297 | 7 the rest - 28 " | |
298 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
299 | for the link area might not be necessary, since it will be taken | |
300 | care of by push_arguments(). */ | |
301 | ||
302 | #define DUMMY_FRAME_SIZE 436 | |
303 | ||
41abdfbd JG |
304 | #define DUMMY_FRAME_ADDR_SIZE 10 |
305 | ||
306 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
818de002 | 307 | was debugging and starts debugging something else. FIXMEibm */ |
41abdfbd JG |
308 | |
309 | static int dummy_frame_count = 0; | |
310 | static int dummy_frame_size = 0; | |
311 | static CORE_ADDR *dummy_frame_addr = 0; | |
312 | ||
313 | extern int stop_stack_dummy; | |
314 | ||
315 | /* push a dummy frame into stack, save all register. Currently we are saving | |
316 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
317 | ||
ecf4059f | 318 | void |
41abdfbd JG |
319 | push_dummy_frame () |
320 | { | |
359a097f JK |
321 | /* stack pointer. */ |
322 | CORE_ADDR sp; | |
323 | ||
324 | /* link register. */ | |
325 | CORE_ADDR pc; | |
326 | /* Same thing, target byte order. */ | |
327 | char pc_targ[4]; | |
328 | ||
41abdfbd JG |
329 | int ii; |
330 | ||
5f1c39ef | 331 | target_fetch_registers (-1); |
6c6afbb9 | 332 | |
41abdfbd JG |
333 | if (dummy_frame_count >= dummy_frame_size) { |
334 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
335 | if (dummy_frame_addr) | |
336 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
337 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
338 | else | |
339 | dummy_frame_addr = (CORE_ADDR*) | |
340 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
341 | } | |
342 | ||
343 | sp = read_register(SP_REGNUM); | |
359a097f JK |
344 | pc = read_register(PC_REGNUM); |
345 | memcpy (pc_targ, (char *) &pc, 4); | |
41abdfbd JG |
346 | |
347 | dummy_frame_addr [dummy_frame_count++] = sp; | |
348 | ||
349 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
6c6afbb9 | 350 | thinks he is free to use the space underneath it. And kernel actually |
41abdfbd JG |
351 | uses that area for IPC purposes when executing ptrace(2) calls. So |
352 | before writing register values into the new frame, decrement and update | |
353 | %sp first in order to secure your frame. */ | |
354 | ||
818de002 | 355 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
41abdfbd | 356 | |
41abdfbd JG |
357 | /* gdb relies on the state of current_frame. We'd better update it, |
358 | otherwise things like do_registers_info() wouldn't work properly! */ | |
359 | ||
360 | flush_cached_frames (); | |
818de002 | 361 | set_current_frame (create_new_frame (sp-DUMMY_FRAME_SIZE, pc)); |
41abdfbd JG |
362 | |
363 | /* save program counter in link register's space. */ | |
359a097f | 364 | write_memory (sp+8, pc_targ, 4); |
41abdfbd | 365 | |
6c6afbb9 | 366 | /* save all floating point and general purpose registers here. */ |
41abdfbd JG |
367 | |
368 | /* fpr's, f0..f31 */ | |
369 | for (ii = 0; ii < 32; ++ii) | |
370 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
371 | ||
372 | /* gpr's r0..r31 */ | |
373 | for (ii=1; ii <=32; ++ii) | |
374 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
375 | ||
818de002 PB |
376 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
377 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
378 | ||
379 | for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) { | |
380 | write_memory (sp-384-(ii*4), | |
381 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
382 | } | |
383 | ||
384 | /* Save sp or so called back chain right here. */ | |
385 | write_memory (sp-DUMMY_FRAME_SIZE, &sp, 4); | |
386 | sp -= DUMMY_FRAME_SIZE; | |
41abdfbd JG |
387 | |
388 | /* And finally, this is the back chain. */ | |
359a097f | 389 | write_memory (sp+8, pc_targ, 4); |
41abdfbd JG |
390 | } |
391 | ||
392 | ||
393 | /* Pop a dummy frame. | |
394 | ||
395 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
396 | is usually done before user calls a function explicitly. | |
397 | ||
818de002 PB |
398 | After a dummy frame is pushed, some instructions are copied into stack, |
399 | and stack pointer is decremented even more. Since we don't have a frame | |
400 | pointer to get back to the parent frame of the dummy, we start having | |
401 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
402 | addresses of dummy frames as such. When poping happens and when we | |
403 | detect that was a dummy frame, we pop it back to its parent by using | |
404 | dummy frame stack (`dummy_frame_addr' array). | |
ecf4059f JG |
405 | |
406 | FIXME: This whole concept is broken. You should be able to detect | |
407 | a dummy stack frame *on the user's stack itself*. When you do, | |
408 | then you know the format of that stack frame -- including its | |
409 | saved SP register! There should *not* be a separate stack in the | |
d6434f39 | 410 | GDB process that keeps track of these dummy frames! -- [email protected] Aug92 |
41abdfbd JG |
411 | */ |
412 | ||
413 | pop_dummy_frame () | |
414 | { | |
415 | CORE_ADDR sp, pc; | |
416 | int ii; | |
417 | sp = dummy_frame_addr [--dummy_frame_count]; | |
418 | ||
419 | /* restore all fpr's. */ | |
420 | for (ii = 1; ii <= 32; ++ii) | |
421 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
422 | ||
423 | /* restore all gpr's */ | |
424 | for (ii=1; ii <= 32; ++ii) { | |
425 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
426 | } | |
427 | ||
818de002 PB |
428 | /* restore the rest of the registers. */ |
429 | for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) | |
430 | read_memory (sp-384-(ii*4), | |
431 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
432 | ||
433 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
434 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); | |
41abdfbd JG |
435 | |
436 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
437 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
438 | one we should restore. Change it with the one we need. */ | |
439 | ||
440 | *(int*)®isters [REGISTER_BYTE(FP_REGNUM)] = sp; | |
441 | ||
442 | /* Now we can restore all registers. */ | |
443 | ||
5f1c39ef | 444 | target_store_registers (-1); |
41abdfbd JG |
445 | pc = read_pc (); |
446 | flush_cached_frames (); | |
447 | set_current_frame (create_new_frame (sp, pc)); | |
448 | } | |
449 | ||
450 | ||
451 | /* pop the innermost frame, go back to the caller. */ | |
452 | ||
ecf4059f | 453 | void |
41abdfbd JG |
454 | pop_frame () |
455 | { | |
359a097f | 456 | CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ |
6c6afbb9 | 457 | struct aix_framedata fdata; |
41abdfbd | 458 | FRAME fr = get_current_frame (); |
41abdfbd | 459 | int addr, ii; |
41abdfbd JG |
460 | |
461 | pc = read_pc (); | |
462 | sp = FRAME_FP (fr); | |
463 | ||
464 | if (stop_stack_dummy && dummy_frame_count) { | |
465 | pop_dummy_frame (); | |
466 | return; | |
467 | } | |
468 | ||
469 | /* figure out previous %pc value. If the function is frameless, it is | |
470 | still in the link register, otherwise walk the frames and retrieve the | |
471 | saved %pc value in the previous frame. */ | |
472 | ||
473 | addr = get_pc_function_start (fr->pc) + FUNCTION_START_OFFSET; | |
6c6afbb9 | 474 | function_frame_info (addr, &fdata); |
41abdfbd | 475 | |
359a097f | 476 | prev_sp = read_memory_integer (sp, 4); |
6c6afbb9 | 477 | if (fdata.frameless) |
41abdfbd JG |
478 | lr = read_register (LR_REGNUM); |
479 | else | |
359a097f | 480 | lr = read_memory_integer (prev_sp+8, 4); |
41abdfbd JG |
481 | |
482 | /* reset %pc value. */ | |
483 | write_register (PC_REGNUM, lr); | |
484 | ||
485 | /* reset register values if any was saved earlier. */ | |
6c6afbb9 | 486 | addr = prev_sp - fdata.offset; |
41abdfbd | 487 | |
6c6afbb9 PB |
488 | if (fdata.saved_gpr != -1) |
489 | for (ii=fdata.saved_gpr; ii <= 31; ++ii) { | |
41abdfbd | 490 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
cdb1cc92 | 491 | addr += 4; |
41abdfbd JG |
492 | } |
493 | ||
6c6afbb9 PB |
494 | if (fdata.saved_fpr != -1) |
495 | for (ii=fdata.saved_fpr; ii <= 31; ++ii) { | |
41abdfbd JG |
496 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
497 | addr += 8; | |
498 | } | |
499 | ||
500 | write_register (SP_REGNUM, prev_sp); | |
5f1c39ef | 501 | target_store_registers (-1); |
41abdfbd JG |
502 | flush_cached_frames (); |
503 | set_current_frame (create_new_frame (prev_sp, lr)); | |
504 | } | |
505 | ||
41abdfbd JG |
506 | /* fixup the call sequence of a dummy function, with the real function address. |
507 | its argumets will be passed by gdb. */ | |
508 | ||
ecf4059f | 509 | void |
41abdfbd JG |
510 | fix_call_dummy(dummyname, pc, fun, nargs, type) |
511 | char *dummyname; | |
ecf4059f JG |
512 | CORE_ADDR pc; |
513 | CORE_ADDR fun; | |
41abdfbd JG |
514 | int nargs; /* not used */ |
515 | int type; /* not used */ | |
41abdfbd JG |
516 | { |
517 | #define TOC_ADDR_OFFSET 20 | |
518 | #define TARGET_ADDR_OFFSET 28 | |
519 | ||
520 | int ii; | |
ecf4059f JG |
521 | CORE_ADDR target_addr; |
522 | CORE_ADDR tocvalue; | |
41abdfbd JG |
523 | |
524 | target_addr = fun; | |
525 | tocvalue = find_toc_address (target_addr); | |
526 | ||
527 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
528 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
529 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
530 | ||
531 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
532 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
533 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
534 | ||
535 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
536 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
537 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
538 | ||
539 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
540 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
541 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
542 | } | |
543 | ||
544 | ||
41abdfbd | 545 | /* return information about a function frame. |
6c6afbb9 | 546 | in struct aix_frameinfo fdata: |
cdb1cc92 ILT |
547 | - frameless is TRUE, if function does not have a frame. |
548 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
41abdfbd JG |
549 | - offset is the number of bytes used in the frame to save registers. |
550 | - saved_gpr is the number of the first saved gpr. | |
551 | - saved_fpr is the number of the first saved fpr. | |
6c6afbb9 PB |
552 | - alloca_reg is the number of the register used for alloca() handling. |
553 | Otherwise -1. | |
41abdfbd | 554 | */ |
ecf4059f | 555 | void |
6c6afbb9 | 556 | function_frame_info (pc, fdata) |
d6434f39 | 557 | CORE_ADDR pc; |
6c6afbb9 | 558 | struct aix_framedata *fdata; |
41abdfbd JG |
559 | { |
560 | unsigned int tmp; | |
561 | register unsigned int op; | |
562 | ||
6c6afbb9 PB |
563 | fdata->offset = 0; |
564 | fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1; | |
cdb1cc92 | 565 | fdata->frameless = 1; |
41abdfbd | 566 | |
41abdfbd JG |
567 | op = read_memory_integer (pc, 4); |
568 | if (op == 0x7c0802a6) { /* mflr r0 */ | |
569 | pc += 4; | |
570 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 571 | fdata->nosavedpc = 0; |
6c6afbb9 | 572 | fdata->frameless = 0; |
41abdfbd | 573 | } |
cdb1cc92 ILT |
574 | else /* else, pc is not saved */ |
575 | fdata->nosavedpc = 1; | |
41abdfbd JG |
576 | |
577 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
578 | pc += 4; | |
579 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 580 | fdata->frameless = 0; |
41abdfbd JG |
581 | } |
582 | ||
583 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
584 | pc += 4; | |
585 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
586 | /* At this point, make sure this is not a trampoline function |
587 | (a function that simply calls another functions, and nothing else). | |
588 | If the next is not a nop, this branch was part of the function | |
589 | prologue. */ | |
590 | ||
591 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
592 | op == 0x0) | |
593 | return; /* prologue is over */ | |
cdb1cc92 | 594 | fdata->frameless = 0; |
41abdfbd JG |
595 | } |
596 | ||
597 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
598 | pc += 4; /* store floating register double */ | |
599 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 600 | fdata->frameless = 0; |
41abdfbd JG |
601 | } |
602 | ||
603 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ | |
604 | int tmp2; | |
6c6afbb9 | 605 | fdata->saved_gpr = (op >> 21) & 0x1f; |
41abdfbd JG |
606 | tmp2 = op & 0xffff; |
607 | if (tmp2 > 0x7fff) | |
cdb1cc92 | 608 | tmp2 = (~0 &~ 0xffff) | tmp2; |
41abdfbd JG |
609 | |
610 | if (tmp2 < 0) { | |
611 | tmp2 = tmp2 * -1; | |
6c6afbb9 PB |
612 | fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8; |
613 | if ( fdata->saved_fpr > 0) | |
614 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
41abdfbd | 615 | else |
6c6afbb9 | 616 | fdata->saved_fpr = -1; |
41abdfbd | 617 | } |
6c6afbb9 PB |
618 | fdata->offset = tmp2; |
619 | pc += 4; | |
620 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 621 | fdata->frameless = 0; |
41abdfbd | 622 | } |
6c6afbb9 PB |
623 | |
624 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
625 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 626 | (tmp == 0x93e1)) /* st r31, NUM(r1) */ |
6c6afbb9 | 627 | { |
cdb1cc92 ILT |
628 | int tmp2; |
629 | ||
6c6afbb9 PB |
630 | /* gcc takes a short cut and uses this instruction to save r31 only. */ |
631 | ||
cdb1cc92 | 632 | if (tmp == 0x93e1) { |
6c6afbb9 PB |
633 | if (fdata->offset) |
634 | /* fatal ("Unrecognized prolog."); */ | |
199b2450 | 635 | printf_unfiltered ("Unrecognized prolog!\n"); |
6c6afbb9 PB |
636 | |
637 | fdata->saved_gpr = 31; | |
cdb1cc92 ILT |
638 | tmp2 = op & 0xffff; |
639 | if (tmp2 > 0x7fff) { | |
640 | tmp2 = - ((~0 &~ 0xffff) | tmp2); | |
641 | fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8; | |
642 | if ( fdata->saved_fpr > 0) | |
643 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
644 | else | |
645 | fdata->saved_fpr = -1; | |
646 | } | |
647 | fdata->offset = tmp2; | |
6c6afbb9 PB |
648 | } |
649 | pc += 4; | |
650 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 651 | fdata->frameless = 0; |
6c6afbb9 PB |
652 | } |
653 | ||
654 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
655 | pc += 4; /* l r30, ... */ | |
656 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 657 | fdata->frameless = 0; |
6c6afbb9 PB |
658 | } |
659 | ||
660 | /* store parameters into stack */ | |
661 | while( | |
662 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
663 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
664 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
665 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
666 | { | |
667 | pc += 4; /* store fpr double */ | |
668 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 669 | fdata->frameless = 0; |
6c6afbb9 PB |
670 | } |
671 | ||
cdb1cc92 | 672 | if (op == 0x603f0000) { /* oril r31, r1, 0x0 */ |
6c6afbb9 | 673 | fdata->alloca_reg = 31; |
cdb1cc92 ILT |
674 | fdata->frameless = 0; |
675 | } | |
41abdfbd JG |
676 | } |
677 | ||
678 | ||
679 | /* Pass the arguments in either registers, or in the stack. In RS6000, the first | |
680 | eight words of the argument list (that might be less than eight parameters if | |
681 | some parameters occupy more than one word) are passed in r3..r11 registers. | |
682 | float and double parameters are passed in fpr's, in addition to that. Rest of | |
683 | the parameters if any are passed in user stack. There might be cases in which | |
684 | half of the parameter is copied into registers, the other half is pushed into | |
685 | stack. | |
686 | ||
687 | If the function is returning a structure, then the return address is passed | |
688 | in r3, then the first 7 words of the parametes can be passed in registers, | |
689 | starting from r4. */ | |
690 | ||
691 | CORE_ADDR | |
692 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
693 | int nargs; | |
17221e41 | 694 | value_ptr *args; |
41abdfbd JG |
695 | CORE_ADDR sp; |
696 | int struct_return; | |
697 | CORE_ADDR struct_addr; | |
698 | { | |
699 | int ii, len; | |
700 | int argno; /* current argument number */ | |
701 | int argbytes; /* current argument byte */ | |
702 | char tmp_buffer [50]; | |
17221e41 | 703 | value_ptr arg; |
41abdfbd JG |
704 | int f_argno = 0; /* current floating point argno */ |
705 | ||
706 | CORE_ADDR saved_sp, pc; | |
707 | ||
708 | if ( dummy_frame_count <= 0) | |
199b2450 | 709 | printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n"); |
41abdfbd JG |
710 | |
711 | /* The first eight words of ther arguments are passed in registers. Copy | |
712 | them appropriately. | |
713 | ||
714 | If the function is returning a `struct', then the first word (which | |
715 | will be passed in r3) is used for struct return address. In that | |
716 | case we should advance one word and start from r4 register to copy | |
717 | parameters. */ | |
718 | ||
719 | ii = struct_return ? 1 : 0; | |
720 | ||
721 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
722 | ||
723 | arg = value_arg_coerce (args[argno]); | |
724 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
725 | ||
726 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) { | |
727 | ||
728 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
729 | There are 13 fpr's reserved for passing parameters. At this point | |
730 | there is no way we would run out of them. */ | |
731 | ||
732 | if (len > 8) | |
199b2450 | 733 | printf_unfiltered ( |
41abdfbd JG |
734 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
735 | ||
ade40d31 RP |
736 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
737 | len); | |
41abdfbd JG |
738 | ++f_argno; |
739 | } | |
740 | ||
741 | if (len > 4) { | |
742 | ||
743 | /* Argument takes more than one register. */ | |
744 | while (argbytes < len) { | |
745 | ||
746 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 RP |
747 | memcpy (®isters[REGISTER_BYTE(ii+3)], |
748 | ((char*)VALUE_CONTENTS (arg))+argbytes, | |
41abdfbd JG |
749 | (len - argbytes) > 4 ? 4 : len - argbytes); |
750 | ++ii, argbytes += 4; | |
751 | ||
752 | if (ii >= 8) | |
753 | goto ran_out_of_registers_for_arguments; | |
754 | } | |
755 | argbytes = 0; | |
756 | --ii; | |
757 | } | |
758 | else { /* Argument can fit in one register. No problem. */ | |
759 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 | 760 | memcpy (®isters[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len); |
41abdfbd JG |
761 | } |
762 | ++argno; | |
763 | } | |
764 | ||
765 | ran_out_of_registers_for_arguments: | |
766 | ||
767 | /* location for 8 parameters are always reserved. */ | |
768 | sp -= 4 * 8; | |
769 | ||
770 | /* another six words for back chain, TOC register, link register, etc. */ | |
771 | sp -= 24; | |
772 | ||
773 | /* if there are more arguments, allocate space for them in | |
774 | the stack, then push them starting from the ninth one. */ | |
775 | ||
776 | if ((argno < nargs) || argbytes) { | |
777 | int space = 0, jj; | |
17221e41 | 778 | value_ptr val; |
41abdfbd JG |
779 | |
780 | if (argbytes) { | |
781 | space += ((len - argbytes + 3) & -4); | |
782 | jj = argno + 1; | |
783 | } | |
784 | else | |
785 | jj = argno; | |
786 | ||
787 | for (; jj < nargs; ++jj) { | |
788 | val = value_arg_coerce (args[jj]); | |
789 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; | |
790 | } | |
791 | ||
792 | /* add location required for the rest of the parameters */ | |
793 | space = (space + 7) & -8; | |
794 | sp -= space; | |
795 | ||
796 | /* This is another instance we need to be concerned about securing our | |
797 | stack space. If we write anything underneath %sp (r1), we might conflict | |
798 | with the kernel who thinks he is free to use this area. So, update %sp | |
799 | first before doing anything else. */ | |
800 | ||
801 | write_register (SP_REGNUM, sp); | |
802 | ||
41abdfbd JG |
803 | /* if the last argument copied into the registers didn't fit there |
804 | completely, push the rest of it into stack. */ | |
805 | ||
806 | if (argbytes) { | |
807 | write_memory ( | |
808 | sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes); | |
809 | ++argno; | |
810 | ii += ((len - argbytes + 3) & -4) / 4; | |
811 | } | |
812 | ||
813 | /* push the rest of the arguments into stack. */ | |
814 | for (; argno < nargs; ++argno) { | |
815 | ||
816 | arg = value_arg_coerce (args[argno]); | |
817 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
818 | ||
819 | ||
820 | /* float types should be passed in fpr's, as well as in the stack. */ | |
821 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) { | |
822 | ||
823 | if (len > 8) | |
199b2450 | 824 | printf_unfiltered ( |
41abdfbd JG |
825 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
826 | ||
ade40d31 RP |
827 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
828 | len); | |
41abdfbd JG |
829 | ++f_argno; |
830 | } | |
831 | ||
359a097f | 832 | write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len); |
41abdfbd JG |
833 | ii += ((len + 3) & -4) / 4; |
834 | } | |
835 | } | |
6c6afbb9 | 836 | else |
41abdfbd JG |
837 | /* Secure stack areas first, before doing anything else. */ |
838 | write_register (SP_REGNUM, sp); | |
839 | ||
41abdfbd JG |
840 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
841 | read_memory (saved_sp, tmp_buffer, 24); | |
842 | write_memory (sp, tmp_buffer, 24); | |
843 | ||
844 | write_memory (sp, &saved_sp, 4); /* set back chain properly */ | |
845 | ||
5f1c39ef | 846 | target_store_registers (-1); |
41abdfbd JG |
847 | return sp; |
848 | } | |
849 | ||
850 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
851 | value into `valbuf' */ | |
852 | ||
ecf4059f | 853 | void |
41abdfbd JG |
854 | extract_return_value (valtype, regbuf, valbuf) |
855 | struct type *valtype; | |
856 | char regbuf[REGISTER_BYTES]; | |
857 | char *valbuf; | |
858 | { | |
859 | ||
860 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
861 | ||
862 | double dd; float ff; | |
863 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
864 | We need to truncate the return value into float size (4 byte) if | |
865 | necessary. */ | |
866 | ||
867 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
ade40d31 | 868 | memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], |
41abdfbd JG |
869 | TYPE_LENGTH (valtype)); |
870 | else { /* float */ | |
ade40d31 | 871 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); |
41abdfbd | 872 | ff = (float)dd; |
ade40d31 | 873 | memcpy (valbuf, &ff, sizeof(float)); |
41abdfbd JG |
874 | } |
875 | } | |
876 | else | |
877 | /* return value is copied starting from r3. */ | |
ade40d31 | 878 | memcpy (valbuf, ®buf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype)); |
41abdfbd JG |
879 | } |
880 | ||
881 | ||
ecf4059f JG |
882 | /* keep structure return address in this variable. |
883 | FIXME: This is a horrid kludge which should not be allowed to continue | |
884 | living. This only allows a single nested call to a structure-returning | |
885 | function. Come on, guys! -- [email protected], Aug 92 */ | |
41abdfbd JG |
886 | |
887 | CORE_ADDR rs6000_struct_return_address; | |
888 | ||
889 | ||
c2e4669f JG |
890 | /* Indirect function calls use a piece of trampoline code to do context |
891 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
892 | its first instruction (as when we have single-stepped to here). | |
893 | Result is desired PC to step until, or NULL if we are not in | |
894 | trampoline code. */ | |
41abdfbd | 895 | |
ecf4059f | 896 | CORE_ADDR |
41abdfbd | 897 | skip_trampoline_code (pc) |
ecf4059f | 898 | CORE_ADDR pc; |
41abdfbd JG |
899 | { |
900 | register unsigned int ii, op; | |
901 | ||
902 | static unsigned trampoline_code[] = { | |
903 | 0x800b0000, /* l r0,0x0(r11) */ | |
904 | 0x90410014, /* st r2,0x14(r1) */ | |
905 | 0x7c0903a6, /* mtctr r0 */ | |
906 | 0x804b0004, /* l r2,0x4(r11) */ | |
907 | 0x816b0008, /* l r11,0x8(r11) */ | |
908 | 0x4e800420, /* bctr */ | |
909 | 0x4e800020, /* br */ | |
910 | 0 | |
911 | }; | |
912 | ||
913 | for (ii=0; trampoline_code[ii]; ++ii) { | |
914 | op = read_memory_integer (pc + (ii*4), 4); | |
915 | if (op != trampoline_code [ii]) | |
359a097f | 916 | return 0; |
41abdfbd JG |
917 | } |
918 | ii = read_register (11); /* r11 holds destination addr */ | |
919 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
920 | return pc; | |
921 | } | |
922 | ||
ecf4059f JG |
923 | |
924 | /* Determines whether the function FI has a frame on the stack or not. | |
cdb1cc92 ILT |
925 | Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a |
926 | second argument of 0, and from the FRAME_SAVED_PC macro with a | |
927 | second argument of 1. */ | |
ecf4059f JG |
928 | |
929 | int | |
cdb1cc92 | 930 | frameless_function_invocation (fi, pcsaved) |
ecf4059f | 931 | struct frame_info *fi; |
cdb1cc92 | 932 | int pcsaved; |
ecf4059f JG |
933 | { |
934 | CORE_ADDR func_start; | |
935 | struct aix_framedata fdata; | |
936 | ||
b0e932ad JK |
937 | if (fi->next != NULL) |
938 | /* Don't even think about framelessness except on the innermost frame. */ | |
3f528883 JK |
939 | /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if |
940 | a signal happens while executing in a frameless function). */ | |
b0e932ad JK |
941 | return 0; |
942 | ||
ecf4059f JG |
943 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
944 | ||
945 | /* If we failed to find the start of the function, it is a mistake | |
946 | to inspect the instructions. */ | |
947 | ||
948 | if (!func_start) | |
949 | return 0; | |
950 | ||
951 | function_frame_info (func_start, &fdata); | |
cdb1cc92 | 952 | return pcsaved ? fdata.nosavedpc : fdata.frameless; |
ecf4059f JG |
953 | } |
954 | ||
955 | ||
956 | /* If saved registers of frame FI are not known yet, read and cache them. | |
957 | &FDATAP contains aix_framedata; TDATAP can be NULL, | |
958 | in which case the framedata are read. */ | |
959 | ||
960 | static void | |
961 | frame_get_cache_fsr (fi, fdatap) | |
962 | struct frame_info *fi; | |
963 | struct aix_framedata *fdatap; | |
964 | { | |
965 | int ii; | |
966 | CORE_ADDR frame_addr; | |
967 | struct aix_framedata work_fdata; | |
968 | ||
969 | if (fi->cache_fsr) | |
970 | return; | |
971 | ||
972 | if (fdatap == NULL) { | |
973 | fdatap = &work_fdata; | |
974 | function_frame_info (get_pc_function_start (fi->pc), fdatap); | |
975 | } | |
976 | ||
977 | fi->cache_fsr = (struct frame_saved_regs *) | |
978 | obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs)); | |
4ed97c9a | 979 | memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs)); |
ecf4059f JG |
980 | |
981 | if (fi->prev && fi->prev->frame) | |
982 | frame_addr = fi->prev->frame; | |
983 | else | |
984 | frame_addr = read_memory_integer (fi->frame, 4); | |
985 | ||
986 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
987 | All fpr's from saved_fpr to fp31 are saved right underneath caller | |
988 | stack pointer, starting from fp31 first. */ | |
989 | ||
990 | if (fdatap->saved_fpr >= 0) { | |
991 | for (ii=31; ii >= fdatap->saved_fpr; --ii) | |
992 | fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8); | |
993 | frame_addr -= (32 - fdatap->saved_fpr) * 8; | |
994 | } | |
995 | ||
996 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
997 | All gpr's from saved_gpr to gpr31 are saved right under saved fprs, | |
998 | starting from r31 first. */ | |
999 | ||
1000 | if (fdatap->saved_gpr >= 0) | |
1001 | for (ii=31; ii >= fdatap->saved_gpr; --ii) | |
1002 | fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4); | |
1003 | } | |
1004 | ||
1005 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1006 | was first allocated. For functions calling alloca(), it might be saved in | |
1007 | an alloca register. */ | |
1008 | ||
1009 | CORE_ADDR | |
1010 | frame_initial_stack_address (fi) | |
1011 | struct frame_info *fi; | |
1012 | { | |
1013 | CORE_ADDR tmpaddr; | |
1014 | struct aix_framedata fdata; | |
1015 | struct frame_info *callee_fi; | |
1016 | ||
1017 | /* if the initial stack pointer (frame address) of this frame is known, | |
1018 | just return it. */ | |
1019 | ||
1020 | if (fi->initial_sp) | |
1021 | return fi->initial_sp; | |
1022 | ||
1023 | /* find out if this function is using an alloca register.. */ | |
1024 | ||
1025 | function_frame_info (get_pc_function_start (fi->pc), &fdata); | |
1026 | ||
1027 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1028 | ||
1029 | if (!fi->cache_fsr) | |
1030 | frame_get_cache_fsr (fi, &fdata); | |
1031 | ||
1032 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1033 | this frame, and it is good enough. */ | |
1034 | ||
1035 | if (fdata.alloca_reg < 0) { | |
1036 | fi->initial_sp = fi->frame; | |
1037 | return fi->initial_sp; | |
1038 | } | |
1039 | ||
1040 | /* This function has an alloca register. If this is the top-most frame | |
1041 | (with the lowest address), the value in alloca register is good. */ | |
1042 | ||
1043 | if (!fi->next) | |
1044 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1045 | ||
1046 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1047 | registers, but there are exceptions (such as when the callee | |
1048 | has no parameters). Find the address in which caller's alloca | |
1049 | register is saved. */ | |
1050 | ||
1051 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1052 | ||
1053 | if (!callee_fi->cache_fsr) | |
cdb1cc92 | 1054 | frame_get_cache_fsr (callee_fi, NULL); |
ecf4059f JG |
1055 | |
1056 | /* this is the address in which alloca register is saved. */ | |
1057 | ||
1058 | tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg]; | |
1059 | if (tmpaddr) { | |
1060 | fi->initial_sp = read_memory_integer (tmpaddr, 4); | |
1061 | return fi->initial_sp; | |
1062 | } | |
1063 | ||
1064 | /* Go look into deeper levels of the frame chain to see if any one of | |
1065 | the callees has saved alloca register. */ | |
1066 | } | |
1067 | ||
1068 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1069 | then the value in the register is still good. */ | |
1070 | ||
1071 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1072 | } | |
1073 | ||
f3649227 JK |
1074 | FRAME_ADDR |
1075 | rs6000_frame_chain (thisframe) | |
1076 | struct frame_info *thisframe; | |
1077 | { | |
1078 | FRAME_ADDR fp; | |
1079 | if (inside_entry_file ((thisframe)->pc)) | |
1080 | return 0; | |
cee86be3 | 1081 | if (thisframe->signal_handler_caller) |
f3649227 | 1082 | { |
f3649227 JK |
1083 | /* This was determined by experimentation on AIX 3.2. Perhaps |
1084 | it corresponds to some offset in /usr/include/sys/user.h or | |
1085 | something like that. Using some system include file would | |
1086 | have the advantage of probably being more robust in the face | |
1087 | of OS upgrades, but the disadvantage of being wrong for | |
1088 | cross-debugging. */ | |
1089 | ||
1090 | #define SIG_FRAME_FP_OFFSET 284 | |
1091 | fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4); | |
1092 | } | |
cee86be3 JK |
1093 | else |
1094 | fp = read_memory_integer ((thisframe)->frame, 4); | |
1095 | ||
f3649227 JK |
1096 | return fp; |
1097 | } | |
ecf4059f JG |
1098 | \f |
1099 | /* Keep an array of load segment information and their TOC table addresses. | |
1100 | This info will be useful when calling a shared library function by hand. */ | |
1101 | ||
1102 | struct loadinfo { | |
1103 | CORE_ADDR textorg, dataorg; | |
1104 | unsigned long toc_offset; | |
1105 | }; | |
1106 | ||
1107 | #define LOADINFOLEN 10 | |
1108 | ||
ecf4059f JG |
1109 | static struct loadinfo *loadinfo = NULL; |
1110 | static int loadinfolen = 0; | |
1111 | static int loadinfotocindex = 0; | |
3c02636b | 1112 | static int loadinfotextindex = 0; |
ecf4059f JG |
1113 | |
1114 | ||
1115 | void | |
1116 | xcoff_init_loadinfo () | |
1117 | { | |
1118 | loadinfotocindex = 0; | |
1119 | loadinfotextindex = 0; | |
1120 | ||
1121 | if (loadinfolen == 0) { | |
1122 | loadinfo = (struct loadinfo *) | |
1123 | xmalloc (sizeof (struct loadinfo) * LOADINFOLEN); | |
1124 | loadinfolen = LOADINFOLEN; | |
1125 | } | |
1126 | } | |
1127 | ||
1128 | ||
1129 | /* FIXME -- this is never called! */ | |
1130 | void | |
1131 | free_loadinfo () | |
1132 | { | |
1133 | if (loadinfo) | |
1134 | free (loadinfo); | |
1135 | loadinfo = NULL; | |
1136 | loadinfolen = 0; | |
1137 | loadinfotocindex = 0; | |
1138 | loadinfotextindex = 0; | |
1139 | } | |
1140 | ||
1141 | /* this is called from xcoffread.c */ | |
1142 | ||
1143 | void | |
1144 | xcoff_add_toc_to_loadinfo (unsigned long tocoff) | |
1145 | { | |
1146 | while (loadinfotocindex >= loadinfolen) { | |
1147 | loadinfolen += LOADINFOLEN; | |
1148 | loadinfo = (struct loadinfo *) | |
1149 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1150 | } | |
1151 | loadinfo [loadinfotocindex++].toc_offset = tocoff; | |
1152 | } | |
1153 | ||
2aefe6e4 | 1154 | void |
ecf4059f JG |
1155 | add_text_to_loadinfo (textaddr, dataaddr) |
1156 | CORE_ADDR textaddr; | |
1157 | CORE_ADDR dataaddr; | |
1158 | { | |
1159 | while (loadinfotextindex >= loadinfolen) { | |
1160 | loadinfolen += LOADINFOLEN; | |
1161 | loadinfo = (struct loadinfo *) | |
1162 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1163 | } | |
1164 | loadinfo [loadinfotextindex].textorg = textaddr; | |
1165 | loadinfo [loadinfotextindex].dataorg = dataaddr; | |
1166 | ++loadinfotextindex; | |
1167 | } | |
1168 | ||
1169 | ||
1170 | /* FIXME: This assumes that the "textorg" and "dataorg" elements | |
1171 | of a member of this array are correlated with the "toc_offset" | |
1172 | element of the same member. But they are sequentially assigned in wildly | |
1173 | different places, and probably there is no correlation. FIXME! */ | |
1174 | ||
1175 | static CORE_ADDR | |
1176 | find_toc_address (pc) | |
1177 | CORE_ADDR pc; | |
1178 | { | |
1179 | int ii, toc_entry, tocbase = 0; | |
1180 | ||
1181 | for (ii=0; ii < loadinfotextindex; ++ii) | |
1182 | if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) { | |
1183 | toc_entry = ii; | |
1184 | tocbase = loadinfo[ii].textorg; | |
1185 | } | |
1186 | ||
1187 | return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset; | |
1188 | } |