]> Git Repo - J-u-boot.git/commitdiff
binman: ti-secure: Enable debug extension for combined boot
authorManorit Chawdhry <[email protected]>
Tue, 26 Mar 2024 08:07:06 +0000 (13:37 +0530)
committerTom Rini <[email protected]>
Thu, 11 Apr 2024 21:51:11 +0000 (15:51 -0600)
To debug using jtag, ROM needs to unlock jtag debugging on HS devices
and it does that looking at this debug extension.

Add the debug extension and enable it by default.

Link: https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/security/sec_cert_format.html?highlight=debug#sysfw-debug-ext
Signed-off-by: Manorit Chawdhry <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
tools/binman/btool/openssl.py

index fe81a1f51b1eba8a20126bcd802047cc05e9092e..c6df64c5316d53735fb147858b24185096254ec2 100644 (file)
@@ -283,6 +283,7 @@ emailAddress           = {req_dist_name_dict['emailAddress']}
 basicConstraints = CA:true
 1.3.6.1.4.1.294.1.3=ASN1:SEQUENCE:swrv
 1.3.6.1.4.1.294.1.9=ASN1:SEQUENCE:ext_boot_info
+1.3.6.1.4.1.294.1.8=ASN1:SEQUENCE:debug
 
 [swrv]
 swrv=INTEGER:{sw_rev}
@@ -323,6 +324,12 @@ compSize = INTEGER:{imagesize_sysfw_data}
 shaType  = OID:{sha_type}
 shaValue = FORMAT:HEX,OCT:{hashval_sysfw_data}
 
+[ debug ]
+debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000
+debugType = INTEGER:4
+coreDbgEn = INTEGER:0
+coreDbgSecEn = INTEGER:0
+
 {sysfw_inner_cert_ext_boot_block}
 
 {dm_data_ext_boot_block}
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