powerpc/85xx: Update timer-frequency prop in ptp_timer node of device tree

Fix up the device tree property associated with the IEEE 1588 timer
source frequency.  Currently we only support the IEEE 1588 timer source
being the internal eTSEC system clock (for those SoCs with IEEE 1588
support).  The eTSEC clock is ccb_clk/2.

Signed-off-by: Bhaskar Upadhaya <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 6ed02845e8dc4231b4dc800a1aa6b3f191cba996..642f6c54bdffcf33e5303c529c98fea0779e3a7a 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -486,4 +486,13 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_SYS_SRIO
        ft_srio_setup(blob);
 #endif
+
+       /*
+        * system-clock = CCB clock/2
+        * Here gd->bus_clk = CCB clock
+        * We are using the system clock as 1588 Timer reference
+        * clock source select
+        */
+       do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
+                       "timer-frequency", gd->bus_clk/2, 1);
 }