iommu: qcom-smmu: handle running in el2

We only need to configure the SMMU when running in EL1. In EL2 the
hypervisor isn't running so peripherals can just do DMA as they wish.

Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>

diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c
index 7e07487ad3842ecd14fbacad3083a43fe9168531..c1b95bc8b8ca7463399c9cb801e7a9a6d004af53 100644 (file)
--- a/drivers/iommu/qcom-hyp-smmu.c
+++ b/drivers/iommu/qcom-hyp-smmu.c
@@ -91,6 +91,8 @@ struct qcom_smmu_priv {
        phys_addr_t base;
        struct list_head devices;
        struct udevice *dev;
+       /* SMMU is not needed when running in EL2 */
+       bool disable;
 
        /* Read-once config */
        int num_cb;
@@ -277,6 +279,9 @@ static int qcom_smmu_connect(struct udevice *dev)
        if (WARN_ON(!priv))
                return -EINVAL;
 
+       if (priv->disable)
+               return 0;
+
        mdev = alloc_dev(dev);
        if (IS_ERR(mdev) && PTR_ERR(mdev) != -EEXIST) {
                printf("%s: %s Couldn't create mmu context\n", __func__,
@@ -348,6 +353,8 @@ static int qcom_smmu_probe(struct udevice *dev)
        priv->base = dev_read_addr(dev);
        INIT_LIST_HEAD(&priv->devices);
 
+       priv->disable = current_el() > 1;
+
        /* Read SMMU config */
        val = gr0_readl(priv, ARM_SMMU_GR0_ID0);
        priv->num_smr = FIELD_GET(ARM_SMMU_ID0_NUMSMRG, val);