arm: fsl-layerscape: fix 0x3363 serdes1 settings for ls1046a

As per LS1046A hardware manual, SGMII.9 and SGMII.10 present on
lane D and lane C respectively for 0x3363 protocol.

So fix serdes1 settings for ls1046a.

Signed-off-by: Maciej Pijanowski <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
index f8310f21055666be4372f3bbb356514e70dbae6b..91de5ff0d3da3118147e7ebd695d8571d1727d8f 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
@@ -29,7 +29,7 @@ static struct serdes_config serdes1_cfg_tbl[] = {
        {0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} },
        {0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1,
                  SGMII_FM1_DTSEC6} },
-       {0x3363, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6, PCIE1,
+       {0x3363, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, PCIE1,
                  SGMII_FM1_DTSEC6} },
        {0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
                  SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },