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mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR init
authorStefan Roese <[email protected]>
Tue, 9 Oct 2018 06:59:04 +0000 (08:59 +0200)
committerDaniel Schwierzeck <[email protected]>
Sun, 18 Nov 2018 15:02:22 +0000 (16:02 +0100)
commita8b0bf631308fd74a0216b1dc7eb74119303a0b3
treeef074a2ba981bc231d620b81632434646d249145tree | snapshot
parent4751e5595ee1e8ec121178a0ddaa99c3bbfa8e80commit | diff
mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR init

This fixes an issue which has been noticed on the Gardena board, with
the watchdog enabled, where the watdchdog reset (after a system hang)
did result in reporting of 2.9 GiB and a hang after this. With this
patch applied the memory controller is correctly reset and initialized
again even after a watchdog reset.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
arch/mips/mach-mt7620/lowlevel_init.S diff | blob | blame | history
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