+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2016 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __LS1046AQDS_H__
#include "ls1046a_common.h"
-#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
-#define CONFIG_SYS_TEXT_BASE 0x82000000
-#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_TEXT_BASE 0x40100000
-#else
-#define CONFIG_SYS_TEXT_BASE 0x60100000
-#endif
-
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CFG_LPUART_EN 0x2
#endif
-/* USB */
-#define CONFIG_HAS_FSL_XHCI_USB
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#endif
-
-/* SATA */
-#define CONFIG_LIBATA
-#define CONFIG_SCSI_AHCI
-#define CONFIG_SCSI_AHCI_PLAT
-
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-#define CONFIG_SYS_SATA AHCI_BASE_ADDR
-
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
-#define CONFIG_SYS_SCSI_MAX_LUN 1
-#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
- CONFIG_SYS_SCSI_MAX_LUN)
-
/*
* IFC Definitions
*/
CSOR_NOR_TRHZ_80)
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
FTIM0_NOR_TEADC(0x5) | \
+ FTIM0_NOR_TAVDS(0x6) | \
FTIM0_NOR_TEAHC(0x5))
#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
FTIM1_NOR_TRAD_NOR(0x1a) | \
FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
- FTIM2_NOR_TCH(0x4) | \
+#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x8) | \
+ FTIM2_NOR_TCH(0x8) | \
FTIM2_NOR_TWPH(0xe) | \
FTIM2_NOR_TWP(0x1c))
#define CONFIG_SYS_NOR_FTIM3 0
* Miscellaneous configurable options
*/
#define CONFIG_MISC_INIT_R
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_PBSIZE \
- (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
#ifdef CONFIG_NAND_BOOT
#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET (12 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
"$kernel_size && bootm $kernel_load"
#endif
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define MTDPARTS_DEFAULT "mtdparts=1550000.quadspi:2m(uboot)," \
- "14m(free)"
-#else
-#define MTDPARTS_DEFAULT "mtdparts=60000000.nor:" \
- "2m@0x100000(nor_bank0_uboot),"\
- "40m@0x1100000(nor_bank0_fit)," \
- "7m(nor_bank0_user)," \
- "2m@0x4100000(nor_bank4_uboot)," \
- "40m@0x5100000(nor_bank4_fit),"\
- "-(nor_bank4_user);" \
- "7e800000.flash:" \
- "4m(nand_uboot),36m(nand_kernel)," \
- "472m(nand_free);spi0.0:2m(uboot)," \
- "14m(free)"
-#endif
-
#include <asm/fsl_secure_boot.h>
#endif /* __LS1046AQDS_H__ */