#define CONFIG_DMA_COHERENT
#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
-#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
-#ifdef CONFIG_SIEMENS_MACH_TYPE
-#define CONFIG_MACH_TYPE CONFIG_SIEMENS_MACH_TYPE
-#endif
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
/* commands to include */
#ifndef CONFIG_SPL_BUILD
* start addr of ram disk
*/
-#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
-
/* Physical Memory Map */
#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
/* I2C Configuration */
-#define CONFIG_I2C
-#define CONFIG_SYS_I2C
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
- CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
18, 19, 20, 21, 22, 23, 24, 25, \
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
* 64 bytes before this address should be set aside for u-boot.img's
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#ifndef CONFIG_SPL_BUILD
/*