Merge branch 'next'

[J-u-boot.git] / drivers / fpga / xilinx.c

diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index c765a74a25e0f17895b8010cfcbb646f735a5093..8170c3368ef6f89646e8617d869f1ca1f38b8cea 100644 (file)
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2012-2013, Xilinx, Michal Simek
  *
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, [email protected].
  * Keith Outwater, [email protected]
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -14,6 +13,7 @@
 
 #include <common.h>
 #include <fpga.h>
+#include <log.h>
 #include <virtex2.h>
 #include <spartan2.h>
 #include <spartan3.h>
@@ -24,12 +24,24 @@ static int xilinx_validate(xilinx_desc *desc, char *fn);
 
 /* ------------------------------------------------------------------------- */
 
+int fpga_is_partial_data(int devnum, size_t img_len)
+{
+       const fpga_desc * const desc = fpga_get_desc(devnum);
+       xilinx_desc *desc_xilinx = desc->devdesc;
+
+       /* Check datasize against FPGA size */
+       if (img_len >= desc_xilinx->size)
+               return 0;
+
+       /* datasize is smaller, must be partial data */
+       return 1;
+}
+
 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
                       bitstream_type bstype)
 {
        unsigned int length;
        unsigned int swapsize;
-       char buffer[80];
        unsigned char *dataptr;
        unsigned int i;
        const fpga_desc *desc;
@@ -57,10 +69,8 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
 
        length = (*dataptr << 8) + *(dataptr + 1);
        dataptr += 2;
-       for (i = 0; i < length; i++)
-               buffer[i] = *dataptr++;
-
-       printf("  design filename = \"%s\"\n", buffer);
+       printf("  design filename = \"%s\"\n", dataptr);
+       dataptr += length;
 
        /* get part number (identifier, length, string) */
        if (*dataptr++ != 0x62) {
@@ -71,23 +81,22 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
 
        length = (*dataptr << 8) + *(dataptr + 1);
        dataptr += 2;
-       for (i = 0; i < length; i++)
-               buffer[i] = *dataptr++;
 
        if (xdesc->name) {
-               i = strncmp(buffer, xdesc->name, strlen(xdesc->name));
-               if (i) {
+               i = (ulong)strstr((char *)dataptr, xdesc->name);
+               if (!i) {
                        printf("%s: Wrong bitstream ID for this device\n",
                               __func__);
                        printf("%s: Bitstream ID %s, current device ID %d/%s\n",
-                              __func__, buffer, devnum, xdesc->name);
+                              __func__, dataptr, devnum, xdesc->name);
                        return FPGA_FAIL;
                }
        } else {
                printf("%s: Please fill correct device ID to xilinx_desc\n",
                       __func__);
        }
-       printf("  part number = \"%s\"\n", buffer);
+       printf("  part number = \"%s\"\n", dataptr);
+       dataptr += length;
 
        /* get date (identifier, length, string) */
        if (*dataptr++ != 0x63) {
@@ -98,9 +107,8 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
 
        length = (*dataptr << 8) + *(dataptr+1);
        dataptr += 2;
-       for (i = 0; i < length; i++)
-               buffer[i] = *dataptr++;
-       printf("  date = \"%s\"\n", buffer);
+       printf("  date = \"%s\"\n", dataptr);
+       dataptr += length;
 
        /* get time (identifier, length, string) */
        if (*dataptr++ != 0x64) {
@@ -111,9 +119,8 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
 
        length = (*dataptr << 8) + *(dataptr+1);
        dataptr += 2;
-       for (i = 0; i < length; i++)
-               buffer[i] = *dataptr++;
-       printf("  time = \"%s\"\n", buffer);
+       printf("  time = \"%s\"\n", dataptr);
+       dataptr += length;
 
        /* get fpga data length (identifier, length) */
        if (*dataptr++ != 0x65) {
@@ -128,11 +135,11 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
        dataptr += 4;
        printf("  bytes in bitstream = %d\n", swapsize);
 
-       return fpga_load(devnum, dataptr, swapsize, bstype);
+       return fpga_load(devnum, dataptr, swapsize, bstype, 0);
 }
 
 int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
-               bitstream_type bstype)
+               bitstream_type bstype, int flags)
 {
        if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
                printf ("%s: Invalid device descriptor\n", __FUNCTION__);
@@ -144,7 +151,7 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
                return FPGA_FAIL;
        }
 
-       return desc->operations->load(desc, buf, bsize, bstype);
+       return desc->operations->load(desc, buf, bsize, bstype, flags);
 }
 
 #if defined(CONFIG_CMD_FPGA_LOADFS)
@@ -165,6 +172,24 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
 }
 #endif
 
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
+                struct fpga_secure_info *fpga_sec_info)
+{
+       if (!xilinx_validate(desc, (char *)__func__)) {
+               printf("%s: Invalid device descriptor\n", __func__);
+               return FPGA_FAIL;
+       }
+
+       if (!desc->operations || !desc->operations->loads) {
+               printf("%s: Missing loads operation\n", __func__);
+               return FPGA_FAIL;
+       }
+
+       return desc->operations->loads(desc, buf, bsize, fpga_sec_info);
+}
+#endif
+
 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
@@ -199,7 +224,13 @@ int xilinx_info(xilinx_desc *desc)
                case xilinx_zynq:
                        printf("Zynq PL\n");
                        break;
-                       /* Add new family types here */
+               case xilinx_zynqmp:
+                       printf("ZynqMP PL\n");
+                       break;
+               case xilinx_versal:
+                       printf("Versal PL\n");
+                       break;
+               /* Add new family types here */
                default:
                        printf ("Unknown family type, %d\n", desc->family);
                }
@@ -227,6 +258,12 @@ int xilinx_info(xilinx_desc *desc)
                case devcfg:
                        printf("Device configuration interface (Zynq)\n");
                        break;
+               case csu_dma:
+                       printf("csu_dma configuration interface (ZynqMP)\n");
+                       break;
+               case cfi:
+                       printf("CFI configuration interface (Versal)\n");
+                       break;
                        /* Add new interface types here */
                default:
                        printf ("Unsupported interface type, %d\n", desc->iface);