board: freescale: p1_p2_rdb_pc: Allow to compile without __SW_BOOT_SD macro

[J-u-boot.git] / include / gdsys_fpga.h

diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h
index 276a01e744ed8b4914c6dd64130c93212c128abe..aa9b9f58b810055e6e843fa728d8c79296087b47 100644 (file)
--- a/include/gdsys_fpga.h
+++ b/include/gdsys_fpga.h
@@ -1,13 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2010
- * Dirk Eibach,  Guntermann & Drunck GmbH, [email protected]
- *
- * SPDX-License-Identifier:    GPL-2.0+
+ * Dirk Eibach,  Guntermann & Drunck GmbH, [email protected]
  */
 
 #ifndef __GDSYS_FPGA_H
 #define __GDSYS_FPGA_H
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 int init_func_fpga(void);
 
 enum {
@@ -17,7 +17,6 @@ enum {
 };
 
 int get_fpga_state(unsigned dev);
-void print_fpga_state(unsigned dev);
 
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data);
 int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data);
@@ -35,6 +34,7 @@ extern struct ihs_fpga *fpga_ptr[];
                     &fpga_ptr[ix]->fld, \
                     offsetof(struct ihs_fpga, fld), \
                     val)
+#endif
 
 struct ihs_gpio {
        u16 read;
@@ -61,105 +61,31 @@ struct ihs_osd {
        u16 y_pos;
 };
 
-#ifdef CONFIG_NEO
-struct ihs_fpga {
-       u16 reflection_low;     /* 0x0000 */
-       u16 versions;           /* 0x0002 */
-       u16 fpga_features;      /* 0x0004 */
-       u16 fpga_version;       /* 0x0006 */
-       u16 reserved_0[8187];   /* 0x0008 */
-       u16 reflection_high;    /* 0x3ffe */
-};
-#endif
-
-#ifdef CONFIG_IO
-struct ihs_fpga {
-       u16 reflection_low;     /* 0x0000 */
-       u16 versions;           /* 0x0002 */
-       u16 fpga_features;      /* 0x0004 */
-       u16 fpga_version;       /* 0x0006 */
-       u16 reserved_0[5];      /* 0x0008 */
-       u16 quad_serdes_reset;  /* 0x0012 */
-       u16 reserved_1[8181];   /* 0x0014 */
-       u16 reflection_high;    /* 0x3ffe */
-};
-#endif
-
-#ifdef CONFIG_IO64
-struct ihs_fpga_channel {
-       u16 status_int;
-       u16 config_int;
-       u16 switch_connect_config;
-       u16 tx_destination;
+struct ihs_mdio {
+       u16 control;
+       u16 address_data;
+       u16 rx_data;
 };
 
-struct ihs_fpga_hicb {
-       u16 status_int;
-       u16 config_int;
+struct ihs_io_ep {
+       u16 transmit_data;
+       u16 rx_tx_control;
+       u16 receive_data;
+       u16 rx_tx_status;
+       u16 reserved;
+       u16 device_address;
+       u16 target_address;
 };
 
+#ifdef CONFIG_NEO
 struct ihs_fpga {
        u16 reflection_low;     /* 0x0000 */
        u16 versions;           /* 0x0002 */
        u16 fpga_features;      /* 0x0004 */
        u16 fpga_version;       /* 0x0006 */
-       u16 reserved_0[5];      /* 0x0008 */
-       u16 quad_serdes_reset;  /* 0x0012 */
-       u16 reserved_1[502];    /* 0x0014 */
-       struct ihs_fpga_channel ch[32];         /* 0x0400 */
-       struct ihs_fpga_channel hicb_ch[32];    /* 0x0500 */
-       u16 reserved_2[7487];   /* 0x0580 */
+       u16 reserved_0[8187];   /* 0x0008 */
        u16 reflection_high;    /* 0x3ffe */
 };
 #endif
 
-#ifdef CONFIG_IOCON
-struct ihs_fpga {
-       u16 reflection_low;     /* 0x0000 */
-       u16 versions;           /* 0x0002 */
-       u16 fpga_version;       /* 0x0004 */
-       u16 fpga_features;      /* 0x0006 */
-       u16 reserved_0[6];      /* 0x0008 */
-       struct ihs_gpio gpio;   /* 0x0014 */
-       u16 mpc3w_control;      /* 0x001a */
-       u16 reserved_1[18];     /* 0x001c */
-       struct ihs_i2c i2c;     /* 0x0040 */
-       u16 reserved_2[10];     /* 0x004c */
-       u16 mc_int;             /* 0x0060 */
-       u16 mc_int_en;          /* 0x0062 */
-       u16 mc_status;          /* 0x0064 */
-       u16 mc_control;         /* 0x0066 */
-       u16 mc_tx_data;         /* 0x0068 */
-       u16 mc_tx_address;      /* 0x006a */
-       u16 mc_tx_cmd;          /* 0x006c */
-       u16 mc_res;             /* 0x006e */
-       u16 mc_rx_cmd_status;   /* 0x0070 */
-       u16 mc_rx_data;         /* 0x0072 */
-       u16 reserved_3[69];     /* 0x0074 */
-       u16 reflection_high;    /* 0x00fe */
-       struct ihs_osd osd;     /* 0x0100 */
-       u16 reserved_4[889];    /* 0x010e */
-       u16 videomem[31736];    /* 0x0800 */
-};
-#endif
-
-#ifdef CONFIG_DLVISION_10G
-struct ihs_fpga {
-       u16 reflection_low;     /* 0x0000 */
-       u16 versions;           /* 0x0002 */
-       u16 fpga_version;       /* 0x0004 */
-       u16 fpga_features;      /* 0x0006 */
-       u16 reserved_0[10];     /* 0x0008 */
-       u16 extended_interrupt; /* 0x001c */
-       u16 reserved_1[29];     /* 0x001e */
-       u16 mpc3w_control;      /* 0x0058 */
-       u16 reserved_2[3];      /* 0x005a */
-       struct ihs_i2c i2c;     /* 0x0060 */
-       u16 reserved_3[205];    /* 0x0066 */
-       struct ihs_osd osd;     /* 0x0200 */
-       u16 reserved_4[761];    /* 0x020e */
-       u16 videomem[31736];    /* 0x0800 */
-};
-#endif
-
 #endif