command: Remove the cmd_tbl_t typedef

[J-u-boot.git] / board / gdsys / a38x / controlcenterdc.c

diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c
index 3d74a6dfb89726cc80ee43cfe41c9e476cf47ecf..0d53d69ecc9bd1d330acde395b779d22e8af8292 100644 (file)
--- a/board/gdsys/a38x/controlcenterdc.c
+++ b/board/gdsys/a38x/controlcenterdc.c
@@ -1,19 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015 Stefan Roese <[email protected]>
  * Copyright (C) 2016 Mario Six <[email protected]>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
+#include <init.h>
 #include <miiphy.h>
-#include <tpm.h>
+#include <net.h>
+#include <tpm-v1.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm-generic/gpio.h>
 
-#include "../drivers/ddr/marvell/a38x/ddr3_a38x_topology.h"
+#include "../drivers/ddr/marvell/a38x/ddr3_init.h"
 #include "../arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h"
 
 #include "keyprogram.h"
@@ -23,10 +25,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define ETH_PHY_CTRL_REG               0
-#define ETH_PHY_CTRL_POWER_DOWN_BIT    11
-#define ETH_PHY_CTRL_POWER_DOWN_MASK   (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
-
 #define DB_GP_88F68XX_GPP_OUT_ENA_LOW  0x7fffffff
 #define DB_GP_88F68XX_GPP_OUT_ENA_MID  0xffffefff
 
@@ -35,12 +33,26 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DB_GP_88F68XX_GPP_POL_LOW      0x0
 #define DB_GP_88F68XX_GPP_POL_MID      0x0
 
+static int get_tpm(struct udevice **devp)
+{
+       int rc;
+
+       rc = uclass_first_device_err(UCLASS_TPM, devp);
+       if (rc) {
+               printf("Could not find TPM (ret=%d)\n", rc);
+               return CMD_RET_FAILURE;
+       }
+
+       return 0;
+}
+
 /*
  * Define the DDR layout / topology here in the board file. This will
  * be used by the DDR3 init code in the SPL U-Boot version to configure
  * the DDR3 controller.
  */
-static struct hws_topology_map ddr_topology_map = {
+static struct mv_ddr_topology_map ddr_topology_map = {
+       DEBUG_LEVEL_ERROR,
        0x1, /* active interfaces */
        /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */
        { { { {0x1, 0, 0, 0},
@@ -49,14 +61,17 @@ static struct hws_topology_map ddr_topology_map = {
              {0x1, 0, 0, 0},
              {0x1, 0, 0, 0} },
            SPEED_BIN_DDR_1600K,        /* speed_bin */
-           BUS_WIDTH_16,               /* memory_width */
-           MEM_4G,                     /* mem_size */
-           DDR_FREQ_533,               /* frequency */
+           MV_DDR_DEV_WIDTH_16BIT,     /* memory_width */
+           MV_DDR_DIE_CAP_4GBIT,       /* mem_size */
+           MV_DDR_FREQ_533,            /* frequency */
            0, 0,                       /* cas_wl cas_l */
-           HWS_TEMP_LOW,               /* temperature */
-           HWS_TIM_DEFAULT} },         /* timing */
-       5,                              /* Num Of Bus Per Interface*/
-       BUS_MASK_32BIT                  /* Busses mask */
+           MV_DDR_TEMP_LOW,            /* temperature */
+           MV_DDR_TIM_DEFAULT} },      /* timing */
+       BUS_MASK_32BIT,                 /* Busses mask */
+       MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
+       { {0} },                        /* raw spd data */
+       {0}                             /* timing parameters */
+
 };
 
 static struct serdes_map serdes_topology_map[] = {
@@ -122,7 +137,7 @@ void board_pex_config(void)
 #endif
 }
 
-struct hws_topology_map *ddr3_get_topology_map(void)
+struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
 {
        return &ddr_topology_map;
 }
@@ -263,18 +278,22 @@ int board_fix_fdt(void *rw_fdt_blob)
 
 int last_stage_init(void)
 {
+       struct udevice *tpm;
+       int ret;
+
 #ifndef CONFIG_SPL_BUILD
        ccdc_eth_init();
 #endif
-       if (tpm_init() || tpm_startup(TPM_ST_CLEAR) ||
-           tpm_continue_self_test()) {
+       ret = get_tpm(&tpm);
+       if (ret || tpm_init(tpm) || tpm_startup(tpm, TPM_ST_CLEAR) ||
+           tpm_continue_self_test(tpm)) {
                return 1;
        }
 
        mdelay(37);
 
-       flush_keys();
-       load_and_run_keyprog();
+       flush_keys(tpm);
+       load_and_run_keyprog(tpm);
 
        return 0;
 }