GCC-4.x fixes: clean up global data pointer initialization for all boards.

[J-u-boot.git] / cpu / mpc83xx / cpu_init.c

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index dcb34457b1096e0f39752096c56c4d0084262f56..6ed0992c070bf1bb9676bc6602773399d50e73ee 100644 (file)
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -29,6 +29,8 @@
 #include <mpc83xx.h>
 #include <ioports.h>
 
 #include <mpc83xx.h>
 #include <ioports.h>
 

+DECLARE_GLOBAL_DATA_PTR;
+

 /*
  * Breathe some life into the CPU...
  *
 /*
  * Breathe some life into the CPU...
  *


@@ -38,8 +40,6 @@
  */
 void cpu_init_f (volatile immap_t * im)
 {
  */
 void cpu_init_f (volatile immap_t * im)
 {

-       DECLARE_GLOBAL_DATA_PTR;
-

        /* Pointer is writable since we allocated a register for it */
        gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
 
        /* Pointer is writable since we allocated a register for it */
        gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
 


@@ -63,8 +63,12 @@ void cpu_init_f (volatile immap_t * im)
        im->sysconf.spcr |= SPCR_TBEN;
 
        /* System General Purpose Register */
        im->sysconf.spcr |= SPCR_TBEN;
 
        /* System General Purpose Register */

-       im->sysconf.sicrh = SICRH_TSOBI1;
-       im->sysconf.sicrl = SICRL_LDP_A;
+#ifdef CFG_SICRH
+       im->sysconf.sicrh = CFG_SICRH;
+#endif
+#ifdef CFG_SICRL
+       im->sysconf.sicrl = CFG_SICRL;
+#endif

 
        /*
         * Memory Controller:
 
        /*
         * Memory Controller:


@@ -87,69 +91,70 @@ void cpu_init_f (volatile immap_t * im)
 #error         CFG_BR0_PRELIM, CFG_OR0_PRELIM, CFG_LBLAWBAR0_PRELIM & CFG_LBLAWAR0_PRELIM must be defined
 #endif
 
 #error         CFG_BR0_PRELIM, CFG_OR0_PRELIM, CFG_LBLAWBAR0_PRELIM & CFG_LBLAWAR0_PRELIM must be defined
 #endif
 

-#if defined(CFG_BR1_PRELIM)  \
-       && defined(CFG_OR1_PRELIM) \
-       && defined(CFG_LBLAWBAR1_PRELIM) \
-       && defined(CFG_LBLAWAR1_PRELIM)
+#if defined(CFG_BR1_PRELIM) && defined(CFG_OR1_PRELIM)

        im->lbus.bank[1].br = CFG_BR1_PRELIM;
        im->lbus.bank[1].or = CFG_OR1_PRELIM;
        im->lbus.bank[1].br = CFG_BR1_PRELIM;
        im->lbus.bank[1].or = CFG_OR1_PRELIM;

+#endif
+#if defined(CFG_LBLAWBAR1_PRELIM) && defined(CFG_LBLAWAR1_PRELIM)

        im->sysconf.lblaw[1].bar = CFG_LBLAWBAR1_PRELIM;
        im->sysconf.lblaw[1].ar = CFG_LBLAWAR1_PRELIM;
 #endif
        im->sysconf.lblaw[1].bar = CFG_LBLAWBAR1_PRELIM;
        im->sysconf.lblaw[1].ar = CFG_LBLAWAR1_PRELIM;
 #endif

-#if defined(CFG_BR2_PRELIM)  \
-       && defined(CFG_OR2_PRELIM) \
-       && defined(CFG_LBLAWBAR2_PRELIM) \
-       && defined(CFG_LBLAWAR2_PRELIM)
+#if defined(CFG_BR2_PRELIM) && defined(CFG_OR2_PRELIM)

        im->lbus.bank[2].br = CFG_BR2_PRELIM;
        im->lbus.bank[2].or = CFG_OR2_PRELIM;
        im->lbus.bank[2].br = CFG_BR2_PRELIM;
        im->lbus.bank[2].or = CFG_OR2_PRELIM;

+#endif
+#if defined(CFG_LBLAWBAR2_PRELIM) && defined(CFG_LBLAWAR2_PRELIM)

        im->sysconf.lblaw[2].bar = CFG_LBLAWBAR2_PRELIM;
        im->sysconf.lblaw[2].ar = CFG_LBLAWAR2_PRELIM;
 #endif
        im->sysconf.lblaw[2].bar = CFG_LBLAWBAR2_PRELIM;
        im->sysconf.lblaw[2].ar = CFG_LBLAWAR2_PRELIM;
 #endif

-#if defined(CFG_BR3_PRELIM)  \
-       && defined(CFG_OR3_PRELIM) \
-       && defined(CFG_LBLAWBAR3_PRELIM) \
-       && defined(CFG_LBLAWAR3_PRELIM)
+#if defined(CFG_BR3_PRELIM) && defined(CFG_OR3_PRELIM)

        im->lbus.bank[3].br = CFG_BR3_PRELIM;
        im->lbus.bank[3].or = CFG_OR3_PRELIM;
        im->lbus.bank[3].br = CFG_BR3_PRELIM;
        im->lbus.bank[3].or = CFG_OR3_PRELIM;

+#endif
+#if defined(CFG_LBLAWBAR3_PRELIM) && defined(CFG_LBLAWAR3_PRELIM)

        im->sysconf.lblaw[3].bar = CFG_LBLAWBAR3_PRELIM;
        im->sysconf.lblaw[3].ar = CFG_LBLAWAR3_PRELIM;
 #endif
        im->sysconf.lblaw[3].bar = CFG_LBLAWBAR3_PRELIM;
        im->sysconf.lblaw[3].ar = CFG_LBLAWAR3_PRELIM;
 #endif

-#if defined(CFG_BR4_PRELIM)  \
-       && defined(CFG_OR4_PRELIM) \
-       && defined(CFG_LBLAWBAR4_PRELIM) \
-       && defined(CFG_LBLAWAR4_PRELIM)
+#if defined(CFG_BR4_PRELIM) && defined(CFG_OR4_PRELIM)

        im->lbus.bank[4].br = CFG_BR4_PRELIM;
        im->lbus.bank[4].or = CFG_OR4_PRELIM;
        im->lbus.bank[4].br = CFG_BR4_PRELIM;
        im->lbus.bank[4].or = CFG_OR4_PRELIM;

+#endif
+#if defined(CFG_LBLAWBAR4_PRELIM) && defined(CFG_LBLAWAR4_PRELIM)

        im->sysconf.lblaw[4].bar = CFG_LBLAWBAR4_PRELIM;
        im->sysconf.lblaw[4].ar = CFG_LBLAWAR4_PRELIM;
 #endif
        im->sysconf.lblaw[4].bar = CFG_LBLAWBAR4_PRELIM;
        im->sysconf.lblaw[4].ar = CFG_LBLAWAR4_PRELIM;
 #endif

-#if defined(CFG_BR5_PRELIM)  \
-       && defined(CFG_OR5_PRELIM) \
-       && defined(CFG_LBLAWBAR5_PRELIM) \
-       && defined(CFG_LBLAWAR5_PRELIM)
+#if defined(CFG_BR5_PRELIM) && defined(CFG_OR5_PRELIM)

        im->lbus.bank[5].br = CFG_BR5_PRELIM;
        im->lbus.bank[5].or = CFG_OR5_PRELIM;
        im->lbus.bank[5].br = CFG_BR5_PRELIM;
        im->lbus.bank[5].or = CFG_OR5_PRELIM;

+#endif
+#if defined(CFG_LBLAWBAR5_PRELIM) && defined(CFG_LBLAWAR5_PRELIM)

        im->sysconf.lblaw[5].bar = CFG_LBLAWBAR5_PRELIM;
        im->sysconf.lblaw[5].ar = CFG_LBLAWAR5_PRELIM;
 #endif
        im->sysconf.lblaw[5].bar = CFG_LBLAWBAR5_PRELIM;
        im->sysconf.lblaw[5].ar = CFG_LBLAWAR5_PRELIM;
 #endif

-#if defined(CFG_BR6_PRELIM)  \
-       && defined(CFG_OR6_PRELIM) \
-       && defined(CFG_LBLAWBAR6_PRELIM) \
-       && defined(CFG_LBLAWAR6_PRELIM)
+#if defined(CFG_BR6_PRELIM) && defined(CFG_OR6_PRELIM)

        im->lbus.bank[6].br = CFG_BR6_PRELIM;
        im->lbus.bank[6].or = CFG_OR6_PRELIM;
        im->lbus.bank[6].br = CFG_BR6_PRELIM;
        im->lbus.bank[6].or = CFG_OR6_PRELIM;

+#endif
+#if defined(CFG_LBLAWBAR6_PRELIM) && defined(CFG_LBLAWAR6_PRELIM)

        im->sysconf.lblaw[6].bar = CFG_LBLAWBAR6_PRELIM;
        im->sysconf.lblaw[6].ar = CFG_LBLAWAR6_PRELIM;
 #endif
        im->sysconf.lblaw[6].bar = CFG_LBLAWBAR6_PRELIM;
        im->sysconf.lblaw[6].ar = CFG_LBLAWAR6_PRELIM;
 #endif

-#if defined(CFG_BR7_PRELIM)  \
-       && defined(CFG_OR7_PRELIM) \
-       && defined(CFG_LBLAWBAR7_PRELIM) \
-       && defined(CFG_LBLAWAR7_PRELIM)
+#if defined(CFG_BR7_PRELIM) && defined(CFG_OR7_PRELIM)

        im->lbus.bank[7].br = CFG_BR7_PRELIM;
        im->lbus.bank[7].or = CFG_OR7_PRELIM;
        im->lbus.bank[7].br = CFG_BR7_PRELIM;
        im->lbus.bank[7].or = CFG_OR7_PRELIM;

+#endif
+#if defined(CFG_LBLAWBAR7_PRELIM) && defined(CFG_LBLAWAR7_PRELIM)

        im->sysconf.lblaw[7].bar = CFG_LBLAWBAR7_PRELIM;
        im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM;
 #endif
        im->sysconf.lblaw[7].bar = CFG_LBLAWBAR7_PRELIM;
        im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM;
 #endif

+#ifdef CFG_GPIO1_PRELIM
+       im->pgio[0].dir = CFG_GPIO1_DIR;
+       im->pgio[0].dat = CFG_GPIO1_DAT;
+#endif
+#ifdef CFG_GPIO2_PRELIM
+       im->pgio[1].dir = CFG_GPIO2_DIR;
+       im->pgio[1].dat = CFG_GPIO2_DAT;
+#endif

 }
 
 
 }