+// SPDX-License-Identifier: GPL-2.0+
/*
* Freescale i.MX28 image generator
*
* on behalf of DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <fcntl.h>
#include "compiler.h"
+/* Taken from <linux/kernel.h> */
+#define __round_mask(x, y) ((__typeof__(x))((y)-1))
+#define round_down(x, y) ((x) & ~__round_mask(x, y))
+
/*
* Default BCB layout.
*
*
* TWEAK this if you have different kind of NAND chip.
*/
-uint32_t nand_writesize = 2048;
-uint32_t nand_oobsize = 64;
-uint32_t nand_erasesize = 128 * 1024;
+static uint32_t nand_writesize = 2048;
+static uint32_t nand_oobsize = 64;
+static uint32_t nand_erasesize = 128 * 1024;
/*
* Sector on which the SigmaTel boot partition (0x53) starts.
*/
-uint32_t sd_sector = 2048;
+static uint32_t sd_sector = 2048;
/*
* Each of the U-Boot bootstreams is at maximum 1MB big.
#define MXS_NAND_DMA_DESCRIPTOR_COUNT 4
#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512
#define MXS_NAND_METADATA_SIZE 10
+#define MXS_NAND_BITS_PER_ECC_LEVEL 13
#define MXS_NAND_COMMAND_BUFFER_SIZE 32
struct mx28_nand_fcb {
struct mx28_sd_drive_info drv_info[1];
};
+static inline uint32_t mx28_nand_ecc_chunk_cnt(uint32_t page_data_size)
+{
+ return page_data_size / MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+}
+
static inline uint32_t mx28_nand_ecc_size_in_bits(uint32_t ecc_strength)
{
- return ecc_strength * 13;
+ return ecc_strength * MXS_NAND_BITS_PER_ECC_LEVEL;
}
static inline uint32_t mx28_nand_get_ecc_strength(uint32_t page_data_size,
uint32_t page_oob_size)
{
- if (page_data_size == 2048)
- return 8;
-
- if (page_data_size == 4096) {
- if (page_oob_size == 128)
- return 8;
+ int ecc_strength;
- if (page_oob_size == 218)
- return 16;
- }
+ /*
+ * Determine the ECC layout with the formula:
+ * ECC bits per chunk = (total page spare data bits) /
+ * (bits per ECC level) / (chunks per page)
+ * where:
+ * total page spare data bits =
+ * (page oob size - meta data size) * (bits per byte)
+ */
+ ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8)
+ / (MXS_NAND_BITS_PER_ECC_LEVEL *
+ mx28_nand_ecc_chunk_cnt(page_data_size));
- return 0;
+ return round_down(ecc_strength, 2);
}
static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size,
fcb->ecc_block_0_size = 512;
fcb->ecc_block_n_size = 512;
fcb->metadata_bytes = 10;
-
- if (nand_writesize == 2048) {
- fcb->ecc_block_n_ecc_type = 4;
- fcb->ecc_block_0_ecc_type = 4;
- } else if (nand_writesize == 4096) {
- if (nand_oobsize == 128) {
- fcb->ecc_block_n_ecc_type = 4;
- fcb->ecc_block_0_ecc_type = 4;
- } else if (nand_oobsize == 218) {
- fcb->ecc_block_n_ecc_type = 8;
- fcb->ecc_block_0_ecc_type = 8;
- }
- }
-
+ fcb->ecc_block_n_ecc_type = mx28_nand_get_ecc_strength(
+ nand_writesize, nand_oobsize) >> 1;
+ fcb->ecc_block_0_ecc_type = mx28_nand_get_ecc_strength(
+ nand_writesize, nand_oobsize) >> 1;
if (fcb->ecc_block_n_ecc_type == 0) {
printf("MX28 NAND: Unsupported NAND geometry\n");
goto err;
return block;
}
-static int mx28_nand_write_fcb(struct mx28_nand_fcb *fcb, char *buf)
+static int mx28_nand_write_fcb(struct mx28_nand_fcb *fcb, uint8_t *buf)
{
uint32_t offset;
uint8_t *fcbblock;
for (i = 0; i < STRIDE_PAGES * STRIDE_COUNT; i += STRIDE_PAGES) {
offset = i * nand_writesize;
memcpy(buf + offset, fcbblock, nand_writesize + nand_oobsize);
+ /* Mark the NAND page is OK. */
+ buf[offset + nand_writesize] = 0xff;
}
free(fcbblock);
return ret;
}
-static int mx28_nand_write_dbbt(struct mx28_nand_dbbt *dbbt, char *buf)
+static int mx28_nand_write_dbbt(struct mx28_nand_dbbt *dbbt, uint8_t *buf)
{
uint32_t offset;
int i = STRIDE_PAGES * STRIDE_COUNT;
}
static int mx28_nand_write_firmware(struct mx28_nand_fcb *fcb, int infd,
- char *buf)
+ uint8_t *buf)
{
int ret;
off_t size;
return 0;
}
-void usage(void)
+static void usage(void)
{
printf(
"Usage: mxsboot [ops] <type> <infile> <outfile>\n"
struct mx28_nand_fcb *fcb;
struct mx28_nand_dbbt *dbbt;
int ret = -1;
- char *buf;
+ uint8_t *buf;
int size;
ssize_t wr_size;
cb = (struct mx28_sd_config_block *)buf;
- cb->signature = 0x00112233;
- cb->primary_boot_tag = 0x1;
- cb->secondary_boot_tag = 0x1;
- cb->num_copies = 1;
- cb->drv_info[0].chip_num = 0x0;
- cb->drv_info[0].drive_type = 0x0;
- cb->drv_info[0].tag = 0x1;
- cb->drv_info[0].first_sector_number = sd_sector + 4;
- cb->drv_info[0].sector_count = (size - 4) / 512;
+ cb->signature = cpu_to_le32(0x00112233);
+ cb->primary_boot_tag = cpu_to_le32(0x1);
+ cb->secondary_boot_tag = cpu_to_le32(0x1);
+ cb->num_copies = cpu_to_le32(1);
+ cb->drv_info[0].chip_num = cpu_to_le32(0x0);
+ cb->drv_info[0].drive_type = cpu_to_le32(0x0);
+ cb->drv_info[0].tag = cpu_to_le32(0x1);
+ cb->drv_info[0].first_sector_number = cpu_to_le32(sd_sector + 4);
+ cb->drv_info[0].sector_count = cpu_to_le32((size - 4) / 512);
wr_size = write(outfd, buf, size);
if (wr_size != size) {
return ret;
}
-int parse_ops(int argc, char **argv)
+static int parse_ops(int argc, char **argv)
{
int i;
int tmp;