Merge git://git.denx.de/u-boot-arm

[J-u-boot.git] / include / configs / CANBT.h

diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h
index 115a6f9886c43249f04052907e040c8fcbcee263..40471b78a191c5d7f895c830b2ea1ed3658de217 100644 (file)
--- a/include/configs/CANBT.h
+++ b/include/configs/CANBT.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2001
  * Matthias Fuchs, esd gmbh germany, [email protected]
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+ 
  */
 
 /*
@@ -37,6 +21,8 @@
 #define CONFIG_4xx             1       /* ...member of PPC4xx family   */
 #define CONFIG_CANBT           1       /* ...on a CANBT board          */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFFC0000
+
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* call board_early_init_f()    */
 
 #define CONFIG_SYS_CLK_FREQ    25000000 /* external frequency to pll   */
@@ -75,7 +61,7 @@
 #define CONFIG_CMD_EEPROM
 
 #undef CONFIG_CMD_NET
-
+#undef CONFIG_CMD_NFS
 
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
@@ -100,6 +86,12 @@
 #define CONFIG_SYS_MEMTEST_START       0x0400000       /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0x0C00000       /* 4 ... 12 MB in DRAM  */
 
+#define CONFIG_CONS_INDEX      1       /* Use UART0                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK    14745600 /* use external serial clock   */
 
 /* The following table includes the supported baudrates */
@@ -121,8 +113,8 @@
  */
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE                TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN         (~(TEXT_BASE) + 1)
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN         (~(CONFIG_SYS_TEXT_BASE) + 1)
 #define CONFIG_SYS_MALLOC_LEN          (128 * 1024)    /* Reserve 128 kB for malloc()  */
 
 /*
@@ -172,13 +164,14 @@
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
-#define CONFIG_HARD_I2C                        /* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08             */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* bytes of address             */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0          0x7F
+
+#define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM CAT28WC08     */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* bytes of address     */
 /* mask of address bits that overflow into the "EEPROM chip address"   */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW    0x07
 
@@ -215,18 +208,8 @@
  * Definitions for initial stack pointer and data area (in RAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x00ef0000 /* inside of SDRAM                   */
-#define CONFIG_SYS_INIT_RAM_END        0x0f00  /* End of used area in RAM             */
-#define CONFIG_SYS_GBL_DATA_SIZE       64  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x0f00  /* Size of used area in RAM            */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 #endif /* __CONFIG_H */