+commit a47f957ab523019992fdef857af01bd71c58a4da
+Date: Fri Oct 31 22:33:21 2008 +0100
+
+ NAND: Allow NAND and OneNAND to coexist
+
+ This removes in nand.h code that is verbatim duplicated from bbm.h,
+ including directly bbm.h in nand.h. The previous state of affairs
+ prevented compiling code for a board hosting both NAND and OneNAND chips.
+
+
+commit 2f77c7f45b9a37ef265a8dbe3c18efa706fed214
+Date: Fri Oct 31 13:51:12 2008 -0500
+
+ JFFS2: Eliminate compiler error when both NAND and OneNAND are enabled.
+
+
+commit c57fc28947e248fb03c49a28b467686299895055
+Date: Fri Oct 31 05:07:04 2008 -0500
+
+ NAND: Add NAND support for MPC8536DS board
+
+ This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
+ for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
+ It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.
+
+
+commit 6fc110bd8a8d642b8f7b0653bd9a08a0b7c3d50b
+Date: Fri Oct 31 05:06:14 2008 -0500
+
+ NAND: Fix CONFIG_ENV_ADDR for MPC8572DS
+
+ CONFIG_ENV_ADDR should be (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE).
+
+
+commit 51b572a801be57790fe26adaa530210e7fba59cc
+Date: Fri Oct 24 10:49:48 2008 +0900
+
+ sh: rsk7203: Moved rsk7203 board to board/renesas
+
+
+commit 58453b00b3ebb26aaa901210023f99504a90bb00
+Date: Fri Oct 24 10:48:31 2008 +0900
+
+ sh: MigoR: Moved MigoR board to board/renesas
+
+
+commit c1da2a22817ba85b437afa2f4e715e658b219fd1
+Date: Fri Oct 24 10:39:44 2008 +0900
+
+ sh: r2dplus: Moved r2dplus board to board/renesas
+
+
+commit 78385bf2359d828184d0b3649f7ae6b933420000
+Date: Fri Oct 24 10:36:13 2008 +0900
+
+ sh: sh7763rdp: Moved sh7763rdp board to board/renesas
+
+
+commit c6525d459c350bfc246ea7826456af77e1e314eb
+Date: Fri Oct 24 10:35:19 2008 +0900
+
+ sh: sh7785lcr: Moved sh7785lcr board to board/renesas
+
+
+commit acd3e30d09a73f876222f0d496c4f52ee9d0771d
+Date: Fri Oct 24 10:34:21 2008 +0900
+
+ sh: r7780mp: Moved r7780mp board to board/renesas
+
+
+commit f84e6ea275353b8fea772ec7553ff7e4b1f642e0
+Date: Fri Oct 24 10:32:14 2008 +0900
+
+ sh: ap325rxa: Moved ap325rxa board to board/renesas
+
+
+commit 9abda6ba735efb059f63dcb25d78b174bfcad1ad
+Date: Fri Oct 31 01:12:28 2008 +0100
+
+ CFI Driver: Fix "flash not ready" problem
+
+ This patch fixes a problem on systems where the NOR flash is attached
+ to a 64 bit bus. The toggle bit detection in flash_toggle() is based
+ on the assumption that the same flash address is read twice without
+ any other interjacent flash accesses. However, on 32 bit systems the
+ function flash_read64() [as currently implemented] does not perform
+ an atomic 64 bit read - instead, this is broken down into two 32 bit
+ read accesses on addresses "addr" and "addr + 4". So instead of
+ reading a 64 bit value twice from "addr", we see a sequence of 4 32
+ bit reads from "addr", "addr + 4", "addr", and "addr + 4". The
+ consequence is that flash_toggle() fails to work.
+
+ This patch implements a simple, but somewhat ugly solution, as it
+ avoids the use of flash_read64() in this critical place (by breaking
+ it down manually into 32 bit read operations) instead of rewriting
+ flash_read64() such to perform atomic 64 bit reads as one could
+ expect. However, such a rewrite would require the use of floating
+ point load operations, which becomes pretty complex:
+
+ save MSR;
+ set Floating Point Enable bit in MSR;
+ use "lfd" instruction to perform atomic 64 bit read;
+ use "stfd" to store value to temporary variable on stack;
+ load u64 value from temporary variable;
+ restore saved MSR;
+ return u64 value;
+
+ The benefit-cost ratio of such an implementation was considered too
+ bad to actually attempt this, especially as we can expect that such
+ an implementation would not only have a bigger memory footprint but
+ also cause a performance degradation.
+
+
+commit cdd4fe63b094d4b767f12ff241d72566b461ee61
+Date: Fri Oct 31 10:48:08 2008 +0100
+
+ ppc4xx: Fix spelling error in MAINTAINERS file
+
+
+commit be270798900b75ad9c47c7b79c72f70441196c56
+Date: Tue Oct 28 13:37:00 2008 +0100
+
+ ppc4xx: Update PMC440 board support
+
+ This patch brings PMC440 board support up to date:
+
+ - fix GPIO configuration
+ - add misc_init_f()
+ - use better values for usbact variable
+ - fix USB 2.0 phy reset sequence
+ - shrink BAR2 to save PCI address space
+ - add FDT support
+
+
+commit 75183b1a7fc04206d9779d13f16e03853d7e965d
+Date: Tue Oct 28 13:36:59 2008 +0100
+
+ ppc4xx: Fix PMC440 BSP commands
+
+ This patch fixes the PMC440 BSP commands painit and selfreset
+
+
+commit 76b565b69f886d5ae748db65e44f464b0e70d41a
+Date: Tue Oct 28 13:36:58 2008 +0100
+
+ ppc4xx: Update PMC440 board configuration
+
+
+commit ca0c2d42b93116a8e1b8ef8ad4493c7dc9b5f2e4
+Date: Tue Oct 28 13:36:57 2008 +0100
+
+ ppc4xx: Fix esd loadpci command
+
+ This patch fixes esd's loadpci command when not all
+ memory on adapter boards is accessable via PCI.
+
+
+commit 492aa9ea13791ca4591b5bde895a425e27ae2d10
+Date: Tue Oct 28 13:36:56 2008 +0100
+
+ ppc4xx: Clean up PMC440 header
+
+ -Codingstyle cleanup
+ -Remove unused GPIO define
+
+
+commit 295133258a44f97a57fb2ec339aecfda11f4db95
+Date: Tue Oct 28 13:36:55 2008 +0100
+
+ ppc4xx: Handle other board variant in PMC440 FPGA code
+
+
+commit cc2dc9b08cf7c09f9f237f8cb9303f11603d4fb0
+Date: Mon Oct 27 12:35:59 2008 +0100
+
+ ppc4xx: Merge xilinx-ppc440 and xilinx-ppc405 cfg
+
+ Xilinx ppc440 and ppc405 have many similarities. This patch merge the
+ config files of both infrastuctures
+
+
+commit 3befd85633d33c4dcca1f359c3f4848c5ab8e4d2
+Date: Sat Oct 25 06:45:31 2008 +0200
+
+ ppc4xx: Correctly configure the GPIO pin muxing on Arches
+
+ Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO
+ pin multiplexing correctly
+
+
+commit 7c84fe6a06dad9f793ed85b39b1e6c11a7882f5c
+Date: Thu Oct 30 23:22:04 2008 +0100
+
+ Fix to the auto-update feature documentation (CONFIG_UPDATE_TFTP_MSEC_MAX)
+
+
+commit 4bc7deee9095f21e243b724ca3d634251c1d5432
+Date: Wed Oct 29 23:27:45 2008 -0500
+
+ libfdt: Fix bug in fdt_subnode_offset_namelen()
+
+ There's currently an off-by-one bug in fdt_subnode_offset_namelen()
+ which causes it to keep searching after it's finished the subnodes of
+ the given parent, and into the subnodes of siblings of the original
+ node which come after it in the tree.
+
+
+commit f242a08871839eac081ba5b599af979f3a148a0d
+Date: Tue Oct 28 08:26:52 2008 +0100
+
+ fdt_resize(): ensure minimum padding
+
+ fdt_add_mem_rsv() requires space for a struct fdt_reserve_entry
+ (16 bytes), so make sure that fdt_resize at least adds that much
+ padding, no matter what the location or size of the fdt is.
+
+
+commit d685b74c64a38849f1a129b3ab846fbf67dd937e
+Date: Thu Oct 23 21:59:35 2008 +0800
+
+ 74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ The patch is following the commit 392438406041415fe64ab8748ec5ab5ad01d1cf7
+
+ mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ This is needed in unlock_ram_in_cache() because it is called from C and
+ will corrupt the small data area anchor that is kept in R2.
+
+ lock_ram_in_cache() is modified similarly as good coding practice, but
+ is not called from C.
+
+
+ also, the r2 is used as global data pointer.
+
+
+commit e053ab1903ccae6048ef759025b9f675bba91450
+Date: Tue Oct 28 11:45:04 2008 -0500
+
+ mpc83xx pci: Round up memory size in inbound window.
+
+ The current calculation will fail to cover all memory if
+ its size is not a power of two.
+
+
+commit 1c671977dc81359628be27ac99c174e76e8069ba
+Date: Thu Oct 23 21:19:13 2008 +0800
+
+ 86xx: remove the unused definition
+
+
+commit eaa44c5dc83756c3067b9e6c9db626facd0b0660
+Date: Tue Oct 28 17:47:49 2008 +0800
+
+ 86xx: remove the redundant r2 global data pointer save
+
+ The commit 67256678f00c09b0a7f19e862e5c1847553d31bc add
+ the another global data pointer save, but in fact the
+ global data pointer will be initialized in the board_init_r,
+ so remove it such as the 85xx/83xx family.
+
+
+commit bd888e9544419665334a6f47f81f34011cea38f3
+Date: Tue Oct 28 17:47:41 2008 +0800
+
+ 86xx: remove the unused code for 86xx family
+
+ I believe these code was copied from 74xx family, but for
+ 86xx, it is unused.
+
+
+commit 5ba1ef507402bc5e344dc374203792a40f222e8a
+Date: Tue Oct 28 17:46:35 2008 +0800
+
+ 86xx: remove the second DDR LAW setting for mpc8641hpcn
+
+ The DDR1 LAW will precedence the DDR2 LAW, so remove
+ the second DDR LAW.
+
+
+commit 137a2dfd11ac51ae3154f13f323609b33a4a072e
+Date: Tue Oct 28 17:46:23 2008 +0800
+
+ 86xx: remove the unused ddr_enable_ecc in the board file
+
+ The DDR controller of 86xx processors have the ECC data init
+ feature, and the new DDR code is using the feature, we don't
+ need the way with DMA to init memory again.
+
+
+commit dc2adad85bf580d65916c940683f6e9671e8a5dd
+Date: Tue Oct 28 17:46:12 2008 +0800
+
+ 86xx: Move the clear_tlbs before MMU turn on
+
+ We must invalidate TLBs before MMU turn on, but
+ currently the code is not, if there are some stale
+ TLB entry valid in the TLBs, it will cause strange
+ issue.
+
+
+commit 5cdade07b118d07154cb882650f9778cecc8a87c
+Date: Mon Oct 27 15:57:08 2008 -0500
+
+ mpc8313erdb: Document NAND boot.
+
+ Previously, the documentation claimed that NAND boot is not supported.
+ This is no longer true.
+
+
+commit bd78bc6b2aebf5566aac464f936b88dfd97ab0bd
+Date: Wed Oct 29 14:20:26 2008 -0500
+
+ NAND: Properly create JFFS2 cleanmarkers.
+
+ command is currently broken, and among other things causes all blocks
+ to be marked bad.
+
+ This implements it properly using MTD_OOB_AUTO, along with some
+ indentation fixes.
+
+
+commit f7fe57c09866b44692d18c8cf22828bd137ec58d
+Date: Wed Oct 29 13:42:41 2008 -0500
+
+ NAND fsl elbc: Set FMR[ECCM] based on page size.
+
+ Hardware expects ECCM 0 for small page and ECCM 1 for large page
+ when booting from NAND, so use those defaults.
+
+
+commit c013b74975dab0805ef6d369b013230c4e8a660d
+Date: Wed Oct 29 13:32:59 2008 -0400
+
+ NAND: Add support for MPC8572DS board
+
+ This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
+ 0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
+ config file.
+
+ It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
+ make room for the increased code size with NAND enabled.
+
+
+commit 4e190b03aaf2309bd2e025d1187a2ca880fedc95
+Date: Wed Oct 29 11:05:55 2008 -0400
+
+ Make Freescale local bus registers available for both 83xx and 85xx.
+
+ - Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
+ can be shared by both 83xx and 85xx
+ - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
+ files which use lbus83xx_t.
+ - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
+ 85xx can share them.
+
+
+commit 695c130e4bf75b444720ddfd83aca88f41c046cf
+Date: Mon Oct 27 15:38:30 2008 -0500
+
+ NAND: Align right column of the shorthelp with other commands.
+
+ I accidentally broke this in when making consistent the partial
+ alignment of the longhelp.
+
+
+commit 33efde5ecac91ab118ff00b95a181fd6d75f8645
+Date: Mon Sep 15 16:08:03 2008 +0200
+
+ NAND: Reset chip on power-up
+
+ Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
+ The first command sent is NAND_CMD_READID.
+ Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
+ Tested with an MT29F4G08AAC.
+
+
+commit c45912d8abc52de796b9059a58faf7c4166eab58
+Date: Fri Oct 24 16:20:43 2008 -0500
+
+ NAND: sync with 2.6.27
+
+ This brings the core NAND code up to date with the Linux kernel.
+
+ Since there were several drivers in Linux as of the last update that are
+ not in u-boot, I'm not bringing over new drivers that have been added
+ since in the absence of an interested party.
+
+ I did not update OneNAND since it was recently synced by Kyungmin Park,
+ and I'm not sure exactly what the common ancestor is.
+
+
+commit b1d0db1805c3395149777e507b6da53410abac4e
+Date: Tue Oct 21 17:25:47 2008 -0500
+
+ bootm: Added CONFIG_BOOTM_{LINUX, NETBSD, RTEMS}
+
+ Added the ability to config out bootm support for Linux, NetBSD, RTEMS
+
+
+commit 5a98127d81a6eefc5a78a704df619bfe362eeb87
+Date: Tue Oct 21 17:25:46 2008 -0500
+
+ bootm: support subcommands in linux ppc bootm
+
+ Add support for 'bdt', 'cmdline', 'prep' to the linux PPC bootm.
+
+
+commit 49c3a861d11735838f1f1b11999ce433006dc919
+Date: Tue Oct 21 17:25:45 2008 -0500
+
+ bootm: Add subcommands
+
+ Add the ability to break the steps of the bootm command into several
+ subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go.
+
+ This allows us to do things like manipulate device trees before
+ they are passed to a booting kernel or setup memory for a secondary
+ core in multicore situations.
+
+ Not all OS types support all subcommands (currently only start, loados,
+ ramdisk, fdt, and go are supported).
+
+
+commit be08315933537f061bc1ce61f33a29c56458bbad
+Date: Tue Oct 21 17:25:44 2008 -0500
+
+ bootm: Move to using a function pointer table for the boot os function
+
+ This removes a bit of code and makes it easier for the upcoming sub bootm
+ command support to call into the proper OS specific handler.
+
+
+commit a369f4a492fa2805d87775d27380f0eeaca35aa6
+Date: Mon Sep 29 23:03:14 2008 +1000
+
+ i386: Renamed show_boot_progress in assembler code
+
+ Renamed show_boot_progress in assembler init phase to
+ show_boot_progress_asm to avoid link conflicts with C version
+
+
+commit 4442f45b0e1cbad35aa22d4cad22b90a57e3f32d
+Date: Mon Oct 27 16:42:00 2008 -0500
+
+ 85xx: Update MPC85xx_PORDEVSR_IO_SEL mask
+
+ The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
+ processors have a 3-bit wide IO_SEL field but have the most
+ significant bit is wired to 0 so this change should not affect
+ them.
+
+
+commit cd4251624205cb97104f6e32679dc7754934f711
+Date: Mon Oct 27 16:09:42 2008 -0500
+
+ powerpc: fix pci window initialization to work with > 4GB DRAM
+
+ The existing code has a few errors that need to be fixed in
+ order to support large RAM sizes. Fix those, and add a
+ comment to make it clearer.
+
+
+commit 219542a1a66ca017b12860920714a9859b18a5d7
+Date: Mon Oct 27 13:16:20 2008 -0500
+
+ pci/fsl_pci_init: Removed a bunch pointless trailing backslashes.
+
+
+commit 6b59e03e0237a40a2305ea385defdfd92000978b
+Date: Mon Sep 1 16:21:22 2008 +0200
+
+ lcd: Let the board code show board-specific info
+
+ The information displayed when CONFIG_LCD_INFO is set is inherently
+ board-specific, so it should be done by the board code. The current code
+ dealing with this only handles two cases, and is already a horrible mess
+ of #ifdeffery.
+
+ Yes, this duplicates some code, but it also allows boards to print more
+ board-specific information; this used to be very difficult.
+
+
+commit 6f93d2b8fca504200a5758f7c6dd2d6852900765
+Date: Mon Sep 1 16:21:21 2008 +0200
+
+ lcd: Set lcd_is_enabled before clearing the screen
+
+ This allows the logo/info rendering routines to use the regular
+ lcd_putc/lcd_puts/lcd_printf calls.
+
+
+commit 15b17ab52b7c15d46d9fc631cc06092e1e764de2
+Date: Mon Sep 1 16:21:20 2008 +0200
+
+ lcd: Implement lcd_printf()
+
+ lcd_printf() has a prototype in include/lcd.h but no implementation. Fix
+ this by borrowing the lcd_printf() implementation from the cogent board
+ code (which appears to use its own LCD framework.)
+
+
+commit 70dbc54c0a5c798bcf82ae2a1e227404f412e892
+Date: Mon Sep 1 16:21:19 2008 +0200
+
+ atmel_lcdfb: Straighten out funky vl_sync logic
+
+ If the board _didn't_ request INVLINE_INVERTED, we set INVLINE_INVERTED,
+ otherwise we don't. WTF?
+
+
+commit 23bb28f0f76b46c4b573374b0bb3b3f23d85ef55
+Date: Mon Sep 1 16:21:18 2008 +0200
+
+ atmel_lcdfb: Eliminate unneeded #include <asm/arch/hardware.h>
+
+ atmel_lcdfb doesn't actually need anything from asm/arch/hardware.h. It
+ includes a file that does, asm/arch/gpio.h, but this file doesn't
+ include <asm/arch/hardware.h> like it's supposed to.
+
+ Add the missing include to asm/arch/gpio.h and remove the workaround
+ from the atmel_lcdfb driver. This makes the driver compile on avr32.
+
+
+commit c2083e0e11a03ef8be2e9f0ed8720fdc20832f3e
+Date: Wed Oct 22 14:38:55 2008 -0500
+
+ 86xx: Convert all fsl_pci_init users to new APIs
+
+ Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
+ fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().
+
+ With these changes the board code is a bit smaller and we get dma-ranges
+ set in the device tree for these boards.
+
+
+commit 2dba0dea98c0dee1799ffd6fd6eb541645dbbd98
+Date: Tue Oct 21 08:28:33 2008 -0500
+
+ 85xx: Convert all fsl_pci_init users to new APIs
+
+ Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
+ MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
+ and ft_fsl_pci_setup().
+
+ With these changes the board code is a bit smaller and we get dma-ranges
+ set in the device tree for these boards.
+
+
+commit a2aab460727e5f674353a83a81000ef794bffcae
+Date: Thu Oct 23 00:01:06 2008 -0500
+
+ pci/fsl_pci_init: Added fdt helper for setting up bus-ranges & dma-ranges
+
+
+commit b9a1fa9787a3a79573f5f932a4f8aa216bcb1785
+Date: Wed Oct 22 14:06:24 2008 -0500
+
+ pci/fsl_pci_init: Add a common PCI inbound setup function
+
+ Add a common setup function that determines the pci_region(s) based
+ on how much memory we have in the system.
+
+
+commit 612ea01018a459234d54ed57ec6a5a244ce75678
+Date: Tue Oct 21 10:13:14 2008 -0500
+
+ pci/fsl_pci_init: Enable larger address and setting inbound windows properly
+
+ * PCI Inbound window was setup incorrectly. The PCI address and system
+ address were swapped. The PCI address should be setting piwar/piwbear
+ and the system address should be setting pitar.
+
+ * Removed masking of addresses to allow for system address to support
+ system address & PCI address >32-bits
+
+ * Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses
+
+ * Respect the PCI_REGION_PREFETCH for inbound windows
+
+
+commit 8ab451c46b846f2bbd7122b29ffdd9a4a04da228
+Date: Wed Oct 22 23:33:56 2008 -0500
+
+ fdt: Added helper to set PCI dma-ranges property
+
+ Added fdt_pci_dma_ranges() that parses the pci_region info from the
+ struct pci_controller and populates the dma-ranges based on it.
+
+ The max # of windws/dma-ranges we support is 3 since on embedded
+ PowerPC based systems this is the max number of windows.
+
+
+commit 3bed2aaf2d50fd13273c14d17d4fd40ef42e0d0f
+Date: Thu Oct 23 00:05:47 2008 -0500
+
+ fdt: Add fdt_getprop_u32_default helpers
+
+ Add helper functions to return find a node and return it's property
+ or a default value.
+
+
+commit 8ba93f68a1bae89e033527ce67b41b4a87aa5b7f
+Date: Tue Oct 21 18:06:15 2008 -0500
+
+ 86xx: Enable 64-bit PCI resources on all Freescale boards
+
+
+commit 0151cbaccf4504821ecfde0217299bd740086bb6
+Date: Tue Oct 21 11:33:58 2008 -0500
+
+ 85xx: Enable 64-bit PCI resources on all Freescale boards
+
+
+commit 30e76d5e3bc4c5208ee63585fe12b409d9308cd8
+Date: Tue Oct 21 08:36:08 2008 -0500
+
+ pci: Allow for PCI addresses to be 64-bit
+
+ PCI bus is inherently 64-bit. While not all system require access to
+ the full 64-bit PCI address range some do. This allows those systems
+ to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.
+
+
+commit ae5f943ba8ede448a4b1a145fd8911856701ecc5
+Date: Thu Oct 23 21:18:53 2008 +0800
+
+ 85xx: Fix the incorrect register used for DDR erratum1
+
+ The 8572 DDR erratum1:
+ DDR controller may enter an illegal state when operating
+ in 32-bit bus mode with 4-beat bursts.
+
+ Description:
+ When operating with a 32-bit bus, it is recommended that
+ DDR_SDRAM_CFG[8_BE] is cleared when DDR2 memories are used.
+ This forces the DDR controller to use 4-beat bursts when
+ communicating to the DRAMs. However, an issue exists that
+ could lead to data corruption when the DDR controller is
+ in 32-bit bus mode while using 4-beat bursts.
+
+ Projected Impact:
+ If the DDR controller is operating in 32-bit bus mode with
+ 4-beat bursts, then the controller may enter into a bad state.
+ All subsequent reads from memory is corrupted.
+ Four-beat bursts with a 32-bit bus only is used with DDR2 memories.
+ Therefore, this erratum does not affect DDR3 mode.
+
+ Work Arounds:
+ To work around this issue, software must set DEBUG_1[31] in
+ DDR memory mapped space (CCSRBAR offset + 0x2f00 for DDR_1
+ and CCSRBAR offset + 0x6f00 for DDR_2).
+
+ Currenlty, the code is using incorrect register DDR_SDRAM_CFG_2
+ as condition, but it should be DDR_SDRAM_CFG register.
+
+
+commit d5b693090ed08d24c18491df9d8fc7387b2906f3
+Date: Thu Oct 23 21:17:19 2008 +0800
+
+ 85xx: remove unused config definition
+
+
+commit 0f060c3bf82832331a509f2e5d2442539e7aad09
+Date: Thu Oct 23 01:47:38 2008 -0500
+
+ 85xx: Add basic e500mc core support
+
+ Introduce CONFIG_E500MC to deal with the minor differences between
+ e500v2 and e500mc.
+
+ * Certain fields of HID0/1 don't exist anymore on e500mc
+ * Cache line size is 64-bytes on e500mc
+ * reset value of PIR is different
+
+
+commit a38a5b6edd30f29fd5fdb1d7f674521906c0e677
+Date: Thu Oct 23 01:47:37 2008 -0500
+
+ 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number
+
+ Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle
+ e500mc's 64-byte cacheline properly when it gets added.
+
+
+commit 5deb8022c3749faac30e9ad9694691e2442b5c93
+Date: Fri Oct 24 13:51:52 2008 +0200
+
+ ppc4xx: New board avnet fx12 minimodul
+
+ This patch adds support for the avnet fx12 minimodul.
+ It needs the "ppc4xx: Generic architecture for xilinx ppc405"
+ patch from Ricardo.
+
+
+commit 1f4d53260ec6f8f122aed75cce7c757d97a551e0
+Date: Tue Oct 21 18:29:46 2008 +0200
+
+ ppc4xx: Generic architecture for xilinx ppc405(v3)
+
+ As "ppc44x: Unification of virtex5 pp440 boards" did for the xilinx
+ ppc440 boards, this patch presents a common architecture for all the
+ xilinx ppc405 boards.
+
+ Any custom xilinx ppc405 board can be added very easily with no code
+ duplicity.
+
+ This patch also adds a simple generic board, that can be used on almost
+ any design with xilinx ppc405 replacing the file ppc405-generic/xparameters.h
+
+ This patch is prepared to work with the latest version of EDK (10.1)
+
+
+commit 485c00a57fab86f72a3769480c66bf1ca22e1459
+Date: Fri Oct 24 08:56:09 2008 +0200
+
+ ppc4xx: Disable DDR2 autocalibration on Kilauea for now
+
+ Since the new autocalibration still has some problems on some Kilauea
+ boards with 200MHz DDR2 frequency we disable the autocalibration and
+ use the hardcoded values as done before. This seems to work reliably
+ on all known DDR2 frequencies.
+
+ After the autocalibration issue is fixed we will enable it again.
+
+
+commit f177f4250c729727b1629fa8d8d6556c999e9b8c
+Date: Wed Apr 9 02:02:07 2008 -0400
+
+ Blackfin: fix up UART status bit handling
+
+ Some Blackfin UARTs are read-to-clear while others are write-to-clear.
+ This can cause problems when we poll the LSR and then later try and handle
+ any errors detected.
+
+
+commit ae0910298f31f5bb3d33a64b8467c60ea3c5d6d0
+Date: Sat Oct 11 20:42:17 2008 -0400
+
+ Blackfin: bf561-ezkit: drop redundant code
+
+ Common Blackfin code already announces CPU information.
+
+
+commit e2eea98bff1369f77a9f59a5fd0bd4928bc3332e
+Date: Sat Oct 11 20:43:10 2008 -0400
+
+ Blackfin: bf561-ezkit: drop pointless USB code
+
+ The USB/LAN register settings are not actually used/needed in order to
+ drive things from U-Boot, so drop the code.
+
+
+commit c23bff63fb03cb9dbcd26522841e53f9b34fa1ab
+Date: Sat Oct 11 20:47:58 2008 -0400
+
+ Blackfin: linker scripts: force start.o and set initcode boundaries
+
+ Make sure that the start.o object is always the first object in our linker
+ script regardless of configuration settings, and add some linker symbols
+ so the ldr utility can properly locate the initcode when generating a LDR.
+
+
+commit bd33e5c613cf70e3cb51a73fdd653fe83b942bb0
+Date: Sat Oct 11 21:19:39 2008 -0400
+
+ Blackfin: small cpu init optimization while setting interrupt mask
+
+ Use the sti instruction to set the initial interrupt mask rather than
+ banging on the core IMASK MMR to save both space and time.
+
+
+commit 960922291c9594acb575cec7e47d7bed9b58182c
+Date: Sat Oct 11 21:18:10 2008 -0400
+
+ Blackfin: set initial stack correctly according to Blackfin ABI
+
+
+commit 25cd33d82ea521b7bd90ca858f8919fae1e9732b
+Date: Sun Apr 20 03:11:53 2008 -0400
+
+ Blackfin: make baud calculation more accurate
+
+ We should use the algorithm in the Linux kernel so that the UART divisor
+ calculation is more accurate. It also fixes problems on some picky UARTs
+ that have sampling anomalies.
+
+
+commit 0ba1da116e5edcb0c5ae4a7585d73f6548400a06
+Date: Mon Oct 6 04:21:41 2008 -0400
+
+ Blackfin: decode hwerrcause/excause when crashing
+
+ Having to decode hwerrcause/excause values is a pain, so automate it.
+
+
+commit 2de95bb20c488f20298df6881b700a5a757ee780
+Date: Mon Oct 6 04:20:54 2008 -0400
+
+ Blackfin: fix register dump messages
+
+ Make sure we report RETI/IPEND correctly.
+
+
+commit 7133999e6f62a9a01f6a8ffe234b8532b3ad1e4b
+Date: Mon Oct 6 04:19:34 2008 -0400
+
+ Blackfin: don't bother displaying reboot msg when crashing
+
+ The hang function already tells you to reboot, so no point in showing it
+ twice.
+
+
+commit 70c4c032ea112cc42aa1ce959c33fc4825eaef95
+Date: Sun Jun 1 01:23:48 2008 -0400
+
+ Blackfin: enable support for nested interrupts
+
+ During cpu init, make sure we initialize the CEC properly so that
+ interrupts can fire and be handled while U-Boot is running.
+
+
+commit 39782727e185860faa4884c2b04e84cb33d1c6cf
+Date: Mon Oct 6 03:55:25 2008 -0400
+
+ Blackfin: init NAND before relocating env
+
+ If booting out of NAND, we need to make sure we initialize it properly
+ before attempting to relocate the environment.
+
+
+commit 0f9a8819416ba40a53de50af148847a0e508f84d
+Date: Thu Aug 7 18:40:13 2008 -0400
+
+ Blackfin: check cache bits, not cplb bits
+
+
+commit 2c1ea9e370cb72dd6a5aa32338e87a8a1f77bd76
+Date: Thu Aug 7 17:52:59 2008 -0400
+
+ Blackfin: drop unused cache flush code
+
+
+commit 50f0d211912a648e31aa9123b4665a0444bb8ca9
+Date: Thu Aug 7 15:21:47 2008 -0400
+
+ Blackfin: unify cache handling code
+
+
+commit 3c8798983403cb68a827d7a0d09b1134524a1b7d
+Date: Mon Oct 6 03:39:07 2008 -0400
+
+ Blackfin: only initialize the RTC when actually used
+
+
+commit 621e579b812dd1a2e6777f7cbf6e55e736505823
+Date: Mon Oct 6 03:44:33 2008 -0400
+
+ Blackfin: fix SWRST register definition
+
+ The SWRST register is a 16bit, not 32bit, register.
+
+
+commit 06121c4e2d183887dcd7a4ca2dcd395b213ea15b
+Date: Thu Aug 7 18:54:57 2008 -0400
+
+ Blackfin: build with -fomit-frame-pointer
+
+
+commit adbfeeb7b32f737a9738daa583350d2bb9ed017a
+Date: Thu Aug 7 17:50:26 2008 -0400
+
+ Blackfin: document some of the blackfin directories
+
+
+commit e4337968e43698a68ba608369f46d4a4114111ca
+Date: Thu Aug 7 15:16:56 2008 -0400
+
+ Blackfin: only enable hardware error irq by default
+
+
+commit 2b66f08f257ef6a06785f27b3c6dc2a4cfc9cac4
+Date: Thu Aug 7 13:36:43 2008 -0400
+
+ Blackfin: punt old unused mem_init.h header
+
+
+commit bcc121a01608042066a19ab5bff5bcfb805bf406
+Date: Thu Aug 7 13:18:55 2008 -0400
+
+ Blackfin: delete unused page_descriptor_table_size define
+
+
+commit 30fb9d24ae16e5b0ed39e5b7cc85981165ca98bc
+Date: Thu Aug 7 13:17:03 2008 -0400
+
+ Blackfin: fix typo in boot mode comment and add NAND define
+
+
+commit 2e5cbe5461c5c4c6665e318cfe950a5a150d999c
+Author: Ben Maan <moo@cow>
+Date: Thu Aug 7 13:14:21 2008 -0400
+
+ Blackfin: fix port mux defines for BF54x
+
+
+commit 0656ef2ba274910d31364fe022f6c7db0051660d
+Date: Thu Aug 7 13:09:50 2008 -0400
+
+ Blackfin: update anomaly lists
+
+
+commit 50ca95402876cf7bac4e2d4f7855f616a038763f
+Date: Thu Aug 7 13:08:54 2008 -0400
+
+ Blackfin: unify DSPID/DBGSTAT MMR definitions
+
+
+commit d9d8c7c696dec370ca714c03beb6e79d4c90bd5e
+Date: Tue Oct 21 15:53:51 2008 +0200
+
+ Fix strmhz(): avoid printing negative fractions
+
+
+commit 4a7f6b750d8de543fdf8e58acd86745010054571
+Date: Fri Oct 17 08:55:51 2008 -0400
+
+ mpc83xx: Removed #ifdef CONFIG_MPC834X dependency on upmconfig function
+
+ This is done to allow other 83XX based platforms which also have UPM
+ (e.g. 8360) to configure and use their UPM in u-boot.
+
+
+commit 3bf1be3c0cfb1129b68cc1474119e5f323536488
+Date: Tue Oct 14 22:58:53 2008 +0400
+
+ mpc83xx: add support for switching between USB Host/Function for MPC837XEMDS
+
+ With this patch u-boot can fixup the dr_mode and phy_type properties
+ for the Dual-Role USB controller.
+
+ While at it, also remove #ifdefs around includes, they are not needed.
+
+
+commit b3379f3fd13969934c00097c05754e7a8990fd39
+Date: Wed Oct 8 20:52:54 2008 +0400
+
+ mpc83xx: add ELBC NAND support for the MPC837XEMDS boards
+
+ Though NAND chip is replaceable on the MPC837XE-MDS boards, the
+ current settings don't work with the default chip on the board.
+ Nevertheless Freescale's U-Boot sets the option register correctly,
+ so I just dumped the register from the working u-boot. My guess is
+ that the old settings were applicable for some pilot boards, not
+ found in the production.
+
+ This patch also enables FSL ELBC driver so that we could access
+ the NAND storage in the u-boot.
+
+ The NAND support costs about 45KB, so the u-boot no longer fits
+ into two 128KB NOR flash sectors, thus we also have to adjust
+ environment location: add another 128KB to the monitor length.
+
+
+ It is due to hardware design and logic defect, that is the
+ I/O[0:7] of NAND chip is connected to LAD[7:0], so when
+ the NAND chip connected to nLCS3, you have to set up the
+ OR3[BCTLD] = '1' for normal operation, otherwise it will have
+ bus contention due to the pin 48/25 of U60 is enabled.
+
+ Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not
+ asserted upon access to the NAND chip, keep the default state.
+
+
+commit 00f7bbae92e3b13f2b37aeb1def9bb12445521b7
+Date: Thu Oct 2 19:17:33 2008 +0400
+
+ mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards
+
+ The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
+ standalone or acting as a PCI agent. User's Guide says:
+
+ - When the CPLD recognizes its location on the PIB it automatically
+ configures RCW to the PCI Host.
+ - If the CPLD fails to recognize its location then it is automatically
+ configured as an Agent and the PCI is configured to an external arbiter.
+
+ This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
+ flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
+ PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
+ any arbiter bad things will happen (here the board hangs during any config
+ space reads).
+
+ In this situation we must disable the PCI. And in case of anybody really
+ want to use an external arbiter, we provide "pci_external_aribter"
+ environment variable.
+
+
+commit 1da83a63d8e1b4bddeb82581b1745a09aac3e2d3
+Date: Thu Oct 2 18:32:25 2008 +0400
+
+ mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards
+
+ This involves configuring the SerDes and fixing up the flags and
+ PHY addresses for the TSECs.
+
+ For Linux we also fix up the device tree.
+
+
+commit e6d9c8916de9c24f2c52d0b01cf00d2e74a04cd8
+Date: Thu Oct 2 18:31:59 2008 +0400
+
+ mpc83xx: add TSECs' HRCWH masks for MPC837x processors
+
+ We'll use these masks to parse TSEC modes out of HRCWH.
+
+
+commit 6f9cc6608b4e1cefde56c0fb99ae1c95c42575ff
+Date: Thu Oct 2 18:31:56 2008 +0400
+
+ mpc83xx: serdes: add forgotten shifts for rfcks
+
+ The rfcks should be shifted by 28 bits left. We didn't notice the bug
+ because we were using only 100MHz clocks (for which rfcks == 0).
+
+ Though, for SGMII we'll need 125MHz clocks.
+
+
+commit 55c531984dcf933e4cd13a187a7e08e873b7ced1
+Date: Thu Oct 2 18:31:53 2008 +0400
+
+ mpc83xx: fix serdes setup for the MPC8378E boards
+
+ MPC837xE specs says that SerDes1 has:
+
+ — Two lanes running x1 SGMII at 1.25 Gbps;
+ — Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
+
+ And for SerDes2:
+
+ — Two lanes running x1 PCI Express at 2.5 Gbps;
+ — One lane running x2 PCI Express at 2.5 Gbps;
+ — Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
+
+ The spec also explicitly states that PEX options are not valid for
+ the SD1.
+
+ Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
+ which is wrong to do.
+
+
+commit 5c2ff323a94e27e481f70c44838d43fcd844dd46
+Date: Wed Sep 10 18:12:37 2008 +0400
+
+ mpc83xx: mpc8360emds: rework LBC SDRAM setup
+
+ Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
+ it difficult to use (b/c then the memory is discontinuous and
+ there is quite big memory hole between the DDR/SDRAM regions).
+
+ This patch reworks LBC SDRAM setup so that now we dynamically
+ place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
+ DDR memory).
+
+ With this patch we're able to:
+
+ - Boot without external DDR memory;
+ - Use most "DDR + SDRAM" setups without need to support for
+ sparse/discontinuous memory model in the software.
+
+
+commit def0819e920b05b34b56d8b42e1e43d9b89a52d6
+Date: Tue Oct 21 11:23:56 2008 +0200
+
+ FDT: don't use private kernel header files
+
+ On some systems (for example Fedora Core 4) U-Boot builds with the
+ following wanrings only:
+
+ ...
+ In file included from /home/wd/git/u-boot/include/libfdt_env.h:33,
+ from fdt.c:51:
+ /usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include <endian.h> instead!
+
+ This patch fixes this problem.
+
+
+commit f4d14c55504ce40287321bd63ee269e3233ee4ae
+Date: Mon Oct 13 15:15:31 2008 +0200
+
+ ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
+
+
+commit 43cbce69d48d052574d71f50724be546d90a46a4
+Date: Mon Oct 13 10:45:14 2008 +0200
+
+ ppc4xx: Correctly setup ranges property in ebc node
+
+ Previously only the NOR flash mapping was written into the ranges
+ property of the ebc node. This patch now writes all enabled chip
+ select areas into the ranges property.
+
+
+commit d7b26d58328f137471ea97de382bfa63f7239931
+Date: Wed Oct 8 15:37:50 2008 +0200
+
+ ppc4xx: Add GDSys neo 405EP board support
+
+
+commit c11da194545d2f4bbb54be1bb5e504e20ce8c16c
+Date: Wed Oct 1 14:46:13 2008 +0200
+
+ ppc4xx: Update configs for Netstal boards
+
+ I reorganized my config files, putting the common stuff into netstal-common.h
+ (got the idea by looking a amcc-common.h from Stefan).
+
+ Added stuff to boot the new powerpc linux via NFS (only tested with HCU4).
+
+
+commit c9c11d751e4242cf29c3c3c290d971f6d0cb1d15
+Date: Wed Oct 8 10:13:19 2008 -0700
+
+ ppc4xx: Add routine to retrieve CPU number
+
+ Provide a weak defined routine to retrieve the CPU number for
+ reference boards that have multiple CPU's. Default behavior
+ is the existing single CPU print output. Reference boards with
+ multiple CPU's need to provide a board specific routine.
+ See board/amcc/arches/arches.c for an example.
+
+
+commit 59217bae40e90982ab5400d849c08af683ace036
+Date: Wed Oct 8 10:13:14 2008 -0700
+
+ ppc4xx: Add static support for 44x IBM SDRAM Controller
+
+ This patch add the capability to configure a PPC440 based IBM SDRAM
+ Controller with static, compiled-in, values. PPC440 memory subsystem
+ includes a Memory Queue core.
+
+
+commit f09f09d3899017aaaa2b031bba63c271e9c48e4d
+Date: Wed Oct 8 10:12:53 2008 -0700
+
+ ppc4xx: Add AMCC Arches board support (dual 460GT)
+
+ The Arches Evaluation board is based on the AMCC 460GT SoC chip.
+ This board is a dual processor board with each processor providing
+ independent resources for Rapid IO, Gigabit Ethernet, and serial
+ communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
+ FLASH, UART, EEPROM and temperature sensor, along with a shared debug
+ port. The two 460GT's will communicate with each other via shared
+ memory, Gigabit Ethernet and x1 PCI-Express.
+
+
+commit 055b12f2ffd7c34eea7e983a0588b24f2e69e0e3
+Date: Sun Oct 19 21:54:30 2008 +0200
+
+ TQM8260: environment in flash instead EEPROM, baudrate 115k
+
+ Several customers have reported problems with the environment in
+ EEPROM, including corrupted content after board reset. Probably the
+ code to prevent I2C Enge Conditions is not working sufficiently.
+
+ We move the environment to flash now, which allows to have a backup
+ copy plus gives much faster boot times.
+
+ Also, change the default console initialization to 115200 bps as used
+ on most other boards.
+
+
+commit 1836881190b3d8a6918b0d64b39fe32bbbdf85d8
+Date: Sun Oct 19 12:49:19 2008 -0500
+
+ 85xx: Fix compile warning in mpc8536ds.c
+
+ mpc8536ds.c: In function 'is_sata_supported':
+ mpc8536ds.c:615: warning: unused variable 'devdisr'
+
+
+commit 8ed44d91c8122d00368523b0b746691c895d3b3c
+Date: Sun Oct 19 02:35:50 2008 +0200
+
+ Cleanup: fix "MHz" spelling
+
+
+commit 08ef89ecd174969b3544f3f0c7cd1de3c57f737b
+Date: Sun Oct 19 02:35:49 2008 +0200
+
+ Use strmhz() to format clock frequencies
+
+
+commit d50c7d4be150b2252c0d2e16cfcf69643bdd6dc9
+Date: Sun Oct 19 02:35:48 2008 +0200
+
+ strmhz(): Round numbers when printing clock frequencies
+
+ Round clock frequencies for printing.
+
+ Many boards printed off clock frequencies like 399 MHz instead of the
+ exact 400 MHz because numberes were not rounded. This is fixed now.
+
+
+commit 681c02d05b29c6d46093525052c74b9c4ddc8b08
+Date: Mon Oct 20 15:16:47 2008 -0500
+
+ 85xx: properly document MPC85xx_PORDEVSR2_SEC_CFG
+
+ Commit f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot
+ to add a comment that the correct value disagrees with the 8544 reference
+ manual. The changelog for that commit is also wrong, as it says "bit 28"
+ when it should be "bit 24".
+
+
+commit 360fe71e82b83e264c964c9447c537e9a1f643c8
+Date: Fri Oct 17 18:24:06 2008 +0200
+
+ mgcoge: add redundant environment sector
+
+
+commit 53ebf0c470c87d5f9fa76462e5f4064d26a9b16a
+Date: Fri Oct 17 18:23:27 2008 +0200
+
+ mgsuvd: update size of environment
+
+
+commit 2e26d837f11460c0e6dede7d65424a31e0183d09
+Date: Fri Oct 10 11:41:00 2008 +0800
+
+ Enabled the Freescale SGMII riser card on 8536DS
+
+
+commit 7e183cad0c5ab6415dca95d6ac290ea918b28c55
+Date: Fri Oct 10 11:40:59 2008 +0800
+
+ Enabled the Freescale SGMII riser card on 8572DS
+
+ This patch based on Andy's work.
+ Including command 'pixis_set_sgmii' support.
+
+
+commit bff188baf9427c35745356439435acf3864d4c65
+Date: Fri Oct 10 11:40:58 2008 +0800
+
+ Make pixis_set_sgmii more general to support MPC85xx boards.
+
+ The pixis sgmii command depend on the FPGA support on the board, some 85xx
+ boards support SGMII riser card but did not support this command, define
+ CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.
+
+ Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
+ are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
+ PIXIS_VCFGEN1_MASK in header file for both boards.
+
+
+commit 5e981d683d2363204c76773941c2e9c2044c808f
+Date: Wed Oct 8 23:38:02 2008 -0500
+
+ Add cpu/8xxx to TAGS_SUBDIRS
+
+
+commit e1f7d22b8b52fc08c4d17a6a7db1e664281aed63
+Date: Thu Oct 9 01:25:55 2008 -0500
+
+ fsl_law clear enable before changing.
+
+ Debug sessions may have left enabled laws.
+ Changing lawbar with an unkown enabled tgtid could cause problems.
+
+
+commit 86be510f7b5443e7e937f696bfbe037fdc740b15
+Date: Thu Oct 9 00:29:27 2008 -0500
+
+ mpc8572 additional end-point mode
+
+ mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0.
+ Include host_agent == 0 decode for end-point determination.
+
+ This is not needed for the ds reference board since pcie3 will be a host
+ in order to connect to the uli chip. Include it here as a reference for
+ other mpc8572 boards.
+
+
+commit 6856b3d0221a838580e6bb06f61425fd7529ba93
+Date: Wed Oct 8 23:37:59 2008 -0500
+
+ 85xx if NUM_CPUS>1, print cpu number
+
+
+commit f7fecc3e25050a036c9f50f0d2b85bc3199a96e0
+Date: Wed Oct 8 23:38:01 2008 -0500
+
+ pixis do not print long help if not configured
+
+
+commit 0e17f02a8a78d85225a4d805f6a1ea95a0a460b5
+Date: Tue Oct 7 08:09:50 2008 -0500
+
+ Have u-boot pass stashing parameters into device tree
+
+ Some cores don't support ethernet stashing at all, and some
+ instances have errata. Adds 3 properties to gianfar nodes
+ which support stashing. For now, just add this support to
+ 85xx SoCs.
+
+
+commit c21617fd265b7c126c6e2f2d8a23cdb00d4fade7
+Date: Fri Oct 3 12:37:57 2008 -0400
+
+ Add DDR options setting on MPC8641HPCN board
+
+ * Add board specific parameter table to choose correct cpo, clk_adjust,
+ write_data_delay based on board ddr frequency and n_ranks.
+
+ * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
+
+
+commit 4ca06607d60d0a6378812ef58fd1eab2a7f77111
+Date: Fri Oct 3 12:37:41 2008 -0400
+
+ Add ddr interleaving suppport for MPC8572DS board
+
+ * Add board specific parameter table to choose correct cpo, clk_adjust,
+ write_data_delay, 2T based on board ddr frequency and n_ranks.
+
+ * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
+
+ * Set memory controller interleaving mode to bank interleaving, and disable
+ bank(chip select) interleaving mode by default, because the default on-board
+ DDR DIMMs are 2x512MB single-rank.
+
+ * Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.
+
+
+commit 1f293b417ac6ab8e317ca2b770377ca93edf2370
+Date: Fri Oct 3 12:37:26 2008 -0400
+
+ Add debug information for DDR controller registers
+
+
+commit c9ffd839b1ada502c86f88edaf1534426b6688ce
+Date: Fri Oct 3 12:37:10 2008 -0400
+
+ Check DDR interleaving mode
+
+ * Check DDR interleaving mode from environment by reading memctl_intlv_ctl and
+ ba_intlv_ctl.
+ * Print DDR interleaving mode information
+ * Add doc/README.fsl-ddr to describe the interleaving setting
+
+
+commit dfb49108e4f86c2224e1f30124328b0de66ef72e
+Date: Fri Oct 3 12:36:55 2008 -0400
+
+ Pass dimm parameters to populate populate controller options
+
+ Because some dimm parameters like n_ranks needs to be used with the board
+ frequency to choose the board parameters like clk_adjust etc. in the
+ board_specific_paramesters table of the board ddr file, we need to pass
+ the dimm parameters to the board file.
+
+ * move ddr dimm parameters header file from /cpu to /include directory.
+ * add ddr dimm parameters to populate board specific options.
+ * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.
+
+
+commit dbbbb3abeff325855cae76e33d69d5665631443f
+Date: Fri Oct 3 12:36:39 2008 -0400
+
+ Make DDR interleaving mode work correctly
+
+ Fix some bugs:
+ 1. Correctly set intlv_ctl in cs_config.
+ 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
+ 3. Set base_address and total memory for each ddr controller in memory
+ controller interleaving mode.
+
+
+commit 1c9aa76bf9013069e24258f46f4687c9f98a02d6
+Date: Mon Sep 22 23:40:42 2008 -0500
+
+ 85xx: Enable interrupt and setexpr commands on Freescale 85xx boards
+
+
+commit 7c0d4a7508d252d2d7c137eeb376814132dda30f
+Date: Mon Sep 22 14:11:11 2008 -0500
+
+ 85xx: Improve flash remapping on MPC8572DS & MPC8536DS
+
+ Changing the flash from cacheable to cache-inhibited was taking a significant
+ amount of time due to the fact that we were iterating over the full 256M of
+ flash. Instead we can just flush the L1 d-cache and invalidate the i-cache.
+
+
+commit 54e091d3b603a3332c619199ca83a07e95960da4
+Date: Mon Sep 22 14:11:10 2008 -0500
+
+ 85xx: Export invalidate_{i,d}cache and add flush_dcache
+
+ Added the ability for C code to invalidate the i/d-cache's and
+ to flush the d-cache. This allows us to more efficient change mappings
+ from cache-able to cache-inhibited.
+
+
+commit 6250f0f6297c5ba9aecdea6290799a95c5d4b1da
+Date: Fri Oct 17 16:11:52 2008 +0200
+
+ mgcoge, mgsuvd: extract more common code
+
+ in ft_blob_update () for both boards was an unneccessary
+ repetition of code, which this patch moves in a common
+ function for this boards.
+
+
+commit 9e299192ca9850cf725456388042a5aa5a6f3ec7
+Date: Fri Oct 17 12:15:55 2008 +0200
+
+ mgcoge, mgsuvd: use in_*/out_* accesors
+
+
+commit a21ca95f8b9dca22714952b348e4905ac157b5cd
+Date: Fri Oct 17 13:52:51 2008 +0200
+
+ mgsuvd: fix compiler warning when using soft_i2c driver
+
+
+commit cac9cf7875c2a01d63422820ed4732a9bdf5ab7b
+Date: Fri Oct 17 12:15:05 2008 +0200
+
+ mgsuvd: fix coding style
+
+
+commit 5f4c3137f4f051787707c548133823f1656eb508
+Date: Fri Oct 17 12:13:30 2008 +0200
+
+ mgcoge: Second Flash on CS5 not on CS1
+
+
+commit 76da19df5b8e186d269f29190696bd31fb6c836b
+Date: Thu Oct 16 21:52:08 2008 -0500
+
+ Added arch_lmb_reserve to allow arch specific memory regions protection
+
+ Each architecture has different ways of determine what regions of memory
+ might not be valid to get overwritten when we boot. This provides a
+ hook to allow them to reserve any regions they care about. Currently
+ only ppc, m68k and sparc need/use this.
+
+
+commit e02d4a9904c8f36395994c0c81469d552b82f5ea
+Date: Thu Oct 16 16:32:35 2008 +0200
+
+ mgcoge: added CONFIG_FIT to support the new u-boot image format
+
+
+commit 6d0f6bcf337c5261c08fabe12982178c2c489d76
+Date: Thu Oct 16 15:01:15 2008 +0200
+
+ rename CFG_ macros to CONFIG_SYS
+
+
+commit 71edc271816ec82cf0550dd6980be2da3cc2ad9e
+Date: Mon Oct 13 14:12:55 2008 -0500
+
+ 74xx/7xx/86xx: Rename flush_data_cache to flush_dcache to match 85xx version
+
+
+commit b799cb4c0eebb0762e91e9653d8b9cc9a98440e3
+Date: Tue Sep 23 10:05:02 2008 -0500
+
+ Expose command table search for sub-commands
+
+ Sub-command can benefit from using the same table and search functions
+ that top level commands have. Expose this functionality by refactoring
+ find_cmd() and introducing find_cmd_tbl() that sub-command processing
+ can call.
+
+
+commit f7e51b27508446f8cae3927975817137979ad5e8
+Date: Wed Oct 15 09:41:33 2008 +0200
+
+ mgsuvd, mgcoge: added BOOTCOUNT feature.
+
+
+commit 8f64da7f83b553889bc08400c97047998382e9d2
+Date: Wed Oct 15 09:41:00 2008 +0200
+
+ mgcoge, mgsuvd: added support for the IVM EEprom.
+
+ The EEprom contains some Manufacturerinformation,
+ which are read from u-boot at boot time, and saved
+ in same hush shell variables.
+
+
+commit 81473f67810c4c9b7efaed8dee258ed6bc4c7983
+Date: Wed Oct 15 09:40:28 2008 +0200
+
+ hush: add showvar command for hush shell.
+
+ This new command shows the local variables defined in
+ the hush shell:
+
+ => help showvar
+ showvar
+ - print values of all hushshell variables
+ showvar name ...
+ - print value of hushshell variable 'name'
+
+ Also make the set_local_var() and unset_local_var ()
+ no longer static, so it is possible to define local
+ hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR
+ is defined, u-boot calls hush_init_var (), where
+ boardspecific code can define local hush shell
+ variables at boottime.
+
+
+commit 67b23a322848d828a5e45c0567b72762bfde7abf
+Date: Wed Oct 15 09:39:47 2008 +0200
+
+ I2C: adding new "i2c bus" Command to the I2C Subsystem.
+
+ With this Command it is possible to add new I2C Busses,
+ which are behind 1 .. n I2C Muxes. Details see README.
+
+
+commit c24853644ddd2dd2e4246b5854a93e6254a14092
+Date: Wed Oct 15 09:39:08 2008 +0200
+
+ mgcoge, mgsuvd: add board specific I2C deblocking mechanism.
+
+ As documented in doc/I2C_Edge_Conditions, adding a
+ board specific deblocking mechanism via CFG_I2C_INIT_BOARD
+ for the mgcoge and mgsuvd board.
+
+ This code was originally written by Keymile in association
+ with Anatech and Atmel in 1998. The Code toggels the SCL
+ until the SCA line goes to HIGH (max. 16 times).
+ And after this, a start condition is sent.
+
+ This is another approach to deblock the I2C Bus. The
+ soft I2C driver actually sends 9 clocks with SDA High,
+ and then a stop at the end, to deblock the I2C Bus.
+
+ Maybe we should use the approach from Keymile as
+ the new standard?
+
+
+commit 4ca107effebfbabac1057c39632105dacef95957
+Date: Wed Oct 15 09:38:38 2008 +0200
+
+ soft_i2c: Add CFG_I2C_INIT_BOARD option
+
+ This patch adds the option for a boardspecific
+ I2C deblocking mechanism for the soft i2c driver.
+
+
+commit e5e4edd9f1f76210a09c34ee835f6cff60fdbbd1
+Date: Wed Oct 15 09:38:07 2008 +0200
+
+ mgcoge, mgsuvd: add DTT (LM75) support.
+
+
+commit 8e442df438ab677057571e3ac01846bff7719bce
+Date: Wed Oct 15 09:37:34 2008 +0200
+
+ lm75: Make the LM75 MULTI_BUS compatible.
+
+
+commit 12f1678127c1df2b2878ba93c88948bedc060775
+Date: Wed Oct 15 09:37:04 2008 +0200
+
+ lm75: fix Codingstyle issues.
+
+
+commit f2202450c75ba6934b356024101500ddcde6e2a6
+Date: Wed Oct 15 09:36:33 2008 +0200
+
+ mgcoge, mgsuvd: added EEprom support.
+
+
+commit 9661bf9d120f760238b2a073b84f2baf05010057
+Date: Wed Oct 15 09:36:03 2008 +0200
+
+ mgcoge, mgsuvd: add I2C support.
+
+
+commit 98aed379586a155292efbf3209356836584b601c
+Date: Wed Oct 15 09:35:26 2008 +0200
+
+ soft_i2c: prevent compiler warnings if driver does not use CPU Pins.
+
+ This patch fixes the following warnings, when using
+ the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx
+ systems:
+
+ soft_i2c.c: In function 'send_reset':
+ soft_i2c.c:93: warning: unused variable 'immr'
+ soft_i2c.c: In function 'send_start':
+ soft_i2c.c:124: warning: unused variable 'immr'
+ soft_i2c.c: In function 'send_stop':
+ soft_i2c.c:146: warning: unused variable 'immr'
+ soft_i2c.c: In function 'send_ack':
+ soft_i2c.c:171: warning: unused variable 'immr'
+ soft_i2c.c: In function 'write_byte':
+ soft_i2c.c:196: warning: unused variable 'immr'
+ soft_i2c.c: In function 'read_byte':
+ soft_i2c.c:244: warning: unused variable 'immr'
+
+
+commit 799b784aa00cb03a352847ab9f9acdde79b72d21
+Date: Wed Oct 15 09:34:45 2008 +0200
+
+ i2c: add CONFIG_I2C_MULTI_BUS for soft_i2c and mpc8260 i2c driver.
+
+
+commit 0809ea2f4340ab2047400c7d3d3047f97987d0fd
+Date: Wed Oct 15 09:34:05 2008 +0200
+
+ mgcoge: fix Coding Style issues.
+
+
+commit e43a27c49712203fe8848a17714330623edfb2eb
+Date: Wed Oct 15 09:33:30 2008 +0200
+
+ I2C: add new command i2c reset.
+
+ If I2C Bus is blocked (see doc/I2C_Edge_Conditions),
+ it is not possible to get out of this, until the
+ complete Hardware gets a reset. This new commando
+ calls again i2c_init (and that calls i2c_init_board
+ if defined), which will deblock the I2C Bus.
+
+
+commit 86e9cdf8c415c1a9725e9dae5237ba1e7bd9f686
+Date: Wed Oct 15 09:32:25 2008 +0200
+
+ mgsuvd, mgcoge: move this 2 boards in one dir.
+
+ There are some more extensions, which are for both boards
+ and some more boards from this manufacturer will follow soon.
+
+
+commit 1c6fe6eac75d695fde677af8330c0dbe75fb6a2b
+Date: Wed Oct 8 13:44:27 2008 +0200
+
+ hwmon: Add LM63 support
+
+ This patch adds support for the National LM63 temperature
+ sensor with integrated fan control. It's used on the GDSys
+ Neo board (405EP) which will be submitted later.
+
+
+commit 7ba890bf2f2b92831420243c058951aa831119fd
+Date: Wed Oct 8 11:01:17 2008 +0900
+
+ Add Red Black Tree support
+
+ Now it's used at UBI module. Of course other modules can use it.
+ If you want to use it, please define CONFIG_RBTREE
+
+
+commit fbd85ad65dd9c98f36ed3fb12fe41f381b7d4794
+Date: Mon Oct 6 16:10:53 2008 -0400
+
+ CONFIG_EFI_PARTITION: Added support for EFI partition in cmd_ext2fs.c
+
+ Added support for CONFIG_EFI_PARTITION to ext2 commands.
+
+commit 07f3d789b9beb7ce3278c974f4d5c8f51b6ab567
+Date: Fri Sep 26 11:13:22 2008 -0400
+
+ Add support for CONFIG_EFI_PARTITION (GUID Partition Table)
+
+ The GUID (Globally Unique Identifier) Partition Table (GPT) is a part
+ of EFI. See http://en.wikipedia.org/wiki/GUID_Partition_Table
+
+ Based on linux/fs/partitions/efi.[ch]
+
+
+commit fbc87dc0546dff709b38f358e2c5d5e39c4ca374
+Date: Wed Oct 1 15:26:32 2008 +0200
+
+ FIT: output image load address for type 'firmware', fix message while there
+
+ Now that the auto-update feature uses the 'firmware' type for updates, it is
+ useful to inspect the load address of such images.
+
+
+commit 4bae90904b69ce3deb9f7c334ef12ed74e18a275
+Date: Wed Oct 1 15:26:31 2008 +0200
+
+ Automatic software update from TFTP server
+
+ The auto-update feature allows to automatically download software updates
+ from a TFTP server and store them in Flash memory during boot. Updates are
+ contained in a FIT file and protected with SHA-1 checksum.
+
+ More detailed description can be found in doc/README.update.
+
+
+commit 3f0cf51dabacc2724731c5079a60ea989103bb8f
+Date: Wed Oct 1 15:26:27 2008 +0200
+
+ flash: factor out adjusting of Flash address to the end of sector
+
+ The upcoming automatic update feature needs the ability to adjust an
+ address within Flash to the end of its respective sector. Factor out
+ this functionality to a new function flash_sect_roundb().
+
+
+commit e83cc06375ac2bea0830c6ed0f9d8fdc3c1b27d5
+Date: Wed Oct 1 15:26:29 2008 +0200
+
+ net: Make TFTP server timeout configurable
+
+ There are two aspects of a TFTP transfer involving timeouts:
+ 1. timeout waiting for initial server reply after sending RRQ
+ 2. timeouts while transferring actual data from the server
+
+ Since the upcoming auto-update feature attempts a TFTP download during each
+ boot, it is undesirable to have a long delay when the TFTP server is not
+ available. Thus, this commit makes the server timeout (1.) configurable by two
+ global variables:
+
+ TftpRRQTimeoutMSecs
+ TftpRRQTimeoutCountMax
+
+ TftpRRQTimeoutMSecs overrides default timeout when trying to connect to a TFTP
+ server, TftpRRQTimeoutCountMax overrides default number of connection retries.
+ The total delay when trying to download a file from a non-existing TFTP server
+ is TftpRRQTimeoutMSecs x TftpRRQTimeoutCountMax milliseconds.
+
+ Timeouts during file transfers (2.) are unaffected.
+
+
+commit 49f3bdbba8071f56d950a9498b6cdb998b35340a
+Date: Wed Oct 1 15:26:28 2008 +0200
+
+ net: express the first argument to NetSetTimeout() in milliseconds
+
+ Enforce millisecond semantics of the first argument to NetSetTimeout() --
+ the change is transparent for well-behaving boards (CFG_HZ == 1000 and
+ get_timer() countiing in milliseconds).
+
+ Rationale for this patch is to enable millisecond granularity for
+ network-related timeouts, which is needed for the upcoming automatic
+ software update feature.
+
+ Summary of changes:
+ - do not scale the first argument to NetSetTimeout() by CFG_HZ
+ - change timeout values used in the networking code to milliseconds
+
+
+commit c68a05feeb88de9fcf158e67ff6423c4cc988f88
+Date: Mon Sep 29 18:28:23 2008 -0400
+
+ Adds two more ethernet interface to 83xx
+
+ Added as a convenience for other platforms that uses MPC8360 (has 8 UCC).
+ Six eth interface is chosen because the platform I am using combines
+ UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth.
+
+
+commit 41410eee472b0f42e03a77f961bbc55ef58f3c01
+Date: Wed Sep 24 11:42:12 2008 -0500
+
+ Change UEC PHY interface to RGMII on MPC8568MDS
+
+ Change UEC phy interface from GMII to RGMII on MPC8568MDS board
+
+ Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed,
+ but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable.
+
+ Now both UEC1 and UEC2 can work properly under u-boot.
+
+ It is also in consistent with the kernel setting for 8568 UEC phy interface.
+
+
+commit b59b16ca24bc7e77ec113021a6d77b9b32fcf192
+Date: Sat Oct 18 21:30:31 2008 +0200
+
+ Prepare v2008.10 release: update CHANGELOG & Makefile
+
+
+commit f7a35a60cf45491871a5c28e9ad24db005487857
+Date: Fri Oct 17 18:24:06 2008 +0200
+
+ mgcoge: add redundant environment sector
+
+
+commit c2537ee85954af9d036b18b644f3e18d837bf4a5
+Date: Fri Oct 17 18:23:27 2008 +0200
+
+ mgsuvd: update size of environment
+
+
+commit fa7b1c07e9371aea8f87ee6d3c2ea5564bd8cc8d
+Date: Thu Oct 16 13:38:00 2008 -0500
+
+ 83xx NAND boot: wait for LTESR[CC]
+
+ At least some revisions of the 8313, and possibly other chips, do not
+ wait for all pages of the initial 4K NAND region to be loaded before
+ beginning execution; thus, we wait for it before branching out of the
+ first NAND page.
+
+ This fixes warm reset problems when booting from NAND on 8313erdb.
+
+
+commit bf29e0ea0af03d593c64614136acc723a7a022a2
+Date: Fri Oct 17 12:54:18 2008 +0200
+
+ ppc4xx: PPC44x MQ initialization
+
+ Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
+ values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
+ dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
+
+ Previously the appropriate initialization had been made in Linux, by the
+ ppc440spe ADMA driver, which is wrong because modifying the MQ configuration
+ registers after normal operation has begun is not supported and could
+ have unpredictable results.
+
+ Comment from Stefan: This patch doesn't change the resulting value of the
+ MQ registers. It explicitly sets/clears all bits to the desired state which
+ better documents the resulting register value instead of relying on pre-set
+ default values.
+
+
+commit ec081c2c190148b374e86a795fb6b1c49caeb549
+Date: Fri Oct 17 12:51:46 2008 +0200
+
+ ppc4xx: PPC44x MQ initialization
+
+ Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
+ values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
+ dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
+
+ Previously the appropriate initialization had been made in Linux, by the
+ ppc440spe ADMA driver, which is wrong because modifying the MQ configuration
+ registers after normal operation has begun is not supported and could
+ have unpredictable results.
+
+ Comment from Stefan: This patch doesn't change the resulting value of the
+ MQ registers. It explicitly sets/clears all bits to the desired state which
+ better documents the resulting register value instead of relying on pre-set
+ default values.
+
+
+commit f7d190b1c0b3ab7fc53074ad2862f7de99de37ff
+Date: Thu Oct 16 21:58:50 2008 -0500
+
+ 85xx: Using proper I2C source clock divider for MPC8544
+
+ The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being
+ bit 26, instead it should be bit 28. This caused in incorrect
+ interpretation of the i2c_clk which is the same as the SEC clk on
+ MPC8544. The SEC clk is controlled by cfg_sec_freq that is reported
+ in PORDEVSR2.
+
+
+commit 42653b826adb319a1df06e24ef26096b2a5d9d2a
+Date: Thu Oct 16 21:58:49 2008 -0500
+
+ Revert "85xx: Using proper I2C source clock divider for MPC8544"
+
+ This reverts commit dffd2446fb041f38ef034b0fcf41e51e5e489159.
+
+ The fix introduced by this patch is not correct. The problem is
+ that the documentation is not correct for the MPC8544 with regards
+ to which bit in PORDEVSR2 is for the SEC_CFG.
+
+
+commit 2179c4766bffeece98e5e92040629a96c97e230c
+Date: Wed Oct 15 10:19:41 2008 -0500
+
+ 85xx: Fix compile warning
+
+ mpc8536ds.c: In function 'is_sata_supported':
+ mpc8536ds.c:614: warning: unused variable 'devdisr'
+
+
+commit 9029b68f3f81b3013044f167ea025e836e6c8c0e
+Date: Wed Oct 15 10:40:24 2008 +0800
+
+ Fix the function conflict in x86emu when DEBUG is on
+
+ The function parse_line() in common/main.c was exposed globally by commit
+ 6636b62a6efc7f14e6e788788631ae7a7fca4537, Result in conflict with the same
+ name funciton in drivers/bios_emulator/x86emu/debug.c when define the DEBUG.
+ This patch fix this by renaming the function in the debug.c file.
+
+
+commit b4dbacf69a669a17487054552fc2761149dd6767
+Date: Wed Oct 15 15:50:45 2008 +0200
+
+ Coding Style cleanup, update CHANGELOG, prepare 2008.10-rc3
+
+
+commit 374b9038293d01d8744a46af9b7854a6fd99b228
+Date: Wed Oct 15 09:51:19 2008 +0200
+
+ Fix compiler warning in lib_ppc/board.c
+
+ Fix compiler warning introduced by commit 0f8cbc18
+
+
+commit 9724555755a6f1066636481b41f7094e0ce93a69
+Date: Thu Oct 9 10:29:14 2008 +0530
+
+ mpc83xx: wait till UPM completes the write to array
+
+ Reference manual states that MxMR[MAD] increment is the indication
+ of write to UPM array is complete. Honour that. Also, make the dummy
+ write explicit.
+
+ also fix the comment.
+
+
+commit 03e2dbb18e858e2f7a6aaa437f290f3690d02d51
+Date: Wed Oct 8 18:12:20 2008 -0500
+
+ Remove unwanted ';' at end of define.
+
+ Currently this is not creating any problem. But it will result
+ in compilation error when used as below.
+
+ printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2);
+
+
+ continuation of the theme based on git grep "^#define CFG_.*;$" include/
+
+
+commit b2934a56650e9a6c54432f9ce6dc36757967385e
+Date: Mon Oct 6 10:53:59 2008 -0400
+
+ ARM DaVinci: Add maintainer information for SFFSDR board.
+
+
+commit 12c6670f873ed632c264a6f3e8bf1297d5c3ddbc
+Date: Sat Oct 4 19:26:16 2008 +0200
+
+ api: fix type mismatch
+
+ This patch fixes a type mismatch and thus removes a compiler
+ warning when compiling with CONFIG_API on powerpc.
+
+
+commit 9bc2e4eee3bcb8e63847d7a733e0c607807d6141
+Date: Wed Oct 1 12:25:04 2008 -0500
+
+ cmd_i2c: Fix help for CONFIG_I2C_CMD_TREE && !CONFIG_I2C_MULTI_BUS
+
+ Original code displayed:
+ => help i2c
+ i2c i2c speed [speed] - show or set I2C bus speed
+ i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device
+ ...
+
+
+commit a0b1b610e980e253d4c2519ee15bd0937c3f8be1
+Date: Tue Oct 14 22:13:41 2008 +0200
+
+ Update CHANGELOG
+
+
+commit 0f8cbc1829d9c7d9616fd29b366a99d037facdcd
+Date: Fri Oct 10 11:41:01 2008 +0800
+
+ Do not init SATA when disabled on 8536DS.
+
+ SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
+ driver still try to access the SATA registers, the cpu will hangup.
+ This patch try to fix this by reading the serdes status before the SATA
+ initialize.
+
+
+commit 9dbc366744960013965fce8851035b6141f3b3ae
+Date: Fri Oct 10 10:23:22 2008 +0200
+
+ The PIPE_INTERRUPT flag is used wrong
+
+ At a lot of places in the code the PIPE_INTERRUPT flags and friends
+ are used wrong. The wrong bits are compared to this flag resulting
+ in wrong conditions. Also there are macros that should be used for
+ PIPE_* flags.
+ This patch tries to fix them all, however, I was not able to test the
+ changes, because I do not have any of these boards.
+
+ Review required!
+
+
+commit 48867208444cb2a82e2af9c3249e90b7ed4a1751
+Date: Fri Oct 10 10:23:21 2008 +0200
+
+ fix USB initialisation procedure
+
+ The max packet size is encoded as 0,1,2,3 for 8,16,32,64 bytes.
+ At some places directly 8,16,32,64 was used instead of the encoded
+ value. Made a enum for the options to make this more clear and to help
+ preventing similar errors in the future.
+
+ After fixing this bug it became clear that another bug existed where
+ the 'pipe' is and-ed with PIPE_* flags, where it should have been
+ 'usb_pipetype(pipe)', or even better usb_pipeint(pipe).
+
+ Also removed the triple 'get_device_descriptor' sequence, it has no use,
+ and Windows nor Linux behaves that way.
+ There is also a poll going on with a timeout when usb_control_msg() fails.
+ However, the poll is useless, because the flag will never be set on a error,
+ because there is no code that runs in a parallel that can set this flag.
+ Changed this to something more logical.
+
+ Tested on AT91SAM9261ek and compared the flow on the USB bus to what
+ Linux is doing. There is no difference anymore in the early initialisation
+ sequence.
+
+
+commit ec4d8c1c1d94a790c1473ae8aace282b817c3123
+Date: Fri Oct 3 00:03:55 2008 +0400
+
+ fsl_diu: fix alignment error that caused malloc corruption
+
+ When aligning malloc()ed screen_base, invalid offset was added.
+ This not only caused misaligned result (which did not cause hardware
+ misbehaviour), but - worse - caused screen_base + smem_len to
+ be out of malloc()ed space, which in turn caused breakage of
+ futher malloc()/free() operation.
+
+ This patch fixes screen_base alignment.
+
+ Also this patch makes memset() that cleans framebuffer to be executed
+ on first initialization of diu, not only on re-initialization. It looks
+ correct to clean the framebuffer instead of displaying random garbage;
+ I believe that was disabled only because that memset caused breakage
+ of malloc/free described above - which no longer happens with the fix
+ described above.
+
+
+commit 3d0ea3110f3431b6c2aee882784f39f97b20bce9
+Date: Wed Sep 24 10:29:37 2008 +0200
+
+ api: Fix building with CONFIG_API
+
+ This patch fixes building with CONFIG_API and CONFIG_USB_STORAGE.
+
+ USB_MAX_STOR_DEV is defined in include/usb.h, but
+ needed in api/api_storage.c.
+
+
+commit abbb90666d5ef2f500ebbedbb80ff60adc56b043
+Date: Tue Sep 23 12:39:40 2008 -0500
+
+ Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references
+
+
+commit 81e612014c40c922ec35488d17c504d4e9286f06
+Date: Tue Sep 23 12:38:42 2008 -0500
+
+ Remove CFG_EEPROM_PAGE* dependencies for temperature sensors
+
+ The checks for CFG_EEPROM_PAGE_WRITE_ENABLE and
+ CFG_EEPROM_PAGE_WRITE_BITS in various temperature
+ sensor drivers are not necessary
+
+
+commit c46980f6d2135ade345dadc1fb1f1f4c8bbf255a
+Date: Tue Oct 14 07:04:38 2008 -0400
+
+ cmd_spi: remove broken signed casting for display
+
+ Since we're working with unsigned data, you can't apply a signed pointer
+ cast and then attempt to print the result. Otherwise you get wrong output
+ when the sign bit is set like "0xFF" incorrectly extended to "0xFFFFFFFF".
+
+
+commit d5fd0b49210c941de8a1fce3947ace92243ab5ca
+Date: Tue Oct 14 07:05:24 2008 -0400
+
+ strings cmd: drop old CONFIG_CFG_STRINGS define
+
+ We don't need CONFIG_CFG_STRINGS anymore now that we have the define
+ CONFIG_CMD_STRINGS and Makefile control.
+
+
+commit fecb5ade3b37f62981f2b05b621005850173aaa9
+Date: Fri Sep 19 17:32:49 2008 +0800
+
+ Fix the NAND size overflow issue.
+
+ When the total size of all NAND devices exceeds 4 GiB, the size will
+ overflow. This patch tries to fix this.
+
+ Note that we still have a problem when a single NAND device is bigger
+ than 4 GiB: then the overflow would actually happen earlier, i. e.
+ when storing the size in nand_info[].size, as nand_info[].size is an
+ "u_int32_t".
+
+
+commit 30f574717277238b9014b8136c90eea77196490f
+Date: Wed Jul 9 11:01:37 2008 +0800
+
+ AX88180: new gigabit network driver
+
+
+commit c9d6b6925344740ca1db2f8a6bab7921ff820de3
+Date: Tue Aug 19 16:07:03 2008 +0200
+
+ enable 10/100M at VSC8601 at tsec driver
+
+ Currently VSC8601 doesn't link with 10/100M partners if the
+ EEPROM/Strapping is not set up.
+ Setting the auto-neg register fixes this.
+
+
+commit 702c85b0e876d587c11acdbb55738ee52acd54f4
+Date: Tue Sep 30 15:02:53 2008 +0900
+
+ net: ne2000: Divided a function of NE2000 driver
+
+ get_prom function was used __attriute__ , but it is not enable.
+ ax88796.o does not do link besides ne2000.o. When ld is carried
+ out, get_prom function of ax88796.c is ignored.
+ This problem is a thing by specifications of ld.
+ I checked and test this patch on SuperH and MIPS.
+
+
+commit 05c7e9070fe4d751e029fd9524bfbbc93cbb1393
+Date: Tue Oct 14 11:10:59 2008 +0900
+
+ sh: rsk7203: Add smc911x driver support to board config file
+
+
+commit cae6f909baf86357b3c0bd01acfc414348c4d175
+Date: Thu Oct 9 13:54:33 2008 +0900
+
+ sh: Fix cannot execute a stand-alone application
+
+ Address calculated in EXPORT_FUNC in SuperH was wrong, I revised it.
+
+
+commit 6df0efd5c86ca1689deeb2738b46b7d83ce228ef
+Date: Wed Oct 8 23:38:00 2008 -0500
+
+ fsl_pci_init do not scan bus when configured as an end-point
+
+
+commit 6f099bbac1ba5dfb46ee7ad29dc53713f0501ba5
+Date: Tue Sep 16 17:07:53 2008 -0400
+
+ ARM DaVinci: Remove redundant setting of GD_FLG_RELOC for sffsdr board.
+
+ This is no longer necessary now that the GD_FLG_RELOC flag is set for
+ all ARM boards.
+
+
+commit d977a57356657ba241256231efca32828a5822f9
+Date: Sat Sep 13 10:04:32 2008 +0200
+
+ Fix lzma uncompress call (image_start wrongly used instead image_len)
+
+
+commit 392438406041415fe64ab8748ec5ab5ad01d1cf7
+Date: Thu Aug 28 14:09:15 2008 -0700
+
+ mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ This is needed in unlock_ram_in_cache() because it is called from C and
+ will corrupt the small data area anchor that is kept in R2.
+
+ lock_ram_in_cache() is modified similarly as good coding practice, but
+ is not called from C.
+
+
+commit 5c7cbcd34d0ee566875a4fd0f2a3e5a62bba921c
+Date: Tue Aug 19 15:05:34 2008 -0500
+
+ 86xx: remove redudant code with lib_ppc/interrupts.c
+
+ For some reason we duplicated the majority of code in lib_ppc/interrupts.c
+ Not know how that happened, but there is no good reason for it.
+
+ Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
+ they exist.
+
+
+commit 0d01f66d235118515b5086b88f82498bc0695d6a
+Date: Thu Oct 9 01:26:36 2008 -0500
+
+ CFI: cfi_flash write fix for AMD legacy
+
+ The flash_unlock_seq requires a sector for AMD_LEGACY.
+ Fix a retcode check typeo.
+
+
+commit 542b385a620a1783454a00424930e51895f45073
+Date: Tue Oct 7 13:13:10 2008 +0200
+
+ ppc4xx: Fix USB 2.0 phy reset sequence
+
+ This patch fixes USB 2.0 communication issues on some DU440 boards.
+
+
+commit df8c1ce11114c2260dedb5547281945f7db8fa5c
+Date: Tue Oct 7 13:13:09 2008 +0200
+
+ ppc4xx: Add strapping mode for 667MHz CPU frequency on DU440 board
+
+
+commit 6a133d6a00b1fc7b9257cd5925d8cb67f75ecda2
+Date: Tue Oct 7 13:13:08 2008 +0200
+
+ ppc4xx: Fix DU440 GPIO configuration
+
+
+commit 35dd025c70fcc4389317db2f2a9d14795172137d
+Date: Tue Oct 7 13:13:07 2008 +0200
+
+ ppc4xx: Update DU440 config
+
+
+commit f3bf9273939ffe1a60a32a2eef909097f15df56b
+Date: Wed Oct 8 15:36:39 2008 -0500
+
+ MPC8572DS: Fix compile warnings
+
+ Commit 445a7b38308eb05b41de74165b20855db58c7ee5 introduced the following
+ compile warnings:
+
+ cmd_i2c.c:112: warning: missing braces around initializer
+ cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]')
+
+
+commit dffd2446fb041f38ef034b0fcf41e51e5e489159
+Date: Tue Sep 30 10:55:57 2008 +0200
+
+ 85xx: Using proper I2C source clock divider for MPC8544
+
+ Measurements with our MPC8544 board showed that the I2C bus frequency
+ is wrong by a factor of 1.5. Obviously, the interpretation of the
+ MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
+ correct. There seems to be an error in the 8544 RM.
+
+
+commit e46c7bfb8bc3c304cedd20f7a365d6e78d7eaf17
+Date: Wed Oct 8 13:41:30 2008 +0200
+
+ FSL: Fix get_cpu_board_revision() return value.
+
+ get_cpu_board_revision() returned board revision based on information stored
+ in global static struct eeprom. It should instead use one from local struct
+ board_eeprom, to which the data is actually read from EEPROM. The bug led to
+ system hang after printing L1 cache information on U-Boot startup. The problem
+ was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
+ boards using CFG_I2C_EEPROM_CCID.
+
+ The change has been successfully tested on MPC8555CDS system.
+
+
+commit 747f316cca484ed627a97dd3391febabce384186
+Date: Tue Sep 30 20:08:49 2008 +0200
+
+ update uImage FIT multi documentation
+
+
+commit 77a0355f60b801f232ce0a5bfbe95331fa3b6bc0
+Date: Tue Sep 30 20:08:36 2008 +0200
+
+ move README.imx31 to doc/ and merge with README.mx31
+
+
+commit 1ed7a7f0f571b13d46530f8f8b9aff3957f15a96
+Date: Thu Sep 25 20:54:37 2008 +0200
+
+ i.MX31: switch to CFG_HZ=1000
+
+ Switch to the standard CFG_HZ=1000 value, while at it, minor white-space
+ cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads,
+ provides 2% or 0.4% precision depending on the
+ CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s
+ boot-delay.
+
+
+commit f41b144c11341b571eab7dcef6c4b8e03c92d2b2
+Date: Wed Oct 8 18:58:58 2008 +0200
+
+ Fix bug: in arch-arm, env_get_char dose not work fine
+
+ due to the arm implementation which supposed that U-Boot is in RAM
+ when we jump to start_armboot
+
+
+commit f8a00dea841d5d75de1f8e8107e90ee1beeddf5f
+Date: Mon Oct 6 10:16:13 2008 -0700
+
+ ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
+
+ After changing SDRAM_CLKTR phase value rerun the memory preload
+ initialization sequence (INITPLR) to reset and relock the memory
+ DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
+ adjustment effects the phase relationship of the internal, to the
+ PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
+
+
+commit 5297246bbaa9943c0da1ec2e717b72e4ab6b830e
+Date: Fri Oct 3 11:48:03 2008 -0400
+
+ Remove redundant #define for MPC8536DS
+
+
+commit 445a7b38308eb05b41de74165b20855db58c7ee5
+Date: Fri Oct 3 11:47:30 2008 -0400
+
+ Add ID EEPROM support for MPC8572DS
+
+ The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for
+ system information like mac addresses etc. This patch enables it.
+
+
+commit 1f3ba317a5c5f3a7aabf580fddc211f4bb5a4540
+Date: Fri Oct 3 11:46:59 2008 -0400
+
+ Minor fixes for I2C address on MPC8572DS
+
+ MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1
+ according to the board spec, and adds the 2nd i2c bus offset.
+
+
+commit c0391111c33c22fabeddf8f4ca801ec7645b4f5c
+Date: Sat Sep 27 14:40:57 2008 +0800
+
+ Fix the incorrect DDR clk freq reporting on 8536DS
+
+ On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111),
+ The display is still sync mode DDR freq. This patch try to fix
+ this. The display DDR freq is now the actual freq in both
+ sync and async mode.
+
+
+commit bac6a1d1fa1cd80aa57881fa9c2152b853cd0ed4
+Date: Tue Oct 7 10:28:46 2008 -0500
+
+ 85xx: Remove setting of *cache-line-size in device trees
+
+ ePAPR says if the *cache-block-size is the same as *cache-line-size
+ than we don't need the *cache-line-size property.
+
+
+commit cd3cb0d9269d155276b00207e3816a9347fd1c92
+Date: Sat Oct 4 07:56:06 2008 -0400
+
+ libfdt: Fix error in documentation for fdt_get_alias_namelen()
+
+ Oops, screwed up the function name in the documenting comment for this
+ function. Trivial correction in this patch.
+
+
+commit 9a6cf73a88ddab2e1ac39088f2806177982cc62c
+Date: Wed Aug 20 16:55:14 2008 +1000
+
+ libfdt: Add function to explicitly expand aliases
+
+ Kumar has already added alias expansion to fdt_path_offset().
+ However, in some circumstances it may be convenient for the user of
+ libfdt to explicitly get the string expansion of an alias. This patch
+ adds a function to do this, fdt_get_alias(), and uses it to implement
+ fdt_path_offset().
+
+
+commit 2215987e100d2a841ae6d48a7cc9bb83fcf22737
+Date: Thu Oct 2 01:55:38 2008 -0400
+
+ cfi_flash: do not reset flash when probe fails
+
+ The CFI flash driver starts at flash_init() which calls down into
+ flash_get_size(). This starts by calling flash_detect_cfi(). If said
+ function fails, flash_get_size() finishes by attempting to reset the
+ flash. Unfortunately, it does this with an info->portwidth set to 0x10
+ which filters down into flash_make_cmd() and that happily smashes the
+ stack by sticking info->portwidth bytes into a cfiword_t variable that
+ lives on the stack. On a 64bit system you probably won't notice, but
+ killing the last 8 bytes on a 32bit system usually leads to a corrupt
+ return address. Which is what happens on a Blackfin system.
+
+
+commit 3e38577208e4256956bc33bb8bcd0a6b6fab55c3
+Date: Fri Sep 26 17:03:26 2008 +0200
+
+ fdt: Overwrite /chosen node in bootm if it already exists in the dtb
+
+ Set force parameter in fdt_chosen() call in do_bootm_linux() call.
+ Without this, the chosen node is not overwritten if it already
+ exists.
+
+
+commit 741a6d010d09b5bafca8e4cdfb6b2f8a2c07994d
+Date: Thu Sep 25 11:02:17 2008 -0500
+
+ Fix an overflow case in fdt_offset_ptr() detected by GCC 4.3.
+
+ Using Gcc 4.3 detected this problem:
+
+ ../dtc/libfdt/fdt.c: In function 'fdt_next_tag':
+ ../dtc/libfdt/fdt.c:82: error: assuming signed overflow does not
+ occur when assuming that (X + c) < X is always false
+
+ To fix the problem, treat the offset as an unsigned int.
+
+ The problem report and proposed fix were provided
+
+
+commit bbdbc7cb3abefda5bd998edbcf0508fe6256327d
+Date: Fri Aug 29 14:19:13 2008 +1000
+
+ libfdt: Fix bugs in fdt_get_path()
+
+ The current implementation of fdt_get_path() has a couple of bugs,
+ fixed by this patch.
+
+ First, contrary to its documentation, on success it returns the length
+ of the node's path, rather than 0. The testcase is correspondingly
+ wrong, and the patch fixes this as well.
+
+ Second, in some circumstances, it will return -FDT_ERR_BADOFFSET
+ instead of -FDT_ERR_NOSPACE when given insufficient buffer space.
+ Specifically this happens when there is insufficient space even to
+ hold the path's second last component. This behaviour is corrected,
+ and the testcase updated to check it.
+
+
+commit 33af3e6656e84660d397b5dd95abab2dccc36f83
+Date: Wed Oct 1 12:34:58 2008 +0200
+
+ TQM5200: enable support for ATAPI devices
+
+
+commit d13ff2358ff8c384f52eaf46f5d60258acf96ea6
+Date: Mon Sep 15 05:48:25 2008 +0200
+
+ Revert "ARM: set GD_FLG_RELOC for boards skipping relocation to RAM"
+
+ we need this due to the arm implementation which supposed that U-Boot
+ is in RAM when we jump to start_armboot
+
+ This reverts commit f96b44cef897bd372beb86dde1b33637c119d84d.
+ in order to do it for all arm board
+
+
+commit 7fd0bea2e4a78eab7e6693140940f9f9a0009bc2
+Date: Wed Sep 24 08:46:25 2008 -0500
+
+ mpc83xx: don't disable autoboot
+
+ bootdelay set to -1 'permanently' disables autobooting, even if
+ bootcmd is specified. Change to a positive value to allow
+ autobooting when a bootcmd is set.
+
+
+commit 2fb29c520c42b7bfef33ea3fd1527eba64099164
+Date: Wed Sep 24 10:42:15 2008 +0900
+
+ mpc83xx: Fix typo in include/mpc83xx.h
+
+ Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X
+
+
+commit 162c41c03179727a1d14262f703c9a8bc40231fa
+Date: Tue Sep 23 09:38:49 2008 -0500
+
+ mpc83xx: add h/w flash protection to board configs
+
+ the operating system may leave flash in a h/w locked state after writing.
+ This allows u-boot to continue to write flash by enabling h/w unlocking
+ by default.
+
+
+commit d26154c9a692586b66eb6d1f8e1b67c75e40ea70
+Date: Thu Sep 11 21:35:36 2008 +0400
+
+ mpc83xx: spd_sdram: fix ddr sdram base address assignment bug
+
+ The spd_dram code shifts the base address, then masks 20 bits, but
+ forgets to shift the base address back. Fix this by just masking the
+ base address correctly.
+
+ Found this bug while trying to relocate a DDR memory at the base != 0.
+
+
+commit 8fd4166c467a46773f80208bda1ec3b4757747bc
+Date: Mon Sep 22 16:10:43 2008 +0200
+
+ ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixup
+
+ Depending on the configuration jumper "SATA SELECT", U-Boot disabled
+ either one PCIe node or the SATA node in the device tree blob. This
+ patch removes the unnecessary and even confusing warning, when the node
+ is not found at all.
+
+
+commit 6e24a1eb1490aa043770bcf0061ac1fad0864fd9
+Date: Fri Sep 19 13:30:06 2008 +0200
+
+ Add missing device types to dev_print() in part.c
+
+
+commit 5fdc215f0b351b0c36cc3f8a0fa5850f24454bed
+Date: Mon Sep 22 22:23:06 2008 +0200
+
+ Fix DPRAM memory leak when CFG_ALLOC_DPRAM is defined, which
+ eventually leads to a machine check. This change assures that DPRAM
+ is allocated only once in that case.
+
+
+commit a07faf7b9ad5a86763a577c79922c4ff9a70ef23
+Date: Wed Sep 17 17:57:34 2008 +0200
+
+ Fix Spartan-3 definitions.
+
+ A few Spartan-3 definitions erroneously use Spartan-3E size
+ constants. This patch fixes them.
+
+
+commit 28113e1f0da4146b823ffce37680d31d5685a60b
+Date: Wed Sep 17 17:41:58 2008 +0200
+
+ Remove duplicate Spartan-3E definition.
+
+
+commit 5c65ecf7cd94df250b295621f3b24135cbcfe579
+Date: Wed Sep 17 13:46:17 2008 +0200
+
+ socrates: change default mtest address range
+
+ Running mtest command on socrates without specifying
+ an address range crashes the board. This patch changes
+ default mtest address range to prevent this behavior.
+
+
+commit d666b2d59674b5e002c0821b7ab83ec3ff90d670
+Date: Wed Sep 17 12:34:45 2008 +0200
+
+ socrates: fix crash after relocation
+
+ Currently U-Boot crashes after relocation to RAM.
+ Changing the CPO value of the DDR SDRAM TIMING_CFG_2
+ register to READ_LAT + 1 (to the value it was before
+ conversion of socrates to new DDR code) fixes the
+ problem.
+
+
+commit 562788b0a303f3528b920d81f547f5ca77ba528e
+Date: Wed Sep 17 11:45:51 2008 +0200
+
+ socrates: fix SPD EEPROM address
+
+ Commit be0bd8234b9777ecd63c4c686f72af070d886517
+ changed SPD EEPROM address to 0x51 and DDR SDRAM
+ detection stopped working. Change this address
+ back to 0x50.
+
+
+commit 023824549a370bd185d7129d9a6c86f9be7b86a8
+Date: Mon Sep 22 11:06:50 2008 +0200
+
+ Revert "ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)"
+
+ This reverts commit 3eec160a3a405b29ce9c06920f6427b9047dd8a8.
+
+
+commit e58c41e26cf3c8accd60311be579f452e368e97e
+Date: Thu Sep 18 20:13:08 2008 +0900
+
+ usb: Fix compile warning of r8a66597-hcd
+
+
+commit b5d10a13525c07ec6374adf840d7c87553b5f189
+Date: Thu Sep 18 19:34:36 2008 +0900
+
+ sh: Fix compile warning
+
+
+commit 4a065abf926f128beb36d93449defa0d690e7fef
+Date: Thu Sep 18 19:04:26 2008 +0900
+
+ sh: Add support watchdog for SH4A core
+
+ Add support watchdog for SH4A core (SH7763, SH7780 and SH7785).
+ And fix some compile warning.
+
+
+commit a03c09c5fdb8430fe2ae6a03f88a0cf7bcc0aa57
+Date: Wed Sep 17 11:45:26 2008 +0900
+
+ sh: Fix typo in SH serial driver
+
+
+commit 6b44a439215ba7c63f666f8099213ea4f05f2b07
+Date: Wed Sep 17 11:08:36 2008 +0900
+
+ sh: Add support any page size and empty_zero_page to SH Linux uImage
+
+ Old U-Boot supported 4KB page size only. If this version, Linux
+ kernel can not get command line from U-Boot.
+ SH Linux kernel can change page size and empty_zero_page.
+ This patch support this function and fix promlem.
+
+
+commit ce9f99ddb59628f41dc534e892368a7d66dfc774
+Date: Thu Aug 28 13:40:52 2008 +0900
+
+ sh: rsk7203: Add support pkt_data_pull and pkt_data_push function
+
+ Add function of smc911x, pkt_data_pull and pkt_data_push.
+
+
+commit dd820b03a2f45e86e7960e26729a3b58e3dda44a
+Date: Thu Sep 18 13:57:32 2008 +0200
+
+ ADS5121: fix typo in "rootpath" default setting
+
+
+commit c9e8436b10cca53fca4904ecbadcd6231ad72c38
+Date: Tue Sep 16 14:55:44 2008 +0200
+
+ USB layer of U-Boot causes USB protocol errors while using USB memory sticks
+
+ There are several differences between Linux, Windows and U-boot for initialising the
+ USB devices. While analysing the behaviour of U-boot it turned out that U-boot does
+ things really different, and some are wrong (compared to the USB standard).
+
+ This patch fixes some errors:
+ * The NEW_init procedure that was already in the code is good, while the old procedure
+ is wrong. See code comments for more info.
+ * On a Control request the data returned by the device can be more than 8 bytes, while
+ the host limits it to 8 bytes. This caused the host to generate a DataOverrun error.
+ This results in a lot of USB sticks not being recognised, and the transmission ended
+ frequently with a CTL:TIMEOUT Error.
+ * Added a flag CONFIG_LEGACY_USB_INIT_SEQ to allow users to use the old init procedure.
+
+
+commit 6f5794a6f78b313231256958fd73673c6aacc116
+Date: Tue Sep 16 14:55:43 2008 +0200
+
+ Refactoring parts of the common USB OHCI code
+
+ This patch refactors some large routines of the USB OHCI code by
+ making some routines smaller and more readable which helps
+ debugging and understanding the code. (Makes the code looks
+ somewhat more like the Linux implementation.)
+
+ Also made entire file compliant to Linux Coding Rules (checkpatch.pl compliant)
+
+
+commit be19d324edc1a1d7f393d24e10d164cd94c91a00
+Date: Tue Sep 16 14:55:42 2008 +0200
+
+ Fix for USB sticks not working on ARM while using GCC 4.x compilers
+
+ The GCC-compiler makes an optimisation error while optimising the routine
+ usb_set_maxpacket(). This should be fixed in the compiler in the first place,
+ but there lots of compilers out there that makes this error, that it is
+ probably wiser to workaround it in U-boot itself.
+
+ What happens is that the register r3 is used as loop-counter 'i', but gets
+ overwritten later on. From there it starts using register r3 for several other
+ things and the assembler code is becoming a big mess. This is clearly a compiler bug.
+
+ This error occurs on at least several versions of Code Sourcery Lite compilers
+ for ARM. Like the Edition 2008q1, and 2008q3, It has also been seen on other
+ compilers, while compiling for armv4t, or armv5te with Os, O1 and O2.
+
+ We work around it by splitting up this routine in 2 parts, and making sure that
+ the split out part is NOT inlined any longer. This will make GCC spit out assembler
+ that do not show this problem. Another possibility is to adapt the Makefile to stop
+ optimisation for the complete file. I think this solution is nicer.
+
+
+commit 87b4ef560cf2da4ccc9e59711ad1ff7fafe96670
+Date: Wed Sep 17 10:17:55 2008 +0200
+
+ Coding style cleanup; update CHANEGLOG
+
+
+commit 3eec160a3a405b29ce9c06920f6427b9047dd8a8
+Date: Tue Sep 16 06:59:13 2008 -0700
+
+ ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)
+
+
+commit ce47eb402c5e29a025399dc282246414fc492940
+Date: Tue Sep 16 10:04:47 2008 -0500
+
+ Support for multiple SGMII/TBI interfaces for TSEC ethernet
+
+ Fix TBI PHY accesses to use the proper offset in CPU register space. The
+ previous code would incorrectly access the TBI PHY by reading/writing to CPU
+ register space at the same location as would be used to access external PHYs.
+
+
+commit 7c803be2eb3cae245dedda438776e08fb122250f
+Date: Tue Sep 16 18:02:19 2008 +0200
+
+ TQM8xx: Fix CFI flash driver support for all TQM8xx based boards
+
+ After switching to using the CFI flash driver, the correct remapping
+ of the flash banks was forgotten.
+
+ Also, some boards were not adapted, and the old legacy flash driver
+ was not removed yet.
+
+
+commit c0d2f87d6c450128b88e73eea715fa3654f65b6c
+Date: Sun Sep 14 00:59:35 2008 +0200
+
+ Prepare v2008.10-rc2
+
+
+commit f12e4549b6fb01cd2654348af95a3c7a6ac161e7
+Date: Sat Sep 13 02:23:05 2008 +0200
+
+ Coding style cleanup, update CHANGELOG
+
+
+commit 0c32565f536609d78feef35c88bbc39d3ac53a73
+Date: Wed Sep 10 09:18:34 2008 -0500
+
+ Update mailing list email and archive addresses
+
+
+commit fb661ea444ae61de60520f66ae84cdb5dd5a3246
+Date: Thu Sep 11 15:40:01 2008 +0200
+
+ 85xx: socrates: autoprobe Lime chip
+
+ This patch is an attempt to implement autoprobing for the Lime
+ presence on the bus.
+ Configure GPCM for Lime CS2 and try to access chip ID registers.
+ Second read atempt delivers register values if the chip is present.
+
+
+commit e99b607a5ec56ce66e0bcccb78480d5e16fb7bc5
+Date: Thu Sep 11 15:40:01 2008 +0200
+
+ 85xx: socrates: Add support for new image format.
+
+
+commit 3c094b652d4107b34641f300a8e9fe16ca15e3d8
+Date: Thu Sep 11 17:28:18 2008 +0900
+
+ sh: Fix compile error for r2dplus
+
+ netdev.h was not include by r2dplus.
+
+
+commit 56844a22b76c719e600047e23b80465a44d76abd
+Date: Thu Sep 11 08:11:23 2008 +0200
+
+ powerpc: Fix bootm to boot up again with a Ramdisk
+
+ Commit 2a1a2cb6 didnt remove the dummy mem reservation in fdt_chosen,
+ and this stopped Linux from booting with a Ramdisk. This patch fixes
+ this, by deleting the useless dummy mem reservation.
+
+ When booting with a Ramdisk, a fix offset FDT_RAMDISK_OVERHEAD is now
+ added to of_size, so we dont need anymore a dummy mem reservation.
+
+ I measured the value of FDT_RAMDISK_OVERHEAD on a MPC8270 based
+ system (=0x44 bytes) and rounded it up to 0x80).
+
+
+commit fc9c1727b5b3483ce49c3cb668e8332fb001b8a7
+Date: Mon Sep 8 02:46:13 2008 +0200
+
+ Add support for LZMA uncompression algorithm.
+
+
+commit 0008b6d968160abe2bfd936493f3a516a7c8da20
+Date: Fri Jun 27 23:04:20 2008 +0400
+
+ fsl_elbc_nand: ecclayout cleanups
+
+ This patch deletes oobavail assignments, they're calculated by the nand
+ core code in nand_scan_tail, plus current oobavail values are wrong for
+ the LP NANDs.
+
+
+commit 8f42bf1c393d53a70c2545e9f329d11c46d74794
+Date: Fri Jun 27 23:04:13 2008 +0400
+
+ fsl_elbc_nand: implement support for flash-based BBT
+
+ This patch implements support for flash-based BBT for chips working
+ through ELBC NAND controller, so that NAND core will not have to re-scan
+ for bad blocks on every boot.
+
+ Because ELBC controller may provide HW-generated ECCs we should adjust
+ bbt pattern and bbt version positions in the OOB free area.
+
+
+commit 97ae023648e764f794ffb9c52da109d6caf09c47
+Date: Fri Jun 27 23:04:04 2008 +0400
+
+ fsl_elbc_nand: fix OOB workability for large page NAND chips
+
+ For large page chips, nand_bbt is looking into OOB area, and checking
+ for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
+ reserved for bbt means.
+
+ But ELBC driver is specifying ecclayout so that oobfree area starts at
+ offset 1, so only one byte left for the bbt purposes.
+
+ This causes problems with any OOB users, namely JFFS2: after first mount
+ JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:
+
+ OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
+ OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
+ OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
+ OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
+
+ And on the next boot, NAND core will rescan for bad blocks, then will
+ see "0xff 0x19" pattern, and will mark all blocks as bad ones.
+
+ To fix the issue we should implement our own bad block pattern: just one
+ byte at OOB start. Though, this will work only for x8 chips. For x16
+ chips two bytes must be checked. Since ELBC driver does not support x16
+ NANDs (yet), we're safe for now.
+
+
+commit 7238ada313057a85409485b8ee21515dc10c07a5
+Date: Fri Sep 12 13:52:21 2008 +0200
+
+ MPC512x: reduce timeout waiting for Ethernet autonegotiation to 2.5s
+
+
+commit b18410e508a12ba0a177dfc2a386857c806fa96d
+Date: Thu Sep 11 13:05:56 2008 +0200
+
+ ppc4xx: Enable device tree (FDT) support in zeus board port
+
+
+commit 7bf5ecfa50722a9feb45ea8f04da75f5d406f20b
+Date: Wed Sep 10 16:53:47 2008 +0200
+
+ ppc4xx: Fix SDRAM inititialization of multiple 405 based board ports
+
+ This patch fixes a problem introdiced with patch
+ bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by
+ initdram()].
+
+ The boards affected are:
+ - PCI405
+ - PPChameleonEVB
+ - quad100hd
+ - taihu
+ - zeus
+
+
+commit 61737c59a3285f6fadf96a5836879898c04ec28d
+Date: Thu Sep 11 19:41:26 2008 -0400
+
+ ppc4xx: Add .gitignore file to xilinx-ppc440 boards
+
+
+commit 2bec498ed1164a58cd8437b561bdc4551d69f9bf
+Date: Thu Sep 11 19:41:25 2008 -0400
+
+ ppc4xx: Fix compilation of v5fx30teval_flash
+
+
+commit 4bed9deebbd7ee6f0ba746b44d47a922156f7404
+Date: Wed Sep 10 17:44:30 2008 -0400
+
+ ppc4xx: Fix in-tree build for ppc440-generic boards
+
+
+commit 06c4ab50f5ccfb55ea2dd324aa28b2b06102e416
+Date: Fri Sep 12 02:20:47 2008 +0200
+
+ ARM: synchronize mach-types.h with linux 2.6.27-rc6
+
+
+commit 3ee9f03f588ad605e3fd10530237f9e3e2e7ab4c
+Date: Fri Sep 12 02:20:47 2008 +0200
+
+ at91rm9200: fix errors with CONFIG_CMD_I2C_TREE
+
+ This patch prevents linker error on AT91RM9200 boards, if
+ CONFIG_CMD_I2_TREE is set.
+ It implements i2c_set_bus_speed and i2c_get_bus_speed as a dummy function.
+
+
+commit b5b0344957d32e3d07a8dd72fce64fb48e680ba4
+Date: Fri Sep 12 02:20:47 2008 +0200
+
+ ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c
+
+ ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c
+
+
+commit 03db53335c8eba656a7c44d1555b1a4514383e33
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ make: Remove redundant __ARM__ addition when cross-compiling on *BSD
+
+ __ARM__ is given by arm_config.mk automatically.
+
+
+commit 8cc62a7d9c77f8ef5166fb57322c4a6ddac320b4
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ Fix MACH_TYPE for the AT91RM9200DK board.
+
+
+commit 274737e5eb25b2bcd3af3a96da923effd543284f
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ i.mx change get_timer(base) to return time since base
+
+ This patch changes get_timer() for i.MX to return the time since
+ 'base' instead of the time since the counter was at zero.
+
+ Symptom seen is flash timeout errors when erasing or programming a
+ sector using the common cfi flash code.
+
+
+commit 48fed40575b3e8eae960eb0141509ddd9a73012a
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ i.MX use u-boot baud rate and don't assume UART master clock
+
+ 1) Change the i.MX serial driver to use the baud rate set in the
+ u-boot environment
+
+ 2) don't assume a 16MHz value for PERCLK1 in baud rate calculations
+
+ 3) don't write a 1 to the RDR bit in the USR2 reg. (bit is not "write
+ one to clear" like other status bits in the reg.)
+
+
+commit 6e1551a870d360805b9d172dc56d935064abe71d
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ arm920t fix constant error in start.S
+
+ Code in cpu/arm920t/start.S will die with a compilation error if
+ CONFIG_STACKSIZE + CFG_MALLOC_LEN works out to an invalid constant for
+ the ARM sub instruction. Change the code so that each is subtracted
+ independently to avoid the error.
+
+
+commit b23253835f871cd9bd8e955b9a971d18a7d4ff56
+Date: Fri Sep 12 02:20:40 2008 +0200
+
+ ARM OMAP : Correct Invalid Timer Register Field Declaration in omap1510.h & omap730.h
+
+ - Correct Invalid #define of MPUTIM_PTV_MASK for
+ omap1510 & omap730 register definition
+
+ MPUTIM_PTV_MASK is defined as
+ #define MPUTIM_PTV_MASK (0x7<<PTV_BIT)
+
+ while it should have been
+ #define MPUTIM_PTV_MASK (0x7<<MPUTIM_PTV_BIT)
+
+ - Below Patch corrects the same
+
+
+commit c455d07396dddc9864fd8dbb965ee10fe95ce8cf
+Date: Fri Jul 18 11:52:02 2008 -0400
+
+ Set up SD/MMC OCR as comment describes. i.e. 3.2-3.4v.
+
+
+commit eb16135df20535b0d19969f50fb5bd17f95e9c25
+Date: Thu Aug 28 12:25:11 2008 +0200
+
+ i.MX31: document timer precision option
+
+
+commit 1a6337b01351b82a45b0defa76f08744511c580b
+Date: Fri Aug 29 10:36:18 2008 +0200
+
+ i.MX31: Make the SPI bus and chip select configurable for MC13783
+
+ The i.MX31 has three SPI buses and each bus has several chip selects
+ and the MC13783 chip can be connected to any of these. The current
+ RTC driver for MC13783 is hardcoded for CSPI2/SS2.
+
+ This patch makes make MC13783 SPI bus and chip select configurable
+ via CONFIG_MC13783_SPI_BUS and CONFIG_MC13783_SPI_CS.
+
+
+commit 8c4ebec25b21e355b8488698ec1594da9701fff4
+Date: Fri Aug 29 10:36:17 2008 +0200
+
+ i.MX31: Add reset_timer() and modify get_timer_masked().
+
+ This patch adds the reset_timer() function (needed by nand_base.c) and
+ modifies the get_timer_masked() to work in the same way as the omap24xx
+ function.
+
+
+commit deeec4991a55de243787002ede24d2331d234fc8
+Date: Wed Sep 10 22:48:09 2008 +0200
+
+ ap325rxa: remove duplicate CONFIG_FLASH_CFI_DRIVER
+
+
+commit a3a08c0cedd329edf5256e1d6b2bad0fca002725
+Date: Wed Sep 10 22:48:09 2008 +0200
+
+ bootm arm/avr32/blackfin/microblaze/nios2/sh: remove no more need 'error' label
+
+
+commit 0e8d158664a913392cb01fb11a948d83f72e105e
+Date: Wed Sep 10 22:48:06 2008 +0200
+
+ rename CFG_ENV macros to CONFIG_ENV
+
+
+commit 1ede78710c3bf9ad6f4a53aaddc3bcc86fedd9df
+Date: Wed Sep 10 22:48:05 2008 +0200
+
+ nvedit: rename error comment to CONFIG_ENV_IS_IN_
+
+
+commit b64b775e7546ed138df360ceb3a71ee358cb9a01
+Date: Wed Sep 10 22:48:05 2008 +0200
+
+ cmd_mem: Move conditional compilation to Makefile
+
+
+commit 8a40fb148efa442d6526eac46a2001e4c64d28ff
+Date: Wed Sep 10 22:48:05 2008 +0200
+
+ move cmd_get_data_size to command.c
+
+ add CMD_DATA_SIZE macro to enable it
+
+
+commit 507641d2491980531932b9f25dab37fe5e6c3a1a
+Date: Wed Sep 10 22:48:04 2008 +0200
+
+ env_flash: Move conditional compilation to Makefile
+
+
+commit 5a1aceb0689e2f731491838970884a673ef7e7d3
+Date: Wed Sep 10 22:48:04 2008 +0200
+
+ rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
+
+
+commit 7d9b5bae5ba558c7464d89d033aca04acaf01172
+Date: Wed Sep 10 22:48:03 2008 +0200
+
+ cleanup use of CFG_ENV_IS_IN_FLASH
+
+ - #if CFG_ENV_IS_IN_FLASH
+ - #if (CFG_ENV_IS_IN_FLASH == 1)
+ - #define CFG_ENV_IS_IN_FLASH 0
+
+
+commit 0cf4fd3cf8d0e00605bec5fc56f89c6415015a46
+Date: Wed Sep 10 22:48:01 2008 +0200
+
+ rename environment.c in env_embedded.c to reflect is functionality
+
+
+commit c0878af6e32f0fd8e13a6ca315b9add64441115a
+Date: Wed Sep 10 22:48:01 2008 +0200
+
+ env_nowhere: Move conditional compilation to Makefile
+
+
+commit 93f6d72544da4510a146bc4c93d609b0116cde37
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHERE
+
+
+commit 2556ef78113b5f089dfcac5da90bf31dd568397b
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ env_sf: Move conditional compilation to Makefile
+
+
+commit 0b5099a8419bf9c828df5e3e2c6878dc300d98e3
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ rename CFG_ENV_IS_IN_SPI_FLASH in CONFIG_ENV_IS_IN_SPI_FLASH
+
+
+commit 55c5f49910ec8225347aa1d211352a84de6649b4
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ env_onenand: Move conditional compilation to Makefile
+
+
+commit 9656138ff1a34d4c4768db6b490deffc40ee674b
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ rename CFG_ENV_IS_IN_ONENAND in CONFIG_ENV_IS_IN_ONENAND
+
+
+commit 957a0e69575683efd70ace147746bbb3d8e7c501
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ env_nvram: Move conditional compilation to Makefile
+
+
+commit 9314cee6917444ab88bd4e758da7a30975120187
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ rename CFG_ENV_IS_IN_NVRAM in CONFIG_ENV_IS_IN_NVRAM
+
+
+commit 06f61354397911a4c121dfa51b6ccbf7e300d48b
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ env_nand: Move conditional compilation to Makefile
+
+
+commit 51bfee192099206a4397f15f3b93516e01f58ab0
+Date: Wed Sep 10 22:47:58 2008 +0200
+
+ rename CFG_ENV_IS_IN_NAND in CONFIG_ENV_IS_IN_NAND
+
+
+commit d8cc04d0ac9c7c0d12454708aaf5489f8532bbf9
+Date: Wed Sep 10 22:47:58 2008 +0200
+
+ env_dataflash: Move conditional compilation to Makefile
+
+
+commit 057c849c45b9ee19df8ff3acdeee66be52819962
+Date: Wed Sep 10 22:47:58 2008 +0200
+
+ rename CFG_ENV_IS_IN_DATAFLASH in CONFIG_ENV_IS_IN_DATAFLASH
+
+
+commit d1034bc8db60fa6bd419328baf6a75cb0645cee8
+Date: Wed Sep 10 22:47:52 2008 +0200
+
+ cmd_eeprom: Move conditional compilation to Makefile
+
+
+commit bf5a7710ec70e90e98f451b4ba0eb65f9ffc34eb
+Date: Fri Sep 5 09:19:54 2008 +0200
+
+ env_eeprom: Move conditional compilation to Makefile
+
+
+commit bb1f8b4f8bb0bfce52e0faa4637b975b745824b3
+Date: Fri Sep 5 09:19:30 2008 +0200
+
+ rename CFG_ENV_IS_IN_EEPROM in CONFIG_ENV_IS_IN_EEPROM
+
+
+commit 32628c5008105a732212003d83b75f05e5243bb2
+Date: Sat Aug 30 23:54:58 2008 +0200
+
+ cmd_mac: Move conditional compilation to Makefile
+
+ finish remaning CFG_ID_EEPROM in CONFIG_ID_EEPROM
+ start in commit ad8f8687b78c3e917b173f038926695383c55555
+
+
+commit e5648acab153f0f429bfc714902c5aaa7879f71b
+Date: Sat Aug 30 23:47:41 2008 +0200
+
+ cmd_fdc: Move conditional compilation to Makefile
+
+
+commit 2d02d91d530e831f2dab228085963fc1d5b71cb0
+Date: Sat Aug 30 23:47:38 2008 +0200
+
+ common/Makefile: add core command section
+
+
+commit 0d92d4a699fb1a39381d98571dc51fb97e5bcf9e
+Date: Sat Aug 30 23:29:57 2008 +0200
+
+ cmd_vfd: Move conditional compilation to Makefile
+
+
+commit 6644641d072aee3087da129d8443187196a4d8a9
+Date: Wed Sep 10 11:48:49 2008 -0500
+
+ delta, zylonite: Update nand_oobinfo to nand_ecclayout.
+
+ This is part of the switch to newer upstream MTD code.
+
+
+commit 9b05aa788bfdd3264ff1bc9418cb19550a7234e4
+Date: Sat Aug 30 17:06:55 2008 -0400
+
+ ARM DaVinci: Fix broken HW ECC for large page NAND.
+
+
+ U-boot's HW ECC support for large page NAND on Davinci is completely
+ broken. Some kernels, such as the 2.6.10 one supported by
+ MontaVista for DaVinci, rely upon this broken behaviour as they
+ share the same code for ECCs. In the existing scheme, error
+ detection *might* work on large page, but error correction
+ definitely does not. Small page ECC correction works, but the
+ format is not compatible with the mainline git kernel.
+
+ This patch adds ECC code that matches what is currently in the
+ Davinci git repository (since NAND support was added in 2.6.24).
+ This makes the ECC and OOB layout written by u-boot compatible with
+ Linux for both small page and large page devices and fixes ECC
+ correction for large page devices.
+
+ The old behaviour can be restored by defining the macro
+ CFG_DAVINCI_BROKEN_ECC, which is undefined by default.
+
+
+commit 0b7c5639891f4103a0e31ec7ae0beb3e97ed3836
+Date: Wed Sep 10 11:15:28 2008 +0200
+
+ muas3001: update BR4 settings
+
+ Also set up the port pins for using I2C.
+
+
+commit 3591293509e0c0bcf244b0f974775bff2e25697e
+Date: Wed Sep 10 09:43:49 2008 +0300
+
+ autoscr: Fix one-character lines and non-newline terminated scripts
+
+ When not using hush, the autoscr command now executes lines that are
+ only one character long. It also runs the last line of scripts even if
+ it does not end in a newline.
+
+
+commit 9ebbb54f7a25055010fa6668eba40c72a4c4f985
+Date: Tue Sep 9 15:13:29 2008 -0700
+
+ ppc4xx: Allow DTT_I2C_DEV_CODE configured by CFG_I2C_DTT_ADDR
+
+ On AMCC Arches board DTT_I2C_DEV_CODE is different then canyonlands
+ and glacier.
+
+
+commit 245f6ef3e11828cb46188e396fb1e67f7b07cd03
+Date: Mon Sep 8 10:21:11 2008 +0200
+
+ muas3001: added support for the LM75 sensor.
+
+
+commit 4a02a2dca82aeab8f839db9dd35fda9d5412dacb
+Date: Mon Sep 8 10:20:19 2008 +0200
+
+ muas3001: activate WDT for the muas3001 board.
+
+
+commit a55d074dac24dc941f1afb5b4e94b1509bfdda4e
+Date: Mon Sep 8 10:19:36 2008 +0200
+
+ muas3001: added 64MB SDRAM autodetection.
+
+
+commit 5251469943895de4bb9a04d5053352cc22acb7d5
+Date: Thu Aug 21 07:12:26 2008 -0700
+
+ Fix printf errors under -DDEBUG
+
+ Fix printf format-string/arg mismatches under -DDEBUG.
+
+ These warnings occur with DEBUG defined for a platform using
+ cpu/mpc85xx. Users of other architectures can unearth similar
+ problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right
+ after "CFLAGS += $(call cc-option,-fno-stack-protector)".
+
+
+commit 8b9e4787641719d709bfa2ebeb72e8bd4952bee7
+Date: Tue Sep 9 23:55:18 2008 +0200
+
+ Update CHANGELOG, prepare 2008-10-rc1 release
+
+
+commit e0ff3d350d6b7960deb5a881dfc5acf3a63ef676
+Date: Mon Sep 8 08:51:29 2008 -0500
+
+ 85xx: Ensure timebase is zero on secondary cores
+
+ The e500um says the timebase is volatile out of reset. To ensure
+ TB sync works we need to make sure its zero.
+
+
+commit 54b4ab3c961a2012a1c2a09c259a6343323ec551
+Date: Tue Sep 9 22:18:24 2008 +0200
+
+ bootm_load_os: fix load_end debug message
+
+ print load_end value not pointer
+
+
+commit 1d9af0be764960e6cc1c093e97176c3542796820
+Date: Tue Sep 9 22:18:23 2008 +0200
+
+ bootm: enable fdt support only on ppc, m68k and sparc
+
+ ...as done in image.c
+
+
+commit 748b5274e76f81df85cfcffaffedc323678d0623
+Date: Tue Sep 9 18:51:05 2008 +0200
+
+ common/cmd_mem.c: remove nested #if defined(CONFIG_CMD_MEMORY)
+
+
+commit 650632fe4ca09cfd0e5e6a593f2efc02ef87a58c
+Date: Tue Sep 9 17:31:46 2008 +0200
+
+ gitignore: add tags files and Vim swap file
+
+
+commit 1d9b67b23fca6a25154333733204339802510720
+Date: Tue Sep 9 17:52:47 2008 +0900
+
+ add board_eth_init() for sh7785lcr board
+
+ Fix the problem that cannot work RTL8169 on sh7785lcr board.
+
+
+commit 7b7a869a8ba3bd6d9bffb748c91232141330f514
+Date: Wed Aug 6 16:08:41 2008 -0500
+
+ mtd: SPI Flash: Support the STMicro Flash
+
+ Add MTD SPI Flash support for M25P16, M25P20, M25P32,
+ M25P40, M25P64, M25P80, M25P128.
+
+
+commit 4bc07c368076560ed7fa4c9f987c71a8521488a9
+Date: Tue Sep 9 17:55:31 2008 +0200
+
+ trab: fix build problem after change to use do_div()
+
+ We must link with libgeneric now.
+
+
+commit 3b20fd83c73c22acfcb0c6663be747bd5c8b7011
+Date: Wed Aug 20 13:00:17 2008 -0400
+
+ Correct drv_usb_kbd_init function
+
+ The patch is that check if usb_get_dev_index() function return valid
+ pointer. If valid, continue. Otherwise return -1.
+
+
+commit eba1f2fc75f128a9a6c1328d786996a93fd7a707
+Date: Wed Aug 20 11:22:02 2008 +0200
+
+ Make usb-stop() safe to call multiple times in a row.
+
+ A recent commit (936897d4d1365452bbbdf8430db5e7769ef08d38)
+ enabled the usb_stop() command in common/cmd_bootm.c which was
+ not enabled for some time, because no board did actually set the
+ CFG_CMD_USB flag. So, now the usb_stop() is executed before
+ loading the linux kernel.
+
+ However, the usb_ohci driver hangs up (at least on AT91SAM) if the
+ driver is stopped twice (e.g. the peripheral clock is stopped on AT91).
+ If some other piece of code calls usb_stop() before the bootm command,
+ this command will hangup the system during boot.
+ (usb start and stop is typically used while booting from usb memory stick)
+
+ But, stopping the usb stack twice is useless anyway, and a flag already
+ existed that kept track on the usb_init()/usb_stop() calls.
+ So, we now check if the usb stack is really started before we stop it.
+
+ This problem is now fixed in both the upper as low-level layer.
+
+
+commit 2c8ccf2728f5e67d991cecf76c4057db75a87b67
+Date: Tue Sep 9 16:55:47 2008 +0200
+
+ Makefile: fix bug introduced by commit 47ffd6c2
+
+commit 880f6a5d7596f42db5ff8803b797b78ec5b146e0
+Date: Tue Sep 9 10:00:33 2008 -0400
+
+ ppc4xx: ppc440-generic-ALL: Fix out of tree build v2
+
+ This patch solves the problems compiling ml507, v5fx30teval and
+ ppc440-generic out of tree.
+
+
+commit 47bebe34ca4e33bab0e822e4ceebbec2590ccbcb
+Date: Thu Sep 4 15:35:46 2008 -0300
+
+ Fix dev_print when called from usb_stor_info (usb storage command)
+
+ Fix output of the usb storage command. It was printing "Device 0: not
+ available" because IF_TYPE_USB was not included into the switch
+ statement.
+
+
+commit a4f243452cc8ce0c2c9b51a2520db4bde5f472de
+Date: Tue Sep 9 12:58:16 2008 +0200
+
+ FIT: make iminfo check hashes of all images in FIT, return 1 on failed check
+
+
+commit 919f550dc11a13abf01c6bc713c968de790b8d7c
+Date: Tue Sep 9 12:58:15 2008 +0200
+
+ FIT: add ability to check hashes of all images in FIT, improve output
+
+ - add function fit_all_image_check_hashes() that verifies if all
+ hashes of all images in the FIT are valid
+ - improve output of fit_image_check_hashes() when the hash check fails
+
+
+commit 1de1fa408967cef6804bb046b904114519bb36f0
+Date: Mon Sep 8 20:54:39 2008 +0200
+
+ qemu_mips: Update linux bootm to support dynamic cmdline
+
+
+commit f5ed9e39088ecfa5a5f3ef47b08e5bda7890d764
+Date: Mon Sep 8 14:56:49 2008 -0500
+
+ Add support for booting of INTEGRITY operating system uImages
+
+
+commit 72f1b65f1b68bc6ed0d182eda1f3d6cf51b6414a
+Date: Mon Sep 8 21:01:29 2008 +0200
+
+ mips/bootm: Fix typo in commit c4f9419c, "initrd_start" replaced by "images->rd_start"
+
+
+commit 9ba2e2c8191353d75b2d535e672a125be7b84c03
+Date: Mon Sep 8 13:57:12 2008 -0500
+
+ Remove support for booting ARTOS images
+
+ Pantelis Antoniou stated:
+ AFAIK, it is still used but the products using PPC are long gone.
+ Nuke it plz (from orbit).
+
+ So remove it since it cleans up a usage of env_get_char outside of
+ the environment code.
+
+
+commit 47ffd6c2fc72b46daa9d5d59eedb894fab2b7ee1
+Date: Tue Sep 9 15:45:18 2008 +0200
+
+ Makefile: compile and link each module just once
+
+ Several source files need to be compiled and linked when one or more
+ config options are selected. To allow for easy selection in the
+ Makefiles yet to avoild multiple compilation (which costs build time)
+ and especially multiple linking (which causes errors), we use
+ "COBJS = $(sort COBJS-y)" which eliminates duplicates.
+
+ By courtesy of Detlev Zundel who suggested this approach.
+
+
+commit 48d0192fe869948fef14b460b5f0c85bca933693
+Date: Mon Sep 8 14:30:53 2008 +0200
+
+ Moved conditional compile into Makefile
+
+
+commit 20c9226cb8cab08a111ee73db04e62d943ee0c97
+Date: Mon Sep 8 10:17:31 2008 +0200
+
+ Merged serial_pl010.c and serial_pl011.c.
+
+ They only differ in the init function.
+ This also adds the missing watchdog support for the PL011.
+
+
+commit 0817d688f307ee2c0598e79175c94a40ce90337b
+Date: Sun Sep 7 17:10:27 2008 -0400
+
+ Remove gap fill in srec object v2
+
+ SREC files do not need gap fill: The load address is specified in the
+ file. On the other hand, it can't be avoided in a .bin object. It has
+ no information about memory location.
+
+
+commit 1dc306931ca5ce87f13916fa7165b052d3aa714f
+Date: Sun Sep 7 20:18:27 2008 +0200
+
+ README: fix missing subdirectory in the documentation
+
+
+commit 3ef96ded38a8d33b58b9fab9cd879d51ddac4cbd
+Date: Sun Sep 7 07:08:42 2008 +1000
+
+ Update i386 code (sc520_cdp)
+
+ Attempt to bring i386 / sc520 inline with master
+
+
+commit 5608692104efa8d56df803dc79ea41ac3607eee5
+Date: Thu Sep 4 13:01:49 2008 +0200
+
+ fw_env: add NAND support
+
+ Add support for environment in NAND with automatic NOR / NAND recognition,
+ including unaligned environment, bad-block skipping, redundant environment
+ copy.
+
+
+commit dd794323a2a1ed6a8a5df51785c31bcde60ad7ca
+Date: Tue Sep 9 09:50:24 2008 +0200
+
+ ppc4xx: Fix out-of-tree building of CPCI405 variants
+
+
+commit 59f630588e3fdbd698a0a2798e52a8924e899563
+Date: Fri Aug 15 15:42:11 2008 +0200
+
+ Removed hardcoded MxMR loop value from upmconfig() for MPC85xx.
+
+
+commit e64987a892353f3d49eb242d997820ef8f538912
+Date: Fri Aug 15 15:42:13 2008 +0200
+
+ 85xx: socrates: Enable Lime support.
+
+ This patch adds Lime GDC support together with support for the PWM
+ backlight control through the w83782d chip. The reset pin of the
+ latter is attached to GPIO, so we need to reset it in
+ early_board_init_r.
+
+
+commit 3e79b588b5199f35016f178fc0d5d1266382097f
+Date: Fri Aug 15 15:42:12 2008 +0200
+
+ 85xx: Socrates: Major code update.
+
+ - Update the local bus ranges in the FDT for Linux for the various
+ devices connected to the local bus via chip-select.
+
+ - Set the LCRR_DBYP bit in the LCRR for local bus frequencies
+ lower than 66 MHz and uses I/O accessor functions consequently.
+
+ - UPM data update.
+
+ - Update of default environment and configuration. Use I2C multibus
+ as we do have two I2C buses. Also enable sdram and ext2 commands.
+
+
+commit e8d18541c6ceab821f75faab031740b33fdbfa4b
+Date: Fri Jul 18 16:52:23 2008 +0200
+
+ Update Freescale 85xx boards to sys_eeprom.c
+
+ The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
+ format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
+ 86xx boards already use sys_eeprom.c, so this patch migrates the remaining
+ Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
+
+
+commit aab2bf0202c86227e3dcc8a5b58946087ebcc1af
+Date: Tue Sep 9 10:08:02 2008 +0200
+
+ lib_ppc/interrupts.c: make board_show_activity() a weak function
+
+ This allows to use show_activity() without having to
+ define an empty board_show_activity() function.
+
+
+commit fe876787f8743883ce58fed61525eaa2f34da4c5
+Date: Tue Sep 9 10:06:44 2008 +0200
+
+ stxxtc: remove empty CONFIG_SHOW_ACTIVITY functions
+
+
+commit 965de106ba8900372c8b16dc60d5acab7f925e38
+Date: Tue Sep 9 10:03:47 2008 +0200
+
+ NETTA2: remove empty CONFIG_SHOW_ACTIVITY functions
+
+
+commit 6cc64f9b5f69239c8b1969572b5a3a4aab7de5b9
+Date: Fri Aug 15 15:42:11 2008 +0200
+
+ Removed hardcoded MxMR loop value from upmconfig() for MPC85xx.
+
+
+commit 36241ca29d4804a1006fb3f26069effda5202581
+Date: Fri Aug 15 15:42:13 2008 +0200
+
+ 85xx: socrates: Enable Lime support.
+
+ This patch adds Lime GDC support together with support for the PWM
+ backlight control through the w83782d chip. The reset pin of the
+ latter is attached to GPIO, so we need to reset it in
+ early_board_init_r.
+
+
+commit 7a47753ddcaebbf2142809842f70c5f723bd9ddb
+Date: Fri Aug 15 15:42:12 2008 +0200
+
+ 85xx: Socrates: Major code update.
+
+ - Update the local bus ranges in the FDT for Linux for the various
+ devices connected to the local bus via chip-select.
+
+ - Set the LCRR_DBYP bit in the LCRR for local bus frequencies
+ lower than 66 MHz and uses I/O accessor functions consequently.
+
+ - UPM data update.
+
+ - Update of default environment and configuration. Use I2C multibus
+ as we do have two I2C buses. Also enable sdram and ext2 commands.
+
+
+commit 4d2ae70e8c31c22e5710df5ff236b5565ea2cf2c
+Date: Tue Sep 9 01:22:39 2008 +0200
+
+ disk-on-chip: remove duplicate doc_probe declaration
+
+
+commit 3221b074a0ab199f6ae47c19cc22f42ddf3ef819
+Date: Tue Sep 9 00:59:40 2008 +0200
+
+ onenand_uboot: fix warning: 'struct mtd_oob_ops' declared inside parameter list
+
+
+commit 13b4db0e2107175a8622ebb48529fa3ad8e12c75
+Date: Tue Sep 9 00:59:39 2008 +0200
+
+ rs5c372: fix rtc_set prototype
+
+
+commit 1bb8b2ef2722bbaea3cc5d46321ce1d99f9b56f7
+Date: Thu Aug 14 14:08:28 2008 +0200
+
+ ARM: fix warning: target CPU does not support interworking
+
+ This patch fixes warnings like this:
+
+ start.S:0: warning: target CPU does not support interworking
+
+ which come from some ARM cross compilers and are caused by hard-coded
+ (with "--with-cpu=arm9" configuration option) ARM targets (which
+ support ARM Thumb instructions), while the ARM target selected from
+ the command line (with "-march=armv4") doesn't support Thumb
+ instructions.
+
+ This warning is issued by the compiler regardless of the real use of
+ the Thumb instructions in code.
+
+ To fix this problem, we use options according to compiler version
+ being used.
+
+
+commit 4265c35fbcb248e58179007621d61d32d0b3b82a
+Date: Thu Aug 14 14:08:28 2008 +0200
+
+ ARM: Use do_div() instead of division for "long long".
+
+
+commit 8febd13c69cb68652577d1a9fcbde954bf784155
+Date: Fri Jul 18 16:52:23 2008 +0200
+
+ Update Freescale 85xx boards to sys_eeprom.c
+
+ The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
+ format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
+ 86xx boards already use sys_eeprom.c, so this patch migrates the remaining
+ Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
+
+
+commit 1055171ed05b7c4885737463d52b8d6c013bcb5d
+Date: Mon Sep 8 23:26:22 2008 +0200
+
+ lib_arm/bootm.c: fix compile warnings
+
+ bootm.c:128: warning: label 'error' defined but not used
+ bootm.c:65: warning: unused variable 'ret'
+
+
+commit 2e3c867d0a63c563a51e65b776973b008f16cec5
+Date: Mon Sep 8 22:46:42 2008 +0200
+
+ ml507: fix out of tree build problem
+
+
+commit 9863a15a98f23b79f34a0e4f9e465bc6df5d504d
+Date: Mon Sep 8 22:10:28 2008 +0200
+
+ common/cmd_bootm.c: fix printf() format warnings
+
+
+commit 4394f9a8c42bb1b0abc4fc04bd582d4db5f8b726
+Date: Mon Sep 8 22:37:45 2008 +0200
+
+ BMW, PCIPPC2, PCIPPC6, RBC82: fix compile warnings
+
+ missing doc_probe() prototype.
+
+
+commit 2c5e3cc4994897d364b148942ff23e47783198f6
+Date: Mon Sep 8 21:28:14 2008 +0200
+
+ mk48t59: fix compile problem introduced by commit d1e23194
+
+
+commit 5ff889349d2ace13f10c9335e09365fcec8247cc
+Date: Mon Sep 8 14:11:12 2008 +0200
+
+ ppc4xx: Move ppc4xx specific prototypes to ppc4xx header
+
+ This patch moves some 4xx specific prototypes out of include common.h
+ to a ppc4xx specific header.
+
+
+commit ac53ee8318678190bf3c68da477a84a657d86fb0
+Date: Fri Sep 5 15:34:04 2008 +0200
+
+ ppc4xx: Update CPCI405(AB) configuration
+
+ This patch add FDT support and command line editing capabilities
+ for CPCI405 and CPCI405AB boards.
+
+
+commit 7b1fbcadf73a83b3beb94abccda1c35e2c075a94
+Date: Fri Sep 5 15:34:03 2008 +0200
+
+ ppc4xx: Cleanup CPCI405 linker script
+
+
+commit 767f9159c5c94cd0cb3135b5b82814ad12816ddf
+Date: Fri Sep 5 15:34:02 2008 +0200
+
+ ppc4xx: Update CPCI405 variants handling
+
+ This patch replaces the BOARD_REVISION variable in include/config.mk
+ by a using a temporary include file in the platform directory.
+
+ The former way does not work anymore and the latter is also used by
+ some other boards.
+
+
+commit f071f01fd09e9bf1cf09de37a7416aacce71bae1
+Date: Mon Sep 8 10:01:48 2008 +0200
+
+ ppc4xx: Remove CONFIG_CS8952_PHY define
+
+ Since this define is only used on one board that was never really in
+ production, removing this compile time option doesn't hurt and makes
+ the code more readable.
+
+
+commit 6ca8646c1860bba74326bf916a5a3389a5c0d3b5
+Date: Fri Sep 5 14:11:40 2008 +0200
+
+ ppc4xx: Fix compilation warning for PIP405
+
+ This patch fixes a compilation warning for the PIP405 board. It moves the
+ #ifndef CONFIG_CS8952_PHY define a little so that the warning doesn't
+ occur anymore. I am a little unsure if this #ifdef is at the correct
+ place now or if it could be removed completely. This needs to get
+ tested on the PIP405 board.
+
+
+commit 725b53ac61f4df3026b8f6489ef0080fd27d3816
+Date: Fri Sep 5 14:09:09 2008 +0200
+
+ ppc4xx: Fix compilation warning for canyonlands & glacier
+
+
+commit 302e52e0b1d4c7f994991709d0cb6c3ea612cdb5
+Date: Fri Sep 5 14:40:29 2008 -0500
+
+ Fix compiler warning in mpc8xxx ddr code
+
+ ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
+ ctrl_regs.c:523: warning: 'caslat' may be used uninitialized in this function
+ ctrl_regs.c:523: note: 'caslat' was declared here
+
+ Add a warning in DDR1 case if cas_latency isn't a value we know about.
+
+
+commit d1e2319414ea5218ba801163e4530ecf2dfcbf36
+Date: Mon Sep 1 23:06:23 2008 +0200
+
+ rtc: allow rtc_set to return an error and use it in cmd_date
+
+
+commit ee9536a28cb149bcb6c5dee9d08c62c91f4c72d2
+Date: Mon Sep 1 01:16:33 2008 +0200
+
+ ap325rxa/favr-32-ezkit: Use CONFIG_FLASH_CFI_DRIVER
+
+
+commit 6b971c73f182248ce103503d74fbc0100bb8c8b7
+Date: Sun Aug 31 05:37:04 2008 +0900
+
+ config.mk: Move arch-specific condition to $(ARCH)_config.mk
+
+
+commit ea86b9e64b811753d9eabe0f560ee189fbe5d0c1
+Date: Fri Aug 29 19:08:29 2008 -0500
+
+ Prevent crash if random/invalid ramdisks are passed to bootm
+
+ Adds returning an error from the ramdisk detection code if
+ its not a real ramdisk (invalid). There is no reason we can't
+ just return back to the console if we detect an invalid
+ ramdisk or CRC error.
+
+
+commit 8e02494e8f86c8f2d7324b5eb9e75271104a01ef
+Date: Fri Aug 29 21:04:45 2008 +0200
+
+ Prevent crash if random DTB address is passed to bootm
+
+ This patch adds bootm_start() return value check. If
+ error status is returned, we do not proceed further to
+ prevent board reset or crash as we still can recover
+ at this point.
+
+
+commit cc347801add2689b1ee54d21f62bc14ecf6e1dd8
+Date: Fri Aug 29 12:30:39 2008 -0500
+
+ clean up some #if !defined() in drivers/video/cfb_console.c
+
+ rearrange some #if !defined() / #else / #endif statements to remove
+ the negative logic.
+
+
+commit c83f4c2d77f07174dcd6bef7e87a0f7017be7c33
+Date: Fri Aug 29 09:02:20 2008 +0900
+
+ apollon: use the last memory area for u-boot
+
+
+commit a6f2e455b774d0c5d56e44e5661df9adb69b6e07
+Date: Thu Aug 28 13:50:42 2008 +0200
+
+ TQM8272: move NAND part in seperate File
+
+ I didn't try to use drivers/mtd/nand/fsl_upm.c for the NAND driver,
+ because I have no longer access to the hardware.
+
+
+commit 584f979f7ee914e32d408739cbdd2c4457ec18b8
+Date: Thu Aug 28 13:48:36 2008 +0200
+
+ TQM8272: Fix compiling error for the TQM8272 board.
+
+ Fix compile problems caused by
+ commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b
+
+
+commit 1a7f8ccec981648ccd38fca2535490582eee08e6
+Date: Wed Aug 27 14:45:20 2008 +0900
+
+ Add JFFS2 command support on OneNAND
+
+
+commit f5c3ba79788b0e39baab7026d374fe375dd1a43f
+Date: Mon Aug 25 19:21:30 2008 +0100
+
+ Allow console input to be disabled
+
+ Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE.
+
+ When CONFIG_DISABLE_CONSOLE is defined, setting
+ GD_FLG_DISABLE_CONSOLE disables all console input and output.
+
+
+commit 2b22d608f370565c87f55928b524207031419c11
+Date: Wed Jul 30 12:39:29 2008 +0200
+
+ loads: allow negative offsets
+
+
+commit e90fb6afab2c0c074dfb67bacb4de179eb188a24
+Date: Thu Sep 4 11:19:05 2008 +0200
+
+ USB EHCI: reset root hub
+
+ Some of multi-function USB controllers (e.g. ISP1562) allow root hub
+ resetting only via EHCI registers. So, this patch adds the
+ corresponding kind of reset to OHCI's hc_reset() if the newly
+ introduced CONFIG_PCI_EHCI_DEVNO option is set (e.g. for Socrates
+ board).
+
+
+commit 5875d358f025c1b042d8a0f08384b756de7256c9
+Date: Fri Aug 15 15:42:09 2008 +0200
+
+ RX 8025 RTC: analyze 12/24-hour mode flag in rtc_get().
+
+
+commit 3e3c026ed746a284c6f0ef139b26d859939de7e9
+Date: Fri Sep 5 10:47:46 2008 +0200
+
+ devices: Use list_add_tail() instead of list_add() to register a device
+
+ This patch fixes a problem spotted on Glacier/Canyonlands (and most
+ likely lots of other board ports), that no serial output was seen
+ after console initialization in console_init_r(). This is because the
+ last added console device was used instead of the first added.
+
+ This patch fixes this problem by using list_add_tail() instead of
+ list_add() to register a device. This way the first added console
+ is used again.
+
+
+commit 78d78236896d62bb8ca7302af38d8f1493eb2651
+Date: Thu Sep 4 23:49:36 2008 -0700
+
+ ppc4xx: Add support for GPCS, SGMII and M88E1112 PHY
+
+ This patch adds GPCS, SGMII and M88E1112 PHY support
+ for the AMCC PPC460GT/EX processors.
+
+
+commit f6b6c45840f9b4671d2d97243a12a1f3ffb64765
+Date: Wed Sep 3 12:26:59 2008 -0700
+
+ ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines
+
+
+commit 075d0b81e896e8735ae26372cd384f87cbd24e41
+Date: Wed Sep 3 12:26:28 2008 -0700
+
+ ppc4xx: IBM Memory Controller DDR autocalibration routines
+
+ Alternate SDRAM DDR autocalibration routine that can be generically used
+ for any PPC4xx chips that have the IBM SDRAM Controller core allowing for
+ support of more DIMM/memory chip vendors and gets the DDR autocalibration
+ values which give the best read latency performance (SDRAM0_RDCC.[RDSS]).
+
+ Two alternate SDRAM DDR autocalibration algoritm are provided in this patch,
+ "Method_A" and "Method_B". DDR autocalibration Method_A scans the full range
+ of possible PPC4xx SDRAM Controller DDR autocalibration values and takes a
+ lot longer to run than Method_B. Method_B executes in the same amount of time
+ as the currently existing DDR autocalibration routine, i.e. 1 second or so.
+ Normally Method_B is used and it is set as the default method.
+
+ The current U-Boot PPC4xx DDR autocalibration code calibrates the IBM SDRAM
+ Controller registers.[bit-field]:
+ 1) SDRAM0_RQDC.[RQFD]
+ 2) SDRAM0_RFDC.[RFFD]
+
+ This alternate PPC4xx DDR autocalibration code calibrates the following
+ IBM SDRAM Controller registers.[bit-field]:
+
+ 1) SDRAM0_WRDTR.[WDTR]
+ 2) SDRAM0_CLKTR.[CKTR]
+ 3) SDRAM0_RQDC.[RQFD]
+ 4) SDRAM0_RFDC.[RFFD]
+
+ and will also use the calibrated settings of the above four registers that
+ produce the best "Read Sample Cycle Select" value in the SDRAM0_RDCC.[RDSS]
+ register.[bit-field].
+
+
+commit e07f4a8033b6270b8103049adb6456f660ff4a89
+Date: Mon Sep 1 13:09:39 2008 -0400
+
+ ppc44x: Unification of virtex5 pp440 boards
+
+ This patch provides an unificated way of handling xilinx v5 ppc440 boards.
+
+ It unificates 3 different things:
+
+ 1) Source code
+ A new board called ppc440-generic has been created. This board includes
+ a generic tlb initialization (Maps the whole memory into virtual) and
+ defines board_pre_init, checkboard, initdram and get_sys_info weakly,
+ so, they can be replaced by specific functions.
+
+ If a new board needs to redefine any of the previous functions
+ (specific initialization) it can create a new directory with the
+ specific initializations needed. (see the example ml507 board).
+
+ 2) Configuration file
+ Common configurations are located under configs/xilinx-ppc440.h, this
+ header file interpretes the xparameters file generated by EDK and
+ configurates u-boot in correspondence. Example: if there is a Temac,
+ allows CMD_CONFIG_NET
+ Specific configuration are located under specific configuration file.
+ (see the example ml507 board)
+
+ 3) Makefile
+ Some work has been done in order to not duplicate work in the Main
+ Makefile. Please see the attached code.
+
+ In order to support new boards they can be implemented in the next way:
+
+ a) Simple Generic Board (90% of the time)
+ Using EDK generates a new xparameters.h file, replace
+ ppc440-generic/xparameters.h and run make xilinx-ppc440-generic_config
+ && make
+
+ b) Simple Boards with special u-boot parameters (9 % of the time)
+ Create a new file under configs for it (use ml507.h as example) and
+ change your paramaters. Create a new Makefile paragraph and compile
+
+ c) Complex boards (1% of the time)
+ Create a new folder for the board, like the ml507
+
+ Finally, it adds support for the Avnet FX30T Evaluation board, following
+ the new generic structure:
+
+ Cheap board by Avnet for evaluating the Virtex5 FX technology.
+
+ This patch adds support for:
+ - UartLite
+ - 16MB Flash
+ - 64MB RAM
+
+ Prior using U-boot in this board, read carefully the ERRATA by Avnet
+ to solve some memory initialization issues.
+
+
+commit 64ac1eb5afafced49b327425ad1814b2dc422d6e
+Date: Tue Sep 2 15:21:16 2008 -0500
+
+ mpc83xx: fix mpc8313 in-tree building with NAND
+
+ and add mpc8313 NAND build to MAKEALL
+
+
+commit 6eb2a44e27919fdc601e0c05404b298a7602c0e3
+Date: Thu Aug 28 14:09:25 2008 -0700
+
+ mpc83xx: clean up cache operations and unlock_ram_in_cache() functions
+
+ Cleans up some latent issues with the data cache control so that
+ dcache_enable() and dcache_disable() will work reliably (after
+ unlock_ram_in_cache() has been called)
+
+
+commit 46497056ae3b1e81e736e9cf3a170472c5d9719f
+Date: Thu Aug 28 14:09:19 2008 -0700
+
+ mpc83xx: Store and display Arbiter Event Register values
+
+ Record the Arbiter Event Register values and optionally display them.
+
+ The Arbiter Event Register can record the type and effective address of
+ an arbiter error, even through an HRESET. This patch stores the values in
+ the global data structure.
+
+ Display of the Arbiter Event registers immediately after the RSR value
+ can be enabled with defines. The Arbiter values will only be displayed
+ if an arbiter event has occured since the last Power On Reset, and either
+ of the following defines exist:
+ #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and
+ and type register values
+ #define CONFIG_DISPLAY_AER_FULL - display and interpret the arbiter
+ event register values
+
+ Address Only transactions are one of the trapped events that can register
+ as an arbiter event. They occur with some cache manipulation instructions
+ if the HID0_ABE (Address Broadcast Enable) is set and the memory region
+ has the MEMORY_COHERENCE WIMG bit set. Setting:
+ #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address
+ only events, so that it can still capture
+ other real problems.
+
+
+commit ade50c7fa1b16ef98be17e9c3ae286aecf4f5605
+Date: Thu Aug 28 14:09:11 2008 -0700
+
+ mpc83xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ This is needed in unlock_ram_in_cache() because it is called from C and
+ will corrupt the small data area anchor that is kept in R2.
+
+ lock_ram_in_cache() is modified similarly as good coding practice, but
+ is not called from C.
+
+
+commit d9fe88173cb4f7d293796ffe10c7a0d3d426d8f9
+Date: Fri Aug 22 23:52:50 2008 -0700
+
+ MPC83XX: Fix GPIO configuration - set gpio level before direction
+
+ Set DAT value before DIR values to avoid creating glitches on the
+ GPIO signals.
+
+ Set gpio level register before direction register to inhibit
+ glitches on high level output pins.
+
+ Dir and data gets cleared at powerup, so high level output lines see
+ a short low pulse between setting the direction and level registers.
+
+ Issue was seen on a new board with the nReset line of the NOR flash
+ connected to a GPIO. Setting the direction register puts the NOR flash
+ in reset so the next instruction to set the level cannot get executed.
+
+
+commit 7007c5975ee900ad70983b0681d3251e221f8321
+Date: Tue Sep 2 02:58:32 2008 +0200
+
+ doc/qemu_mips: add doc howto debug u-boot with gdb
+
+
+commit 7deb3b3ecd0e81ef09bb68aa0ec2346f4ae0a405
+Date: Wed Sep 3 17:15:45 2008 +0200
+
+ ppx4xx: Fix broken DASA_SIM board
+
+ This patch adds initdram() to DASA_SIM boards that has been
+ removed accidentally by a previous commit.
+
+
+commit 7e410aa30fbcb1d19a26bbf1e84a9ca6102d534b
+Date: Mon Sep 1 08:35:37 2008 +0200
+
+ ppc4xx: Remove reference to common/lists.o from some esd linker scripts
+
+ This patch removes some direct references to common/lists.o from some
+ esd linker scripts. This is necessary because the lists source was moved
+ and is not in the "common" directory anymore.
+
+
+commit 97b0734d65f8a0b03df0a335a2addc759da56107
+Date: Tue Sep 2 16:33:05 2008 +0200
+
+ ppc4xx: Remove obsolete or unused functions from some esd boards
+
+ This patch removes initdram() and testdram() from most esd 405 platforms.
+ Some boards also have an empty dummy implementation of
+ misc_init_f(). This is also removed.
+
+
+commit 1092ce218c514e5ccb18450ac5af501d96d6e3e9
+Date: Tue Sep 2 15:07:54 2008 +0200
+
+ ppc4xx: Update VOM405 board configuration
+
+ - remove PCI code
+ - add command line editing
+ - minor cleanup
+
+
+commit 830c800e28e96ec7c3c6936a0bd1b9461f3e77d4
+Date: Tue Sep 2 15:07:53 2008 +0200
+
+ ppc4xx: Remove obsolete initdram() function from VOM405 board
+
+ This patch removed the obsolete initdram() function from
+ VOM405 platform file.
+
+ Some minor cleanup.
+
+
+commit 3d4dd7a941b2327b8c2fc535b782ca307ff8b6c8
+Date: Tue Sep 2 15:07:52 2008 +0200
+
+ ppc4xx: Cleanup VOM405 linker script
+
+
+commit fcaffd597f6f5191b12ca66c2a4789bbdeea85c2
+Date: Tue Sep 2 15:07:51 2008 +0200
+
+ ppc4xx: Add fdt support for VOM405 boards
+
+
+commit 9ec367aa2c5dcf79558aa2b209b45d7686654c14
+Date: Tue Sep 2 11:36:14 2008 +0200
+
+ ppc4xx: Coding style cleanup
+
+ Wrap long lines etc.
+
+
+commit 17e65c21adfb63980e6aff80bfbd2df0eeb12060
+Date: Tue Sep 2 11:35:56 2008 +0200
+
+ ppc4xx: Enable USB on PLU405 boards
+
+ This patch enables the PCI-OHCI controller on PLU405 board.
+
+ Also the default CPU frequency is updated to 266 MHz and
+ command line editing is enabled.
+
+
+commit 40e43e3b87d57b2ac786e27f6e25a7df9940d93b
+Date: Tue Sep 2 11:35:35 2008 +0200
+
+ ppc4xx: Cleanup PLU405 platform file
+
+ This patch
+ - wraps some long lines
+ - removes unused/obsolete functions: misc_init_f() and initdram()
+
+
+commit d74cdb1d0614ab78128e0735a51e7988a7b7ea33
+Date: Tue Sep 2 11:35:04 2008 +0200
+
+ ppc4xx: Cleanup PLU405 linker script
+
+
+commit 3bc1054cec2f6b25822f301ea922a16233baa4c7
+Date: Tue Sep 2 11:34:36 2008 +0200
+
+ ppc4xx: Add fdt support for PLU405 boards
+
+
+commit 5a3e480b783bfbc139586293a54fb875d7c5c5d4
+Date: Tue Sep 2 11:34:08 2008 +0200
+
+ ppc4xx: Increase U-Boot size to 384kB for PLU405 boards
+
+
+commit be1b0d2777e179191a57b138b660547a17e55aad
+Date: Tue Sep 2 11:24:59 2008 +0200
+
+ Don't tftp to unknown flash
+
+ If a board has a variable number of flash banks, there are empty entries
+ in flash_info[] and CFG_DIRECT_FLASH_TFTP is set, tftp boot fails with
+ "Outside available Flash". This patch skips flash banks with unknown
+ flash ids.
+
+
+commit 33314470ab32a3f5412bb61b5f3d6c216c88bf9b
+Date: Thu Aug 28 13:40:44 2008 +0900
+
+ net: smc911x: Add pkt_data_pull and pkt_data_push function
+
+ The RSK7203 board has the SMSC9118 wired up 'incorrectly'.
+ Byte-swapping is necessary, and so poor performance is inevitable.
+ This problem cannot evade by the swap function of CHIP, this can
+ evade by software Byte-swapping.
+ And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
+ functions necessary to solve this problem.
+
+
+commit 10efa024b8ffd9e6aaca63da8bddfdffdc672274
+Date: Sun Aug 31 20:37:00 2008 -0700
+
+ Moved initialization of EEPRO100 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ db64360
+ db64460
+ katmai
+ taihu
+ taishan
+ yucca
+ cpc45
+ cpu87
+ eXalion
+ elppc
+ debris
+ kvme080
+ mpc8315erdb
+ integratorap
+ ixdp425
+ oxc
+ pm826
+ pm828
+ pm854
+ pm856
+ ppmc7xx
+ sc3
+ sc520_spunk
+ sorcery
+ tqm8272
+ tqm85xx
+ utx8245
+
+ Removed initialization of the driver from net/eth.c
+ Also, wrapped contents of pci_eth_init() by CONFIG_PCI.
+
+
+commit 8ca0b3f99c4fce7a599dcaf92ae095496dc8c8e0
+Date: Sun Aug 31 10:45:44 2008 -0700
+
+ Moved initialization of TULIP Ethernet controller to board_eth_init()
+
+ Affected boards:
+ cu824
+ bab7xx
+ adciop
+ dasa_sim
+ mousse
+ mpc8540eval
+ musenki
+ mvblue
+ pcippc2/pcippc6
+ sbc8240
+ stxssa
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit ad3381cf4167120db5c7b88e4970245e1d5c0a32
+Date: Sun Aug 31 10:44:19 2008 -0700
+
+ Moved initialization of E1000 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ ap1000
+ mvbc_p
+ PM854
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit 4fce2aceaf8afd31a252bc782c9dbc497bf40487
+Date: Sun Aug 31 10:40:51 2008 -0700
+
+ Moved initialization of plb2800 Ethernet driver to board_eth_init
+
+ Affected boards:
+ purple
+
+ Removed initialization of controller from net/eth.c
+
+
+commit e1d7480b5de1fd4830bf7cf5e2237d3b0846d08d
+Date: Sun Aug 31 10:39:12 2008 -0700
+
+ Moved initialization of MPC5xxx_FEC Ethernet driver to CPU directory
+
+ Modified board_eth_init() functions of boards that have this FEC in addition
+ to other Ethernet controllers.
+
+ Affected boards:
+ bc3450
+ icecube
+ mvbc_p
+ o2dnt
+ pm520
+ total5200
+ tq5200
+
+ Removed initialization of controller from net/eth.c
+
+
+commit a0aad08f9427ac00218bdb2cb649833ce6ec9b8d
+Date: Sun Aug 31 10:36:38 2008 -0700
+
+ Moved initialization of MPC512x_FEC Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to MPC512x CPU directory and
+ removed code from net/eth.c
+
+
+commit 8218bd2aa68820b878a8413493ae17fd8d21f944
+Date: Sun Aug 31 10:16:59 2008 -0700
+
+ Moved initialization of IncaIP Ethernet controller to board_eth_init
+
+ Affected boards:
+ IncaIP
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit 164846eeb25cb2a5ede7ab9371fdca7f4831a055
+Date: Sun Aug 31 10:15:26 2008 -0700
+
+ Moved initialization of 3COM Ethernet controller (AmigaOne) to board_eth_init()
+
+ Affected boards:
+ AmigaOneG3SE
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit 6aca145e067efe75398e9fac97822bd3700de0b2
+Date: Sun Aug 31 10:13:34 2008 -0700
+
+ Moved initialization of GT6426x Ethernet controller to board_eth_init()
+
+ Affected boards:
+ EVB64260
+ P3G4
+ ZUMA
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit e3090534d62045dcb73f5392bacc64a4e8e443dc
+Date: Sun Aug 31 10:08:43 2008 -0700
+
+ Moved initialization of PCNET Ethernet controller to board_eth_init()
+
+ Affected boards:
+ PN62
+ sc520_cdp
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit b902b8dda5e1fd4d5fe2f202c71ee3521d2c40ed
+Date: Sun Aug 31 10:07:16 2008 -0700
+
+ Moved initialization of NATSEMI Ethernet controller to board_eth_init()
+
+ Affected boards:
+ a3000
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit 19403633dd70333893c2da7926a1d0dcd6dab7d8
+Date: Sun Aug 31 10:03:22 2008 -0700
+
+ Moved initialization of NS8382X Ethernet controller to board_eth_init()
+
+ Affected boards:
+ bc3450
+ cpci5200
+ mecp5200
+ pf2000
+ icecube
+ o2dnt
+ pm520
+ sandpoint8245
+ total5200
+ tqm5200
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit ccdd12f83ef93719fbe85f642aa4dc648b9498f0
+Date: Sun Aug 31 09:59:33 2008 -0700
+
+ Moved initialization of TSI108 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ mpc7448hpc2
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit 0b252f50ae218ae15bfb63af44227972686ebc56
+Date: Sun Aug 31 21:41:08 2008 -0700
+
+ Moved initialization of RTL8139 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ hidden_dragon
+ MPC8544DS
+ MPC8610HPCN
+ R2DPLUS
+ TB0229
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit 02d69891d95ee76b0e86e1715a4dc0b964a57cb7
+Date: Sun Aug 31 09:49:42 2008 -0700
+
+ Moved initialization of RTL8169 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ linkstation
+ r7780mp
+
+ Removed initialization of the driver from net/eth.c
+
+
+commit 3ae071e44256144d6c1e3febb65f6c56bd433769
+Date: Tue Aug 12 22:11:53 2008 -0700
+
+ Moved initialization of Ethernet controllers on Atmel AT91 to board_eth_init()
+
+ Removed at91sam9_eth_initialize() from net/eth.c
+
+
+commit 89973f8a82c28ad893c4c3cc56839a8e10fe5f13
+Date: Sun Aug 31 22:22:04 2008 -0700
+
+ Introduce netdev.h header file and remove externs
+
+ This addresses all drivers whose initializers have already
+ been moved to board_eth_init()/cpu_eth_init().
+
+
+commit 5a8a163ac394d9f4f7ff57f415d82bd673b0068c
+Date: Sun Aug 31 16:33:30 2008 -0500
+
+ Add pixis_set_sgmii command
+
+ The 8544DS and 8572DS platforms support an optional SGMII riser card to
+ expose ethernet over an SGMII interface. Once the card is in, it is also
+ necessary to configure the board such that it uses the card, rather than
+ the on-board ethernet ports. This can either be done by flipping dip switches
+ on the motherboard, or by modifying registers in the pixis. Either way
+ requires a reboot.
+
+ This adds a command to allow users to choose which ports are routed through
+ the SGMII card, and which through the onboard ports. It also allows users
+ to revert to the current switch settings.
+
+ This code does not work on the 8572, as the PIXIS is different.
+
+
+commit 216f2a7156a5fde7b47adc40ad553c888a9cbaa7
+Date: Sun Aug 31 16:33:29 2008 -0500
+
+ Add SGMII support for the 8544 DS
+
+ The 8544 DS has an optional SGMII Riser card, which uses different PHY
+ addresses. Check if we are in SGMII mode, and invoke the SGMII Riser
+ setup code if so.
+
+
+commit 652f7c2eef76a1340928bd660845441e932d86a2
+Date: Sun Aug 31 16:33:28 2008 -0500
+
+ Add support for Freescale SGMII Riser Card
+
+ The 8544DS and 8572DS systems have an optional SGMII riser card which
+ exposes new ethernet ports which are connected to the eTSECs via an
+ SGMII interface. The SGMII PHYs for this board are offset from the standard
+ PHY addresses, so this code modifies the passed in tsec_info structure to
+ use the SGMII PHYs on the card, instead.
+
+
+commit 2abe361c03b43e6dcf68f54e96b5c05156c49284
+Date: Sun Aug 31 16:33:27 2008 -0500
+
+ Add SGMII support to the tsec
+
+ Adds support for configuring the TBI to talk properly with the SerDes.
+
+
+commit 75b9d4ae0d69f214eab641caf12ce8af83a39a42
+Date: Sun Aug 31 16:33:26 2008 -0500
+
+ Pass in tsec_info struct through tsec_initialize
+
+ The tsec driver contains a hard-coded array of configuration information
+ for the tsec ethernet controllers. We create a default function that works
+ for most tsecs, and allow that to be overridden by board code. It creates
+ an array of tsec_info structures, which are then parsed by the corresponding
+ driver instance to determine configuration. Also, add regs, miiregs, and
+ devname fields to the tsec_info structure, so that we don't need the kludgy
+ "index" parameter.
+
+
+commit dd3d1f56a01f460d560766126ee7dfed2ea9bc10
+Date: Sun Aug 31 16:33:25 2008 -0500
+
+ tsec: Move tsec.h to include/
+
+ This is to prepare the way for board code passing in the tsec_info structure
+
+
+commit d23dc394aa69093b6326ad917db04dc0d1aff3f8
+Date: Fri Jun 6 15:52:44 2008 +0200
+
+ PHY: Add support for the M88E1121R Marvell chip.
+
+
+commit 1711f3bd16d1c5e9d17b4c0198b426d86999781b
+Date: Tue Sep 2 21:17:36 2008 +0200
+
+ fw_env.c: fix build problems with MTD_VERSION=old
+
+ (as needed to support old 2.4 Linux kernel based releases)
+
+
+commit 628ffd73bcff0c9f3bc5a8eeb2c7455fe9d28a51
+Date: Mon Sep 1 17:11:26 2008 +0200
+
+ device: make device_register() clone the device
+
+ This is expected by the callers, but this fact was hidden well within
+ the old list implementation.
+
+
+commit c75e772a2f061a508bba28ded1b5bea91f0442b0
+Date: Sun Aug 31 23:28:15 2008 +0900
+
+ sh: Remove CC line from board's Makefile
+
+
+commit 468eae0660de6fdfd9999944c536ecc4797bd944
+Date: Sun Aug 31 23:25:57 2008 +0900
+
+ sh: Replaced "@./mkconfig" for @$(MKCONFIG)
+
+
+commit 3aeb1ff7482a732503186c742d3a5ded4b7a0d34
+Date: Thu Aug 28 14:50:52 2008 +0900
+
+ sh: Add support sh2 to MAKEALL
+
+
+commit 6f3d8bb5faa12dbf3031382286784c978df038ee
+Date: Thu Aug 28 14:52:23 2008 +0900
+
+ sh: Fix compile error rsk7203 board
+
+ This boards used old type preprocessor.
+ This patch fix compile error.
+
+
+commit 1c98172e025018552e9bb4c43b0aaee76f79b1aa
+Date: Thu Aug 28 14:53:31 2008 +0900
+
+ sh: Fix compile error sh7785lcr board
+
+ This boards used old type preprocessor.
+ This patch fix compile error.
+
+
+commit 6f0da4972e48f99d37bc522814940a6022cd3084
+Date: Fri Aug 22 17:39:09 2008 +0900
+
+ sh: Renesas Solutions AP325RXA board support
+
+ AP325RXA is SH7723's reference board.
+ This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
+ In this patch, support SCIF, NOR Flash, and Ethernet.
+
+
+commit ab09f433b50bb83b5e440c335bc3839ee069e534
+Date: Fri Aug 22 17:48:51 2008 +0900
+
+ sh: add support Renesas SH7723
+
+ Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other.
+ This patch supports CPU register's header file and SCIF serial driver.
+
+
+commit c655fad06ba3fb042dbc667724a40e1a9a091248
+Date: Sun Aug 31 23:02:04 2008 +0900
+
+ sh: Renesas RSK+ 7203 board support
+
+ This adds initial support for the RTE RSK+ SH7203 board.
+
+
+commit 6ede753ddf52a7b0f992d9bccbe5e4a0968ca475
+Date: Thu Jul 3 23:11:02 2008 +0900
+
+ sh: Add support Renesas SH7203 processor
+
+
+commit 6ad43d0dd86b612895ddc7f480eb6cdfe793adf9
+Date: Sun Aug 31 22:48:33 2008 +0900
+
+ sh: Add support SH2/SH2A which is CPU of Renesas Technology
+
+ Add support SH2/SH2A basic function.
+
+
+commit 0d53a47dc0737b6aa3a39caee21410c169441ae5
+Date: Sun Aug 31 22:45:08 2008 +0900
+
+ sh: Renesas R0P7785LC0011RL board support
+
+ This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
+ Graphic, Ethernet, USB, SD, RTC, and I2C controller.
+
+ This patch supports the following functions:
+ - 128MB DDR2-SDRAM (29-bit address mode only)
+ - NOR Flash
+ - USB host
+ - Ethernet
+
+
+commit b0b6218929bc7de9a6bdb8e564fa8ec2efa71b4e
+Date: Thu Jul 10 19:32:53 2008 +0900
+
+ sh: add support for SH7785
+
+ Renesas SH7785 has DDR2-SDRAM controller, PCI, and other.
+ This patch supports CPU register's header file.
+
+
+commit d6e04258be8f2408845468d3cf722a4cf0433445
+Date: Sun Aug 31 04:45:42 2008 +0200
+
+ davinci: fix remaining dm644x_eth
+
+
+commit 08ab4e1780fa63c88dd5a5ab52f4ff4ed1ee1878
+Date: Sun Aug 31 04:24:56 2008 +0200
+
+ fs: Move conditional compilation to Makefile
+
+
+commit c1de7a6daf9c657484e1c6d433f01fccd49a7f48
+Date: Sun Aug 31 04:24:55 2008 +0200
+
+ devices: merge to list_head
+
+
+commit ef0255fc75f28655f9681422079287d68a14dbaa
+Date: Sun Aug 31 04:24:51 2008 +0200
+
+ update linux/list
+
+
+commit 71cb31227bee741b274f6c0279b2aac1ab8e28e3
+Date: Sun Aug 31 00:39:48 2008 +0200
+
+ smdk6400: add gitignore
+
+
+commit f9f692e2b146d4e306b777e6d5f69f1d725b9eb9
+Date: Sun Aug 31 00:39:48 2008 +0200
+
+ smdk6400: Use CONFIG_FLASH_CFI_DRIVER
+
+
+commit 7c0e5a8db3d1358b0ce3cc85ada0de6341ca4a15
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ smdk6400: remove redundant bootargs definition
+
+ Double bootargs setting leads to a duplicated environmant entry.
+
+
+commit 11edcfe260f20dcea79284a3e95270989d433854
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ ARM: Add support for S3C6400 based SMDK6400 board
+
+ SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
+ driver for it too. The board can also boot from the NOR flash, but due to
+ hardware limitations it can only address 64KiB on it, which is not enough
+ for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.
+
+
+commit e0056b341069796eaea11eae0fc8eb93a3dceaac
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ NAND: add NAND driver for S3C64XX
+
+ Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6.
+
+
+commit 3fe7b589f9c7463df39056f8872006a67f56a91c
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ S3C64XX: remove broken HWFLOW support from the serial driver
+
+ As noted by Harald Welte, HWFLOW support in the S3C64XX serial driver is
+ broken and currently unused. Remove it.
+
+
+commit 2fb28dcf82048045e1bf5014e938e486fa6c2383
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ serial: add S3C64XX serial driver
+
+ Based on the original S3C64XX UART driver by Samsung for U-Boot 1.1.6.
+
+
+commit 8262813ca04fc57f5d8856e1828085c136e0f1eb
+Date: Sun Aug 31 00:39:46 2008 +0200
+
+ USB: Add support for OHCI controller on S3C6400
+
+ Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
+ try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
+ it should work too and we could still profit from instruction cache.
+
+
+commit 9b07773f8883665b002500c190507e9fd99b7181
+Date: Sun Aug 31 00:39:46 2008 +0200
+
+ ARM: Add arm1176 core with S3C6400 SoC
+
+ Based on the original S3C64XX port by Samsung for U-Boot 1.1.6.
+
+
+commit fcaac589a68115819ddadcf5c18ded9a5f9e2c75
+Date: Sun Aug 31 00:39:46 2008 +0200
+
+ ARM DaVinci: Changing function names for EMAC driver
+
+ DM644x is just one of a series of DaVinci chips that use the EMAC driver.
+ By replacing all the function names that start with dm644x_* to davinci_*
+ we make these function more portable. I have tested this change on my EVM.
+ DM6467 is another DaVinci SOC which uses the EMAC driver and i will
+ be sending patches that add DaVinci DM6467 support to the list soon.
+
+
+commit fbbb1de369ca7d5ace6f7b0ce9d0aee24a6f457b
+Date: Sat Aug 30 23:21:30 2008 +0200
+
+ Integrator[AP/CP] - Remove unused file memsetup.S
+
+ - memsetup.s is changed/merged to lowlevel_init.S
+ memsetup.S has a global label memsetup that just returns back to caller
+ - memsetup global label is changed/merged to lowlevel_init
+ This label is not called from anywhere.
+
+
+commit 89d51d022a63be1a851eda983c8cbce1a044f65f
+Date: Wed Aug 27 21:35:52 2008 +0200
+
+ ARM DaVinci: Standardize names of directories/files
+
+ ARM DaVinci: Standardize names of directories/files.
+
+
+commit 264bbdd11d01f14f5ea4629556ae63b00b13402d
+Date: Fri Jul 11 15:10:13 2008 -0400
+
+ ARM DaVinci: Move common functions to board/davinci/common
+
+ ARM DaVinci: Move common functions to board/davinci/common.
+
+
+commit c2b4b2e4814f4ace9015fdb64132894327400bf0
+Date: Fri Aug 29 11:56:49 2008 +0200
+
+ ppc4xx/NAND: Add select_chip function to 4xx NDFC driver
+
+ This function is needed for the new NAND infrastructure. We only need
+ a dummy implementation though for the NDFC.
+
+
+commit 3d4a746e2fb4545f07d871049805fb34ae97cc94
+Date: Fri Aug 29 12:06:27 2008 +0200
+
+ ppc4xx: Increase image size for NAND boot target
+
+ This is needed since now with HUSH enabled (amcc-common.h) the image
+ read from NAND exceeds the previous limit.
+
+
+commit 6b5049d056cd8ef72d1f2f461ceb2d033d93f759
+Date: Thu Aug 28 23:58:30 2008 -0700
+
+ Move MPC512x_FEC driver to drivers/net
+
+
+commit 80b00af01b3c9154774de2936f05a051e92f6a03
+Date: Thu Aug 28 23:58:29 2008 -0700
+
+ Move MPC5xxx_FEC driver to drivers/net
+
+
+commit 3de7bf0e6b1ad2608014096c8192f13229b2e9d7
+Date: Fri Aug 29 21:53:57 2008 +0200
+
+ cmd_terminal: remove no need ifdef
+
+
+commit 578118bdf122877ae769776be002255be447b4fa
+Date: Fri Aug 29 21:53:57 2008 +0200
+
+ common/Makefile: order by functionality
+
+
+commit ba7b5b2348b684cf8ec424b2e38e267dc1cfd2fb
+Date: Fri Aug 29 21:53:56 2008 +0200
+
+ miiphyutil: Move conditional compilation to Makefile
+
+
+commit 81789c39db3f0f6b621df8c0ec66014d701f368e
+Date: Fri Aug 29 21:53:37 2008 +0200
+
+ autoscript: Move conditional compilation to Makefile
+
+
+commit bbf52df9aa94ffb115b8b1ebeb00d01374bb0a1d
+Date: Fri Aug 29 01:18:11 2008 +0200
+
+ crc16: move to lib_generic
+
+
+commit 55195773eacefb22dd483a3c560ea30a14263ce1
+Date: Fri Aug 29 01:18:01 2008 +0200
+
+ miiphybb: move to drivers/net/phy
+
+
+commit e8314035996a9118ac5948df2ff8a2f2161ed67a
+Date: Thu Aug 28 12:31:51 2008 +0200
+
+ soft_spi: move to drivers/spi
+
+
+commit 4d75e0aa9caca64d4a1d55d95cd1ca5f30d9fc56
+Date: Thu Aug 28 12:31:51 2008 +0200
+
+ soft_i2c: move to drivers/i2c
+
+
+commit 717a222229fdb77703e9174d0eb08a4b41febf49
+Date: Thu Aug 28 12:31:48 2008 +0200
+
+ gunzip: move to lib_generic
+
+
+commit 52aef8f9ba28b747973bf76741c23db658d5773c
+Date: Tue Aug 26 19:55:23 2008 +0200
+
+ ppc4xx: NAND configuration
+
+ Made NAND bank configuration setting a config variable.
+
+
+commit 5bc542a593abc9e974fbd34704af85c37c366c60
+Date: Thu Aug 28 16:03:28 2008 -0700
+
+ ppc4xx: fix UIC external_interrupt hang on UIC0
+
+ This patch fixes a UIC external_interrupt hang if critical or non-critical
+ interrupt is set at the same time as a normal interrupt is set on UIC0.
+
+
+commit 04737d5ffd16248cb80ab3dd4f3765057a803f18
+Date: Wed Aug 27 16:39:00 2008 -0700
+
+ ppc4xx: Optimizations/Cleanups for IBM DDR2 Memory Controller
+
+ Removed Magic numbers from Initialization preload registers
+ Tested with Kilauea, Glacier, Canyonlands and Katmai boards
+ About 5-7% improvement seen for LMBench memtests
+
+
+commit 8a490422bed685c9491274ec997f62061d88620b
+Date: Thu Aug 28 13:17:07 2008 -0600
+
+ ADS5121: Fix NOR and CPLD ALE timing for rev 2 silicon
+
+ MPC5121 rev 2 silicon has a new register for controlling how long
+ CS is asserted after deassertion of ALE in multiplexed mode.
+
+ The default is to assert CS together with ALE. The alternative
+ is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
+
+ The default is wrong for the NOR flash and CPLD on the ADS5121.
+
+ This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
+ it does so conditionally based on silicon rev 2.0 or greater.
+
+
+commit 5d9a5efa4b332f442b54a755d49969123c3a8742
+Date: Tue Aug 19 00:56:46 2008 +0600
+
+ Add I2C frequency dividers for ColdFire
+
+ The existing I2C freqency dividers for FDR does not apply
+ to ColdFire platforms; thus, a seperate table is added
+ based on MCF5xxx Reference Manual
+
+
+commit eec567a67e00d1ed8d941e9098b7d421f4091abf
+Date: Tue Aug 19 03:01:19 2008 +0600
+
+ ColdFire: I2C fix for multiple platforms
+
+
+commit d53cf6a9c7423cba668b867978648645f71c3090
+Date: Tue Aug 19 00:37:13 2008 +0600
+
+ ColdFire: Add CONFIG_MII_INIT for M5272C3
+
+
+commit f78ced3028d4130b24a318943a70cf5584ab16f4
+Date: Tue Aug 19 00:26:25 2008 +0600
+
+ ColdFire: Multiple fixes for MCF5445x platforms
+
+ Add FEC pin set and mii reset in __mii_init(). Change
+ legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
+ change cfi_offset to 0, and change CFG_FLASH_CFI to
+ CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
+ M54455EVB env settings in configuration file.
+
+
+commit 454e725b3a9537b7f273bbd0cbca180f23a7a6e8
+Date: Fri Aug 15 18:24:25 2008 +0000
+
+ ColdFire: Change the SDRAM BRD2WT timing from 3 to 7
+
+ The user manuals recommend 7.
+
+
+commit 79e0799cf6e88d98d77b216a55234bf674b59a4e
+Date: Fri Aug 15 16:50:07 2008 +0000
+
+ ColdFire: Raise uart baudrate to 115200 bps
+
+ M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
+ uart baudrate increase from 19200 to 115200 bps
+
+
+commit ab6ba842682552ccf071d0034da0a20633d1d1ac
+Date: Wed Aug 13 12:07:03 2008 +0000
+
+ ColdFire: Fix board.c warning message
+
+ Implicit declaration of nand_init() warning message
+
+
+commit 5798b1c4650e9a8713c95b25c1e669a2bc80a97b
+Date: Wed Aug 27 01:10:34 2008 -0500
+
+ FSL DDR: Remove duplicate setting of cs0_bnds register on 86xx.
+
+
+commit 258c37b147353bc522ffc33dfbd7d0d9cd7c32d7
+Date: Thu Aug 21 20:44:49 2008 +0200
+
+ mpc52xx: added support for the MPC5200 based MUC.MC52 board from MAN.
+
+
+commit 9cff4448a9cb882defe6c8bde73b77fc0c636799
+Date: Tue Aug 19 14:46:36 2008 -0500
+
+ mpc85xx: remove redudant code with lib_ppc/interrupts.c
+
+ For some reason we duplicated the majority of code in lib_ppc/interrupts.c
+ not show how that happened, but there is no good reason for it.
+
+ Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
+ they exist.
+
+
+commit 9490a7f1a9484617bad75c60807ce02c8a3a6d56
+Date: Fri Jul 25 13:31:05 2008 -0500
+
+ mpc85xx: Add support for the MPC8536DS reference board
+
+
+commit ef50d6c06ece74fb17e8d7510e62cad9df8b810d
+Date: Tue Aug 12 11:14:19 2008 -0500
+
+ mpc85xx: Add support for the MPC8536
+
+ The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We
+ also have SERDES init code for the 8536.
+
+
+commit 129ba616b3813dde861f25f3d8a3c47c5c36ad5f
+Date: Tue Aug 12 11:13:08 2008 -0500
+
+ mpc85xx: Add support for the MPC8572DS reference board
+
+
+commit 457caecdbca3df21a93abff19eab12dbc61b7897
+Date: Wed Aug 27 01:05:35 2008 -0500
+
+ FSL DDR: Remove old SPD support from cpu/mpc85xx
+
+ All 85xx boards have been converted to the new code so we can
+ remove the old SPD DDR setup code.
+
+
+commit 0e7927db138976469e7257e29c1338050a50fcd9
+Date: Wed Aug 27 01:04:07 2008 -0500
+
+ FSL DDR: Convert STXSSA to new DDR code.
+
+
+commit c360d9b970fbb9c13744c355879671165bbb9b9e
+Date: Wed Aug 27 01:03:42 2008 -0500
+
+ FSL DDR: Convert STXGP3 to new DDR code.
+
+
+commit 8e55313b7ae12352a343f9b9962e662dbd897187
+Date: Tue Aug 26 23:52:58 2008 -0500
+
+ FSL DDR: Convert SBC8560 to new DDR code.
+
+
+commit 9658bec2e8f55d56ca1be70090ce5a348be4980f
+Date: Tue Aug 26 23:52:32 2008 -0500
+
+ FSL DDR: Convert MPC8540EVAL to new DDR code.
+
+
+commit 6bfa8f723cfd82c55e3ef5620ade396916470a70
+Date: Tue Aug 26 23:52:07 2008 -0500
+
+ FSL DDR: Convert PM856 to new DDR code.
+
+
+commit d53bd3e17bd4f460257c19255569ea6dcfaae817
+Date: Tue Aug 26 23:51:49 2008 -0500
+
+ FSL DDR: Convert PM854 to new DDR code.
+
+
+commit 33b9079ba20926f14238fff863b68a98e938948e
+Date: Tue Aug 26 23:15:28 2008 -0500
+
+ FSL DDR: Convert sbc8548 to new DDR code.
+
+
+commit a947e4c7eb15cea1d9fb633955c516aab5ad35dd
+Date: Tue Aug 26 23:14:14 2008 -0500
+
+ FSL DDR: Convert atum8548 to new DDR code.
+
+
+commit be0bd8234b9777ecd63c4c686f72af070d886517
+Date: Tue Aug 26 22:56:56 2008 -0500
+
+ FSL DDR: Convert socrates to new DDR code.
+
+
+commit 1167a2fd56138b716e01370c4267f3b70bf9ffa0
+Date: Tue Aug 26 08:02:30 2008 -0500
+
+ FSL DDR: Convert MPC8544DS to new DDR code.
+
+
+commit e6f5b35b41ddbd637bb9ca4ad985b1e0b07dae0e
+Date: Tue Mar 18 13:51:05 2008 -0500
+
+ FSL DDR: Convert MPC8568MDS to new DDR code.
+
+
+commit e31d2c1e2bc954dc32e33bb2076139f85b95f8e6
+Date: Tue Mar 18 13:51:06 2008 -0500
+
+ FSL DDR: Convert MPC8548CDS to new DDR code.
+
+
+commit aa11d85cf318b961e029fe50d68ca47d004bce93
+Date: Mon Mar 17 15:48:18 2008 -0500
+
+ FSL DDR: Convert MPC8541CDS to new DDR code.
+
+
+commit 2b40edb10d81da7bba724edbccd7f53777112579
+Date: Tue Mar 18 11:12:42 2008 -0500
+
+ FSL DDR: Convert MPC8555ADS to new DDR code.
+
+
+commit 8b625114e8bc5a6b436181167a6e7fcd3303dd2c
+Date: Tue Mar 18 11:12:44 2008 -0500
+
+ FSL DDR: Convert MPC8560ADS to new DDR code.
+
+
+commit 9617c8d49a21703eaf13a4033ab1a56eecc033cc
+Date: Fri Jun 6 13:12:18 2008 -0500
+
+ FSL DDR: Convert MPC8540ADS to new DDR code.
+
+
+commit 2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693
+Date: Tue Aug 26 21:34:55 2008 -0500
+
+ FSL DDR: Add 85xx specific register setting
+
+
+commit 6fb1b7346849ccd0c20306143e334f5b76143070
+Date: Mon Jun 9 11:07:46 2008 -0500
+
+ FSL DDR: Add e500 TLB helper for DDR code
+
+ Provide a helper function that board code can call to map TLBs when
+ setting up DDR.
+
+
+commit d26b739afe5a6760bd345743188759cd9d0f3b47
+Date: Tue Aug 26 17:03:38 2008 -0500
+
+ dm9000 remove dead external phy support, gpio fix
+
+ dm9000 has code to detect and initialize external phy parts, but later
+ on in the code the part is forced to use the internal phy
+ unconditionally. Remove the unused/untested code.
+
+ change the GPIO initialization so that only the GPIO used as an
+ internal phy reset (hardwired in the chip) is set as an output. The
+ remaining GPIO need to be handled by board specific code to prevent
+ possible drive conflicts. Set as inputs for safety.
+
+ replace a few magic numbers with defines
+
+
+commit a1573db0c07c8ba99e9c373bb07ecd6f59da672c
+Date: Tue Aug 26 11:17:48 2008 -0500
+
+ Standardize bootp, tftpboot, rarpboot, dhcp, and nfs command descriptions
+
+ cmd_net.c command descriptions were updated to describe the optional
+ hostIPaddr argument. The dhcp command help message was also updated
+ to more closely reflect the other commands in cmd_net.c
+
+
+commit 51dfe1382ebaf691485badfa0ea5e75b0710531b
+Date: Wed Aug 20 11:30:28 2008 +0200
+
+ Fix bogus error message in the DHCP handler
+
+ The DHCP handler has 1 state that is not listed in this case, causing a
+ failure message when there is actually no failure.
+
+
+commit 61365501a0e2cae9c1df2818b7b5b3f52c450d18
+Date: Wed Aug 20 11:30:27 2008 +0200
+
+ Fix compile error when CONFIG_BOOTP_RANDOM_DELAY is set.
+
+ The option CONFIG_BOOTP_RANDOM_DELAY does not compile, because of a
+ missing extern inside the net/bootp.h header
+
+
+commit 1803f7f91ff35ca402259065df7557107dcf28a2
+Date: Tue Aug 19 21:26:32 2008 +0000
+
+ ColdFire: Add FEC Buffer descriptors in SRAM
+
+ Add FEC Buffer descriptors and data buffer in SRAM for
+ faster execution and access.
+
+
+commit 429be27ce195210d4b9decf9e867b9ca6155a87d
+Date: Thu Aug 21 23:55:11 2008 +0000
+
+ Fix ColdFire FEC warning messages
+
+ Types mismatch and implicit declaration of icache_invalid()
+ warning messages
+
+
+commit 6a002171098e968bd5b362347d2831224fab6048
+Date: Sat Jul 12 00:17:50 2008 -0700
+
+ Moved initialization of SKGE Ethernet driver to board code.
+
+ The only board using this driver is the SL8245 board.
+ Removed initialization for the driver from net/eth.c
+
+
+commit 8379f42bc745eb9e4ca551a30fd2d0a63f740d75
+Date: Sat Jul 12 00:08:45 2008 -0700
+
+ Moved conditional compilation to Makefile for SK98 Ethernet driver
+
+ Brute-force removal of #ifdefs. Didn't touch the code.
+
+commit 65d3d99c28dc363d15eaee78225ff643df499b97
+Date: Fri Jul 11 23:42:19 2008 -0700
+
+ Moved initialization of ULI526X Ethernet driver to board code.
+
+ The only board using this driver is the Freescale MPC8610HPCD board.
+ Removed initialization for the driver from net/eth.c
+
+
+commit 914947313a710f5dcf06beaf7f2aa24f1ebcce4f
+Date: Fri Jul 11 23:15:28 2008 -0700
+
+ Moved initialization of Blackfin EMAC Ethernet controller to board_eth_init()
+
+ Added board_eth_init() function to bf537-stamp board.
+ Removed initialization for the Blackin EMAC driver from net/eth.c
+
+
+commit fc363ce35408f348cacced68505f3747a53e3d7c
+Date: Wed Jul 9 01:04:19 2008 -0700
+
+ Moved initialization of GRETH Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to leon2/leon3 CPU directories and
+ removed code from net/eth.c
+
+
+commit 86882b80771309bceb11c6accfd7f6f90ade8bfc
+Date: Tue Aug 26 22:16:25 2008 -0700
+
+ Moved initialization of MCFFEC Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to coldfire CPU directories and
+ removed code from net/eth.c
+
+
+commit b31da88b9c160d80d42a59cbbb31e24f27184d5c
+Date: Tue Aug 26 22:12:36 2008 -0700
+
+ Moved initialization of FSL_MCDMAFEC Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to cpu/mcf547x_8x directory and
+ removed code from net/eth.c
+
+
+commit b5710d9974f6f0f3ddb4e67d6cccc262ab37049e
+Date: Tue Aug 26 15:01:38 2008 -0500
+
+ FSL DDR: Remove old SPD support from cpu/mpc86xx
+
+ All 86xx boards have been converted to the new code so we can
+ remove the old SPD DDR setup code.
+
+
+commit 9bd4e5911b750837515466bc7449087698b88e0e
+Date: Tue Aug 26 15:01:37 2008 -0500
+
+ FSL DDR: Convert SBC8641D to new DDR code.
+
+
+commit 39aa1a73483e1ac2bd56d5523abfc3970ee82c77
+Date: Tue Aug 26 15:01:36 2008 -0500
+
+ FSL DDR: Convert MPC8610HPCD to new DDR code.
+
+
+commit 6a8e5692933e8e6d6e5ba7e594f49dd6d4c3a263
+Date: Tue Aug 26 15:01:35 2008 -0500
+
+ FSL DDR: Convert MPC8641HPCN to new DDR code.
+
+
+commit 46ff4f1100ea64a01d21cc008ce85ac15eb1821f
+Date: Tue Aug 26 15:01:34 2008 -0500
+
+ FSL DDR: Add 86xx specific register setting
+
+
+commit 233fdd502a6c227f476212b3097653ad48d7e254
+Date: Tue Aug 26 15:01:32 2008 -0500
+
+ FSL DDR: Add DDR2 DIMM paramter support
+
+ Compute DIMM parameters based upon the SPD information.
+
+
+commit 05c05a2363a6ac11e0e405926034546ffad71fad
+Date: Tue Aug 26 15:01:30 2008 -0500
+
+ FSL DDR: Add DDR1 DIMM paramter support
+
+ Compute DIMM parameters based upon the SPD information in spd.
+
+
+commit 58e5e9aff147e8c7e2bc1406bf9384f65f020ffa
+Date: Tue Aug 26 15:01:29 2008 -0500
+
+ FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
+
+ The main purpose of this rewrite it to be able to share the same
+ initialization code on all FSL PowerPC products that have DDR
+ controllers. (83xx, 85xx, 86xx).
+
+ The code is broken up into the following steps:
+ GET_SPD
+ COMPUTE_DIMM_PARMS
+ COMPUTE_COMMON_PARMS
+ GATHER_OPTS
+ ASSIGN_ADDRESSES
+ COMPUTE_REGS
+ PROGRAM_REGS
+
+ This allows us to share more code an easily allow for board specific code
+ overrides.
+
+ Additionally this code base adds support for >4G of DDR and provides a
+ foundation for supporting interleaving on processors with more than one
+ controller.
+
+
+commit f784e32b4bce0013983506b11af4b85b8ca3d36e
+Date: Tue Aug 26 15:01:28 2008 -0500
+
+ FSL DDR: Provide a generic set_ddr_laws()
+
+ Provide a helper function that will setup the last available
+ LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
+
+
+commit 0f2cbe3f5eddbdf3848265f35e4f714434929cff
+Date: Tue Aug 26 15:01:27 2008 -0500
+
+ Add proper SPD definitions for DDR1/2/3
+
+ Also adds helper functions for DDR1/2 to verify the checksum.
+
+
+commit 285db74716c724ae8a0ff177878fd09a74428c7b
+Date: Wed Aug 27 01:02:48 2008 +0200
+
+ Update CHANGELOG
+
+
+commit adf22b66d8bf05bd46e098cf71e6dca29b30aa7b
+Date: Tue Aug 19 10:08:49 2008 +0200
+
+ Add support for muas3001 board (MPC8270)
+
+
+commit 322098bff32410d2a00031649b47c4ec90a66d9a
+Date: Tue Aug 19 08:31:18 2008 +0530
+
+ common/cmd_load.c cleanup - remove unused variables
+
+ - Remove unused global variable os_data_count.
+ - Remove unused variable z.
+
+
+commit 306620b762a4f9fa6678568ad2e8772dec145208
+Date: Mon Aug 18 13:35:27 2008 +0200
+
+ remove MVS1 board
+
+ MVS1 board has reached end-of-life and can be removed completely.
+
+
+commit 40d7e99d374ba0a0a29cd1a8ba40d3b7c2c175c7
+Date: Fri Aug 15 08:24:45 2008 -0500
+
+ bootm: refactor do_reset and os boot function args
+
+ There is no need for each OS specific function to call do_reset() we
+ can just do it once in bootm. This means its feasible on an error for
+ the OS boot function to return.
+
+ Also, remove passing in cmd_tbl_t as its not needed by the OS boot
+ functions. flag isn't currently used but might be in the future so
+ we left it alone.
+
+
+commit 40afac22a9c602e55c501c800f1c064324711b56
+Date: Fri Aug 15 08:24:44 2008 -0500
+
+ fdt: Added resize command
+
+ Resize the fdt to size + padding to 4k boundary
+
+
+commit 2a1a2cb6e2b87ee550e6f27b647d23331dfd5e1b
+Date: Fri Aug 15 08:24:43 2008 -0500
+
+ fdt: refactor initrd related code
+
+ Created a new fdt_initrd() to deal with setting the initrd properties
+ in the device tree and fixing up the mem reserve. We can use this
+ both in the choosen node handling and lets us remove some duplicated
+ code when we fixup the initrd info in bootm on PPC.
+
+
+commit 3082d2348c8e13342f5fdd10e9b3f7408062dbf9
+Date: Fri Aug 15 08:24:42 2008 -0500
+
+ fdt: refactor fdt resize code
+
+ Move the fdt resizing code out of ppc specific boot code and into
+ common fdt support code.
+
+
+commit 396f635b8ff3ccbc38d75d5eda98444c6466810a
+Date: Fri Aug 15 08:24:41 2008 -0500
+
+ bootm: refactor image detection and os load steps
+
+ Created a bootm_start() that handles the parsing and detection of all
+ the images that will be used by the bootm command (OS, ramdisk, fdt).
+ As part of this we now tract all the relevant image offsets in the
+ bootm_headers_t struct. This will allow us to have all the needed
+ state for future sub-commands and lets us reduce a bit of arch
+ specific code on SPARC.
+
+ Created a bootm_load_os() that deals with decompression and loading
+ the OS image.
+
+
+commit e906cfae08e8cc2447f59b1bc4c22ab9c3c286d2
+Date: Fri Aug 15 08:24:40 2008 -0500
+
+ bootm: move lmb into the bootm_headers_t structure
+
+ To allow for persistent state between future bootm subcommands we
+ need the lmb to exist in a global state.
+ Moving it into the bootm_headers_t allows us to do that.
+
+
+commit 54f9c86691309b2f919f567f9255b8bcad2c7651
+Date: Fri Aug 15 08:24:39 2008 -0500
+
+ bootm: Set working fdt address as part of the bootm flow
+
+ Set the fdt working address so "fdt FOO" commands can be used as part
+ of the bootm flow. Also set an the environment variable "fdtaddr"
+ with the value.
+
+
+commit 06a09918f3903450313e2047a9cc258bf5872f46
+Date: Fri Aug 15 08:24:38 2008 -0500
+
+ bootm: refactor fdt locating and relocation code
+
+ Move the code that handles finding a device tree blob and relocating
+ it (if needed) into common code so all arch's have access to it.
+
+
+commit c4f9419c6b54958e0eddbcbc9e5a4a7b7ec99865
+Date: Fri Aug 15 08:24:37 2008 -0500
+
+ bootm: refactor ramdisk locating code
+
+ Move determing if we have a ramdisk and where its located into the
+ common code. Keep track of the ramdisk start and end in the
+ bootm_headers_t image struct.
+
+
+commit c160a9544743e80e8889edb2275538e7764ce334
+Date: Fri Aug 15 08:24:36 2008 -0500
+
+ bootm: refactor entry point code
+
+ Move entry point code out of each arch and into common code.
+ Keep the entry point in the bootm_headers_t images struct.
+
+
+commit 20220d22b9f41446288588cd2e457e0077a18bed
+Date: Wed Aug 13 11:44:57 2008 -0700
+
+ mpc7448hpc2: Fix PCI I/O space mapping.
+
+ PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires
+ PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O
+ space such that 0xFA000000 in the processor's address space maps to 0
+ on the PCI I/O bus.
+
+
+commit b4e07520bbb5467ad72eb92a5c9177d2797b9e30
+Date: Wed Aug 13 18:10:26 2008 +0200
+
+ i.MX31: Specify maintainers for i.MX31-based boards
+
+
+commit 51e46e28fda4bbdf5149ac7f67d62fcc8df4da63
+Date: Tue Aug 26 15:01:28 2008 +0200
+
+ ADS5121: adjust image addresses in RAM and flash
+
+ Use the same mapping in flash as used by Linux
+
+
+commit 19f101412c16edee9fd55db4039e1d68a833b28b
+Date: Tue Aug 26 13:14:34 2008 +0200
+
+ cmd_mem.c: Fix help message alignment
+
+ Bug was introced by "Big white-space cleanup" (53677ef1)
+
+
+commit 1a9eeb78b825bfade31d7606a2fe3b9eca9e35be
+Date: Wed Aug 20 11:11:52 2008 +0200
+
+ change mvBL-M7 default env and move to vendor subdir
+
+ fix mvBL-M7 config and move to matrix_vision subdir
+
+
+commit 002d27caf26e7eb913d474d3a91f67d56c8c31d5
+Date: Fri Aug 22 23:52:40 2008 -0700
+
+ MPC83XX: Add miscellaneous registers and #defines to support MPC83xx family devices
+
+ This patch adds elements to the 83xx sysconf structure and #define values that are used
+ by mpc83xx family devices.
+
+
+commit 447ad5768abda669ac0e7f46fcdb62fbe828d637
+Date: Fri Aug 22 11:00:15 2008 -0700
+
+ MPC8349EMDS: Add PCI Agent (PCISLAVE) support
+
+ Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
+ PCI card rather than a host computer.
+
+
+commit 4ff9aea9d6b5602683a920951ef896996438af62
+Date: Fri Aug 22 11:00:14 2008 -0700
+
+ mpc83xx: add PCISLAVE support to 83XX_GENERIC_PCI setup code
+
+ This adds a helper function to unlock the PCI configuration bit, so that
+ any extra PCI setup (such as outbound windows, etc.) can be done after
+ using the 83XX_GENERIC_PCI code to set up the PCI bus.
+
+
+commit 162338e1fcde231ca4d562e5ebd7859456731691
+Date: Fri Aug 22 11:00:13 2008 -0700
+
+ MPC8349EMDS: use 83XX_GENERIC_PCI setup code
+
+ Change the MPC8349EMDS board to use the generic PCI initialization code
+ for the mpc83xx cpu.
+
+
+commit f4e55a4941e8ba46bc06020b2747928adf8fdee7
+Date: Mon Aug 25 14:53:09 2008 -0500
+
+ fix out of tree building
+
+
+commit a49d10cf027d059ee15c262010a05cdaec0961e1
+Date: Mon Aug 25 23:45:41 2008 +0200
+
+ Minor coding style cleanup, updte CHANGELOG
+
+
+commit 4d56e8dea670757c801a6a65531f02a8f981ce1f
+Date: Wed Aug 20 20:29:38 2008 +0200
+
+ RTC: Fix Makefile problem with COBJS-$(CONFIG_RTC_DS1307 || CONFIG_RTC_DS1338)
+
+ This "||" doesn't seem to work. Now using the idea suggest by Scott Wood
+ to combine both config options into one line. This even allows defining
+ both options and not generating the target object twice.
+
+
+commit 079edb913dbae147b50a488cf02e03f473fc5f28
+Date: Fri Jul 4 16:50:05 2008 +0200
+
+ MX31: fix bit masks in function mx31_decode_pll()
+
+ Bits MPCTL[MFN] and MPCTL[MFD] were not fully covered.
+
+
+commit e8f1207bbf2df6fb693ee1aa3329b2014c92e5e6
+Date: Mon Aug 25 11:11:34 2008 +0200
+
+ Correct ARM Versatile Timer Initialization
+
+ - According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
+ -- Timer Value Register @ TIMER Base + 4 is Read-only.
+ -- Prescale Value (Bits 3-2 of TIMER Control register)
+ can only be one of 00,01,10. 11 is undefined.
+ -- CFG_HZ for Versatile board is set to
+ #define CFG_HZ (1000000 / 256)
+ So Prescale bits is set to indicate
+ - 8 Stages of Prescale, Clock divided by 256
+ - The Timer Control Register has one Undefined/Shouldn't Use Bit
+ So we should do read/modify/write Operation
+
+
+commit 535cfa4f3de86cf48d6c0af1daf33aebdca089f9
+Date: Mon Aug 25 11:30:29 2008 +0200
+
+ Add ARM AMBA PL031 RTC Support
+
+
+commit e39411674669cc880e1ec4a8ca4794fb15c33a45
+Date: Tue Aug 19 16:21:03 2008 -0400
+
+ ARM DaVinci: Removed redundant NAND initialization code.
+
+ ARM DaVinci: Removed redundant NAND initialization code.
+
+
+commit b3fb663b20d995ca41327db877ddb168279b3f62
+Date: Tue Aug 19 16:21:00 2008 -0400
+
+ ARM DaVinci: Fix compilation error with new MTD code.
+
+ ARM DaVinci: Fix compilation error with new MTD code.
+
+
+commit 109c30fb8edea1a15d37a6ce787cd5faf33d8e43
+Date: Fri Aug 22 14:37:05 2008 -0400
+
+ Add note on dereferencing /aliases pointers
+
+ Replace the "must quote special characters" note with a hint on
+ how to dereference /aliases pointers by omitting the leading "/".
+ This feature was introduced by Kumar Gala as a libfdt enhancement
+ in commit ed035708235332c3c117ee3bb1a426063f03cfcb.
+
+ Example:
+
+ => fdt print /aliases
+ aliases {
+ ethernet0 = "/qe@e0100000/ucc@2000";
+ ethernet1 = "/qe@e0100000/ucc@3000";
+ serial0 = "/soc8360@e0000000/serial@4500";
+ serial1 = "/soc8360@e0000000/serial@4600";
+ pci0 = "/pci@e0008500";
+ };
+ => fdt print ethernet0
+ ucc@2000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ cell-index = <0x1>;
+ reg = <0x2000 0x200>;
+ interrupts = <0x20>;
+ interrupt-parent = <0x2>;
+ local-mac-address = [00 00 00 00 00 00];
+ rx-clock-name = "none";
+ tx-clock-name = "clk9";
+ phy-handle = <0x3>;
+ phy-connection-type = "rgmii-id";
+ pio-handle = <0x4>;
+ };
+
+
+commit feeca3f578b7f53c032ba203698751c982f8bf5a
+Date: Thu Aug 14 08:28:19 2008 -0500
+
+ libfdt: Add support for using aliases in fdt_path_offset()
+
+ If the path doesn't start with '/' check to see if it matches some alias
+ under "/aliases" and substitute the matching alias value in the path
+ and retry the lookup.
+
+
+commit 0219399a4e3a8edb428e1924e1a03d58cccf8d8e
+Date: Wed Aug 6 14:50:49 2008 +1000
+
+ libfdt: Implement fdt_get_property_namelen() and fdt_getprop_namelen()
+
+ As well as fdt_subnode_offset(), libfdt includes an
+ fdt_subnode_offset_namelen() function that takes the subnode name to
+ look up not as a NUL-terminated string, but as a string with an
+ explicit length. This can be useful when the caller has the name as
+ part of a longer string, such as a full path.
+
+ However, we don't have corresponding 'namelen' versions for
+ fdt_get_property() and fdt_getprop(). There are less obvious use
+ cases for these variants on property names, but there are
+ circumstances where they can be useful e.g. looking up property names
+ which need to be parsed from a longer string buffer such as user input
+ or a configuration file, or looking up an alias in a path with
+ IEEE1275 style aliases.
+
+ So, since it's very easy to implement such variants, this patch does
+ so. The original NUL-terminated variants are, of course, implemented
+ in terms of the namelen versions.
+
+
+commit f171746f701ea58bf6a53e835b53d2aaebee0d81
+Date: Tue Jul 29 14:51:22 2008 +1000
+
+ libfdt: Forgot one function when cleaning the namespace
+
+ In commit b6d80a20fc293f3b995c3ce1a6744a5574192125, we renamed all
+ libfdt functions to be prefixed with fdt_ or _fdt_ to minimise the
+ chance of collisions with things from whatever package libfdt is
+ embedded in, pulled into the libfdt build via that environment's
+ libfdt_env.h.
+
+ Except... I missed one. This patch applies the same treatment to
+ _stringlist_contains(). While we're at it, also make it static since
+ it's only used in the same file.
+
+
+commit 46390da15411351fc3b498bd8c1615f78fe80df0
+Date: Wed Jul 9 11:22:44 2008 +0200
+
+ libfdt: Improve documentation in libfdt.h
+
+ Fix a few typos and mistakes.
+
+
+commit fc7758ee4f5782878f2e96876b7bc56cfee0ac66
+Date: Wed Jul 9 14:10:24 2008 +1000
+
+ libfdt: Increase namespace-pollution paranoia
+
+ libfdt is supposed to easy to embed in projects all and sundry.
+ Often, it won't be practical to separate the embedded libfdt's
+ namespace from that of the surrounding project. Which means there can
+ be namespace conflicts between even libfdt's internal/static functions
+ and functions or macros coming from the surrounding project's headers
+ via libfdt_env.h.
+
+ This patch, therefore, renames a bunch of libfdt internal functions
+ and macros and makes a few other chances to reduce the chances of
+ namespace collisions with embedding projects. Specifically:
+ - Internal functions (even static ones) are now named _fdt_*()
+
+ - The type and (static) global for the error table in
+ fdt_strerror() gain an fdt_ prefix
+
+ - The unused macro PALIGN is removed
+
+ - The memeq and streq macros are removed and open-coded in the
+ users (they were only used once each)
+
+ - Other macros gain an FDT_ prefix
+
+ - To save some of the bulk from the previous change, an
+ FDT_TAGALIGN() macro is introduced, where FDT_TAGALIGN(x) ==
+ FDT_ALIGN(x, FDT_TAGSIZE)
+
+
+commit c66830263af19831f2b7db307f79d1943febf7f9
+Date: Mon Jul 7 10:14:15 2008 +1000
+
+ dtc: Enable and fix -Wcast-qual warnings
+
+ Enabling -Wcast-qual warnings in dtc shows up a number of places where
+ we are incorrectly discarding a const qualification. There are also
+ some places where we are intentionally discarding the 'const', and we
+ need an ugly cast through uintptr_t to suppress the warning. However,
+ most of these are pretty well isolated with the *_w() functions. So
+ in the interests of maximum safety with const qualifications, this
+ patch enables the warnings and fixes the existing complaints.
+
+
+commit ef4e8ce1beb5b93aedda5a4c1b90bfd989c6791e
+Date: Mon Jul 7 10:10:48 2008 +1000
+
+ dtc: Enable and fix -Wpointer-arith warnings
+
+ This patch turns on the -Wpointer-arith option in the dtc Makefile,
+ and fixes the resulting warnings due to using (void *) in pointer
+ arithmetic. While convenient, pointer arithmetic on void * is not
+ portable, so it's better that we avoid it, particularly in libfdt.
+
+ Also add necessary definition of uintptr_t needed by David Gibson's
+ changeset "dtc: Enable and fix -Wpointer-arith warnings" (the definition
+ comes from stdint.h, which u-boot doesn't have). -- gvb
+
+
+commit 5d4b3d2b31e58fcb2d4bd10af762f5ff41b229fd
+Date: Thu Aug 21 21:54:53 2008 -0700
+
+ ppc4xx: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix
+
+ During recent PCI-E tests it has been found that current
+ driverl level and de-emphasis values are not set correctly.
+ After sweeping throgh all de-ephasis values, it was found that
+ 0x130 is a right value. Where 0x13 is driver level and 0 is
+ de-emphasis.
+
+
+commit 0bb86d823b6c150c7ee17de0cfca9ffccc16463b
+Date: Wed Aug 20 20:46:56 2008 +0200
+
+ Make the YAFFS filesystem work
+
+ Recently the YAFFS filesystem support has been added to U-boot.
+ However, just enabling CONFIG_YAFFS2 is not enough to get it working.
+
+ ymount will generate an exception (when dereferencing mtd->readoob()), because
+ the genericDevice is a null pointer. Further, a lot of logging is produced
+ while using YAFFS fs, so logging should also be disabled.
+ Both issues are solved by this patch.
+
+ With this patch and CONFIG_YAFFS2 enabled, I get a readable filesystem
+ in U-boot, as well as in Linux.
+
+ Tested on a Atmel AT91SAM9261EK board.
+
+
+commit bfd7f38614e21f745b6d6845fcc616ebc5e4d36f
+Date: Tue Aug 19 08:42:53 2008 +0900
+
+ Fix OneNAND read_oob/write_oob functions compatability
+
+ Also sync with kernel OneNAND codes
+
+
+commit 8d765456c1d33f2010d2717ee58de7647fdc6346
+Date: Mon Aug 18 17:11:20 2008 -0500
+
+ NAND: Remove delay from nand_boot_fsl_elbc.c.
+
+ It was for debugging purposes, and shouldn't have been left in.
+
+
+commit f556483734126793522fb7a8cf36af90da78f084
+Date: Thu Aug 21 11:05:03 2008 +0200
+
+ ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patch
+
+ This patch fixes some minor issues introduced with the patch:
+ ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:
+
+ - Rework memory-queue and PLB arbiter optimization code, that the
+ local variable is not needed anymore. This removes one #ifdef.
+ - Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
+ of XXX+ 0x01). This was not introduced by Prodyut, just a
+ copy-paste problem.
+
+
+commit 079589bcfb24ba11068460276a3cc9549ab5346f
+Date: Wed Aug 20 09:38:51 2008 -0700
+
+ ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe,
+ PPC405EX and PPC460EX/GT/SX
+
+ - Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX
+ processors
+ - Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared
+ across processors (405 and 440/460)
+ - Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX
+ processors
+ - Add register bit definitions for Memory Queue Configuration registers
+
+
+commit ba37aa03287c5483c61c0a3e320c8888bee0143a
+Date: Tue Aug 19 15:41:18 2008 -0500
+
+ fdt: rework fdt_fixup_ethernet() to use env instead of bd_t
+
+ Move to using the environment variables 'ethaddr', 'eth1addr', etc..
+ instead of bd->bi_enetaddr, bi_enet1addr, etc.
+
+ This makes the code a bit more flexible to the number of ethernet
+ interfaces.
+
+
+commit 4cacf7c64609839f809e2f9c45873f1d65861703
+Date: Tue Aug 19 14:57:55 2008 +0200
+
+ hush: Fix printf debug macro in hush.c so that it usable in U-Boot
+
+ This patch changes the debug_printf() marco for U-Boot in hush.c and
+ moves the definition of DEBUG_SHELL to a place that is actually compiled
+ under U-Boot.
+
+
+commit 8f2b457ef26a44d9e5fd7d6b16c394e5c3a71ca2
+Date: Tue Aug 19 09:57:41 2008 +0200
+
+ cfi: rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
+
+ Commit 00b1883a4cac59d97cd297b1a3a398db85982865
+ missed a few boards:
+ include/configs/M5253DEMO.h
+ include/configs/ml507.h
+ include/configs/redwood.h
+
+ This patch fixes this.
+
+
+commit 0768b7a872964085eece8d5e9fec9175e9deb161
+Date: Mon Aug 18 13:41:27 2008 +0200
+
+ Consolidate strmhz() implementation
+
+ ARM, i386, m68k and ppc all have identical implementations of strmhz().
+ Other architectures don't provide this function at all.
+
+ This patch moves strmhz() into lib_generic, reducing code duplication
+ and providing a more unified API across architectures.
+
+
+commit a928d0df211f1d829308d335d19be3ca42558dfc
+Date: Mon Aug 18 12:02:51 2008 +0200
+
+ fix mvbc_p board build warnings
+
+ fix build warnings @ mvBC-P board by using correct types, i.e. change
+ out_be32 to out_be16 and out_8 accordingly.
+
+
+commit a958b663d27f616bd1dfb720d1b476d1ecaaa569
+Date: Sat Aug 16 18:54:27 2008 +0200
+
+ Makefile: fix posix support on find
+
+
+commit bef92e215d945cc574399c1a1b00a3a76d35aa03
+Date: Sat Aug 16 00:30:48 2008 +0200
+
+ Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 Boards
+
+ Tested with TQM5200S on STK52XX.200 Board
+
+
+commit 0800707b6d5041a840a65d556032c15c584b55f8
+Date: Fri Aug 15 14:36:32 2008 -0500
+
+ mod_i2c_mem() bugfix
+
+ The last used chip, address, and address length were not being
+ stored for the imm and imn commands.
+
+
+commit 4afbef967275b2f636abae86f91b81becee7ad03
+Date: Fri Aug 15 15:37:31 2008 -0400
+
+ Fix typo in spelling of ATAPI.
+
+ Correct a small spelling mistake.
+
+
+commit 36c2d3062ecc6ab85f8e237180eb134464c48418
+Date: Fri Aug 15 15:34:10 2008 -0400
+
+ Add a hook to allow board-specific PIO mode setting.
+
+ This patch adds a hook whereby a board-specific routine can be called to
+ configure hardware for a PIO mode. The prototype for the board-specific
+ routine is:
+
+ int inline ide_set_piomode(int pio_mode)
+
+ ide_set_piomode should be prepared to configure hardware for a pio_mode
+ between 0 and 6, inclusive. It should return 0 on success or 1 on failure.
+
+
+commit 9571b84cb1423876f1153081b9e6a51d90fbcdc4
+Date: Fri Aug 15 15:29:12 2008 -0400
+
+ Replace enums in ata.h with an include of libata.h
+
+ This patch removes some enums from ata.h and replaces them with an
+ include of libata.h. This way, we eliminate duplicated code, and
+ prevent errors whereby the different versions could be out of sync.
+
+
+commit 0de0afbca865ecf482b4d2b635236746def8518f
+Date: Fri Aug 15 18:32:41 2008 +0200
+
+ coldfire: fix CFI drivers activation with new macro
+
+ rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
+
+
+commit 7dbc38ad915f4ae67f4cd1818b7ac8fed368aaa9
+Date: Fri Aug 15 08:24:35 2008 -0500
+
+ fdt: fdt addr w/o any args reports back the current working address
+
+
+commit f953d99fd528a496b400a706b511eaf8e3ea66af
+Date: Fri Aug 15 08:24:34 2008 -0500
+
+ fdt: added the ability to set initrd start/end via chosen command
+
+
+commit ffa4bafacaef67058463b3d7d0099ced57569dd2
+Date: Fri Aug 15 08:24:33 2008 -0500
+
+ Add command to enable/disable interrupts
+
+
+commit 9e8e63cce69556aef10b58bcbc56d324f570ec3a
+Date: Tue Aug 19 22:21:16 2008 -0700
+
+ CFI: Add CFI_CMDSET_INTEL_EXTENDED to fix flash_real_protect()
+
+ This patch fixes a missing vendor code in the flash_real_protect() function.
+
+
+commit 4e00acded2e6a8d663e12690a0f0f08f5bec5a58
+Date: Tue Aug 19 16:53:39 2008 +0000
+
+ CFI: Fix AMD Legacy sector protect
+
+ New implement sector lock and unlock or softlock commands
+ do not exist in AMD legacy flash. Thus, causing issue
+ when erasing AMD legacy flash (such as lv040)
+
+
+commit 492671404140f09d5b21b3d2ce4e362c0692c069
+Date: Wed Aug 20 09:40:16 2008 +0200
+
+ hammerhead/mimc200: Use CONFIG_FLASH_CFI_DRIVER
+
+ CFG_FLASH_CFI_DRIVER was recently renamed CONFIG_FLASH_CFI_DRIVER.
+
+
+commit 33eac2b3d946fc998a09245dfe54d017079b9056
+Date: Wed Aug 20 09:28:36 2008 +0200
+
+ hammerhead: Add missing printf parameter to CONFIG_AUTOBOOT_PROMPT
+
+
+commit 25da0b84195fdda89a943b2d25757db5afeef5b8
+Date: Wed Aug 20 09:27:37 2008 +0200
+
+ favr-32-ezkit: Fix printf format warnings
+
+
+commit 462da25e89b0b58bf4c66346c1fcb3087c61b4b8
+Date: Fri Aug 15 12:04:25 2008 +0200
+
+ MAINTAINERS: Sort avr32 section alphabetically
+
+ The rest of the MAINTAINERS file appears to be sorted
+ almost-alphabetically, but entries for the newly added AVR32 boards were
+ added somewhat randomly. This patch sorts the list alphabetically again.
+
+ Also update my e-mail address. The old one still works, but it may not
+ work forever.
+
+
+commit 13b50fe3bc065c48911fa373231421280855a9d6
+Date: Wed Jul 30 13:07:27 2008 +0100
+
+ avr32: Add MIMC200 board
+
+ The MIMC200 board is based on Atmel's NGW100 dev kit, but with an extra
+ 8MByte FLASH and 128KByte FRAM.
+
+
+commit db70b84329315c52f6ec77f5ae5ca1afe970a9bb
+Date: Wed Jul 9 21:07:34 2008 +0900
+
+ rtl8169: add support for RTL8110SCL
+
+ This patch fixes a problem that RTL8110SCL started transfer
+ with an incorrect memory address.
+
+
+commit 943b825bf15e6a28ac8328e0f6489478bceef1ea
+Date: Wed Jun 25 15:48:52 2008 -0500
+
+ Fix dm9000 receive status and len little endian issue
+
+ The received status and len was in little endian
+ format and caused the ethernet unable to proceed
+ further. Add __le16_to_cpu() in dm9000_rx_status_8/16/32bit().
+
+
+commit fcd69a1a57fb2af4d26201422095a4be9f36963e
+Date: Fri Aug 15 08:24:32 2008 -0500
+
+ Clean up usage of icache_disable/dcache_disable
+
+ There is no point in disabling the icache on 7xx/74xx/86xx parts and not
+ also flushing the icache. All callers of invalidate_l1_instruction_cache()
+ call icache_disable() right after. Make it so icache_disable() calls
+ invalidate_l1_instruction_cache() for us.
+
+ Also, dcache_disable() already calls dcache_flush() so there is no point
+ in the explicit calls of dcache_flush().
+
+
+commit a15b07104ca7bbb7093c9009c9ae1b58b4202d13
+Date: Fri Aug 15 08:24:31 2008 -0500
+
+ Update linux bootm to support ePAPR client interface
+
+ The ePAPR spec has some subtle differences from the current device
+ tree based boot interface to the powerpc linux kernel. The powerpc
+ linux kernel currently ignores the differences that ePAPR specifies.
+
+
+commit b734e5556a239b3be5f9693b2f4b4b739683ec16
+Date: Mon Aug 18 23:50:20 2008 +0200
+
+ Minor code cleanup: keep lists sorted.
+
+
+commit d0039d4ed275e6ca09fb417895024ad02be118c4
+Date: Wed Jul 23 19:10:14 2008 +0200
+
+ Add support for ADT7460 I2C monitor chip
+
+
+commit eb59ea45ab77c14b090ea857d9ea9f902f40db0b
+Date: Mon Jul 14 19:45:45 2008 +0200
+
+ video: Clean drivers/video/Makefile
+
+
+commit 871c18dd301752270e1f74328c846c3104be1e2e
+Date: Mon Jul 14 19:45:37 2008 +0200
+
+ rtc: Clean drivers/rtc/Makefile
+
+
+commit a4a549b4b53adf40a0d3882cc30ac812a8f847c5
+Date: Mon Jul 14 19:45:35 2008 +0200
+
+ i2c: Clean drivers/i2c/ Makefile
+
+
+commit 0a823aa2a8a8c0685e73900f387d602d7edafc0e
+Date: Wed Jul 9 22:30:30 2008 +0800
+
+ Add 'license' command to U-Boot command line
+
+ The 'license' command includes the U-Boot license (GPLv2) into the
+ actual bootloader binary. The license text can be shown interactively
+ at the U-Boot commandline.
+
+ For products where the commandline can actually be accessed by the
+ end user, this helps to prevent inadvertent GPL violations, since the
+ GPLv2 license text can no longer be 'forgotten' to be included into
+ the product.
+
+ The 'license' command can be enabled by CONFIG_CMD_LICENSE.
+
+
+commit fe2ce5500ebf43d79d227190bd2370232d5b113d
+Date: Sun Jul 6 15:56:38 2008 +0800
+
+ add 'unzip' command to u-boot commandline
+
+ [PATCH] add new 'unzip' command to u-boot commandline
+
+ common/cmd_mem.c: new command "unzip srcaddr dstaddr [dstsize]" to unzip from
+ memory to memory, and option CONFIG_CMD_UNZIP to enable it
+
+
+commit 07efc9e321619c3dec213310c32e011aa6f02783
+Date: Wed Aug 6 19:37:17 2008 -0500
+
+ Change CFG_ENV_SIZE to CFG_ENV_SECT_SIZE for SPI sector erase
+
+ The CFG_ENV_SIZE is not suitable used for SPI flash erase
+ sector size if CFG_ENV_SIZE is less than CFG_ENV_SECT_SIZE.
+ Add condition check if CFG_ENV_SIZE is larger than
+ CFG_ENV_SECT_SIZE, calculate the right number of sectors for
+ erasing.
+
+
+commit 4cb4e654cafabaa1ac180d37b00c8f6095dae9c9
+Date: Mon Aug 11 15:54:25 2008 +0000
+
+ ColdFire: Multiple fixes for M5282EVB
+
+ Incorrect CFG_HZ value, change 1000000 to 1000.
+ Rename #waring to #warning. RAMBAR1 uses twice
+ in start.S, rename the later to FLASHBAR. Insert
+ nop for DRAM setup. And, env_offset in linker file.
+
+
+commit 10db3a17a278dd3a27668b31cb32cdd1476e9513
+Date: Mon Aug 11 15:26:43 2008 +0000
+
+ ColdFire: Move m5282evb from board to board/freescale
+
+
+commit 56df091d391f74bbf2dc2f7931f9f3c8f23529e4
+Date: Mon Aug 11 15:25:07 2008 +0000
+
+ ColdFire: Move m5272c3 from board to board/freescale
+
+
+commit 659e9bad629a480f606b286d5703aef7159edf98
+Date: Mon Aug 11 15:23:16 2008 +0000
+
+ ColdFire: Move m5271evb from board to board/freescale
+
+
+commit 05316f8ece8206339a208ec052f039cd0f7ca922
+Date: Mon Aug 11 13:41:49 2008 +0000
+
+ ColdFire: Add M54451EVB platform support for MCF5445x
+
+
+commit 922cd7515597e9a2c07d68e2a6240b0b7b0f0136
+Date: Wed Aug 6 19:14:08 2008 -0500
+
+ ColdFire: Add Serial Flash support for M54455EVB
+
+
+commit 9f751551456828b2d0ff417f10959fb0c7110bd0
+Date: Wed Jul 23 20:38:53 2008 -0500
+
+ ColdFire: Implement SBF feature for M5445EVB
+
+
+commit a7323bba229203aae2604afde131ab47bad4eadc
+Date: Wed Jul 23 17:53:36 2008 -0500
+
+ ColdFire: Add SSPI feature for MCF5445x
+
+
+commit b2d022d1ac3f59bffa9cec249341e77aea168abc
+Date: Wed Jul 23 17:37:10 2008 -0500
+
+ ColdFire: Use CFI Flash driver for M54455EVB
+
+ Remove non-common flash driver in
+ board/freescale/m54455evb/flash.c. The non-cfi flash will
+ use CONFIG_FLASH_CFI_LEGACY to configure the flash
+ attribute.
+
+
+commit 6d33c6acfa35b1144d46ffbff7e29ee7969290d0
+Date: Wed Jul 23 17:11:47 2008 -0500
+
+ ColdFire: Add M5253DEMO platform support for MCF5253
+
+
+commit 80ba61fd82569af40e04d4a089257b81881884f2
+Date: Wed Aug 6 14:17:09 2008 -0500
+
+ ColdFire: Raise M5253EVBE uart baudrate to 115200 bps
+
+
+commit d361307e73ce1f6fc68760123f37d4876f851f3e
+Date: Wed Aug 6 14:11:36 2008 -0500
+
+ ColdFire: Fix M5253EVB dram bring up issue
+
+
+commit 4b0708093e15b412296328bf81325cf9b69fe512
+Date: Thu Aug 14 14:41:06 2008 +0200
+
+ Coding Style cleanup, update CHANGELOG
+
+
+commit 68cf19aae48f2969ec70669604d0d776f02c8bc4
+Date: Wed Aug 13 18:24:05 2008 -0500
+
+ socrates: Update NAND driver to new API.
+
+ Also, fix some minor formatting issues, and simplify the handling of
+ "state" for writes.
+
+
+commit ba22d10f39eaeedd035e8265616e31ff88e314d5
+Date: Wed Aug 13 18:03:40 2008 -0500
+
+ quad100hd: Update NAND driver to new API.
+
+
+commit f64cb652a8a84c5c34d0afcbd7ffef886aa1d838
+Date: Wed Aug 13 17:53:48 2008 -0500
+
+ m5373evb: Update NAND driver to new API.
+
+
+commit 1a23a197c8722b805f40895544bbdb1a648c1c82
+Date: Wed Aug 13 17:04:30 2008 -0500
+
+ s3c24x0: Update NAND driver to new API.
+
+
+commit aa5f75f20db8a7103fad9c34d6f1193e10d1890f
+Date: Wed Aug 13 15:56:00 2008 -0500
+
+ at91: Update board NAND drivers to current API.
+
+
+commit d438d50848e9425286e5fb0493e0affb5a0b1e1b
+Date: Wed Aug 13 09:11:02 2008 +0900
+
+ Fix OneNAND build break
+
+ Since page size field is changed from oobblock to writesize. But OneNAND is not updated.
+ - fix bufferram management at erase operation
+ This patch includes the NAND/OneNAND state filed too.
+
+
+commit 9483df6408c25f16060432de3868901e352e23bc
+Date: Wed Aug 13 01:40:43 2008 +0200
+
+ drivers/mtd/nand_legacy: Move conditional compilation to Makefile
+
+
+commit cc4a0ceeac5462106172d0cc9d9d542233aa3ab2
+Date: Wed Aug 13 01:40:43 2008 +0200
+
+ drivers/mtd/nand: Move conditional compilation to Makefile
+
+ rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY
+
+
+commit 4fb09b81920e5dfdfc4576883186733f0bd6059c
+Date: Wed Aug 13 01:40:42 2008 +0200
+
+ drivers/mtd/onenand: Move conditional compilation to Makefile
+
+
+commit 00b1883a4cac59d97cd297b1a3a398db85982865
+Date: Wed Aug 13 01:40:42 2008 +0200
+
+ drivers/mtd: Move conditional compilation to Makefile
+
+ rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
+
+
+commit 7ba44a5521cdb7fa1c72864025cde1e21a6f6921
+Date: Wed Aug 13 01:40:41 2008 +0200
+
+ drivers/qe: Move conditional compilation to Makefile
+
+
+commit ab6878c7bc68a7b5e5b731655bdc13221bbfc493
+Date: Wed Aug 13 01:40:40 2008 +0200
+
+ drivers/pci: Move conditional compilation to Makefile
+
+
+commit 55d6d2d39fe3fe87802e399aa17539368b495d2e
+Date: Wed Aug 13 01:40:40 2008 +0200
+
+ drivers/misc: Move conditional compilation to Makefile
+
+
+commit 65e41ea0548b86e3d7892defac8e4dc1ea70aed1
+Date: Wed Aug 13 01:40:40 2008 +0200
+
+ drivers/input: Move conditional compilation to Makefile
+
+
+commit 88f57e093114a44aa9a858d52b099bcc52034a8c
+Date: Wed Aug 13 01:40:39 2008 +0200
+
+ drivers/dma: Move conditional compilation to Makefile
+
+
+commit 1a02806c4b1b4a09ad4e95d3aac3783889e5f8d7
+Date: Wed Aug 13 01:40:39 2008 +0200
+
+ drivers/block: Move conditional compilation to Makefile
+
+
+commit 1a6ffbfaf4353bec379ed1fcfc54b6f1a30af09a
+Date: Wed Aug 13 01:40:39 2008 +0200
+
+ serial: move CFG_NS9750_UART to CONFIG_NS9750_UART
+
+ move also conditional compilation to Makefile
+
+
+commit 6c58a030f86829fa4f0d4337cf4b794c41a1823e
+Date: Wed Aug 13 01:40:38 2008 +0200
+
+ serial: move CFG_SCIF_CONSOLE to CONFIG_SCIF_CONSOLE
+
+ move also conditional compilation to Makefile
+
+
+commit d6e9ee92e890f67594ab150689510df361133ead
+Date: Wed Aug 13 01:40:38 2008 +0200
+
+ common: Move conditional compilation to Makefile
+
+
+commit f5acb9fd9bba1160de3ef349c7d33fe510eda286
+Date: Wed Aug 13 01:40:09 2008 +0200
+
+ mx31: move freescale's mx31 boards to vendor board dir
+
+
+commit 8ed2f5f950e2581214d20b011a8f27a6396d65d2
+Date: Sat Jul 5 23:11:11 2008 +0200
+
+ at91: move arch-at91sam9 to arch-at91
+
+
+commit 195ccfc5991d48764b2519941e3507f693851d5d
+Date: Wed Aug 6 10:06:20 2008 +0200
+
+ OneNAND: Fill in MTD function pointers for OneNAND.
+
+ onenand_print_device_info():
+ - Now returns a string to be placed in mtd->name,
+ rather than calling printf.
+ - Remove verbose parameter as it becomes useless.
+
+
+commit aa646643b6bc250cb3a4966bf728876e0c10d329
+Date: Wed Aug 6 21:42:07 2008 +0200
+
+ nand_spl: Support page-aligned read in nand_load, use chipselect
+
+ Supporting page-aligned reads doesn't incure any sinificant overhead, just
+ a small change in the algorithm. Also replace in_8 with readb, since there
+ is no in_8 on ARM.
+
+
+commit 4f32d7760a58fe73981b6edc0b0751565d2daa4c
+Date: Tue Aug 5 11:15:59 2008 -0500
+
+ NAND boot: Update large page support for current API.
+
+ Also, remove the ctrl variable in favor of passing the constants
+ directly, and remove redundant (u8) casts.
+
+
+commit e4c09508545d1c45617ba45391c03c03cbc360b9
+Date: Mon Jun 30 14:13:28 2008 -0500
+
+ NAND boot: MPC8313ERDB support
+
+ Note that with older board revisions, NAND boot may only work after a
+ power-on reset, and not after a warm reset. I don't have a newer board
+ to test on; if you have a board with a 33MHz crystal, please let me know
+ if it works after a warm reset.
+
+
+commit acdab5c33f1ea6f5e08f06f08bc64af23ff40d71
+Date: Thu Jun 26 14:06:52 2008 -0500
+
+ mpc8313erdb: Enable NAND in config.
+
+
+commit c3db8c649c6ab3da2f1411c4c6d61aecea054aa4
+Date: Thu Jul 31 12:38:26 2008 +0200
+
+ NAND: Do not write or read a whole block if it is larger than the environment
+
+ Environment can be smaller than NAND block size, do not need to read a whole
+ block and minimum for writing is one page. Also remove an unused variable.
+
+
+commit eafcabd15f00c142156235c519fcc55b10993241
+Date: Sun Jun 22 16:30:06 2008 +0200
+
+ NAND: chip->state does not always get set.
+
+ Fixes an issue with chip->state not always being set causing troubles.
+
+
+commit 13f0fd94e3cae6f8a0d9fba5d367e311edc8ebde
+Date: Mon Jun 30 15:34:40 2008 +0200
+
+ NAND: Scan bad blocks lazily.
+
+ Rather than scanning on boot, scan upon the first attempt to check the
+ badness of a block. This speeds up boot when not using NAND, and reduces
+ the likelihood of needing to reflash via JTAG if NAND becomes
+ nonfunctional.
+
+
+commit dfbf617ff055e4216f78d358b0867c548916d14b
+Date: Thu Jun 12 13:20:16 2008 -0500
+
+ NAND read/write fix
+
+ Implement block-skipping read/write, based on a patch from
+
+
+commit 984e03cdf1431bb593aeaa1b74c445d616f955d3
+Date: Thu Jun 12 13:13:23 2008 -0500
+
+ NAND: Always skip blocks on read/write/boot.
+
+ Use of the non-skipping versions was almost always (if not always)
+ an error, and no valid use case has been identified.
+
+
+commit e1c3dbada349992875934575c97b328ab2cb33ca
+Date: Thu Jun 12 11:10:21 2008 -0500
+
+ nand: fsl_upm: convert to updated MTD NAND infrastructure
+
+
+commit 300253306acc72b1b2e9faf0987f86551151d7cf
+Date: Thu May 22 15:02:46 2008 -0500
+
+ fsl_elbc_nand: Hard-code the FBAR/FPAR split.
+
+ The hardware has separate registers for block and page-within-block,
+ but the division between the two has no apparent relation to the
+ actual erase block size of the NAND chip.
+
+
+commit 9c814b0a716aae884bec977b9a032dfa59cfb79a
+Date: Fri Mar 28 22:10:54 2008 +0300
+
+ fsl_elbc_nand: workaround for hangs during nand write
+
+ Using current driver elbc sometimes hangs during nand write. Reading back
+ last byte helps though (thanks to Scott Wood for the idea).
+
+
+commit 9fd020d6b4b36b9fb67cd834bc1ae7fdba15ee9e
+Date: Fri Mar 21 16:12:51 2008 -0500
+
+ Freescale eLBC FCM NAND driver
+
+ This is a driver for the Flash Control Machine of the enhanched Local Bus
+ Controller found on some Freescale chips (such as the mpc8313 and the
+ mpc8379).
+
+
+commit 41ef8c716e93fdf50efe9c1ba733ca6675daaca6
+Date: Tue Mar 18 15:29:14 2008 -0500
+
+ Don't panic if a controller driver does ecc its own way.
+
+ Some hardware, such as the enhanced local bus controller used on some
+ mpc83xx chips, does ecc transparently when reading and writing data, rather
+ than providing a generic calculate/correct mechanism that can be exported to
+ the nand subsystem.
+
+ The subsystem should not BUG() when calculate, correct, or hwctl are
+ missing, if the methods that call them have been overridden.
+
+
+commit e52b34d40a8a646e3d11638ea8797e96398dba13
+Date: Thu Jan 10 18:47:33 2008 +0100
+
+ NAND: Make NAND driver less verbose per default
+
+ This patch turns off printing of bad blocks per default upon bootup.
+ This can always be shown via the "nand bad" command later.
+
+
+commit fe56a2772e5c59577df906163d0d4b29b056140e
+Date: Wed Jan 9 15:36:20 2008 +0100
+
+ NAND: Davinci driver updates
+
+ Here comes a trivial patch to cpu/arm926ejs/davinci/nand.c. Unfortunately I
+ don't have hardware handy so I can not test it at the moment but changes are
+ rather trivial so it should work. It would be nice if somebody with a
+ hardware checked it anyways.
+
+
+commit deac913effd8d80535c9ff4687b6fcdff540c554
+Date: Sat Jan 5 16:50:32 2008 +0100
+
+ NAND: Fix compilation warning and small coding style issue
+
+
+commit c568f77acdf896fc3dd6413ce53205b17ba809a3
+Date: Sat Jan 5 16:49:37 2008 +0100
+
+ NAND: Update nand_spl driver to match updated nand subsystem
+
+ This patch changes the NAND booting driver nand_spl/nand_boot.c to match
+ the new infrastructure from the updated NAND subsystem. This NAND
+ subsystem was recently synced again with the Linux 2.6.22 MTD/NAND
+ subsystem.
+
+
+commit 3df2ece0f0fbba47d27f02fff96c533732b98c14
+Date: Sat Jan 5 16:47:58 2008 +0100
+
+ NAND: Update 4xx NDFC driver to match updated nand subsystem
+
+ This patch changes the 4xx NAND driver ndfc.c to match the new
+ infrastructure from the updated NAND subsystem. This NAND
+ subsystem was recently synced again with the Linux 2.6.22 MTD/NAND
+ subsystem.
+
+ Tested successfully on AMCC Sequoia and Bamboo.
+
+
+commit 12072264528eba33737bc9674e19f0e925ffda23
+Date: Sat Jan 5 16:43:25 2008 +0100
+
+ NAND: Change nand_wait_ready() to not call nand_wait()
+
+ This patch changes nand_wait_ready() to not just call nand_wait(),
+ since this will send a new command to the NAND chip. We just want to
+ wait for the chip to become ready here.
+
+
+commit 9ad754fef5053144daed3b007adaf1c9bec654c9
+Date: Fri Dec 14 16:33:45 2007 +0100
+
+ make nand dump and nand dump.oob work
+
+
+commit 43ea36fb8fdcbc6e26f0caffe808c63633b18838
+Date: Mon Nov 19 14:46:00 2007 +0100
+
+ moving files from yaffs2/direct/ to yaffs2/ and deleting all symlinks
+
+
+commit 98824ce3f95e6c4d08d439b779c0acb0048045a6
+Date: Tue Jun 10 16:18:13 2008 -0500
+
+ Clean out unneeded files
+
+
+commit ec29a32b5a71b203f7d9087f1f4d786e7f13dd23
+Date: Fri Nov 16 08:44:27 2007 +0100
+
+ Create symlinks from yaffs2/direct to yaffs2
+
+
+commit 90ef117b68387d66763291af0117677644166611
+Date: Thu Nov 15 12:23:57 2007 +0100
+
+ Incorporate yaffs2 into U-boot
+
+ To use YAFFS2 define CONFIG_YAFFS2
+
+
+commit 0e8cc8bd92257da2e1df88cbc985e166e472ce61
+Date: Thu Nov 15 11:13:05 2007 +0100
+
+ YAFFS2 import
+
+ Direct import of yaffs as a tarball as of 20071113 from their public
+ CVS-web at http://www.aleph1.co.uk/cgi-bin/viewcvs.cgi/yaffs2/
+
+ The code can also be imported on the command line with:
+ (Hit return when asked for a password)
+ cvs checkout yaffs2
+
+
+commit 3043c045d5a9897faba7d5c7218c2f4d06cd0038
+Date: Wed Nov 14 14:28:11 2007 +0100
+
+ Whitespace cleanup and marking broken code.
+
+ Changes requested by maintainer Stefan Roese after
+ posting patch to U-boot mailing list.
+
+
+commit 5e1dae5c3db7f4026f31b6a2a81ecd9e9dee475f
+Date: Fri Nov 9 13:32:30 2007 +0100
+
+ Fixing coding style issues
+
+ - Fixing leading white spaces
+ - Fixing indentation where 4 spaces are used instead of tab
+ - Removing C++ comments (//), wherever I introduced them
+
+
+commit 4cbb651b29cb64d378a06729970e1e153bb605b1
+Date: Thu Nov 8 10:39:53 2007 +0100
+
+ Remove white space at end.
+
+
+commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b
+Date: Wed Oct 31 13:53:06 2007 +0100
+
+ Update MTD to that of Linux 2.6.22.1
+
+ A lot changed in the Linux MTD code, since it was last ported from
+ Linux to U-Boot. This patch takes U-Boot NAND support to the level
+ of Linux 2.6.22.1 and will enable support for very large NAND devices
+ (4KB pages) and ease the compatibility between U-Boot and Linux
+ filesystems.
+
+ This patch is tested on two custom boards with PPC and ARM
+ processors running YAFFS in U-Boot and Linux using gcc-4.1.2
+ cross compilers.
+
+ MAKEALL ppc/arm has some issues:
+ * DOC/OneNand/nand_spl is not building (I have not tried porting
+ these parts, and since I do not have any HW and I am not familiar
+ with this code/HW I think its best left to someone else.)
+
+ Except for the issues mentioned above, I have ported all drivers
+ necessary to run MAKEALL ppc/arm without errors and warnings. Many
+ drivers were trivial to port, but some were not so trivial. The
+ following drivers must be examined carefully and maybe rewritten to
+ some degree:
+ cpu/ppc4xx/ndfc.c
+ cpu/arm926ejs/davinci/nand.c
+ board/delta/nand.c
+ board/zylonite/nand.c
+
+
+commit cd82919e6c8a73b363a26f34b734923844e52d1c
+Date: Tue Aug 12 16:08:38 2008 +0200
+
+ Coding style cleanup, update CHANGELOG, prepare release
+
+
+commit 17e900b8c0f38d922da47073246219dce2a847f2
+Date: Tue Aug 12 14:54:04 2008 +0200
+
+ MVBC_P: fix compile problem
+
+
+commit 52b047ae48219b59bebe37ba743ab103fd4f8316
+Date: Tue Aug 12 12:10:11 2008 +0200
+
+ MPC8272ADS: fix build error: 'bd_t' has no member named 'pci_clk'
+
+
+commit c9c101c660b3d1995045c61c7c6041f52b6cf335
+Date: Tue Aug 12 00:36:53 2008 +0200
+
+ ads5121: fix compiler warnings (unused variables)
+
+
+commit 902ca09246039964d59bbcb519b1e1b5aed01308
+Date: Mon Aug 11 11:29:28 2008 -0500
+
+ 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS
+
+ Use CONFIG_NUM_CPUS to match existing define used by 86xx.
+
+
+commit 3216ca9692ff80d7c638723ef448f3d36301d9e7
+Date: Mon Aug 11 09:20:53 2008 -0500
+
+ Fix fallout from autostart revert
+
+ The autostart revert caused a bit of duplicated code as well as
+ code that was using images->autostart that needs to get removed so
+ we can build again.
+
+
+commit 3cf8a234b8e8c02e4da1f23566043bc288b05220
+Date: Mon Aug 11 09:16:25 2008 -0500
+
+ Fix compile error related to r8a66597-hcd & usb
+
+ When building the 8544DS board we get this error:
+
+ In file included from r8a66597-hcd.c:22:
+ u-boot/include/usb.h:190:2: error: #error USB Lowlevel not defined
+ make[1]: *** [r8a66597-hcd.o] Error 1
+
+ The cleanest fix is to only build r8a66597-hcd.c if CONFIG_USB_R8A66597_HCD
+ is set.
+
+
+commit 2d0daa03612338a813e3c9d22680e54eabfea378
+Date: Mon Aug 4 14:02:26 2008 -0500
+
+ POWERPC 86xx: Move BAT setup code to C
+
+ This is needed because we will be possibly be locating
+ devices at physical addresses above 32bits, and the asm
+ preprocessing does not appear to deal with ULL constants
+ properly. We now call write_bat in lib_ppc/bat_rw.c.
+
+
+commit 9de67149db576c91b9c2a0a182652331e7e44211
+Date: Mon Aug 4 14:01:53 2008 -0500
+
+ POWERPC: Add synchronization to write_bat in lib_ppc/bat_rw.c
+
+ Perform sync/isync as required by the architecture.
+
+
+commit 23f935c073e7578c6066804fd2f9ee116cae6ffe
+Date: Mon Aug 4 14:01:16 2008 -0500
+
+ POWERPC: 86xx - add missing CONFIG_HIGH_BATS to sbc8641d config
+
+
+commit 5276a3584d26a9533404f0ec00c3b61cf9a97939
+Date: Sun Aug 3 21:44:10 2008 +0200
+
+ i.MX31: Fix mx31_gpio_mux() function and MUX_-macros.
+
+ Correct the mx31_gpio_mux() function to allow changing all i.MX31 IOMUX
+ contacts instead of only the first 256 ones as is the case prior to
+ this patch.
+
+ Add missing MUX_* macros and update board files to use the new macros.
+
+
+commit b6b183c5b2fffd4c456b7e3fcb064cceb47fe7ac
+Date: Sun Aug 3 21:43:37 2008 +0200
+
+ i.MX31: Fix IOMUX related typos
+
+ Correct the names of some IOMUX macros.
+
+
+commit 4d57b0fb2927d4f50d834884b4ec4a7ca01708b0
+Date: Mon Aug 11 20:26:16 2008 +0200
+
+ OneNAND: Remove unused parameters to onenand_verify_page
+
+ The block and page parameters of onenand_verify_page() are not used. This causes a compiler error when CONFIG_MTD_ONENAND_VERIFY_WRITE is enabled.
+
+
+commit e84d568fa2a9f4ce7888141e71676368ef6b3f25
+Date: Fri Aug 8 18:00:40 2008 +0200
+
+ video: fix bug in cfb_console code
+
+ FILL_15BIT_555RGB macro extension for pixel swapping
+ by commit bed53753dd1d7e6bcbea4339be0fb7760214cc35
+ introduced a bug in cfb_console:
+
+ Bitmaps with odd-numbered width won't be rendered
+ correctly and even U-Boot crashes are observed on
+ some platforms while repeated rendering of such
+ bitmaps with "bmp display". Also if a bitmap is
+ rendered to an odd-numbered x starting position,
+ the same problem occurs. This patch is an attempt
+ to fix it.
+
+
+commit d9015f6a50d7258125349ef5c2af836458a0029a
+Date: Fri Aug 8 18:00:39 2008 +0200
+
+ video: fix bug in logo_plot
+
+ If logo_plot() should ever be called with x starting
+ position other than zero and for pixel depths greater
+ than 8bpp, logo colors distortion will be observed.
+ This patch fixes the issue.
+
+
+commit 406819ae94f79f5b59e01d163380ca7d83709251
+Date: Mon Aug 11 00:17:52 2008 +0200
+
+ MAINTAINERS: sort entries
+
+
+commit cfc442d7913d4d1c3a9bf494f90c012c2f8c3bdc
+Date: Thu Aug 7 18:19:28 2008 +0800
+
+ Add mpc7448hpc2 maintainer information
+
+
+commit a9fe0c3e7ca48afa50d6a0db99fa91e7282d73d8
+Date: Thu Aug 7 13:13:27 2008 +0530
+
+ common/cmd_load.c - Minor code & Coding Style cleanup
+
+ - os_data_header Variable is a carry over feature
+ & unused. So removed all instance of this variable
+ - Minor Code Style Update
+
+
+commit 0d28f34bbe56d0971bd603789dcc6fe7adf11f14
+Date: Wed Aug 6 19:32:33 2008 +0200
+
+ Update the U-Boot wiki URL.
+
+
+commit aa5ffa16d7e4c461b7b77bf8e79d2ef5638cf754
+Date: Sun Aug 10 17:56:36 2008 +0200
+
+ OneNAND: Remove base address offset usage
+
+ While locally preparing some U-Boot patches for ARM based OMAP3 boards, some
+ using OneNAND and some using NAND, we found some differences in OneNAND and
+ NAND command address handling.
+
+ As this might confuse users (it already confused us), we like to align OneNAND
+ and NAND address handling.
+
+ The issue is that cmd_onenand.c subtracts the onenand base address from the
+ addresses you type into the u-boot command line so, unlike nand, you can't
+ use addresses relative to the start of the onenand part e.g. this won't work:
+
+ onenand read 82000000 280000 400000
+
+ you have to use:
+
+ onenand read 82000000 20280000 400000
+
+ Looking at recent git, the only board currently using OneNAND is Apollon, and
+ for this the OneNAND base address is 0 (apollon.h)
+
+ #define CFG_ONENAND_BASE 0x00000000
+
+ so patch below won't break any existing boards and will align OneNAND and NAND
+ handling on boards where OneNAND base address is != 0.
+
+
+commit c11528083ef6e55e76df742228c26e39d151813d
+Date: Thu Aug 7 09:28:20 2008 -0500
+
+ mpc85xx: workaround old binutils bug
+
+ The recent change to move the .bss outside of the image gives older
+ binutils (ld from eldk4.1/binutils-2.16) some headache:
+
+ ppc_85xx-ld: u-boot: Not enough room for program headers (allocated 3, need 4)
+ ppc_85xx-ld: final link failed: Bad value
+
+ We workaround it by being explicit about the program headers and not
+ assigning the .bss to a program header.
+
+
+commit 0bf202ec586d4466c900e987720fa635c594d689
+Date: Sun Aug 10 01:26:26 2008 +0200
+
+ Revert "[new uImage] Add autostart flag to bootm_headers structure"
+
+ This reverts commit f5614e7926863bf0225ec860d9b319741a9c4004.
+
+ The commit was based on a misunderstanding of the (documented)
+ meaning of the 'autostart' environment variable. It might cause
+ boards to hang if 'autostart' was used, with the potential to brick
+ them. Go back to the documented behaviour.
+
+ Conflicts:
+
+ common/cmd_bootm.c
+ common/image.c
+ include/image.h
+
+
+commit 29f8f58ff40c67f7f2e11afd1715173094e52ac2
+Date: Sat Aug 9 23:17:32 2008 +0200
+
+ TQM8xx{L,M}: try to normalize config files for TQM8xx? based board
+
+ - enable CFI driver where this was forgotten
+ - enable mtdparts support
+ - adjust default environment
+ etc.
+
+
+commit 41266c9b5a5f873df3ec891bb0907616958b5602
+Date: Tue Aug 5 10:51:57 2008 -0500
+
+ FIT: Fix handling of images without ramdisks
+
+ boot_get_ramdisk() should not treat the case when a FIT image does
+ not contain a ramdisk as an error.
+
+
+commit f77d92a3f56d88e63cc02226a1204b3bdbac6961
+Date: Sat Aug 9 01:39:09 2008 +0400
+
+ DataFlash: AT45DB021 fix and AT45DB081 support
+
+ Fix for page size of AT45DB021. Also adding bigger AT45DB081
+ which comes with some newer boards.
+
+
+commit ba9324451b662dd393afa53e5cc36fc5d3d10966
+Date: Fri Aug 8 16:30:23 2008 +0900
+
+ sh: Update sh7763rdp config
+
+ Add sh_eth support to sh7763rdp.
+
+
+commit 21f971ec265f6042ec21636d55d06a6bc0751077
+Date: Mon Jul 7 01:22:29 2008 +0200
+
+ TQM823L: re-enable logo support; update LCD_INFO text
+
+
+commit 3b8d17f0f082073346c0df017c9dfd6acdb40d6d
+Date: Fri Aug 8 16:41:56 2008 +0200
+
+ TQM8xxL: fix support for second flash bank
+
+ When switching the TQM8xxL modules to use the CFI flash driver,
+ support for the second flash bank was broken because the CFI driver
+ did not support dynamically sized banks. This gets fixed now.
+
+
+commit 2a112b234d879f6390503a5f4e38246acce9d0b0
+Date: Fri Aug 8 16:39:54 2008 +0200
+
+ CFI: allow for dynamically determined flash sizes and addresses
+
+ The CFI driver allowed only for static initializers in the
+ CFG_FLASH_BANKS_LIST definition, i. e. it did not allow to map
+ several flash banks contiguously if the bank sizes were not known in
+ advance, which kind of violates U-Boot's design philosophy.
+
+ (will be used for example by the TQM8xxL boards)
+
+
+commit d9d78ee46d9a396d0a81d00c2b003a9bd32c2e61
+Date: Thu Aug 7 23:26:35 2008 -0700
+
+ QE UEC: Fix compiler warnings
+
+ Moved static functions earlier in file so forward declarations are not needed.
+
+
+commit d5d28fe4aad5f4535400647a5617c11039506467
+Date: Mon Mar 31 02:37:38 2008 -0700
+
+ QE UEC: Add MII Commands
+
+ Add MII commands to the UEC driver. Note that once a UEC device is selected,
+ any device on its MDIO bus can be addressed.
+
+
+commit fd0f2f3796ff2a7a32d35deb1b7996e485849df7
+Date: Wed Jul 9 21:07:38 2008 +0900
+
+ usb: add support for R8A66597 usb controller
+
+ add support for Renesas R8A66597 usb controller.
+ This patch supports USB Host mode.
+
+
+commit 1d10dcd041aaeae9fd7c821005692898a0303382
+Date: Sat Jul 26 18:59:16 2008 -0500
+
+ Add support for OMAP5912 and OMAP16xx to usbdcore_omap1510.c
+
+ Add support to drivers/usb/usbdcore_omap1510.c for OMAP5912 and OMAP16xx devices.
+
+
+commit eab1007334b93a6209f1ec33615e26ef5311ede7
+Date: Wed Aug 6 15:42:52 2008 -0400
+
+ ppc4xx: Sequoia has two UARTs in "4-pin" mode. Configure the GPIOs as per schematic.
+
+ The Sequoia board has two UARTs in "4-pin" mode. This patch modifies the GPIO
+ configuration to match the schematic, and also sets the SDR0_PFC1 register to
+ select the corresponding mode for the UARTs.
+
+
+commit 0eb5717a85b6cba3f67c11fa89bdde38dcd081b5
+Date: Wed Aug 6 14:42:13 2008 +0200
+
+ avr32: add support for EarthLCD Favr-32 board
+
+ This patch adds support for the Favr-32 board made by EarthLCD.
+
+ This kit, which is also called ezLCD-101 when running with EarthLCD firmware,
+ has a 10.4" touch screen LCD panel, 16 MB 32-bit SDRAM, 8 MB parallel flash,
+ Ethernet, audio out, USB device, SD-card slot, USART and various other
+ connectors for cennecting stuff to SPI, I2C, GPIO, etc.
+
+
+commit bc9019e19758a19a388fb20ef18dc771cd39fdda
+Date: Thu Jul 31 10:22:20 2008 +0200
+
+ cfi-flash: Added support to flash_real_protect for Atmel flash devices
+
+ Some of the flash memories produced by ATMEL start in read-only mode.
+ We need to unprotect it. This patch allows the AT49BV6416 to work with
+ cfi_flash memories. Tested in the at91rm9200ek board.
+
+
+commit 7949839e5836bf8b1074bb6142c46d30ac3aa350
+Date: Tue Aug 5 15:36:39 2008 +0200
+
+ cfi-flash: Add definition for the AM29LV800BB AMD NOR-flash
+
+
+commit 1318673045fe188c6e24c582b1e6efc00ae1c62c
+Date: Wed Aug 6 14:06:03 2008 +0200
+
+ Fix merge problems
+
+
+commit f2302d4430e7f3f48308d6a585320fe96af8afbd
+Date: Wed Aug 6 14:05:38 2008 +0200
+
+ Fix merge problems
+
+
+commit 6689484ccd43189322aaa5a1c6cd02cdd511ad7d
+Date: Tue Jul 15 12:13:38 2008 +0200
+
+ mpc5121: Move iopin features from board specific to common files.
+
+ And in the process eliminate some duplicate register defines.
+
+
+commit ef11df6b66ecf5797e94ba322254b8fb7a4e2e12
+Date: Tue Aug 5 17:38:57 2008 -0600
+
+ mpc5121: squash some fdt fixup errors
+
+ On ADS5121 when booting linux the following errors are seen:
+ Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND
+ Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND
+ Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND
+
+ This is caused by ft_cpu_setup trying to deal with
+ both old and new soc node naming. This patch
+ fixes this by being smarter about what to
+ fixup.
+
+ Also do soc node fixups by compatible instead of by path.
+ A new board config called OF_SOC_COMPAT defined
+ to be "fsl,mpc5121-immr" replaces the old
+ OF_SOC node path that was defined to be "soc@80000000".
+
+ Old device trees still work, but the compatiblity
+ is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
+ which is on by default in include/configs/ads5121.h.
+
+
+commit 81091f58f0c58ecd26c5b05de2ae20ca6cdb521c
+Date: Sat Aug 2 23:48:30 2008 +0200
+
+ drivers/serial: Move conditional compilation to Makefile for CONFIG_* macros
+
+
+commit 4cd7e6528f61ec669755c3754bb4f9779874fab3
+Date: Sat Aug 2 23:48:32 2008 +0200
+
+ nios2/sysid: fix printf warning
+
+
+commit 66da6fa0e35e7ee56628c85981709afe7180fc8e
+Date: Sat Aug 2 23:48:33 2008 +0200
+
+ Fix remaining build issues with MPC8xx FADS boards.
+
+
+commit 81d3f1fdddafd1eb53bbca8739f488d417eb3dd2
+Date: Sat Aug 2 23:48:31 2008 +0200
+
+ nios2: fix phys_addr_t and phys_size_t support
+
+
+commit 5fa62000db6d0b46ecdeadbeb50faf5197db49ef
+Date: Sat Aug 2 23:48:34 2008 +0200
+
+ mvbc_p: Fix problem with '#if (CONFIG_CMD_KGDB)'
+
+
+commit 1464eff77e7fdaed609ecf263a2423c9dcf96b1f
+Date: Fri Aug 1 09:48:29 2008 +0100
+
+ Fix bitmap display for atmel lcd controller
+
+ The current lcd_display_bitmap() function does not work properly
+ for the Atmel LCD controller.
+
+ 2 fixes need to be done:-
+
+ (a) when setting the colour map, use the lcd_setcolreg() function
+ as provided by the Atmel driver
+ (b) the data is never actually written to the lcd framebuffer !!
+
+
+commit 2a433c66b1e2770349fe4911be23c375f053ebd8
+Date: Fri Aug 1 08:40:34 2008 +0200
+
+ qemu_mips: update README to follow qemu update about default machine
+
+
+commit ac169d645f5f0e0b9a232563099209e92a355d8e
+Date: Thu Jul 31 19:53:21 2008 -0500
+
+ ColdFire: Fix compilation issue caused by a missing function
+
+ Implement usec2ticks() which is used by fsl_i2c.c in
+ lib_m68k/time.c
+
+
+commit 01ae85b58b51d2fb1fac5b93095f6042cf48ae7b
+Date: Thu Jul 31 19:53:06 2008 -0500
+
+ Fix compilation error for TASREG
+
+ TASREG is ColdFire platform, the include ppc4xx.h in
+ board/esd/common/flash.c causes conflict.
+
+
+commit 35d3bd3cc35c508a6823dac77e0fd126808e4fc7
+Date: Thu Jul 31 19:52:36 2008 -0500
+
+ Fix compilation error for MCF5275
+
+ Rename OBJ to COBJ in board/platform/Makefile
+
+
+commit 5c40548f01218360a1f1395198c50ff45f3035b5
+Date: Thu Jul 31 19:52:28 2008 -0500
+
+ Fix compile error caused by incorrect function return type
+
+ Rename int mii_init(void) to void mii_init(void) for idmr
+ ColdFire platform
+
+
+commit a58c78067c928976c082c758d3987e89ead5b191
+Date: Fri Aug 1 12:06:22 2008 +0200
+
+ Fix build issues with MPC8xx FADS boards.
+
+
+commit 4b50cd12a3b3c644153c4cf393f4a4c12289e5aa
+Date: Thu Jul 31 17:54:03 2008 +0200
+
+ Prepare v1.3.4-rc2: update CHANGELOG
+
+
+commit a48311557db6e7e9473a6163b44bb1e6c6ed64c4
+Date: Thu Jul 31 16:09:00 2008 +0100
+
+ Add gzipped logo support
+
+ The README file states that CONFIG_VIDEO_BMP_GZIP behaves as follows:
+
+ If this option is set, additionally to standard BMP
+ images, gzipped BMP images can be displayed via the
+ splashscreen support or the bmp command.
+
+ However, the splashscreen function *only* supports standard BMP images.
+
+ This patch adds the documented gzip support.
+
+
+commit a5bcb01fbde6b1f1c9863cd86e5c4c369f0121ac
+Date: Thu Jul 31 15:56:48 2008 +0100
+
+ Fix Atmel LCD controller endianess for AVR32 processors
+
+ The Atmel lcd controller is used on Atmel's AT91 (little endian) and
+ AVR32 (big endian) platforms.
+
+ As such, the controller can handle both big and little endian memory.
+
+ This patch fixes the driver for the AVR32 platform.
+
+
+commit cdb8bd2fd3bcbe65d8e4334a55f5a667845426a1
+Date: Thu Jul 31 15:56:01 2008 +0200
+
+ apollon: fix build out of tree
+
+
+commit 2e752be39d3e398d4ab89ffa6634c397df298297
+Date: Thu Jul 31 12:35:04 2008 +0200
+
+ Uncompressed images loaded to their start address shall set load_end too
+
+
+commit c37207d7f51e19c17f859966f314e27cc1231801
+Date: Wed Jul 16 16:38:59 2008 +0200
+
+ Fix printf() format problems with configurable prompts
+
+ U-Boot allows for configurable prompt strings using the
+ CONFIG_AUTOBOOT_PROMPT resp. CONFIG_MENUPROMPT definitions. So far,
+ the assumption was that any such user defined problts would contain
+ exactly one "%d" format specifier. But some boards did not.
+
+ To allow for flexible boot prompts without adding too complex code we
+ now allow to specify the whole list of printf() arguments in the user
+ definition. This is powerful, but requires a responsible user who
+ really understands what he is doing, as he needs to know for exanple
+ which variables are available in the respective context.
+
+
+commit 54754120637b6a7f4ff774fb199fc550bcfea1da
+Date: Thu Jul 31 17:02:14 2008 +0200
+
+ TQM85xx: fix typo introduce by commit ffbb5cb9
+
+
+commit 0b4951d4cddca9cc800745891c95b291e47cbbd7
+Date: Thu Jul 31 15:27:01 2008 +0200
+
+ mvbc_p board: fix most build warnings.
+
+
+commit c4ec6db074051d2f6fc76a66411c60621b22bc02
+Date: Thu Jul 31 13:57:20 2008 +0200
+
+ E1000: clean up CONFIG_E1000_FALLBACK_MAC handling
+
+ Avoid "integer constant is too large for 'long' type" warnings.
+ And simplify the code.
+
+
+commit 9196b44334c330cc13de2464c59181e4db71f549
+Date: Wed Jul 30 23:21:19 2008 +0400
+
+ 8260: Making the use of gd->pci_clk dependant on the CONFIG_PCI
+
+
+commit 6361ad4b596f5a940a01c91ae0297d98f790cbe0
+Date: Wed Jul 30 23:20:32 2008 +0400
+
+ PPC: Add pci_clk in the global_data for CPM2 processors
+
+ This patch adds pci_clk field to the global_data structure for the
+ processors which have CPM2 module in case the CONFIG_PCI is defined.
+
+
+commit f0ff885ca64655bee6540eb8a25eed90b1152686
+Date: Wed Jul 30 14:13:30 2008 -0500
+
+ mpc85xx: Update linker scripts for Freescale boards
+
+ * Move to using absolute addressing always. Makes the scripts a bit more
+ portable and common
+ * Moved .bss after the end of the image. These allows us to have more
+ room in the resulting binary image for code and data.
+ * Removed .text object files that aren't really needed
+ * Make sure _end is 4-byte aligned as the .bss init code expects this.
+ (Its possible that the end of .bss isn't 4-byte aligned)
+
+
+commit 57c219ad5d34dd9d49991777a62e3899595f2ec7
+Date: Wed Jul 30 08:01:15 2008 -0500
+
+ Fix compile warnings in dlmalloc
+
+ The origional code was using on odd reference to get to the first
+ real element in av_[]. The first two elements of the array are
+ not used for actual bins, but for house keeping. If we are more
+ explicit about how use the first few elements we can get rid of the
+ warnings:
+
+ dlmalloc.c: In function 'malloc_extend_top':
+ dlmalloc.c:1971: warning: dereferencing type-punned pointer will break strict-aliasing rules
+ dlmalloc.c:1999: warning: dereferencing type-punned pointer will break strict-aliasing rules
+ dlmalloc.c:2029: warning: dereferencing type-punned pointer will break strict-aliasing rules
+ ...
+
+ The logic of how this code came to be is:
+ bin_at(0) = (char*)&(av_[2]) - 2*SIZE_SZ
+
+ SIZE_SZ is the size of pointer, and av_ is arry of pointers so:
+ bin_at(0) = &(av_[0])
+
+ Going from there to bin_at(0)->fd or bin_at(0)->size should be straight forward.
+
+
+commit 3f9ae1a5d43c49a8ecf497470c3d1d80255e44b9
+Date: Wed Jul 30 10:21:01 2008 +0200
+
+ ppc4xx: Fix W7OLMG compile problems by adding missing LM75 defines
+
+
+commit ebb86c4ecd37a7701358284e497ca4c6483c7cc5
+Date: Wed Jul 30 09:59:51 2008 +0200
+
+ cmd_bootm.c: Fix problem with '#if (CONFIG_CMD_USB)'
+
+ A recent patch used '#if (CONFIG_CMD_USB)' instead of
+ '#if defined(CONFIG_CMD_USB)'. This patch fixes this problem and makes
+ common/bootm.c compile again.
+
+
+commit 2cb9080427fe641dcb71da46cd0634dd406f37ed
+Date: Tue Jul 22 08:01:43 2008 +0900
+
+ Remove unused I2C at apollon board
+
+ There are no I2C devices on this board.
+
+
+commit 3c95960e526b3b026da20201db64526f46faf14b
+Date: Thu Jul 31 10:12:09 2008 +0200
+
+ at91rm9200dk, csb637: fix NAND related build problems
+
+ Tried fixing NAND support for the at91rm9200dk board; untested.
+ Disabled NAND support in the csb637 board config file.
+
+
+commit 9246f5ecfd353ae297a02ffd5328402acf16c9dd
+Date: Wed Jul 30 12:39:28 2008 +0200
+
+ ppc4xx: ML507: Environment in flash and MTD Support
+
+ - Relocate the location of U-Boot in the flash
+ - Save the environment in one sector of the flash memory
+ - MTD Support
+
+
+commit a8a16af4d59d14cc1c1187c10aaad80d6b8394b5
+Date: Tue Jul 29 17:16:10 2008 +0200
+
+ ppc4xx: ML507: Use of get_ram_size in board ml507
+
+ - Change suggested by WD
+
+
+commit 01a004313c5ec2d128b611df4c208b1b0d3c3fb4
+Date: Mon Jul 21 20:30:07 2008 +0200
+
+ ppc4xx: ML507: U-Boot in flash and System ACE
+
+ This patch allows booting from FLASH the ML507 board by Xilinx.
+ Previously, U-Boot needed to be loaded from JTAG or a Sytem ACE CF
+
+
+commit 5c374c9ee16fee2bf68533cc4010b3c0df21f783
+Date: Mon Jun 23 13:57:52 2008 +0200
+
+ Add support for the hammerhead (AVR32) board
+
+ The Hammerhead platform is built around a AVR32 32-bit microcontroller
+ from Atmel. It offers versatile peripherals, such as ethernet, usb
+ device, usb host etc.
+
+ The board also incooperates a power supply and is a Power over Ethernet
+ (PoE) Powered Device (PD).
+
+ Additonally, a Cyclone III FPGA from Altera is integrated on the board.
+ The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
+ DDR2 SDRAM interfaces, which will cover even the most exceptional need
+ of memory bandwidth. Together with the onboard video decoder the board
+ is ready for video processing.
+
+ For more information see: http:///www.miromico.com/hammerhead
+
+
+commit 09d318a8bb1444ec92e31cafcdba877eb9409e58
+Date: Tue Jul 29 12:23:49 2008 -0500
+
+ fsl_i2c: Use timebase timer functions instead of get_timer()
+
+ The current implementation of get_timer() is only really useful after we
+ have relocated u-boot to memory. The i2c code is used before that as part
+ of the SPD DDR setup.
+
+ We actually have a bug when using the get_timer() code before relocation
+ because the .bss hasn't been setup and thus we could be reading/writing
+ a random location (probably in flash).
+
+
+commit 4fc72a0d6ca85070a5e90d76cc5a853526ac09c4
+Date: Tue Jul 29 14:49:31 2008 +0200
+
+ Adder8xx: Fix CFG_MONITOR_LEN
+
+ Due to increased space usage, U-Boot can no longer be stored in three sectors.
+ The current U-Boot use just over three flash sectors (197k), and U-Boot will
+ become corrupt after saving environment variables. This patch adds another 64k
+ to CFG_MONITOR_LEN.
+
+
+commit a4c59ad4a21140550ada6f97690d2527c4146ce5
+Date: Tue Jul 29 08:47:57 2008 +0900
+
+ Add OneNAND IPL related files to gitignore
+
+
+commit 8d87589e8e874df7120a3d9667f051bc33bac250
+Date: Mon Jul 28 20:38:25 2008 +0200
+
+ API: Teach the storage layer about SATA and MMC options.
+
+
+commit 6b73b754f782e1ecce5048bf20b22ce56a07a5b8
+Date: Mon Jul 28 20:37:48 2008 +0200
+
+ API: Dump contents of sector 0 in the demo application.
+
+
+commit 13ca6305f2eba49c175f6370c35286141059c789
+Date: Mon Jul 28 20:37:10 2008 +0200
+
+ API: Correct storage enumeration routine, other minor fixes in API storage area.
+
+
+commit 05c7fe0f049b1c9eb9a1992f27e5e350d865f4a8
+Date: Mon Jul 28 20:36:19 2008 +0200
+
+ API: Fix compilation warnings in api_examples/demo.c.
+
+
+commit c14eefcc48212af2f3314809605698dd8393a90a
+Date: Sun Jul 27 17:09:43 2008 +0200
+
+ Fix more printf() format warnings
+
+
+commit 936897d4d1365452bbbdf8430db5e7769ef08d38
+Date: Fri Jul 25 15:18:16 2008 +0200
+
+ Fix remaining CFG_CMD_ define, ifdef and comments
+
+
+commit 5d1d00fb36005482e1803a00ddc46efa11d719af
+Date: Fri Jul 25 08:57:40 2008 +0200
+
+ Add include for config.h in command.h.
+
+ Because the cmd_tbl_s structure depends on the configuration file, it
+ must be assured that config.h is included before the structure is
+ evaluated by the compiler. If this is not certain, it could happen
+ that the compiler generates structures of different size, depending
+ on the fact if the source file includes <config.h> before or after
+ <command.h>.
+
+ The effect is that u-boot crashes when tries to relocate the command
+ table (for ppc) or try to access to the command table for other
+ architectures.
+
+ The problem can happen on board-depending commands. All general
+ commands under /common are unaffected, because they include already
+ config.h before command.h.
+
+
+commit 2dacb734bac9dba1db9e704d3e0b200ef521c79a
+Date: Wed Jul 23 13:16:06 2008 -0500
+
+ NAND: $(obj)-qualify ecc.h in kilauea NAND boot Makefile.
+
+ This fixes building out-of-tree.
+
+
+commit 36d59bd9da9e15d19b867b48449408830f4e2ad5
+Date: Wed Jul 23 07:30:46 2008 +0200
+
+ Fix warnings if compiling with IDE support.
+
+ cmd_ide.c:827: Warnung: weak declaration of `ide_outb' after first use results in unspecified behavior
+ cmd_ide.c:839: Warnung: weak declaration of `ide_inb' after first use results in unspecified behavior
+
+
+commit 7610db17fd4d59c51d825488526d85ede2f06767
+Date: Tue Jul 22 14:28:11 2008 -0400
+
+ Removed support for the adsvix board.
+
+ Support for the adsvix was originally provided by Applied Data
+ Systems (ADS), inc., now EuroTech, Inc.
+ The board never shipped aside from some sample boards.
+
+
+commit f96b44cef897bd372beb86dde1b33637c119d84d
+Date: Tue Jul 22 16:22:11 2008 +0200
+
+ ARM: set GD_FLG_RELOC for boards skipping relocation to RAM
+
+ If CONFIG_SKIP_RELOCATE_UBOOT is set the flag GD_FLG_RELOC is usually
+ never set, because relocation to RAM is actually never done by U-boot
+ itself. However, several pieces of code check if this flag is set at
+ some time.
+
+ So, to make sure this flag is set on boards skipping relocation, this
+ is added to the initialisation of U-boot at a moment where it is safe
+ to do so.
+
+
+commit e4dafff86f289b5677143a3e41da7b45c6d27fc7
+Date: Mon Jul 21 14:26:23 2008 -0500
+
+ fsl-i2c: fix writes to data segment before relocation
+
+ Prevent i2c_init() in fsl_i2c.c from writing to the data segment before
+ relocation. Commit d8c82db4 added the ability for i2c_init() to program the
+ I2C bus speed and save the value in i2c_bus_speed[], which is a global
+ variable. It is an error to write to the data segment before relocation,
+ which is what i2c_init() does when it stores the bus speed in i2c_bus_speed[].
+
+
+commit dbd32387920e5ad6f9dd58a7b5012bbabe2a6a21
+Date: Mon Jul 28 16:56:51 2008 +0200
+
+ mips: Fix baudrate divisor computation on alchemy cpus
+
+ Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
+ on alchemy cpus.
+
+
+commit c8c845cfdc6d0217135c1d5927eebd2b133a3314
+Date: Sat Jul 5 00:08:48 2008 -0700
+
+ Moved initialization of AVR32 Ethernet controllers to board_eth_init()
+
+ Renamed initialization functions for atngw100 and atstk1000.
+ Removed initializations for these boards from net/eth.c
+
+
+commit a229d291f33308ab7761d39f25fa1a53c0fc00a2
+Date: Wed Jul 23 10:55:46 2008 +0200
+
+ spi flash: Fix printf() format warnings
+
+
+commit 252a5e0738bcafaf25f7fbb40f19a59abc2cb13e
+Date: Wed Jul 23 10:55:31 2008 +0200
+
+ atmel_mci: Fix printf() format warnings
+
+
+commit 7f4b009f4232d57084ce0ec5aeb3b57bccb08e4c
+Date: Wed Jul 23 10:55:15 2008 +0200
+
+ avr32: Fix printf() format warnings
+
+
+commit a79c3e8d9c31db25d5ca3ec8e08a97f323410dd4
+Date: Wed Jul 23 10:52:19 2008 +0200
+
+ avr32: asm/io.h needs asm/types.h
+
+ map_physmem() takes a phys_addr_t as parameter. This type is defined in
+ asm/types.h, so we need to include that file.
+
+
+commit 1953d128fd07f07d1c3810a28c0863ea64dae1b6
+Date: Thu Jul 17 12:25:46 2008 +0200
+
+ microblaze: Fix printf() format issues
+
+
+commit de2a07e534f18b1ca5f9869a4ef0604ca829cff0
+Date: Thu Jul 17 07:27:51 2008 +0530
+
+ Remove unused code from lib_arm/bootm.c
+
+
+commit ffbb5cb942e9856fa24e946977e0a60c64df04ab
+Date: Wed Jul 16 18:56:45 2008 +0200
+
+ tqm85xx: Demystify 'DK: !!!' comment
+
+
+commit b2f44ba570f3a01113bbb745daf46f3858d22f53
+Date: Wed Jul 16 18:56:44 2008 +0200
+
+ 83xx/85xx/86xx: Add LTEDR local bus definitions
+
+
+commit f13f64cf42d5abec3e0f920233f6a7a61e7ae494
+Date: Wed Jul 16 16:22:32 2008 +0200
+
+ serial_xuartlite.c: fix compiler warnings
+
+
+commit 86446d3a5d9d3ca81e85d1ccd3accaaae6f8e3c9
+Date: Fri Jul 18 11:03:35 2008 +0200
+
+ POST: Add disable interrupts in some of the missing CPU POST tests
+
+ Some CPU POST tests did not disable the interrupts while running. This
+ seems to be necessary to protect this self modifying code.
+
+
+commit 97a3bf268d096e0e97e54048448c35114edcf557
+Date: Fri Jul 18 10:43:24 2008 +0200
+
+ ide: Use CFG_64BIT_LBA instead of CFG_64BIT_STRTOUL
+
+ This is needed for boards that define CFG_64BIT_STRTOUL but don't define
+ CFG_64BIT_LBA.
+
+
+commit 0043ac55024963295fc79b39af85b6dc3b261e17
+Date: Fri Jul 18 11:22:23 2008 +0200
+
+ POST PPC4xx/spr IVPR only if PPC440
+
+ The SPR IVPR register is only present (as far as I know) for
+ processors with a PPC440 core.
+
+
+commit 1092fbd64748dfa2e979b102611ece9bc5ec1855
+Date: Fri Jul 18 10:42:29 2008 +0200
+
+ ppc4xx: Enable 64bit printf format on 440/460 platforms
+
+ This patch defines CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL for all
+ 440/460 platforms. This may be needed since those platforms support
+ 36bit physical address space.
+
+
+commit 66fe183b1dd9c7534605147a8ecfed1c02345ee5
+Date: Fri Jul 18 15:57:23 2008 +0200
+
+ ppc4xx: Fix incorrect MODTx setup for some DIMM configurations
+
+ This patch fixes a problem with incorrect MODTx (On Die Termination)
+ setup for a configuration with multiple DIMM's and multiple ranks.
+ Without this change Katmai was unable to boot Linux with DDR2 frequency
+ >= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
+ with DDR2 frequency = 640MHz and mem=4GB.
+
+
+commit 60204d06ed9f8c2a67cc79eb67fd2b1d22bcbc8c
+Date: Fri Jul 18 12:24:41 2008 +0200
+
+ ppc4xx: Minor coding style cleanup of Xilinx Virtex5 ml507 support
+
+
+commit 086511fc96a8a9bb56e5e19a3d84c40f4dba80cc
+Date: Thu Jul 17 12:47:09 2008 +0200
+
+ ppc4xx: ML507 Board Support
+
+ The Xilinx ML507 Board is a Virtex 5 prototyping board that includes,
+ among others:
+ -Virtex 5 FX FPGA (With a ppc440x5 in it)
+ -256MB of SDRAM2
+ -32MB of Flash
+ -I2C Eeprom
+ -System ACE chip
+ -Serial ATA connectors
+ -RS232 Level Conversors
+ -Ethernet Transceiver
+
+ This patch gives support to a standard design produced by EDK for this
+ board: ppc440, uartlite, xilinx_int and flash
+
+ - Includes Changes propossed by Stefan Roese and Michal Simek
+
+
+commit d865fd09809a3a18669f35f970781820af40e4de
+Date: Thu Jul 17 11:44:12 2008 +0200
+
+ ppc4xx: CPU PPC440x5 on Virtex5 FX
+
+ -This patchs gives support for the embbedded ppc440
+ on the Virtex5 FPGAs
+ -interrupts.c divided in uic.c and interrupts.c
+ -xilinx_irq.c for xilinx interrupt controller
+ -Include modifications propossed by Stefan Roese
+
+
+commit 340ccb260f21516be360745d5c5e3bd0657698df
+Date: Wed Jul 16 20:04:49 2008 +0200
+
+ cfi_flash: fix flash on BE machines with CFG_WRITE_SWAPPED_DATA
+
+ This got broken by commits 93c56f212c
+ [cfi_flash: support of long cmd in U-boot.]
+
+ That command needs to be in little endian format on BE machines
+ with CFG_WRITE_SWAPPED_DATA. Without this patch, the command 0xf0
+ gets saved on stack as 0x00 00 00 f0 and 0x00 gets written into
+ the cmdbuf in case portwidth = chipwidth = 8bit.
+
+
+commit 11188d55bc16dd907451c00282e00a038f73dd62
+Date: Thu Jul 17 10:40:51 2008 +0200
+
+ ppc4xx: Fix alphabetical order in 4xx Makefile part (redwood)
+
+
+commit 021f6df6e96af5b387810cf96d24848da1faa55c
+Date: Thu Jul 10 17:20:51 2008 +0400
+
+ 83xx: mpc8315erdb: fix silly thinko in fdt_tsec1_fixup
+
+ The thinko was quite silly indeed, I messed with !ptr. Normally this
+ would trigger some fault, but in U-Boot NULL pointer is equal to phys
+ 0, so the code was working still, just didn't actually test mpc8315erdb
+ environment variable value. Heh.
+
+
+commit 25f5f0d49a3ae89bf4396f2557ce98debfef21da
+Date: Tue Jul 8 21:00:04 2008 +0400
+
+ 83xx: mpc8315erdb: add support for switching between ULPI/UTMI USB PHYs
+
+ Freescale ships MPC8315E-RDB boards either with TSEC1 and USB UTMI
+ support, or without TSEC1 but with USB ULPI PHY support in addition.
+ With this patch user can specify desired USB PHY.
+
+ Also, it seems that we can't distinguish the two boards in software, so
+ user have to set `mpc8315erdb' environment variable to either 'tsec1'
+ (TSEC1 enabled) or `ulpi' (board with ULPI PHY, TSEC1 disabled), so that
+ Linux will not probe for TSEC1.
+
+
+commit 015b27b9e165fcf220e42f2c4afbaeaa2758fcf6
+Date: Tue Jul 8 20:59:43 2008 +0400
+
+ fdt_support: fdt_fixup_dr_usb: add support for phy_type fixups
+
+ Currently U-Boot can only fixup the usb dr_mode, but some boards (namely
+ MPC8315E-RDB) can use two PHY types: ULPI (stand-alone OTG port) or UTMI
+ (connected to the four-ports hub, usb host only).
+
+ This patch implements support for passing Dual-Role USB controller's
+ device tree property phy_type through the usb_phy_type environment
+ variable.
+
+
+commit 699f05125509249072a0b865c8d35520d97cd501
+Date: Tue Jul 15 22:22:44 2008 +0200
+
+ Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefile
+
+
+commit bcab74baa6b1b1c969038ab6f64a186239180405
+Date: Tue Jul 15 11:23:02 2008 -0400
+
+ Round the serial port clock divisor value returned by calc_divisor()
+
+ Round the serial port clock divisor value returned by
+ calc_divisor()
+
+
+commit 0328ef0edfe950f0b7b8b368dae482531506b74a
+Date: Tue Jul 15 21:44:46 2008 +0200
+
+ Fix DHCP protocol so U-Boot does not respond too early
+ on the network with it's offered IP number; it should not reply until
+ after it has received a DHCP ACK message. Also ensures that U-Boot
+ does it's DHCPREQUEST as broadcast (per RFC 2131).
+
+
+commit 7288f972fcaee14a9741cb08c8688a23874b4a2e
+Date: Tue Jul 15 13:35:23 2008 +0200
+
+ cfi_flash: make the command u32 only
+
+ This got changed by commit 93c56f212c
+ [cfi_flash: support of long cmd in U-boot.]
+
+ Long is the wrong type because it will behave differently on 64bit
+ machines in a way that is probably not expected. u32 should be
+ enough.
+
+
+commit 31cfe57491b183acae575d486729e158f016c27b
+Date: Mon Jul 14 23:48:41 2008 +0200
+
+ tools/gitignore: update to all generated files
+
+
+commit 5e0de0e216b8fb27634afb11c60a2fa24c23349e
+Date: Wed Jul 9 18:30:44 2008 +0200
+
+ mpc5xxx: Add MVBC_P board support
+
+ The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
+ controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.
+
+
+commit e2d31fb3450653115452144363d5bde4e5e3e693
+Date: Thu Jun 19 17:56:11 2008 -0500
+
+ Update Freescale sys_eeprom.c to handle CCID formats
+
+ Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats. The
+ NXID format replaces the older CCID format, but it's important to support both
+ since most boards out there still use the CCID format. This change is in
+ preparation for using one file to handle both formats. This will also unify
+ EEPROM support for all Freescale 85xx and 86xx boards.
+
+ Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
+ instead of ID_EEPROM_ADDR.
+
+
+commit d85f46a25ccb33ed9b295de3c2cfe1ce270ece9a
+Date: Fri Jul 11 17:22:43 2008 +0900
+
+ pci: sh: Add pci_skip_dev and pci_print_dev function
+
+ Add function of new PCI, pci_skip_dev and pci_print_dev.
+
+
+commit 1107014e835ec9d46c0333f4211d104f77442db0
+Date: Mon Jul 14 20:29:07 2008 -0500
+
+ Clean up INIT_RAM options
+
+ The L2_INIT_RAM option was unused, and recent changes to the TLB code
+ meant that the INIT_RAM TLBs weren't being cleared out. In order to reduce
+ the amount of mapped space attached to nothing, we change things so the TLBs
+ get cleared.
+
+
+commit 4524561820a9327e89107854b3a7187800ccf719
+Date: Mon Jul 14 20:26:57 2008 -0500
+
+ Remove fake flash bank from 8544 DS
+
+ The fake flash bank was generating errors for anyone who didn't have a
+ PromJET hooked up to the board. As that constitutes the vast majority of
+ users, we remove it.
+
+
+commit 630d9bfcb5f6d3a43f251901a6b480994dcb6ea3
+Date: Mon Jul 14 14:07:03 2008 -0500
+
+ MPC8544DS: Add ATI Video card support
+
+ Add support for using a PCIe ATI Video card on PCIe2.
+
+
+commit 7f9f4347cf325c63a39fe30910f3fb211ae2cc15
+Date: Mon Jul 14 14:07:02 2008 -0500
+
+ 85xx: Add some L1/L2 SPR register definitions
+
+ Add new L1/L2 SPRs related to e500mc cache config and control.
+
+
+commit e5852787f0c3c442a276262f13d91ca450605ac0
+Date: Mon Jul 14 14:07:01 2008 -0500
+
+ MPC8544DS: Report board id, board version and fpga version.
+
+
+commit 73f15a060f67a2462551c334215bd20fac6b81d1
+Date: Mon Jul 14 14:07:00 2008 -0500
+
+ 85xx: Cleanup L2 cache size detection
+
+ The L2 size detection code was a bit confusing and we kept having to add
+ code to it to handle new processors. Change the sense of detection so we
+ look for the older processors that aren't changing.
+
+ Also added support for 1M cache size on 8572.
+
+
+commit c3ca7e5e00a24451f20df3bded9a61ba541921df
+Date: Fri Jul 11 15:33:08 2008 -0400
+
+ sbc8560: enable CONFIG_OF_LIBFDT by default
+
+ Make the default build for the sbc8560 board be powerpc
+ capable with libfdt support.
+
+
+commit 6b44a44ec2aab180d7095c1c92e669cee1d3e3bd
+Date: Mon Jul 14 20:04:40 2008 -0500
+
+ Fix indentation for default boot environment variables
+
+ This was proposed by Paul Gortmaker in response to Wolfgang's comments on
+ similar #defines in sbc8560.h.
+
+
+commit 37fef499104e28e0a83b02b85ca0d1fbe80d294a
+Date: Fri Jul 11 15:33:07 2008 -0400
+
+ sbc8560: add default fdt values
+
+ Add in the default fdt settings and the typical EXTRA_ENV
+ settings as borrowed from the mpc8560ads. Fix a couple
+ of stale references to the mpc8560ads dating back to the
+ original clone/fork.
+
+
+commit d04e76edf92f7f89696989e8702b97e020455af3
+Date: Fri Jul 11 15:33:06 2008 -0400
+
+ sbc8560: add in ft_board_setup()
+
+ Add in for the sbc8560, the ft_board_setup() routine, based on what is
+ in use for the Freescale MPC8560ADS board.
+
+
+commit c158bcaca3b31cbe38c4143812e6170e38a57393
+Date: Fri Jul 11 15:33:05 2008 -0400
+
+ sbc8560: define eth0 and eth1 instead of eth1 and eth2
+
+ The existing config doesn't define CONFIG_HAS_ETH0, and so the
+ fdt support doesn't update the zeros in the dtb local-mac with
+ real data from the u-boot env. Since the existing config is
+ tailored to just two interfaces, get rid of the ETH2 definitions
+ at the same time.
+
+ Also don't include any end user specific data into the environment
+ by default -- things like MAC address, network parameters etc. need
+ to come from the end user.
+
+
+commit 0ec436d2f95076d9e46ae594db6e9b1d8732840d
+Date: Fri Jul 11 15:33:04 2008 -0400
+
+ sbc8560: properly set cs0_bnds for 512MB
+
+ The sbc8560 board ships with 512MB of memory installed,
+ but the current cs0_bnds is hard coded for 256MB. Set the
+ value based on CFG_SDRAM_SIZE.
+
+
+commit 6de5bf24004c8d9c9b070bb8f7418d1c45e5eb27
+Date: Fri Jul 11 15:33:03 2008 -0400
+
+ sbc8560: proper definitions for TSEC.
+
+ The definitions for the TSEC have become out of date. There is no
+ longer any such options like "CONFIG_MPC85xx_TSEC1" or similar.
+ Update to match those of other boards, like the MPC8560ADS.
+
+
+commit 71074abbe0c76429577aff58aeff0a24ad210b23
+Date: Wed Jul 9 13:23:05 2008 -0400
+
+ 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq
+
+ Some boards that have external 16550 UARTs don't have a direct
+ tie between bi_busfreq and the clock used for the UARTs. Boards
+ that do have such a tie should set CFG_NS16550_CLK to be
+ get_bus_freq(0) -- which most of them do already.
+
+
+commit 24ef76f320fbadf074105229826514db140f939f
+Date: Wed Jul 2 07:03:53 2008 -0700
+
+ Change the temp map to ROM to align addresses to page size.
+
+ With a page size of BOOKE_PAGESZ_16M, both the real and effective
+ addresses must be multiples of 16MB. The hardware silently truncates
+ them so the code happens to work. This patch clarifies the situation
+ by establishing addresses that the hardware doesn't need to truncate.
+
+
+commit 06b4186c10204b6683edb047ac5f506fb0ce0937
+Date: Tue Jun 17 17:45:22 2008 -0500
+
+ mpc85xx: use IS_E_PROCESSOR macro
+
+
+commit 6b70ffb9d1b2e791161f3cf92937aa45b4a07b78
+Date: Mon Jun 16 15:55:53 2008 -0500
+
+ fdt: add crypto node handling for MPC8{3, 5}xxE processors
+
+ Delete the crypto node if not on an E-processor. If on 8360 or 834x family,
+ check rev and up-rev crypto node (to SEC rev. 2.4 property values)
+ if on an 'EA' processor, e.g. MPC8349EA.
+
+
+commit 85e5808e8ea9f77da5219f23394112f0b424fa5e
+Date: Fri Jul 11 15:10:11 2008 -0400
+
+ ARM DaVinci: Remove extern phy_t declaration by moving code to proper place
+
+ ARM DaVinci: Remove extern phy_t declaration by moving
+ code to proper place.
+
+
+commit 3a9e7ba2ac14018c5dd1e78a7dd735571569c971
+Date: Fri Jul 11 15:10:10 2008 -0400
+
+ ARM DaVinci: Remove duplicate definitions of MACH_TYPE and prototype of i2c_init()
+
+ ARM DaVinci: Remove duplicate definitions of MACH_TYPE
+ and prototype of i2c_init().
+
+
+commit 348753d416cd2c9e7ec6520a544c8f33cf02a560
+Date: Mon Jul 14 14:03:02 2008 -0500
+
+ Fix some more printf() format problems.
+
+
+commit 45b16d22c64674ccd8c4637456a987463609141c
+Date: Mon Jul 14 22:38:42 2008 +0200
+
+ Fix coding style; make code better parsable by external tools
+
+
+commit b880cbf207b1c109d3a661417a8feddcbd729a9d
+Date: Mon Jul 14 21:19:08 2008 +0200
+
+ cpu/i386/serial.c: Fix syntax errors
+
+
+commit e2d45e6f4d9919e1afeac5e09557b2252832fccf
+Date: Mon Jul 14 20:41:35 2008 +0200
+
+ elppc board: Coding style cleanup.
+
+
+commit 82b24a8a505fc81466484b3c55b574ee0b4205bc
+Date: Mon Jul 14 20:40:22 2008 +0200
+
+ elppc board: fix syntax error.
+
+
+commit 0fe340585a6a48bd392d315b0dd84d068b1c3790
+Date: Mon Jul 14 20:38:26 2008 +0200
+
+ EB+MCF-EV123 board: fix coding style (alingment)
+
+
+commit 6841785a0bb0f38175456a923edd634fb7dd6947
+Date: Mon Jul 14 20:36:44 2008 +0200
+
+ EB+MCF-EV123 board: fix syntx error
+
+
+commit ab5cda9f88c3eaf9cf599adc3a3375906c4ed904
+Date: Mon Jul 7 18:02:08 2008 -0500
+
+ Remove LBC_CACHE_BASE from 8544 DS
+
+ The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping
+ space for some anyway, we were allowing speculative loads into unmapped space,
+ which would cause an exception (annoying, even if ultimately harmless).
+ Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
+ problem.
+
+
+commit d0ff51ba5d0309dbe9e25ea54f8a0285a6d5db90
+Date: Mon Jul 14 15:19:07 2008 +0200
+
+ Code cleanup: fix old style assignment ambiguities like "=-" etc.
+
+
+commit d7854223c5c85b5849fbf422cc8ac0efef461c37
+Date: Mon Jul 14 15:10:53 2008 +0200
+
+ AmigaOneG3SE: remove dead and incomplete files
+
+
+commit b64f190b7a34224df09b559ca111eb1b733f00ad
+Date: Mon Jul 14 15:06:35 2008 +0200
+
+ Fix printf() format issues with sizeof_t types by using %zu
+
+
+commit f354b73e16a86f9e9085471a830605f74f84ea5d
+Date: Mon Jul 14 14:11:45 2008 +0200
+
+ vsprintf: add z and t options
+
+
+commit 25dbe98abb686d8210e1731fba85ced7d3ce874c
+Date: Sun Jul 13 23:07:35 2008 +0200
+
+ Fix some more printf() format issues.
+
+
+commit d5996dd555edf52721b7691a4c59de016251ed39
+Date: Sun Jul 13 19:51:00 2008 +0200
+
+ Fix some more printf() format problems.
+
+
+commit 0f9d5f6d6e814907794995c6a22af752040c35d9
+Date: Sun Jul 13 19:48:26 2008 +0200
+
+ ADS5121: Fix (delete) incorrect ads5121_diu_init() prototype
+
+
+commit 322716a1d1eb33a71067ba0eb1c5346fb2dd6b34
+Date: Sat Jul 12 17:31:36 2008 +0200
+
+ Fix bug in Lime video driver
+
+ We need to wait while drawing engine clears frame
+ buffer before any further software accesses to frame
+ buffer will be initiated. Otherwise software drawn
+ parts could be partially destroyed by the drawing
+ engine or even GDC chip freeze could occur (as
+ observed on socrates board).
+
+
+commit 0a5676befb0c590212a53f7627fa5d0d8a84bf34
+Date: Sat Jul 12 14:36:34 2008 +0200
+
+ Fix some more printf() format issues.
+
+
+commit 18c8a28aad49803780bd8d52432ded528e37e701
+Date: Fri Jul 11 15:11:57 2008 +0200
+
+ hwmon: rename CONFIG_DS1722 to CONFIG_DTT_DS1722
+
+
+commit 6ecbb45bb027e90c19d63b48e7b0c05acc1a87c0
+Date: Fri Jul 11 11:50:53 2008 +0200
+
+ hwmon: Cleaning hwmon devices
+
+ Clean Makefile
+ Move device specific values to driver for better reading
+
+
+commit c78fce699c7ff467ecd841da6a79f065180bf578
+Date: Fri Jul 11 10:43:13 2008 +0200
+
+ FIS: repare incorrect return value with ramdisk handling
+
+ Microblaze and PowerPC use boot_get_ramdisk for loading
+ ramdisk to memory with checking return value.
+ Return 0 means success. Return 1 means failed.
+ Here is correspond part of code from bootm.c which check
+ return code.
+
+ ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_PPC,
+ &rd_data_start, &rd_data_end);
+ if (ret)
+ goto error;
+
+
+commit 84a2c64a26dc5e275e1cf4e76a6e194a18fb5477
+Date: Fri Jul 11 10:10:32 2008 +0200
+
+ microblaze: Remove useless ancient headers
+
+
+commit 53ea981c3124b13c137c2d10e975b7c6672266e0
+Date: Fri Jul 11 10:10:31 2008 +0200
+
+ microblaze: Clean uartlite driver
+
+ Redesign uartlite driver to in_be32 and out_be32 macros
+ Fix missing header in io.h
+
+
+commit dbf3dfb386a2d5d2381814e39985ab2e21894550
+Date: Fri Jul 11 02:39:14 2008 +0200
+
+ Enable passing of ATAGs required by latest Linux kernel.
+
+commit ef130d3093bdf88f01cf3e000fe5df249ebf2b1a
+Date: Fri Jul 11 10:24:15 2008 -0400
+
+ Fix integer overflow warning in calc_divisor()
+
+ which happened when rounding the serial port clock divisor
+
+
+commit 6b760189d77f001684e3160b355c185ca3804961
+Date: Fri Jul 11 01:09:59 2008 +0200
+
+ Fix build time warnings in function mmc_decode_csd()
+
+
+commit c15947d6ce0d59925c97fdfac692476af6e262d0
+Date: Thu Jul 10 10:46:33 2008 -0400
+
+ ARM: Fix for broken compilation when defining CONFIG_CMD_ELF
+
+ caused by missing dcache status/enable/disable functions.
+
+
+commit 068c1b77c8f42a1a31084d2f4b1d5cc807c1a9ce
+Date: Thu Jul 10 13:53:31 2008 +0200
+
+ ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
+
+ This patch removes some ft_board_setup() functions from some 4xx boards.
+ This can be done since we now have a default weak implementation for this
+ in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
+ implementation like canyonlands need their own version.
+
+
+commit d39a089f8bc960ba9ae6a08fda5582b578620cc1
+Date: Sun Jul 13 14:58:16 2008 +0200
+
+ Add last known maintainer for orphaned boards; reformat.
+
+
+commit 5c761d57bb9940e016d561fda8b2ed84c55de5b6
+Date: Thu Jul 10 13:16:04 2008 +0200
+
+
+ anymore. You can't be a maintainer without a valid e-mail address, so
+ move all boards that used to be maintained by Kyle Harris to the
+ "orphaned" list.
+
+ Currently, only PowerPC has a list of orphaned boards, so this patch
+ creates one for ARM as well.
+
+
+commit 17bd17071463b0cde391ac4a0863d600474b4ea1
+Date: Thu Jul 10 01:15:10 2008 +0200
+
+ at91: Fix to enable using Teridian MII phy (78Q21x3) with at91sam9260
+
+ On the at91sam9260ep development board there is an EEPROM
+ connected to the TWI interface (PA23, PA24 Peripheral A
+ multiplexing), so we cannot use these pins as ETX2, ETX3.
+ This patch configures PA10, PA11 pins for ETX2, ETX3
+ instead of PA23, PA24 pins.
+
+
+commit f889265753ddf4465d9d580827bb9289bfac55d6
+Date: Sat Jul 12 13:18:34 2008 -0600
+
+ fix DIU for small screens
+
+ The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values
+ so it was not possible to set a slow pixel clock and thus prevented
+ display on small screens.
+
+
+commit b60b8573875e650e4c69be667bfc88d3ed474a7c
+Date: Fri Jul 11 14:44:09 2008 -0600
+
+ ADS5121 cleanup compile warnings
+
+ board/ads5121/iopin.c
+ Replace bit fields in struct iopin_t with a single
+ field and intialize it via plain old macros.
+ This fixes the type pun warnings and makes the code
+ more readable.
+
+ board/ads5121/ads5121.c
+ Add include iopin.h to ads5121.c for the iopin_initialize
+ prototype.
+
+ Add an extern void ads5121_diu_init(void)
+
+
+commit bde63587622c4b830a27d1ddf7265843de9e994f
+Date: Fri Jul 11 22:56:11 2008 +0200
+
+ Fix some more printf() format issues.
+
+
+commit 184f1b404a90eef8b425c0e7b3018d59ef9982c8
+Date: Fri Jul 11 22:55:31 2008 +0200
+
+ Fixed some out-of-tree build issues
+
+
+commit 47bf9c71ae838305a3ea3161af8d14e6f3fc2c82
+Date: Wed Jul 9 16:20:23 2008 -0500
+
+ ColdFire: Fix FB CS not setup properly for Mcf5282
+
+ Remove all CFG_CSn_RO in cpu/mcf52x2/cpu_init.c. If
+ CFG_CSn_RO is defined as 0, the chipselect will not
+ be assigned.
+
+
+commit bc3ccb139f0836f0a834cfd370a120a00ad7e63a
+Date: Wed Jul 9 15:47:27 2008 -0500
+
+ ColdFire: Fix incorrect define for mcf5227x and mcf5445x RTC
+
+ Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
+ clock module in cpu/<cf arch>/cpu_init.c
+
+
+commit f94945b517f10e01927101679c62361e03d4e837
+Date: Wed Jul 9 15:25:01 2008 -0500
+
+ ColdFire: Fix incorrect board name in MAKEALL for M5253EVBE
+
+
+commit 0e0c4357d14a3563c6a2a1e6d5ad6a2cc4f35cab
+Date: Wed Jul 9 15:21:44 2008 -0500
+
+ Fix compile error caused by missing timer function
+
+ Add #define CONFIG_MCFTMR in EB+MCF-EV123.h configuration file
+
+
+commit c37ea031175b807c54e6bad9b270e9bede6c0078
+Date: Wed Jul 9 15:14:25 2008 -0500
+
+ Fix compile error caused by incorrect function return type
+
+ Rename int mii_init(void) to void mii_init(void)
+
+
+commit ab4860b255239dbaecccdd002c8d11f4ef54dd75
+Date: Wed Jun 18 19:27:23 2008 -0500
+
+ ColdFire: Fix power up issue for MCF5235
+
+
+commit dd08e97361fbc9e79fa5ef1a8acf29273b934b11
+Date: Wed Jun 18 19:19:07 2008 -0500
+
+ ColdFire: Fix compiling error for MCF5275
+
+ The compiling error was caused by missing a closed parentheses
+ in speed.c
+
+
+commit 94603c2fd4dbe0655878416aa0da9f302d4c30d3
+Date: Wed Jun 18 19:14:01 2008 -0500
+
+ ColdFire: Fix timer issue for MCF5272
+
+ The timer was assigned to wrong timer memory mapped which
+ caused udelay() and timer() not working properly.
+
+
+commit 3b1e8ac9b43f89cc9291a6a86e6b33ef55801515
+Date: Wed Jun 18 19:12:13 2008 -0500
+
+ ColdFire: Change invalid JMP to BRA caught by new v4e toolchain
+
+
+commit 8371dc2066136be21e10b7b9293e469297d77298
+Date: Wed Jun 18 19:05:23 2008 -0500
+
+ ColdFire: Add -got=single param for new linux v4e toolchains
+
+
+commit 56d52615cd47bc522ee13bb7ec7e59d6ce9426c7
+Date: Wed Jun 18 13:21:19 2008 -0500
+
+ ColdFire: Fix code flash configuration for M547x/M548x boards
+
+
+commit 6e37091afc07fdcc15590093fd066b0cb7399f85
+Date: Tue Jun 24 12:12:16 2008 -0500
+
+ ColdFire: Fix warning messages by passing correct data type in board.c
+
+
+commit 81cc32322acb1b3225ee45606ced48e2a14824dc
+Date: Thu May 29 12:21:54 2008 -0500
+
+ ColdFire: Fix UART baudrate formula
+
+ The formula "counter = (u32) (gd->bus_clk / gd->baudrate) / 32"
+ can generate the wrong divisor due to integer division truncation.
+ Round the calculated divisor value by adding 1/2 the baudrate
+ before dividing by the baudrate.
+
+
+commit b578fb471444cbd7db1285701ba51343baaf73fb
+Date: Thu Jul 10 11:38:26 2008 +0200
+
+ ppc4xx: Fix include sequence in 4xx_pcie.c
+
+ This patch now moves common.h to the top of the inlcude list. This
+ is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that
+ the phys_size_t/phys_addr_t are defined to the correct size in this
+ driver.
+
+
+commit 69e2c6d0d13d7c8cf1612ac090bdc4c59ba6858e
+Date: Fri Jul 11 13:10:56 2008 +0200
+
+ ppc4xx: Fix compile warning in 44x_spd_ddr2.c
+
+
+commit 6bd9138498c2e4f4f09190108b99157d1b2140b5
+Date: Fri Jul 11 11:40:13 2008 +0200
+
+ ppc4xx: Fix small korat merge problem
+
+
+commit 1d0554736a0a1dd59718acda660871ce56b69e18
+Date: Fri Jul 11 11:34:52 2008 +0200
+
+ ppc4xx: Some Rewood cleanups (coding style, leading white spaces)
+
+
+commit 3a82113ed5934d498f25080441a8261fc9454b15
+Date: Thu Jul 10 16:37:09 2008 +0200
+
+ ppc4xx: Add 460SX UIC defines
+
+ Only the really needed ones are added (cascading and EMAC/MAL).
+
+
+commit 26173fc6f60521c2a8072f652f863617fc11ba9a
+Date: Mon Jun 30 14:11:07 2008 +0200
+
+ ppc4xx: Continue cleanup of ppc440.h
+
+ This patch continues the ppc440.h cleanup by removing some of the unused
+ defines.
+
+
+commit d9056b7913ed6a228d2f33671d916efedee541dd
+Date: Mon Jun 30 14:05:05 2008 +0200
+
+ ppc4xx: Cleanup Katmai & Yucca PCIe register usage
+
+ This patch cleans up the 440SPe PCIe register usage. Now only defines
+ from the include/asm-ppc/4xx_pcie.h are used.
+
+
+commit 5de851403b01489b493fa83137ad990b8ce60d1c
+Date: Thu Jun 26 17:36:39 2008 +0200
+
+ ppc4xx: Rework 440GX UIC handling
+
+ This patch reworks the 440GX interrupt handling so that the common 4xx
+ code can be used. The 440GX is an exception to all other 4xx variants
+ by having the cascading interrupt vectors not on UIC0 but on a special
+ UIC named UICB0 (UIC Base 0). With this patch now, U-Boot references
+ the 440GX UICB0 when UIC0 is selected. And the common 4xx interrupt
+ handling is simpler without any 440GX special cases.
+
+ Also some additional cleanup to cpu/ppc4xx/interrupt.c is done.
+
+
+commit d1631fe1a05b063ccaf62ea892a8887b829847d1
+Date: Thu Jun 26 13:40:57 2008 +0200
+
+ ppc4xx: Consolidate PPC4xx UIC defines
+
+ This 2nd patch now removes all UIC mask bit definition. They should be
+ generated from the vectors by using the UIC_MASK() macro from now on.
+ This way only the vectors need to get defined for new PPC's.
+
+ Also only the really used interrupt vectors are now defined. This makes
+ definitions for new PPC versions easier and less error prone.
+
+ Another part of this patch is that the 4xx emac driver got a little
+ cleanup, since now the usage of the interrupts is clearer.
+
+
+commit 4fb25a3db3b3839094aa9ab748efd7a95924690b
+Date: Wed Jun 25 10:59:22 2008 +0200
+
+ ppc4xx: Consolidate PPC4xx UIC defines
+
+ This patch is the first step to consolidate the UIC related defines in the
+ 4xx headers. Move header from asm-ppc/ppc4xx-intvec.h to
+ asm-ppc/ppc4xx-uic.h as it will hold all UIC related defines in the next
+ steps.
+
+
+commit 7ee2619c20ccecd57966d74d844e6329e141261c
+Date: Tue Jun 24 17:18:50 2008 +0200
+
+ ppc4xx: Consolidate PPC4xx EBC defines
+
+ This patch removes all EBC related defines from the PPC4xx headers
+ ppc405.h and ppc440.h and introduces a new header
+
+ include/asm-ppc/ppc4xx-ebc.h
+
+ with all those defines.
+
+
+commit e321801bed5a6d896d298c00fd20046f039d5d66
+Date: Thu Jul 10 13:52:44 2008 +0200
+
+ ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
+
+ This patch removes some ft_board_setup() functions from some 4xx boards.
+ This can be done since we now have a default weak implementation for this
+ in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
+ implementation like canyonlands need their own version.
+
+
+commit 08250eb2edbd96514d049602d9e134110ac3185f
+Date: Thu Jul 10 15:32:32 2008 +0200
+
+ ppc4xx: Fix merge problems in 44x_spd_ddr2.c
+
+
+commit 1740c1bf40e3c6d03ac16c29943fdd9fc1e87038
+Date: Tue Jul 8 08:35:00 2008 -0700
+
+ ppc4xx: Add MII mode support to the EMAC RGMII Bridge
+
+ This patch adds support for placing the RGMII bridge on the
+ PPC405EX(r) into MII/GMII mode and allows a board-specific
+ configuration to specify the bridge mode at compile-time.
+
+
+commit 2e2050842e731c823ce8d41fb0c15579eb70ced9
+Date: Wed Jul 9 16:46:35 2008 -0700
+
+ ppc4xx: Add Mnemonics for AMCC/IBM DDR2 SDRAM Controller
+
+ This patch completes the preprocessor mneomics for the IBM DDR2 SDRAM
+ controller registers (MODT and INITPLR) used by the
+ PowerPC405EX(r). The MMODE and MEMODE registers are unified with their
+ peer values used for the INITPLR MR and EMR registers,
+ respectively. Finally, a spelling typo is correct (MANUEL to MANUAL).
+
+ With these mnemonics in place, the CFG_SDRAM0_* magic numbers for
+ Kilauea are replaced by equivalent mnemonics to make it easier to
+ compare and contrast other 405EX(r)-based boards (e.g. during board
+ bring-up).
+
+ Finally, unified the SDRAM controller register dump routine such that
+ it can be used across all processor variants that utilize the IBM DDR2
+ SDRAM controller core. It produces output of the form:
+
+ PPC4xx IBM DDR2 Register Dump:
+ ...
+ SDRAM_MB0CF[40] = 0x00006701
+ ...
+
+ which is '<mnemonic>[<DCR #>] = <value>'. The DCR number is included
+ since it is not uncommon that the DCR values in header files get mixed
+ up and it helps to validate, at a glance, they match what is printed
+ in the user manual.
+
+ Tested on:
+ AMCC Kilauea/Haleakala:
+ - NFS Linux Boot: PASSED
+ - NAND Linux Boot: PASSED
+
+
+commit ad7382d828982e9c1bafc4313ef1b666f6145f58
+Date: Wed Jul 9 16:31:59 2008 -0700
+
+ ppc4xx: Add AMCC/IBM DDR2 SDRAM ECC Field Mnemonics
+
+ Add additional DDR2 SDRAM memory controller DCR mneomnics, condition
+ revision ID DCR based on 405EX, and add field mnemonics for bus error
+ status and ECC error status registers.
+
+
+commit 103201731bd8e85404d0f51a5b4e8abd14c0b6c6
+Date: Wed Jul 9 16:31:36 2008 -0700
+
+ ppc4xx: Add SDR0_SRST Mnemonics for the 405EX(r)
+
+ This patch adds bit field mnemonics for the 405EX(r) SDR0_SRST soft reset register.
+
+
+commit 5b457d00730d4aa0c6450d21a9104723e606fb98
+Date: Wed Jul 9 11:55:46 2008 -0700
+
+ PPC4xx: Correct SDRAM_MCSTAT for PPC405EX(r)
+
+ While the PowerPC 405EX(r) shares in common the AMCC/IBM DDR2 SDRAM
+ controller core also used in the 440SP, 440SPe, 460EX, and 460GT, in
+ the 405EX(r), SDRAM_MCSTAT has a different DCR value.
+
+ Its present value on the 405EX(r) causes a read back of 0xFFFFFFFF
+ which causes SDRAM initialization to periodically fail since it can
+ prematurely indicate SDRAM ready status.
+
+
+commit 0ce5c8675bb2c61f1d71fb97f0bbe822663fb93d
+Date: Tue Jul 8 22:48:42 2008 -0700
+
+ ppc4xx: Initial framework of the AMCC PPC460SX redwood reference board.
+
+ Add AMCC Redwood reference board that uses the latest
+ PPC 464 CPU processor combined with a rich mix of peripheral
+ controllers. The board will support PCIe, mutiple Gig ethernet
+ ports, advanced hardware RAID assistance and IEEE 1588.
+
+
+commit 96e5fc0e6a1861d0fea4efa3cd376df95a5b1b89
+Date: Tue Jul 8 22:48:07 2008 -0700
+
+ ppc4xx: Add initial 460SX reference board (redwood) config file and defines.
+
+
+commit 7d30793685efcada183891c78fc892e6c9ba50c7
+Date: Tue Jul 8 22:47:31 2008 -0700
+
+ ppc4xx: Add initial 460SX defines for the cpu/ppc4xx directory.
+
+
+commit 9b55a2536919f4de1bb1044e6eb8262c2f53bc96
+Date: Fri Jul 11 01:16:00 2008 +0200
+
+ Fix some more print() format errors.
+
+
+commit fdd70d1921b87287d9a99d1be99bc35226c2b412
+Date: Thu Jul 10 20:57:54 2008 +0200
+
+ MAKEALL: remove duplicated at91 from ARM9 list and add LIST_at91 to arm
+
+
+commit c6457e3b8bc79a97381cf7deffa08f7c5a24f86c
+Date: Thu Jun 5 11:06:29 2008 +0400
+
+ DataFlash AT45DB021 support
+
+ Some boards based on AT91SAM926X-EK use smaller DF chips to keep
+ bootstrap, u-boot and its environment, using NAND or other external
+ storage for kernel and rootfs. This patch adds support for
+ small 1024x263 chip.
+
+
+commit 4109df6f75fc00ab7da56d286ba50149a0d16a69
+Date: Thu Jul 10 14:00:15 2008 -0500
+
+ silence misc printf formatting compiler warnings
+
+
+commit 3d71c81a9bb03f866a1e98da96363ef3f46c76b3
+Date: Thu Jul 10 14:47:09 2008 +0200
+
+ USB: shutdown USB before booting
+
+ This patch fixes a potentially serious issue related to USB which was
+ ARM920T. Martin wrote:
+
+ Turn off USB to prevent the host controller from writing to the
+ SDRAM while Linux is booting. This could happen, because the HCCA
+ (Host Controller Communication Area) lies within the SDRAM and the
+ host controller writes continously to this area (as busmaster!), for
+ example to increase the HccaFrameNumber variable, which happens
+ every 1 ms.
+
+ This is a slightly modified version of the patch in order to shutdown
+ USB when booting on all architectures.
+
+
+commit f31c49db2a5e076f415c0785eb37f67f2faa5fc8
+Date: Thu May 29 14:23:25 2008 -0400
+
+ Configuration changes for ADS5121 Rev 3
+
+ ADS5121 Rev 3 board is now the default config
+
+ config targets are now
+
+ ads5121_config
+ Rev 3 board with
+ PCI
+ M41T62 on board RTC
+ 512MB DRAM
+
+ ads5121_rev2_config
+ Rev 2 board with
+ No PCI
+ 256MB DRAM
+
+
+commit 16bee7b0dc294ee01ca2434aa1dd3bd717a69615
+Date: Thu May 29 15:37:21 2008 -0400
+
+ Consolidate ADS5121 IO Pin configuration
+
+ Consolidate ADS5121 IO Pin configuration to one file
+ board/ads5121/iopin.c.
+
+ Remove pin config from cpu/mpc512x/fec.c
+
+
+commit d4692b0ba83b7b454bbd92bad1f4befe6e1657b7
+Date: Fri Jun 27 19:46:51 2008 +0200
+
+ Fix "usb part" command
+
+ Only print partition for selected device if user supplied the <dev>
+ arg with the "usb part [dev]" command.
+
+
+commit cc83b27217f7380041fea386ddb6d6d9b261617d
+Date: Mon Jul 7 00:58:05 2008 +0800
+
+ fix USB devices with multiple configurations
+
+ This patch fixes bugs in usbdcore*.c related to the use of devices
+ with multiple configurations.
+
+ The original code made mistakes about the meaning of configuration value and
+ configuration index, and the resulting off-by-one errors resulted in:
+
+ * SET_CONFIGURATION always selected the first configuration, no matter what
+ wValue is being passed.
+ * GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
+ configuration (index 0).
+
+
+commit 06c53beae1a726e707971c555613f09b270a2461
+Date: Thu Jul 10 13:16:09 2008 +0200
+
+ Fix some more print() format errors.
+
+
+commit d4b5f3fa001228d76e2c3380cedadf804b802c2a
+Date: Fri Jun 27 19:46:51 2008 +0200
+
+ Fix "usb part" command
+
+ Only print partition for selected device if user supplied the <dev>
+ arg with the "usb part [dev]" command.
+
+
+commit e73b5212e0463a3db0af0a5c95c75bfb762ca973
+Date: Mon Jul 7 00:58:05 2008 +0800
+
+ fix USB devices with multiple configurations
+
+ This patch fixes bugs in usbdcore*.c related to the use of devices
+ with multiple configurations.
+
+ The original code made mistakes about the meaning of configuration value and
+ configuration index, and the resulting off-by-one errors resulted in:
+
+ * SET_CONFIGURATION always selected the first configuration, no matter what
+ wValue is being passed.
+ * GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
+ configuration (index 0).
+
+
+commit e870690bdca154943ecadd5212d2d59c1b9d391b
+Date: Thu Jul 10 10:10:54 2008 +0200
+
+ MTD/NAND: Fix printf format warning in nand code
+
+ This patch fixes NAND related printf format warning. Those warnings are
+ now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd
+ [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
+ really helpful.
+
+
+commit 10943c9afa25694bd9999461f4e9e50ce22fff2b
+Date: Thu Jul 10 10:00:45 2008 +0200
+
+ rtc: Fix printf format warning in m41t60.c
+
+
+commit dc1da42f814cd71e6756c2cf62af1ada1d0581fb
+Date: Tue Jul 8 12:01:47 2008 +0200
+
+ pci: Move PCI device configuration check into a separate weak function
+
+ This patch moves the check, if a device should be skipped in PCI PNP
+ configuration into the function pci_skip_dev(). This function is defined
+ as weak so that it can be overwritten by a platform specific one if
+ needed. The check if the device should get printed in the PCI summary upon
+ bootup (when CONFIG_PCI_SCAN_SHOW is defined) is moved to the function
+ pci_print_dev() which is also defined as weak too.
+
+
+commit b002144e1dc21374b1ef5281fe6b5d014af96650
+Date: Thu Jul 10 09:58:06 2008 +0200
+
+ ppc4xx: Fix printf format warnings now visible with the updated format check
+
+ This patch fixes ppc4xx related printf format warning. Those warnings are
+ now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd
+ [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
+ really helpful.
+
+
+commit 5d812b8b4ad9667c77a5bf92b4ba81699abc9fc3
+Date: Wed Jul 9 17:33:57 2008 +0200
+
+ ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai
+
+ Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
+ To support such configurations, we "only" map the first 2GB via the TLB's. We
+ need some free virtual address space for the remaining peripherals like, SoC
+ devices, FLASH etc.
+
+ Note that ECC is currently not supported on configurations with more than 2GB
+ SDRAM. This is because we only map the first 2GB on such systems, and therefore
+ the ECC parity byte of the remaining area can't be written.
+
+
+commit cf1c2ed91df26903b956948f37f82de9e1158a89
+Date: Sat Jun 14 17:02:49 2008 -0400
+
+ ppc4xx: Remove implementation of testdram() from Korat board support
+
+
+commit 47ce4a28ccfcfb803aa68d3d4505a8de056a8a5e
+Date: Sat Jun 14 16:53:02 2008 -0400
+
+ ppc4xx: Update and add FDT to Korat board support
+
+
+commit 4188f0491886b3b486164e819c0a83fdb97efd7d
+Date: Thu Jul 10 01:13:30 2008 +0200
+
+ Minor coding style cleanup; update CHANGELOG
+
+
+commit 8915f1189c1d29d8be7f4de325702d90a8988219
+Date: Wed Jul 9 17:50:45 2008 -0400
+
+ e1000: add support for 82545GM 64bit PCI-X copper variant
+
+ This PCI-X e1000 variant works by just adding in the correct
+ PCI IDs in the appropriate places.
+
+
+commit 21ae6ca0315afdbc65dc3e95ffd5763e6773d030
+Date: Wed Jul 9 12:34:11 2008 +0000
+
+ SPARC: Build error fix
+
+ (introduced by commit 391fd93ab23e15ab3dd58a54f5b609024009c378)
+
+ This patch makes SPARC targets build again. It is caused by
+ phys_addr_t and phys_size_t being defined in the wrong header
+ file. include/lmb.h need those typedefs to build.
+
+
+commit 11ccc33fa21acce108f6b4a6936e3271af904c64
+Date: Wed Jul 9 08:17:15 2008 +0200
+
+ Many spelling fixes in README.
+
+
+commit dbab0691d2533560f7e91b92ae844046a9ad1df3
+Date: Wed Jul 9 08:17:06 2008 +0200
+
+ Minor spelling fix in comment.
+
+
+commit 89134ea1f67208fd3160bdbb0b9eaab4eab98484
+Date: Tue Jul 8 14:54:58 2008 -0400
+
+ Round the serial port clock divisor value returned by calc_divisor()
+
+ Round the serial port clock divisor value returned by
+ calc_divisor().
+
+
+commit 9d2e3947b2944e5bb85b4335533f8c93c58445fe
+Date: Wed Jul 9 17:47:52 2008 -0500
+
+ NAND: ifdef-protect most of nand.h when using legacy NAND.
+
+ Some macros such as NAND_CTL_SETALE conflict between current and legacy
+ NAND, being defined by the subsystem in the former case and the board
+ config file in the latter.
+
+
+commit 2b1fa9d383cbbb7d347c1583bd6ca4e181ba8e9e
+Date: Tue Jul 8 11:02:05 2008 -0400
+
+ ARM: Fix for wrong patch version applied for Lyrtech SFF-SDR board (ARM926EJS)
+
+ ARM: Fix for incorrect version of patch applied when
+ adding support for the Lyrtech SFF-SDR board.
+
+
+commit 47042b363ee5022b8180c65d3f4558e7972c79cd
+Date: Tue Jul 8 09:08:40 2008 +0900
+
+ Remove useless print message at apollon
+
+ Remove useless print message at apollon
+
+
+commit 98874ff329d4a5b32c467b43f6e966e1aa68479f
+Date: Mon Jul 7 14:24:39 2008 -0500
+
+ Fix LMB type issues
+
+ The LMB code now uses phys_addr_t and phys_size_t. Also, there were a couple
+ of casting problems in the bootm code that called the LMB functions.
+
+
+commit da8693a91b8eef75ade8de50a1b2ce035bc5fb54
+Date: Mon Jul 7 09:39:06 2008 -0500
+
+ Fix compiler warnings
+
+ gcc-4.3.x generates the following:
+
+ bootm.c: In function 'do_bootm_linux':
+ bootm.c:208: warning: cast from pointer to integer of different size
+ bootm.c:215: warning: cast from pointer to integer of different size
+
+
+commit 5bb12dbd7ae03189b6c13d8737b5a1b37c3df698
+Date: Mon Jul 7 15:40:39 2008 +0800
+
+ Remove code duplication for setting the default environment
+
+ common/env_common.c (default_env): new function that resets the environment to
+ the default value
+ common/env_common.c (env_relocate): use default_env instead of own copy
+ common/env_nand.c (env_relocate_spec): use default_env instead of own copy
+ include/environment.h: added default_env prototype
+
+
+commit 99c2b434d37863df5dda5207a53760c6506fc2be
+Date: Sun Jun 22 16:13:46 2008 +0200
+
+ NAND: Fix warning due to missing env_ptr casts to u_char * in env_nand.c.
+
+ The writeenv() and readenv() calls introduced by the recently added bad block
+ management for environment variables were missing casts therefore producing
+ compile time warnings.
+ While at it fixing some typo in a comment and indentation.
+
+
+commit 3167c5386ea1c98b638be5d8763ef6d5938ef1bd
+Date: Fri Jun 20 12:38:57 2008 -0500
+
+ NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution.
+
+ This is particularly problematic now that non-NAND-specific code is
+ including <nand.h>, and thus all debugging code is being compiled
+ regardless of whether it was requested, as reported by Scott McNutt
+
+
+commit c3bf1ad7baa1b0dd989dedc260b7098b6089ae05
+Date: Thu Jun 12 19:27:58 2008 +0200
+
+ mmc: Move atmel_mci driver into drivers/mmc
+
+ This makes it easier to use the driver on other platforms.
+
+
+commit d2d54ea449639f3d1a6007e333ab9fcc609a18f0
+Date: Thu Jun 12 19:27:57 2008 +0200
+
+ avr32: Use CONFIG_ATMEL_MCI to select the atmel_mci driver
+
+ After we move the atmel_mci driver into drivers/mmc, we can't select
+ it with CONFIG_MMC anymore. Introduce a new symbol specifically for
+ this driver so that there's no ambiguity.
+
+
+commit 5ce13051a48c62bda9723df3b4778c492fb47f36
+Date: Thu Jun 12 19:27:56 2008 +0200
+
+ Create drivers/mmc subdirectory
+
+ In order to consolidate more of the various MMC drivers around the
+ tree, we must first have a common place to put them.
+
+
+commit b502611b51f02718c2d1117d4981dabceb5af6de
+Date: Sun Jul 6 12:30:09 2008 +0200
+
+ Change env_get_char from a global function ptr to a function
+
+ This avoids an early global data reference.
+
+
+commit 27269417ade432189b234d9fbac98b54e37b978c
+Date: Sun Jul 6 13:57:58 2008 +0400
+
+ Some copy-n-paste fixes in printf usage
+
+
+commit 0e6989b9faf1588e8723535539e88a0df3c71356
+Date: Sun Jul 6 13:57:00 2008 +0400
+
+ FDT memory and pci node fixes for MPC8260ADS
+
+
+commit dc4b0b38d4aadf08826f6c31270f1eecd27964fd
+Date: Mon Jul 7 06:41:14 2008 -0700
+
+ Fix printf errors.
+
+ The compiler will help find mismatches between printf formats and
+ arguments if you let it. This patch adds the necessary attributes to
+ declarations in include/common.h, then begins to correct the resulting
+ compiler warnings. Some of these were bugs, e.g., "$d" instead of
+ "%d" and incorrect arguments. Others were just annoying, like
+ int-long mismatches on a system where both are 32 bits. It's worth
+ fixing the annoying errors to catch the real ones.
+
+
+commit 417faf285b2527acb2de24c5cd3e2621d385408c
+Date: Wed Jul 9 11:09:41 2008 -0500
+
+ Allow print_size to print in GB
+
+
+commit e7c374529c87525c9aa463e0557c287887ae4e9e
+Date: Sun Jun 8 23:56:00 2008 -0400
+
+ mips: When booting Linux images, add 'ethaddr' and 'eth1addr' to the environment
+
+ Add 'ethaddr' and 'eth1addr' to the Linux kernel environment if
+ they are set in the U-Boot environment.
+
+
+commit 0192d7d56e9320819dea262f49789ae18fdd2c72
+Date: Tue Jul 8 12:57:14 2008 +0200
+
+ jedec_flash: Fix AM29DL800BB device ID
+
+ As pointed out by Jerry Hicks, this patch corrects the device ID of
+ the Spansion AM29DL800BB NOR device. Verified against latest Spansion
+ datasheet (rev C4 from Dezember 2006).
+
+
+commit 689c1b30caacba3fbca0b1813facb3ab70b6cd63
+Date: Mon Jul 7 11:22:37 2008 +0900
+
+ sh: Fix compile error sh7763rdp board
+
+ Disable SH ether driver.
+
+
+commit 9e23fe0560b84e324dc5f0ff8813dab2aa34f074
+Date: Tue Jul 8 12:03:24 2008 +0900
+
+ sh: Fix SH-boards compile error
+
+ By Cleanup out-or-tree building for some boards (.depend)
+ (commit:c8a3b109f07f02342d097b30908965f7261d9f15)
+ because filse ware changed, some SH-boards have compile error.
+ I revised this problem.
+
+
+commit 3473ab737282b08ad61841fcbb14c4d264a93a8e
+Date: Tue May 13 11:50:36 2008 +0800
+
+ Feed the watchdog in u-boot for 8610 board.
+
+ The watchdog on 8610 board is enabled by setting sw[6]
+ to on. Once enabled, the watchdog can not be disabled
+ by software. So feed the dog in u-boot is necessary for
+ normal operation.
+
+
+commit 63676841ca2d603b13765f3f7b72ff1a61c23f90
+Date: Wed Jun 18 12:10:33 2008 -0400
+
+ Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.
+
+ Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.
+
+ Remove duplicate code in a if/else block in
+ cpu/arm926ejs/davinci/lxt972.c.
+ Fixed style issues.
+
+
+commit fec61431a003f5778bafa2624073a571af8bec9f
+Date: Wed Jun 18 12:10:31 2008 -0400
+
+ Remove duplicate definitions in include/lxt971a.h.
+
+ Remove duplicate definitions in include/lxt971a.h.
+
+ Remove duplicate registers and bits definitions in
+ include/lxt971a.h for standard MII registers, and
+ use values in include/miiphy.h instead.
+
+
+commit 9751ee0990f467941da0b095a4e995f863672d7a
+Date: Wed Jun 11 21:05:00 2008 +0900
+
+ net: sh: Renesas SH7763 Ethernet device support
+
+ Renesas SH7763 has 2 channel Ethernet device.
+ This is 10/100/1000 Base support.
+ But this patch check 10/100 Base only.
+
+
+commit 873d97aabc0b1c8822ed1d87e8c5c8ae0a7e4ae9
+Date: Tue Jun 17 16:28:05 2008 +0900
+
+ sh: Update Renesas R2DPlus board
+
+ New NOR Flash board support and remove old type flash board config.
+ And Remove network setting from config file.
+
+
+commit ec39d479d2003f15e86e23ebc4e02a1c9a3a181c
+Date: Tue Jun 17 16:28:01 2008 +0900
+
+ sh: Update Renesas R7780MP board
+
+ New NOR Flash board support and remove network setting from config file.
+
+
+commit c001cd604e9f133743effbddb1c215b48e761c5a
+Date: Tue Jun 17 16:27:56 2008 +0900
+
+ sh: Update Renesas Migo-R board
+
+ Remove network setting from config file.
+
+
+commit f9599eca7cb5ebe40e5305c8006dced6ecc5cd9e
+Date: Tue Jun 17 16:27:52 2008 +0900
+
+ sh: Update Hitachi MS7722SE board
+
+ Remove network setting from config file.
+
+
+commit 26209e48e8791670c93108029a5c31a30016c6df
+Date: Tue Jun 17 16:27:48 2008 +0900
+
+ sh: Cleanup source code of SH7763RDP
+
+
+commit 5cd5b2c96ef0025762931349d350287aec03ab47
+Date: Tue Jun 17 16:27:44 2008 +0900
+
+ sh: Cleanup source code of R2DPlus
+
+
+commit 4ec7e915cfaa31b392755dd2c8231e64736d2ea8
+Date: Tue Jun 17 16:27:41 2008 +0900
+
+ sh: Cleanup source code of R7780MP
+
+
+commit 0955ef34c0454ae2ee59a78657a0f01fb3ef16d6
+Date: Tue Jun 17 16:27:38 2008 +0900
+
+ sh: Cleanup source code of MS7722SE
+
+
+commit 1d7b31d97b34ccb6f9b20a2465864998b0bf2691
+Date: Tue Jun 17 16:27:34 2008 +0900
+
+ sh: Cleanup source code of MS7720SE
+
+
+commit 3ab4827cbe409488ebea1a2ee5094783f2672214
+Date: Mon Jul 7 00:45:03 2008 +0200
+
+ SH: fix out of tree building
+
+
+commit 9047bfa1e737d787be460387dd6f45737eeceb10
+Date: Thu Jul 3 23:16:06 2008 +0900
+
+ net: smc911x: Fix typo
+
+
+commit 5ed546fdd0ca46a165661c2009fa743d9c9fceca
+Date: Wed Jul 2 18:54:08 2008 +0200
+
+ update mvBL-M7 board config
+
+ update mvBL-M7 config file to use UBOOT_VERSION and define
+ CONFIG_HIGH_BATS.
+
+
+commit 5cacc5d0ec52678a5eb83ecda5c3bcb22eb47f30
+Date: Mon Jun 30 17:45:01 2008 +0900
+
+ net: fix compile problem in smc911x driver.
+
+
+commit 9fea65a6c469b1b474b27446feb58738baba2d31
+Date: Tue Jun 24 09:54:09 2008 +0200
+
+ ppc4xx: Rename CONFIG_XILINX_ML300 to CONFIG_XILINX_405
+
+ This change helps with better handling with others
+ Xilinx based platform.
+
+
+commit cbb6289569ae4fc6e2d676528e46ffcc72d743d0
+Date: Tue Jun 17 13:07:11 2008 +0900
+
+ net: ne2000: Move dev_addr variable from grobal to local.
+
+
+commit dd7e5fa5f847188f78f62f2c52de6cb3def3ecdb
+Date: Tue Jun 17 13:07:15 2008 +0900
+
+ net: ne2000: Fix compile error of NE2000
+
+ If enable DEBUG, can not compile ne2000 driver.
+
+
+commit dd35479a50f6c7c31ea491c07c5200c6dfd06a24
+Date: Mon Jun 23 22:57:27 2008 -0700
+
+ Add mechanisms for CPU and board-specific Ethernet initialization
+
+ This patch is the first step in cleaning up net/eth.c, by moving Ethernet
+ initialization to CPU or board-specific code. Initial implementation is
+ only on the Freescale TSEC controller, but others will be added soon.
+
+
+commit 7754f2be5d1835d263aad21b5a629526f3e680b0
+Date: Sun Jul 6 01:21:46 2008 +0200
+
+ include/sha256.h: fix file permissions.
+
+
+commit d3bcdf838e2991d58571308fa6e04ca335bc06e8
+Date: Tue May 27 11:15:29 2008 +0200
+
+ [AT91SAM9] Fix NAND FLASH timings
+
+ Fix NAND FLASH timings for at91sam9x evaluation kits.
+
+ New timings are based on application note
+ "NAND Flash Support on AT91SAM9 Microcontrollers" available at
+ http://atmel.com/dyn/resources/prod_documents/doc6255.pdf
+
+
+commit 19bd688484322fe62d1a66c8299da6ff9e967ff9
+Date: Thu May 22 00:15:40 2008 +0200
+
+ Fix boot from NOR due to incorrect reset delay.
+
+ AT91 RSTC registers are battery-backuped, so their values
+ are not reset across power cycles. One of those registers,
+ the AT91_RSTC_MR register, is being modified by U-Boot, in
+ the ethernet initialisation routine, to generate a 500ms
+ user reset.
+
+ Unfortunately, this value is not being restored afterwards,
+ causing subsequent resets to also last for 500ms.
+
+ This long reset sequence causes problems (at least) in the
+ boot sequence from NOR: by the time the CPU tries to load
+ a program from the NOR flash, the latter is still in reset
+ and not yet available.
+
+ Additionaly, this patch fixes a bug in the original code which
+ caused the reset delay to last for 2s instead of 500ms.
+
+
+commit f492dd636fbbae529e17533995bc6e5813c007f6
+Date: Fri Jul 4 20:11:49 2008 +0200
+
+ Update CHANGELOG
+
+
+commit 5e6e350fc489aa19402f1e79037dd8c0a4bbd73d
+Date: Fri Jul 4 20:07:35 2008 +0200
+
+ CCM/SCM boards: fix out of tree building
+
+
+commit ab4c3a490df9a964711556d2a05b0c787db45fde
+Date: Thu Jul 3 23:22:27 2008 +0200
+
+ SCM board: fix build errors.
+
+
+commit a566466f17ba0e2d2b6c250e77da678fb932470d
+Date: Thu Jul 3 23:06:36 2008 +0200
+
+ IAD210 board: fix ``"ALIGN" redefined'' warning.
+
+
+commit ad756314797c16fa5dca23e115aab881011f164f
+Date: Thu Jul 3 23:00:24 2008 +0200
+
+ CCM board: fix build errors.
+
+
+commit f16ed51702cb9fb6fa2e019bbc0fcd1466b57c3b
+Date: Wed Jul 2 18:54:08 2008 +0200
+
+ update mvBL-M7 board config
+
+ update mvBL-M7 config file to use UBOOT_VERSION.
+
+
+commit ced209c50e80c25f13c083099b05044048d21f4f
+Date: Thu Jul 3 22:39:21 2008 +0200
+
+ sacsng board: fix warnings "suggest explicit braces to avoid ambiguous 'else'"
+
+
+commit 4ff170a8180a79da4cdaab1b30d58cd7b6be565e
+Date: Thu Jul 3 22:34:08 2008 +0200
+
+ Cleanup: fix "expected specifier-qualifier-list before 'phys_size_t'" errors
+
+
+commit 730f298485984b011b6ee8f4acb511cb45a843dd
+Date: Thu Jul 3 22:04:17 2008 +0200
+
+ lmb: fix "implicit declaration of function 'lmb_free'" warning
+
+
+commit 322ef5e28d2dc62571afc699b00add22a8e006e4
+Date: Wed Jul 2 23:53:23 2008 +0200
+
+ Cleanup: remove redundant deleting on *~ files
+
+
+commit c8a3b109f07f02342d097b30908965f7261d9f15
+Date: Wed Jul 2 23:49:18 2008 +0200
+
+ Cleanup out-or-tree building for some boards (.depend)
+
+
+commit a30cc5a340e7f8f5f85a0e08e7f6c4106ce117c4
+Date: Wed Jul 2 23:38:50 2008 +0200
+
+ Cleanup: fix out-of-tree building for some boards
+
+
+commit 461fa68d20861811487944d22291db5a13410e20
+Date: Wed Jul 2 23:00:14 2008 +0200
+
+ Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS)
+
+
+commit 5981ebd32017e062b08aa6747cf591276f2db779
+Date: Fri Jun 20 22:26:24 2008 +0200
+
+ fdt: Fix typo in variable name.
+
+
+commit a7a5982cd0f3482f88225af4da7795bc4f6cb9bc
+Date: Thu Jun 19 11:11:19 2008 +0200
+
+ Add logos for RRvision board
+
+
+commit ee4ae38342142237ca85913f88ee570c1eb5ca7c
+Date: Wed Jun 18 11:03:57 2008 +0200
+
+ mpc8260: add fdt_fixup_ethernet support
+
+ Add support for updating mac-address and local-mac-address in fdt for
+ all MPC8260 targets.
+
+
+commit f6a69559d64498a04e1e0b087a9b920e5775f866
+Date: Thu Jun 12 13:24:42 2008 -0400
+
+ cmd_nvedit.c: clean up syntax highlighting
+
+ My text-editor (vim) has a bit of trouble syntax-highlighting the
+ cmd_nvedit.c file, because it apparently does not parse C
+ ifdef/else/endif. The following patch does not change the behavior of
+ the code at all, but does allow the editor to properly
+ syntax-highlight the file.
+
+
+commit 75678c807a6272ecc5541eb32898c93887f08400
+Date: Thu Jun 12 13:22:12 2008 -0400
+
+ Make setenv() return status
+
+ Currently, the setenv function does not return an error code.
+ This patch allows to test for errors.
+
+
+commit 4928e97c8531283ca9b368b7c29a8a12e726562a
+Date: Wed Jun 11 10:14:06 2008 -0500
+
+ PPC: Added fls, fls64, __ilog2_u64, and ffs64 to bitops
+
+ fls64, __ilog2_u64, ffs64 are variants that work on an u64,
+ and fls is used to implement them.
+
+
+commit 83002a77cbdf383015ca384eff5fa31722d8e571
+Date: Mon Jun 9 22:58:48 2008 +0200
+
+ i.MX31: Cleanup comments in lowlevel_init.S.
+
+
+commit f8cc312bbee69257d741dc9f4062f4a0f5adf609
+Date: Sun Jun 8 23:28:33 2008 -0700
+
+ Move conditional compilation of MPC8XXX SPI driver to Makefile
+
+
+commit d92ea21bafb674ee2bf27447970b047845e7b0a2
+Date: Sun Jun 8 17:59:53 2008 +0200
+
+ i.MX31: fixed CTRL-C detection
+
+ The Register URXD contains status information in bits [15..8].
+ With status bit 15 set, CTRL-C was reported as 0x8003 instead
+ of 0x03. Therefore CTRL-C was not detected.
+ To solve this, bits [15..8] were masked out now.
+
+
+commit dd1c5523d6f44e842e69f2fcb50788c6060eab86
+Date: Tue Jul 1 17:03:19 2008 +0200
+
+ ppc4xx: Fix 460EX/GT PCIe port initialization
+
+ This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
+ configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
+ this out.
+
+
+commit b571afde0295b007a45055ee49f8822c753a5651
+Date: Sat Jun 7 12:29:52 2008 +0200
+
+ add SHA256 support
+
+
+commit 3bab76a26e03df4ff81342fcc16393ce37d9766b
+Date: Fri Jun 6 23:07:40 2008 +0200
+
+ Delay FIT format check on sector based devices
+
+ Global FIT image operations like format check cannot be performed on
+ a first sector data, defer them to the point when whole FIT image was
+ uploaded to a system RAM.
+
+
+commit 9810263afec5ac5f38f92963bb3b6d799e4331d0
+Date: Tue Jun 3 17:38:19 2008 +0800
+
+ sata: wait for device updating signature to host
+
+ The driver need wait for the device updating signature to host.
+ If we don't wait for it, the driver can not detect the device(disk)
+ when the system powers up.
+
+
+commit 745d8a0d3cea82e6d1753e14afb4588c34761b15
+Date: Sat Jun 28 14:56:17 2008 +0200
+
+ ppc4xx: Fix 460EX errata with CPU lockup upon high AHB traffic
+
+ This patch implements a fix provided by AMCC so that the lockup upon
+ simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
+ anymore:
+
+ Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
+ (bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
+ USB 2.0 host and SATA.
+
+ This errata is not officially available yet. I'll update the comment
+ to add the errata number later.
+
+
+commit 8b616edb118e37d05f6401389eaee1c636b22828
+Date: Mon Jun 2 16:42:19 2008 -0400
+
+ serial_pl010.c: add watchdog support
+
+
+commit 86d3273e2b7be3fffb45e20c08535d6ad3aded6b
+Date: Mon Jun 2 16:40:08 2008 -0400
+
+ jffs2_1pass.c: add watchdog support
+
+
+commit 5744ddc6637fea4f7b911a54a5fa860cb81a5d89
+Date: Fri May 30 09:48:14 2008 +0200
+
+ Configure DSP POST; add watchdog reset to diag command
+
+
+commit f13526517859bf6b573e23ff47199e107d1009b5
+Date: Thu May 29 10:40:17 2008 +0200
+
+ Add sata sil3114 support
+
+
+commit e093a247628228100f405b6d7f6b1bfc16141938
+Date: Sat Jun 28 23:34:37 2008 +0200
+
+ Coding Style Cleanup
+
+
+commit 01db232dd7a0ceb81208a9f2545720c80e5bfd83
+Date: Sat Jun 28 23:16:01 2008 +0200
+
+ Update CHANGELOG
+
+
+commit c7f879ec2b389c4f2bf726b293bd516f4c692e03
+Date: Wed May 21 13:58:41 2008 -0400
+
+ ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS)
+
+ This patch adds support for the Lyrtech SFF-SDR board,
+ based on the TI DaVinci architecture (ARM926EJS).
+
+
+commit 341188b9ccaa8d4462d772cc067aca8d7618633a
+Date: Thu May 22 11:09:59 2008 +0200
+
+ MMC: Consolidate MMC/SD command definitions
+
+ This moves the MMC and SD Card command definitions from
+ include/asm/arch/mmc.h into include/mmc.h. These definitions are
+ given by the MMC and SD Card standards, not by any particular
+ architecture.
+
+ There's a lot more room for consolidation in the MMC drivers which
+ I'm hoping to get done eventually, but this patch is a start.
+
+ Compile-tested for all avr32 boards as well as lpc2292sodimm and
+ lubbock. This should cover all three mmc drivers in the tree.
+
+
+commit fa60edfc4c952626e048c0e065f654b3c1822fa5
+Date: Wed May 21 14:38:08 2008 +0900
+
+ Use better Ethernet timings for apollon board
+
+
+commit 41c5eaa7253ed82bbae1eda5667755872c615164
+Date: Mon Jun 16 13:58:56 2008 -0500
+
+ Resize device tree to allow space for board changes and the chosen node
+
+ Current code requires that a compiled device tree have space added to the end to
+ leave room for extra nodes added by board code (and the chosen node). This
+ requires that device tree creators anticipate how much space U-Boot will add to
+ the tree, which is absurd. Ideally, the code would resize and/or relocate the
+ tree when it needed more space, but this would require a systemic change to the
+ fdt code, which is non-trivial. Instead, we resize the tree inside
+ boot_relocate_fdt, reserving either the remainder of the bootmap (in the case
+ where the fdt is inside the bootmap), or adding CFG_FDT_PAD bytes to the size.
+
+
+commit 7570a9941fc565922078679a72d246fe208d696d
+Date: Mon Jun 16 13:58:55 2008 -0500
+
+ Fix an underflow bug in __lmb_alloc_base
+
+ __lmb_alloc_base can underflow if it fails to find free space. This was fixed
+ in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc. This patch
+ merely updates __lmb_alloc_base to resemble the current version in Linux.
+
+
+commit 63796c4e61b207d2e635729d41b7a7f7d188b03c
+Date: Mon Jun 16 13:58:54 2008 -0500
+
+ Add lmb_free
+
+ lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
+ lmb_reserve to temporarily reserve some memory.
+
+
+commit 4b03ac8b5102ad95f9fede7d13fa236977593e7d
+Date: Mon Jun 16 13:58:53 2008 -0500
+
+ Add ALIGN() macro
+
+ ALIGN() returns the smallest aligned value greater than the passed
+ in address or size. Taken from Linux.
+
+
+commit 93262af85e3e9d9974c6c08fbd37a9a72e090ca2
+Date: Tue Jun 24 17:15:22 2008 +0200
+
+ ppc4xx: Fix compilation problems with phys_size_t
+
+ This patch includes <asm/types.h> before <asm/u-boot.h> in some 4xx
+ board specific files where it has been missing.
+
+
+commit 28eab0d77352b84885f938759bf2612b7bf0bc44
+Date: Mon May 19 12:26:38 2008 +0200
+
+ Conditionally add -fno-stack-protector to CFLAGS
+
+ When compile-testing on powerpc, I get errors like this:
+
+ net/nfs.c:422: undefined reference to `__stack_chk_fail_local'
+
+ This seems to be because -fstack-protector is on by default, so
+ let's explicitly disable it on all architectures that support the
+ option.
+
+ The Ubuntu toolchain is affected by this problem, and according to
+ Mike Frysinger, Gentoo has been running with SSP enabled for years.
+ More and more distros are turning SSP on by default, so this problem
+ is likely to get worse in the future.
+
+ Also, powerpc just happens to be one of the arches I do
+ compile-testing on. There may be other arches affected by this too.
+
+
+commit dfd3be881c03a26e31f0dea4a42e76061fa610ac
+Date: Sun May 18 19:09:52 2008 +0200
+
+ pcmcia/ti_pci1410a: Move compile condition to the Makefile
+
+
+commit 72d5d5f7b5c74a188df238ec6dd824d80c74857a
+Date: Sun May 18 19:09:51 2008 +0200
+
+ pxa_pcmcia: Move compile condition to the Makefile
+
+
+commit c9eff32881fb429101c937cf8c268f1d42e5c2a9
+Date: Sun May 18 19:09:50 2008 +0200
+
+ marabun_pcmcia: Move compile condition to the Makefile
+
+
+commit 6a19c46cae43c16c528eddefae3db97134f1915d
+Date: Mon Jun 23 13:25:34 2008 +0200
+
+ fix non-working mvBL-M7
+
+ Add missing #define CONFIG_HIGH_BATS in mvBL-M7 board config file.
+
+
+commit 846f1574ddddeda2bc227655e687308695f41cdc
+Date: Mon Jun 23 11:40:56 2008 +0200
+
+ fix system config overwrite @ MPC834x and MPC8313
+
+ During 83xx setup the "System I/O configuration register high" gets
+ overwritten with user defined value if CFG_SICRH is defined.
+
+ Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH
+ must keep their reset value regardless of configuration.
+
+ On my board (using RGMII) those bits are set after reset - yet it's
+ unclear where they come from.
+
+ The patch keeps both bits on MPC834x and MPC8313.
+
+
+commit 4890246a2c5df90a74e2941e3673a49bbd36aee9
+Date: Tue Jun 17 17:45:27 2008 -0500
+
+ mpc83xx: move CPU_TYPE_ENTRY over to processor.h
+
+ to avoid this:
+
+ cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
+ In file included from cpu.c:33:
+ /home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition
+
+
+commit aac7a5095b968d6c9a3e6422f31b4ad203cac9c8
+Date: Mon Jun 23 11:15:09 2008 +0200
+
+ ppc4xx: Fix problem in gpio_config()
+
+ As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted
+ left by one. So the additional shift is bogus.
+
+
+commit 40777812316fc252c941665c0f60c148fd79d50f
+Date: Fri Jun 20 22:24:05 2008 +0200
+
+ fdt: Fix typo in variable name.
+
+
+commit 5f723a3b98c630bde33de74351f2121691fdef14
+Date: Fri Jun 20 10:41:05 2008 +0200
+
+ avr32: Enable SPI flash support on ATNGW100
+
+ The ATNGW100 has 8MB DataFlash on board. Give users access to it through
+ the new SPI flash framework.
+
+
+commit 5605ef6b5802921cbefe6a933a9dea3497396b5c
+Date: Fri Jun 20 12:44:28 2008 +0200
+
+ avr32: Fix SPI portmux initialization
+
+ Use the new GPIO manipulation functions to set up the chip select lines,
+ and make sure both busses use GPIO for chip select control.
+
+
+commit 4688f9e34a87e825aed34d07c9ca7a273e6fc8ab
+Date: Sun Jun 1 22:59:24 2008 -0700
+
+ avr32: Add GPIO manipulation functions
+
+ Adds GPIO manipulation functions for AVR32 AP7 platform.
+
+
+commit b4fe1a71090c73efc6e4188eed188b2ff67fc02a
+Date: Thu Jun 5 13:02:30 2008 +0200
+
+ MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
+
+ This patch is based on the following patch sent a few minutes ago:
+ "NAND FSL UPM: driver re-write using the hwcontrol callback"
+ It is untested, of course. Anton, could you please give it a try.
+
+
+commit 96026d42fa4e646d28318c0a1438aac4b2017909
+Date: Thu Jun 12 12:40:11 2008 +0200
+
+ Fix 4xx build issue
+
+ Building for 4xx doesn't work since commit 4dbdb768:
+
+ In file included from 4xx_pcie.c:28:
+ include/asm/processor.h:971: error: expected ')' before 'ver'
+ make[1]: *** [4xx_pcie.o] Error 1
+
+ This patch fixes the problem.
+
+
+commit a036b0443657fe0f4773786de9092251869f08ac
+Date: Thu Jun 19 01:45:50 2008 -0500
+
+ MPC8610HPCD: Report board id, board version and fpga version.
+
+
+commit 7de8c21f14df9c20fdcf6027aec8e8545f75f835
+Date: Thu Jun 19 01:45:27 2008 -0500
+
+ MPC8641HPCN: Report board id, board version and fpga version.
+
+
+commit fb8c061ea05fc68d37e2a8b9f8c949d76c8d71a8
+Date: Mon Jun 16 10:40:02 2008 +0200
+
+ cfi-flash: Fix problem in flash_toggle(), busy was not detected reliably
+
+ This patch simplifies flash_toggle() (AMD commandset), which is used to
+ detect if a FLASH device is still busy with erase/program operations. On
+ 800MHz Canyonlands/Glacier boards (460EX/GT) the current implementation
+ did not detect the busy state reliably, resulting in non erased sectors
+ etc. This patch now simplifies this function by "just" comparing the
+ complete data-word instead of ANDing it with the command-word (0x40)
+ before the compatison. It is done the same way in the Linux implementation
+ chip_ready() in cfi_cmdset_0002.c.
+
+
+commit 9e4006bca3d9fb4a2d061996771036cb01e539d3
+Date: Mon Jun 16 08:58:07 2008 -0400
+
+ NAND: Add missing declaration to non-redundant saveenv().
+
+
+commit 2cdb7f50ac59594540fffdf8dbd7b12beac79c52
+Date: Mon Jun 2 15:09:55 2008 +0200
+
+ MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
+
+
+commit 212ed90615c3d20fa6bd73d70d5153bd0d124e5f
+Date: Tue Jun 10 15:34:11 2008 +0200
+
+ ppc4xx: Canyonlands: Disable the RTC M41T62 square wave output
+
+ This patch disables the square wave output of the M41T62 RTC used on
+ Canyonlands & Glacier. Here the explanation:
+
+ The serial real-time clock part used in the design is an
+ STMicro M41T62. This part has a full-time 32KHz square wave
+ output that is connected to the TmrClk input to the
+ processor. The default state for this square wave output is
+ enabled so the output runs continuously when the board is
+ powered normally and also from the battery. The TmrClk input
+ to the processor goes to ground when the power is removed
+ from the board/processor, and therefore the running square
+ wave output is driving ground which drains the battery quickly.
+
+
+commit a94f22f08f280905926219e568568964cb9eeb9d
+Date: Wed Jun 11 18:10:20 2008 -0500
+
+ Fix build issue with string.h and linux/string.h
+
+ This commit:
+ commit 338cc038461a6c7709c5b86fd9a240209338a1ae
+ Date: Fri Jun 6 14:28:14 2008 +0200
+
+ tools/mkimage: fix compiler warnings on some systems.
+
+ Broke building on some systems, because the host's string.h was interfering
+ with u-boot's linux/string.h. It doesn't look like we need the u-boot one if
+ we're building for the host, so now we only include when building inside
+ u-boot.
+
+
+commit 9973e3c614721bbf169882ffc3be266a6611cd60
+Date: Mon Jun 9 16:03:40 2008 -0500
+
+ Change initdram() return type to phys_size_t
+
+ This patch changes the return type of initdram() from long int to phys_size_t.
+ This is required for a couple of reasons: long int limits the amount of dram
+ to 2GB, and u-boot in general is moving over to phys_size_t to represent the
+ size of physical memory. phys_size_t is defined as an unsigned long on almost
+ all current platforms.
+
+ This patch *only* changes the return type of the initdram function (in
+ include/common.h, as well as in each board's implementation of initdram). It
+ does not actually modify the code inside the function on any of the platforms;
+ platforms which wish to support more than 2GB of DRAM will need to modify
+ their initdram() function code.
+
+ Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
+ MPC8641HPCN.
+
+
+commit 391fd93ab23e15ab3dd58a54f5b609024009c378
+Date: Mon Jun 9 20:37:18 2008 -0500
+
+ Change lmb to use phys_size_t/phys_addr_t
+
+ This updates the lmb code to use phys_size_t
+ and phys_addr_t instead of unsigned long. Other code
+ which interacts with this code, like getenv_bootm_size()
+ is also updated.
+
+ Booted on MPC8641HPCN, build-tested ppc, arm, mips.
+
+
+commit 61b09fc2952dc636017df4e7970e3de132276ba1
+Date: Mon Jun 9 20:37:17 2008 -0500
+
+ Change print_size to take phys_size_t
+
+
+commit b57ca3e128cc10a133ba79bc7ec3e7b50e7c8fbe
+Date: Mon Jun 9 20:37:16 2008 -0500
+
+ Change bd/gd memsize/ram_size to be phys_size_t.
+
+ Currently, both are defined as an unsigned long, but
+ should be phys_size_t. This should result in no real change,
+ since phys_size_t is currently an unsigned long for all the
+ default configs. Also add print_lnum to cmd_bdinfo to deal
+ with the potentially wider memsize.
+
+
+commit ba04f7010958e88a8910f2a123fee53fdc72e013
+Date: Tue Jun 10 16:16:02 2008 -0500
+
+ FSL LAW: Add new interface to use the last free LAW
+
+ LAWs have the concept of priority so its useful to be able to allocate
+ the lowest (highest number) priority. We will end up using this with the
+ new DDR code.
+
+
+commit 859a86a25c569d3665ff413d1d923394b8a961f3
+Date: Wed Jun 11 00:51:45 2008 -0500
+
+ 85xx/86xx: Move to dynamic mgmt of LAWs
+
+ With the new LAW interface (set_next_law) we can move to letting the
+ system allocate which LAWs are used for what purpose. This makes life
+ a bit easier going forward with the new DDR code.
+
+
+commit f060054dadbbe7027ca088eed806a3ef1f82fdb7
+Date: Wed Jun 11 00:44:10 2008 -0500
+
+ FSL LAW: Keep track of LAW allocations
+
+ Make it so we keep track of which LAWs have allocated and provide
+ a function (set_next_law) which can allocate a LAW for us if one is
+ free.
+
+ In the future we will move to doing more "dynamic" LAW allocation
+ since the majority of users dont really care about what LAW number
+ they are at.
+
+ Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them
+
+
+commit ddde74a159caa6e18b481fec01d40b885aebb566
+Date: Mon Jun 9 22:31:57 2008 -0500
+
+ 85xx: remove dummy board_early_init_f
+
+ A number of board ports have empty version of board_early_init_f
+ for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.
+
+
+commit 81e56e9af0d43712db8efb843606a8d62eab454f
+Date: Mon Jun 9 18:55:38 2008 -0500
+
+ MPC8544DS: Update config.h
+
+ * Enable flash progress
+ * remove CLEAR_LAW0 since we dont really use it
+
+
+commit 978e81604c1b28526ed580df0fbe64eb8384e94f
+Date: Mon Jun 9 13:37:24 2008 -0500
+
+ 85xx: Remove unused and unconfigured memory test code.
+
+ Remove unused and unconfigured DDR test code from FSL 85xx boards.
+ Besides, other common code exists.
+
+
+commit a23cddde1a95f987e3fe2a720a7ec9375b7264d7
+Date: Fri Jun 6 15:42:45 2008 +0200
+
+ Socrates: Added FPGA base address update in FDT.
+
+
+commit fd51b0e0e620b8bc9fd4f6daa3a4fa6f5e1316f4
+Date: Fri Jun 6 15:42:44 2008 +0200
+
+ Socrates: NAND support added. Changed the U-Boot base address and
+
+
+commit 248ae5cfc8bf69074d1da099dc495d8e06070547
+Date: Fri Jun 6 15:42:43 2008 +0200
+
+ NAND: Added support for 128-bit OOB, adapted
+
+
+commit 31ca0208612f2eb57690110d7c2815953650e47b
+Date: Fri Jun 6 15:42:42 2008 +0200
+
+ Socrates: added missed file with UPMA configuration data.
+
+
+commit 59abd15b43cab7a4d19de4ba0943837d9555f7ba
+Date: Fri Jun 6 15:42:41 2008 +0200
+
+ Socrates: Added FPGA mapping. LAWs and TLBs cleanup.
+
+
+commit 740280e68ccc0b971e613face7eaaa8bd1382b8c
+Date: Fri Jun 6 15:42:40 2008 +0200
+
+ Added the upmconfig() function for 85xx.
+
+
+commit d39e68514ff943930ee692cff3fde03532eb7fec
+Date: Fri Jun 6 15:42:39 2008 +0200
+
+ Socrates: config file cleanup.
+
+
+commit e8cc3f04b124f757af4528206e60d8eb715ae083
+Date: Thu Jun 5 13:12:10 2008 +0200
+
+ TQM85xx: Change memory map to support Flash memory > 128 MiB
+
+ Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
+ memory. The current memory map only supports up to 128 MiB Flash.
+ This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
+ set, up to 1 GiB flash is supported. To achieve this, the memory
+ map has to be adjusted in great parts (for example the CCSRBAR is
+ moved from 0xE0000000 to 0xA0000000).
+
+ If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
+ memory map also has to be considered in the kernel (changed
+ CCSRBAR address, changed PCI IO base address, ...). Please use
+ an appropriate Flat Device Tree blob (tqm8548.dtb).
+
+
+commit 1c2deff22cd6e2bf0e618fd6e09ca3eec5a8d051
+Date: Thu Jun 5 13:12:09 2008 +0200
+
+ TQM85xx: NAND support via local bus UPMB
+
+ This patch adds support for NAND FLASH on the TQM8548. It is disabled by
+ default and can be enabled for the TQM8548 modules. It is now based on
+ the re-written FSL NAND UPM driver. A patch has been posted earlier today
+ with the subject:
+
+ "NAND FSL UPM: driver re-write using the hwcontrol callback"
+
+ Note that the R/B pin is not supported by that module requiring to use
+ the specified maximum delay time.
+
+ Note: With NAND support enabled the size of the U-Boot image exceeds
+ 256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
+ doubling the image size :-(.
+
+
+commit b9e8078bb3f3c48111a7081e27279938c3a445e1
+Date: Thu Jun 5 13:12:08 2008 +0200
+
+ TQM8548: PCI express support
+
+ This patch adds support for PCI express cards. The board support
+ now uses common FSL PCI init code, for both, PCI and PCIe on all
+ TQM85xx modules.
+
+
+commit 1287e0c55a2ee2c575ac9ce8e4302cd4085be876
+Date: Thu Jun 5 13:12:07 2008 +0200
+
+ TQM8548: Basic support for the TQM8548 modules
+
+ This patch adds basic support for the TQM8548 module from TQ-Components
+ (http://www.tqc.de/) including DDR2 SDRAM initialisation and support for
+ eTSEC 3 and 4
+
+ Furthermore Flash buffer write has been enabled to speed up output to
+ the Flash by approx. a factor of 10.
+
+
+commit 25991353204c78b094c3c1fec90182dcd607ab8f
+Date: Thu Jun 5 13:12:06 2008 +0200
+
+ TQM85xx: Support for Flat Device Tree
+
+ This patch adds support for Linux kernels using the Flat Device Tree.
+ It also re-defines the default environment settings for booting Linux
+ with the FDT blob.
+
+
+commit d9ee843d54c54776e1fdb86336ce554906a87331
+Date: Thu Jun 5 13:12:05 2008 +0200
+
+ TQM85xx: Support for Intel 82527 compatible CAN controller
+
+ This patch adds initialization of the UPMC RAM to support up to two
+ Intel 82527 compatible CAN controller on the TQM85xx modules.
+
+
+commit 518d5cfe72916323c746af1647764459914f555f
+Date: Thu Jun 5 13:12:04 2008 +0200
+
+ TQM85xx: Bugfix in the SDRAM initialisation
+
+ The CS0_BNDS register is now set according to the detected
+ memory size.
+
+
+commit 45dee2e620ccec6ac7b3548fe8979a34fd030e5d
+Date: Thu Jun 5 13:12:03 2008 +0200
+
+ TQM85xx: Fix chip select configuration for second FLASH bank
+
+ This patch fixes the re-calculation of the automatic chip select
+ configuration for boards with two populated FLASH banks.
+
+
+commit 46346f27cda6fd025a496bde8f2d4aeee04aca5f
+Date: Thu Jun 5 13:12:02 2008 +0200
+
+ TQM85xx: Support for Spansion 'N' type flashes added
+
+ The 'N' type Spansion flashes (S29GLxxxN series) have bigger sectors,
+ than the formerly used 'M' types (S29GLxxxM series), so the flash layout
+ needs to be changed -> new start address of the environment. The macro
+ definition CONFIG_TQM_FLASH_N_TYPE is undefined by default and must be
+ defined for boards with 'N' type flashes.
+
+
+commit 5d5bd838f76eade22c0ea40a500389f924d0da36
+Date: Thu Jun 5 13:12:01 2008 +0200
+
+ TQM85xx: Fix CPM port pin configuration
+
+ Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
+ board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
+ as serial interface anyway. Worse, on some board variants configuring the
+ pins for SCC1 leads to short circuits (for example on the TQM8541-BG).
+
+
+commit b99ba1679e8cd51b023e67098c89e606e47137d2
+Date: Thu Jun 5 13:12:00 2008 +0200
+
+ TQM85xx: Various coding style fixes
+
+
+commit ae9e97fa96f643c8ba2b666b06a026cc8717eb00
+Date: Tue Jun 10 22:15:58 2008 -0400
+
+ libfdt: Move the working_fdt pointer to cmd_fdt.c
+
+ The working_fdt pointer was declared in common/fdt_support.c but was
+ not used there. Move it to common/cmd_fdt.c where it is used (it is
+ also used in lib_ppc/bootm.c).
+
+
+commit e489b9c078e22b0d9e75f002cd2a1bd967e88f5e
+Date: Tue Jun 10 11:06:17 2008 -0500
+
+ fdt: unshadow global working fdt variable
+
+ differentiate with local variables of the same name by renaming the
+ global 'fdt' variable 'working_fdt'.
+
+
+commit e1eb0e25d9d8fd8efdfb93f670a417663f386022
+Date: Tue Jun 10 18:49:34 2008 -0500
+
+ socrates: Fix PCI clk fix patch
+
+ The submitted patch seems to have been more up-to-date, but an older patch was
+ already in the repository. This patch encompasses the differences
+
+
+
+commit a75a57ef6e4b613c81434971e96ed70cf9ec9ba0
+Date: Thu Jun 5 13:02:29 2008 +0200
+
+ NAND FSL UPM: driver re-write using the hwcontrol callback
+
+ This is a re-write of the NAND FSL UPM driver using the more universal
+ hwcontrol callback (instead of the cmdfunc callback). Here is a brief
+ list of furher modifications:
+
+ - For the time being, the UPM setup writing the UPM array has been
+ removed from the driver and must now be done by the board specific
+ code.
+
+ - The bus width definition in "struct fsl_upm_nand" is now in bits to
+ comply with the corresponding Linux driver and 8, 16 and 32 bit
+ accesses are supported.
+
+ - chip->dev_read is only set if fun->dev_ready != NULL, which is
+ required for boards not connecting the R/B pin.
+
+ - A few issue have been fixed with MxMR bit manipulation like in the
+ corresponding Linux driver.
+
+ Note: I think the "io_addr" field of "struct fsl_upm" could be removed
+ as well, because the address is already determined by
+ "nand->IO_ADDR_[RW]", but I'm not 100% sure.
+
+ This patch has been tested on a TQM8548 modules with the NAND chip
+ Micron MT29F8G08FABWP.
+
+ This patch is based on the following patches posted to this list a few
+ minutes ago:
+
+ PPC: add accessor macros to clear and set bits in one shot
+ 83xx/85xx/86xx: add more MxMR local bus definitions
+
+
+commit 6beecfbb542992eede5831240cd58678274683a9
+Date: Thu Jun 5 13:11:59 2008 +0200
+
+ MPC85xx: Beautify boot output of L2 cache configuration
+
+ The boot output is now aligned poperly with other boot output
+ lines, e.g.:
+
+ FLASH: 128 MB
+ L2: 512 KB enabled
+
+
+commit 398415114f0a705163a14543e9fef03f734b1ffa
+Date: Wed Jun 4 12:45:22 2008 +0200
+
+ PPC: add accessor macros to clear and set bits in one shot
+
+ PPC: add accessor macros to clear and set bits in one shot
+
+ This patch adds macros from linux/include/asm-powerpc/io.h to clear and
+ set bits in one shot using the in_be32, out_be32, etc. accessor functions.
+ They are very handy to manipulate bits it I/O registers.
+
+ This patch is required for my forthcoming FSL NAND UPM driver re-write and
+ the support for the TQM8548 module.
+
+
+commit 4677988c7edc070c3786d3db7994abeca3ab82a0
+Date: Wed Jun 4 13:52:17 2008 +0200
+
+ TQM: move TQM boards to board/tqc
+
+ Move all TQM board directories to the vendor specific directory "tqc"
+ for modules from TQ-Components GmbH (http://www.tqc.de).
+
+
+commit 6fab2fe72ca5bf95280cd52cdf378af3e506eb50
+Date: Mon Jun 2 12:09:30 2008 +0200
+
+ 83xx/85xx/86xx: add more MxMR local bus definitions
+
+ 83xx/85xx/86xx: add more MxMR local bus definitions
+
+ This patch adds more macro definitions for the UPM Machine Mode Registers
+ They are copied from "include/mpc82xx.h" to simplify the merge of all 8xxx
+ common local bus definitions into include/asm-ppc/fsl_lbc.h. They are
+ required for my forthcoming FSL NAND UPM driver re-write and the support
+ for the TQM8548 module.
+
+ This patch is based on the following two patches from Anton Vorontsov:
+
+
+ I leave coding style violation fixes, code beautification and name
+ corrections to somebody else ;-(.
+
+
+commit c8c5fc266e4499e283c293ccb972863156aa4134
+Date: Thu May 29 18:14:56 2008 +0400
+
+ 83xx/85xx: further localbus cleanups
+
+ Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names
+ from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2.
+
+
+commit 42dbd667c88d496882d53e22656e89b654205492
+Date: Wed May 28 18:20:15 2008 +0400
+
+ 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h
+
+ This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
+ use it on MPC85xx and MPC86xx processors.
+
+
+commit 730b2fcf6fcd9eec3ea86fbb087c3f98aa23a769
+Date: Thu May 29 11:22:06 2008 -0500
+
+ 85xx: Add setting of cache props in the device tree.
+
+
+commit 4dbdb7681e243431530df0725627192a0c4aefda
+Date: Tue Jun 10 16:53:46 2008 -0500
+
+ 85xx: expose cpu identification
+
+ The current cpu identification code is used just to return the name
+ of the processor at boot. There are some other locations that the name
+ is useful (device tree setup). Expose the functionality to other bits
+ of code.
+
+ Also, drop the 'E' suffix and add it on by looking at the SVR version
+ when we print this out. This is mainly to allow the most flexible use
+ of the name. The device tree code tends to not care about the 'E' suffix.
+
+
+commit 2329fe113d847e43cca8e4a0e4edd613b50b8492
+Date: Tue Jun 10 13:25:24 2008 -0500
+
+ mpc83xx: MVBLM7: minor build fixups
+
+
+commit a1293e549b56da135ef32ffca5b9d35a16aa6802
+Date: Tue Jun 10 09:14:05 2008 +0200
+
+ add MPC8343 based board mvBlueLYNX-M7 (board+make files)
+
+ Add MPC8343 based board mvBlueLYNX-M7.
+ It's a single board stereo camera system.
+ Please read doc/README.mvblm7 for details.
+
+
+commit c005b93925ba49f07da2aa748527996d927e172f
+Date: Tue Jun 10 09:13:16 2008 +0200
+
+ add MPC8343 based board mvBlueLYNX-M7 (doc+config)
+
+ Add MPC8343 based board mvBlueLYNX-M7.
+ It's a single board stereo camera system.
+ Please read doc/README.mvblm7 for details.
+
+
+commit f9023afbdfd9f27e7c38f3cce965746e56d62dd3
+Date: Thu May 29 18:14:56 2008 +0400
+
+ 83xx/85xx: further localbus cleanups
+
+ move the BRx_* and ORx_* left behind in mpc85xx.h
+
+ The same is needed for mpc8xx.h and mpc8260.h (defines are almost
+ the same, just few differences which needs some attention though).
+
+ But the bad news for mpc8xx and mpc8260 is that there are a lot of users
+ of these defines. So this cleanup I'll leave for the "better times".
+
+
+commit bf30bb1f7c954d7855d9b23624b33b00c50b4697
+Date: Wed May 28 18:20:15 2008 +0400
+
+ 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h
+
+ This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
+ use it on MPC85xx and MPC86xx processors.
+
+
+commit d82b4fc0ce8cca95e857fc51022e841cb2dbee6a
+Date: Mon Jun 2 15:09:30 2008 +0200
+
+ Add missing CSCONFIG_BANK_BIT_3 define to mpc83xx.h
+
+
+commit 3b904ccb93c3196727e2e9870cb1df903cab19ad
+Date: Mon Jun 9 23:37:44 2008 +0900
+
+ net: Conditional COBJS inclusion of network drivers
+
+ Replace COBJS-y with appropriate driver config names.
+
+
+commit 2fb698bf50f4aff2485581a12fa634a07c040e4a
+Date: Mon Jun 9 21:02:17 2008 -0400
+
+ Use strncmp() for the fdt command
+
+ Cleaner than doing multiple conditionals on characters.
+
+
+commit 47abe8ab290d2721a8eeadff65b939e6af8c01b0
+Date: Sat Jun 7 12:25:05 2008 -0400
+
+ The fdt boardsetup command criteria was not unique
+
+ It was checking just for "b", which is not unique with respect to the
+ "boot" command. Change to check for "boa"[rdsetup].
+
+
+commit 2f08bfa9526bae4f461e043530cfb903fec0d273
+Date: Tue May 20 17:19:11 2008 +1000
+
+ libfdt: Several cleanups to parameter checking
+
+ This patch makes a couple of small cleanups to parameter checking of
+ libfdt functions.
+
+ - In several functions which take a node offset, we use an
+ idiom involving fdt_next_tag() first to check that we have indeed been
+ given a node offset. This patch adds a helper function
+ _fdt_check_node_offset() to encapsulate this usage of fdt_next_tag().
+
+ - In fdt_rw.c in several places we have the expanded version
+ of the RW_CHECK_HEADER() macro for no particular reason. This patch
+ replaces those instances with an invocation of the macro; that's what
+ it's for.
+
+ - In fdt_sw.c we rename the check_header_sw() function to
+ sw_check_header() to match the analgous function in fdt_rw.c, and we
+ provide an SW_CHECK_HEADER() wrapper macro as RW_CHECK_HEADER()
+ functions in fdt_rw.c
+
+
+commit fec6d9ee7c10443f65ce1788ef818919167bbf2e
+Date: Tue Jun 3 20:34:45 2008 -0400
+
+ Remove the deprecated CONFIG_OF_FLAT_TREE
+
+ Use CONFIG_OF_LIBFDT instead to support flattened device trees. It is
+ cleaner, has better functionality, and is better supported.
+
+
+commit 62bcdda293efa752f8281fbd9da03822b27ce82f
+Date: Tue Jun 3 20:26:29 2008 -0400
+
+ Change the stxxst to CONFIG_OF_LIBFDT
+
+ This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
+ to CONFIG_OF_LIBFDT.
+
+ WARNING: It appears that this board lost its ability to boot via a
+ flattened device tree prior to this changeset.
+
+ WARNING: This conversion was untested because I do not have a board to
+ test it on.
+
+
+commit 589c04271d129729a8b01391453851ab9cc4069c
+Date: Tue Jun 3 20:24:58 2008 -0400
+
+ Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
+
+ This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
+ to CONFIG_OF_LIBFDT.
+
+ WARNING: This conversion is untested because I do not have a board to
+ test it on.
+
+ NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
+ /aliases/ethernet1 property for the ethernet to work.
+
+
+commit ee1e35bede91debc8bff9b02f75574486033b652
+Date: Thu May 29 01:21:24 2008 -0500
+
+ 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define it
+
+
+commit 3b9519fc50802436e417c839e69df7b2016cade5
+Date: Wed May 14 13:10:04 2008 -0500
+
+ MPC85xx: Change traps.c to not reference non-addressable memory
+
+ Currently, END_OF_RAM is used by the trap code to determine if
+ we should attempt to access the stack pointer or not. However,
+ on systems with a lot of RAM, only a subset of the RAM is
+ guaranteed to be mapped in and accessible. Change END_OF_RAM
+ to use get_effective_memsize() instead of using the raw ram
+ size out of the bd.
+
+
+commit 7faddaecea52f585f538fdf9c2e61f85a789b19c
+Date: Mon Jun 9 13:39:57 2008 +0900
+
+ sh: Renesas Solutions SH7763RDP board support
+
+ SH7763RDP has SCIF, NOR Flash, Ethernet, USB host, LCDC and MMC.
+ In this patch, support SCIF, NOR Flash, and Ethernet.
+
+
+commit 60179098a95eaa972007d7ec58e4c1588029720f
+Date: Fri Jun 6 16:24:13 2008 +0900
+
+ sh: Add support Renesas SH7763
+
+ Renesas SH7763 has 3 SCIF, MMC, LCDC, Ethernet and other.
+ This patch supprts CPU register's header file.
+
+
+commit 08c5fabe181d663eec0feba5ecd02c0b78934a52
+Date: Fri Jun 6 16:16:08 2008 +0900
+
+ sh: SH7763 SCIF support
+
+ SH7763 has 3 SCIF channels. SCIF0 and 1 are same register constitution,
+ but only SCIF2 is different. This patch work all SCIF channel.
+
+
+commit 79b51ff8205f0354d5300570614c1d2db499679c
+Date: Sat Jun 7 20:51:59 2008 +0900
+
+ [MIPS] cpu/mips/Makefile: Split [CS]OBJS onto separate lines
+
+ Also get rid of some #ifdefs in *.c files.
+
+
+commit 8bde63eb3f79d68f693201528dafc8ae7aa087de
+Date: Sat Jun 7 20:51:56 2008 +0900
+
+ [MIPS] Rename Alchemy processor configs into CONFIG_SOC_*
+
+ CONFIG_SOC_AU1X00
+
+ Common Alchemy Au1x00 stuff. All Alchemy processor based machines
+ need to have this config as a system type specifier.
+
+ CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200,
+ CONFIG_SOC_AU1500, CONFIG_SOC_AU1550
+
+ Machine type specifiers. Each port should have one of aboves.
+
+
+commit cc49cadeeb8bb2f0ae3fdc13af7051ae59f083bc
+Date: Fri May 30 16:05:28 2008 -0400
+
+ env_nand.c: Added bad block management for environment variables
+
+ Modified to check for bad blocks and to skipping over them when
+ CFG_ENV_RANGE has been defined.
+ CFG_ENV_RANGE must be larger than CFG_ENV_SIZE and aligned to the NAND
+ flash block size.
+
+
+commit 279726bd00558e80263d44581c44167625b7fb9a
+Date: Wed May 14 13:09:58 2008 -0500
+
+ MPC86xx: Change traps.c to not reference non-addressable memory
+
+ Currently, END_OF_RAM is used by the trap code to determine if
+ we should attempt to access the stack pointer or not. However,
+ on systems with a lot of RAM, only a subset of the RAM is
+ guaranteed to be mapped in and accessible. Change END_OF_RAM
+ to use get_effective_memsize() instead of using the raw ram
+ size out of the bd to prevent us from trying to access
+ non-mapped memory.
+
+
+commit 338cc038461a6c7709c5b86fd9a240209338a1ae
+Date: Fri Jun 6 14:28:14 2008 +0200
+
+ tools/mkimage: fix compiler warnings on some systems.
+
+
+commit b2815f79288d4da7a3ba18bdbd05120ce09d5622
+Date: Fri Jun 6 16:10:41 2008 +0200
+
+ ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config options
+
+ We use upper case letters for the AMCC processor defines (like
+ CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and
+ not CONFIG_440SPe. This patch fixes the last misspelled config options.
+
+
+commit 72675dc6c06a48846d180106161d49dd714383cc
+Date: Fri Jun 6 15:55:21 2008 +0200
+
+ ppc4xx: Unify AMCC's board config files (part 3/3)
+
+ This patch series unifies the AMCC eval board ports by introducing
+ a common include header for all AMCC eval boards:
+
+ include/configs/amcc-common.h
+
+ This header now includes all common configuration options/defines which
+ are removed from the board specific headers.
+
+ The reason for this is ease of maintenance and unified look and feel
+ of all AMCC boards.
+
+
+commit 490f204096d6e2c9940f67816f154a8125bab116
+Date: Fri Jun 6 15:55:03 2008 +0200
+
+ ppc4xx: Unify AMCC's board config files (part 2/3)
+
+ This patch series unifies the AMCC eval board ports by introducing
+ a common include header for all AMCC eval boards:
+
+ include/configs/amcc-common.h
+
+ This header now includes all common configuration options/defines which
+ are removed from the board specific headers.
+
+ The reason for this is ease of maintenance and unified look and feel
+ of all AMCC boards.
+
+
+commit a8a11a9ed046b480a16e47a158f8f5300028dfa6
+Date: Fri Jun 6 15:54:31 2008 +0200
+
+ ppc4xx: Unify AMCC's board config files (part 1/3)
+
+ This patch series unifies the AMCC eval board ports by introducing
+ a common include header for all AMCC eval boards:
+
+ include/configs/amcc-common.h
+
+ This header now includes all common configuration options/defines which
+ are removed from the board specific headers.
+
+ The reason for this is ease of maintenance and unified look and feel
+ of all AMCC boards.
+
+
+commit 0e38c938ed4bcadb4f4fc1419a541431e94fc202
+Date: Thu Jun 5 13:03:36 2008 +0200
+
+ DM9000 fix status check fail 0x6d error for trizeps board
+
+ According to the Application Notes of the DM9000, only the 2 bits 0:1 of
+ the status byte need to be checked to identify a valid packet in the fifo
+
+ But, The several different Application Notes do not all speak the same
+ language on these bits. They do not disagree, but only 1 Application Note
+ noted explicitly that only these 2 bits need to be checked.
+ Even the datasheets do not mention anything about these 2 bits.
+
+ Because the old code, and the kernel check the whole byte, I left this piece
+ untouched.
+
+ However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so
+ it should work.
+
+ Notice, that the 2nd iteration through this receive loop (when a 2nd packet is
+ in the fifo) is much shorter now, compared to the older U-boot driver code,
+ so that we can maybe run into a hardware condition now that was never seen
+ before, or maybe was seen very unfrequently.
+
+ Additionaly added a cleanup of a stack variable.
+
+
+commit 7daf2ebe9196dd67131a06d85049c3a8a08ca413
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] Update <asm/addrspace.h> header
+
+ - Fix traditional KSEG names
+ - Replace PHYSADDR with CPHYSADDR
+
+
+commit f0d5a6f060d00358b85c62a921a423ea8df71184
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] mips_config.mk: Misc fixes
+
+ - Kill redundant `-pipe' (this will be added by $(TOPDIR)/config.mk)
+ - Modify comments
+
+
+commit 5f64d21c9a2998794f255b469165b91f092dfc2d
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] Kill unused <version.h> inclusions
+
+
+commit a55d48174cfd1a5bc184159513f48dcbbe409c83
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] lib_mips/time.c: Fix CP0 count register usage and timer routines
+
+ MIPS port has two problems in timer routines. One is now we assume CFG_HZ
+ equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000
+ in the U-Boot system.
+
+ The other is we don't have a proper time management counter like timestamp
+ other ARCHs have. We need the 32-bit millisecond clock counter.
+
+ This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a
+ 32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number
+ of calculated CP0 counter cycles in a CFG_HZ.
+
+ STRATEGY:
+
+ * Fix improper CFG_HZ value to have 1000
+
+ * Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead.
+
+ * timer_init: initialize timestamp and set up the first timer expiration.
+ Note that we don't need to initialize CP0 count/compare registers here
+ as they have been already zeroed out on the system reset. Leave them as
+ they are.
+
+ * get_timer: calculate how many timestamps have been passed, then return
+ base-relative timestamp. Make sure we can easily count missed timestamps
+ regardless of CP0 count/compare value.
+
+ * get_ticks: return the current timestamp, that is get_timer(0).
+
+ Most parts are from good old Linux v2.6.16 kernel.
+
+ v2:
+ - Remove FIXME comments as they turned out to be trivial.
+ - Use CP0 compare register as a global variable for expirelo.
+ - Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY
+ instead.
+
+
+commit 199e4f657c8af42efe3fb3ba1d1104eb6bb28c25
+Date: Thu Jun 5 22:29:00 2008 +0900
+
+ [MIPS] lib_mips/time.c: Fix udelay
+
+ What we have to do is just to wait for given micro-seconds. No need to
+ take into account current time, get_timer and CFG_HZ.
+
+
+commit c7e38e413ae69120d3e51f132c7cb1d6b3514d03
+Date: Thu Jun 5 22:28:59 2008 +0900
+
+ [MIPS] lib_mips/time.c: Replace CP0 access functions with existing macros
+
+ We already have many pre-defined CP0 access macros in <asm/mipsregs.h>.
+ This patch replaces mips_{compare,count}_set and mips_count_get with
+ existing macros.
+
+
+commit 6b52cfe16cd539935e32bd8cf19146522e462a4d
+Date: Tue Jun 3 15:48:17 2008 +0200
+
+ Get rid of annoying/superfluous bad-checksum warning message
+
+ U-boot can complain a lot about 'checksum bad' when it is attached to the network.
+ It is annoying for ordinary users who start to doubt the network connection
+ in general when they see messages like this.
+
+ This is caused by the routine NetCksumOk() which cannot handle IP-headers longer
+ than 20 bytes. Those packages can be ignored anyway by U-boot, so we trash them
+ now before checking the checksum.
+
+
+commit d6ee5fa40c26970d39990c6fc4a2f20a97822650
+Date: Wed Jun 4 10:47:25 2008 +0200
+
+ Fix order for reading rx-status registers in 32bit mode of DM9000
+
+ A last minute cleanup before submitting the DM9000A patch series yesterday introduced
+ a bug in reading the rx-status registers in 32bit mode only.
+ This patch repairs this.
+
+
+commit 98291e2e689096420465074cce926b226d2e71b4
+Date: Tue Jun 3 15:26:26 2008 +0200
+
+ DM9000: Some minor code cleanups
+
+ Some lines of the U-boot DM9000x driver are longer than 80 characters, or
+ need some other minor cleanup.
+
+
+commit 850ba7555dbd4ca8d14fc475b864d534797adab3
+Date: Tue Jun 3 15:26:25 2008 +0200
+
+ DM9000: Make driver work properly for DM9000A
+
+ The DM9000A network controller does not work with the U-boot DM9000x driver.
+ Analysis showed that many incoming packets are lost.
+
+ The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to
+ check for a valid rx packet be done on the interrupt status register, not
+ directly by performing the dummy read and the rx status check as is currently
+ the case in the u-boot driver.
+
+ When the recommended poll is done as suggested the driver starts working
+ correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there
+ can be more than 1 package in the fifo at the same time.
+
+ The driver must perform the rx-status check in a loop and read and handle all
+ packages until there is no more left _after_ the interrupt RX flag is set.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+
+commit fbcb7ece0ea1e364180f1cf963e0fa0ce7f6560d
+Date: Tue Jun 3 15:26:24 2008 +0200
+
+ DM9000: Improve eth_reset() routine
+
+ According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the
+ reset procedure must be done twice to properly reset the DM9000 by means of software.
+ This errata is not needed anymore for the DM9000A, but it does not bother it.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+
+commit acba31847fad9ae40708cc2c9f3a634ec35f3416
+Date: Tue Jun 3 15:26:23 2008 +0200
+
+ DM9000: improve eth_send() routine
+
+ The eth_send routine of the U-boot DM9000x driver does not match the
+ DM9000 or DM9000A application notes/programming guides.
+
+ This change improves the stability of the DM9000A network controller.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+
+commit 134e266253c02a7832560da59d394989c4f64453
+Date: Tue Jun 3 15:26:22 2008 +0200
+
+ DM9000: repair debug logging
+
+ It seems that the debugging code of the DM9000x driver in U-boot has not been
+ compiled for a long time, because it cannot compile...
+
+ Also rearranged some loglines to get more useful info while debugging.
+
+
+commit a101361bfe23c120321e45d114c0603b8e0763e9
+Date: Tue Jun 3 15:26:21 2008 +0200
+
+ DM9000: Add data bus-width auto detection.
+
+ The U-boot DM9000x driver contains a compile time bus-width definition for
+ the databus connected to the network controller.
+
+ This compile check makes the code unclear, inflexible and is unneccessary.
+ It can be asked to the network controller what its bus-width is by reading bits
+ 6 and 7 of the interrupt status register.
+
+ The linux kernel already uses a runtime mechanism to determine this bus-width,
+ so the implementation below looks somewhat like that implementation.
+
+ This change has been tested with DM9000A, DM9000E, DM9000EP.
+
+
+commit 63a0afa0c32e5f4ea98a9439542870072437404d
+Date: Wed Jun 4 19:19:20 2008 +0200
+
+ ppc4xx: Fix problem with SDRAM init in bamboo NAND booting port
+
+ This patch fixes a problem spotted by Eugene O'Brian (thanks Eugene)
+ introduced by the commit:
+
+ ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
+
+ With this patch SDRAM will get initialized again and booting from NAND
+ is working again.
+
+
+commit 9ef1cbef1a649e3779298b0e663be4865cbbbfbc
+Date: Tue May 27 14:19:30 2008 +0200
+
+ Socrates: Fix PCI bus frequency report
+
+
+commit 8ec6e332eace0ee78c71ee5f645d12b06813b86f
+Date: Thu May 29 11:10:30 2008 +0200
+
+ Fix incorrect switch for IF_TYPE in part.c
+
+ Use correct field in block_dev_desc_t when writing interface type in
+ dev_print. Error introduced in 574b3195.
+
+ Also added fix from Martin Krause
+
+
+commit b64b8a0bd310935b70af69ac970952f2b364ae56
+Date: Tue May 27 10:25:39 2008 +0200
+
+ Add size #defines for Altera Cyclone-II EP2C8 and EP2C20.
+
+
+commit 35ef877f0a8f6232cdef748f442fed5accb2b641
+Date: Thu May 22 18:56:52 2008 -0500
+
+ Additional fix to readline_into_buffer() with CONFIG_CMDLINE_EDITING before relocating
+
+ Removed unneeded command line history initialization. Also, the original
+ code would access the 'initted' variable before relocation to SDRAM
+ which resulted in erratic behavior since the bss is not initialized when
+ executing from flash.
+
+
+commit 22f371b63038a4ecab04068877c1089e51a01ba1
+Date: Wed May 21 13:28:30 2008 -0700
+
+ PPC4xx: Simplified post_word_{load, store}
+
+ This patch simplifies post_word_{load,store} by using the preprocessor
+ to eliminate redundant, copy-and-pasted code.
+
+
+commit 9c048b523413ae5f3ff34e00cf57569c3368ab51
+Date: Wed May 7 21:25:33 2008 +0400
+
+ cfi_flash: enable M18 flash chips family support.
+
+ Added new command set ID. Buffered write command processing is changed
+ in order to support M18 flash chips family.
+
+
+commit 93c56f212ccdadc182018f0769cb284426b88f1d
+Date: Wed May 7 21:24:44 2008 +0400
+
+ cfi_flash: support of long cmd in U-boot.
+
+ Some NOR flash chips needs support of commands with length grether than max
+ value size of uchar. For example all M18 family chips use 0x1ff command in
+ buffered write mode as value of program loops count.
+
+
+commit 4d91d1df2f16b511ab80dec50c80e050ba0d841e
+Date: Fri May 16 11:06:06 2008 +0200
+
+ DTT: Issue one-shot command on AD7414 (LM75 code) to read temp
+
+ On AD7414 the first value upon bootup is not read correctly.
+ This is most likely because of the 800ms update time of the
+ temp register in normal update mode. To get current values
+ each time we issue the "dtt" command including upon powerup
+ we switch into one-short mode.
+
+ This patch fixes the problem on AD7414 equipped boards (Sequoia,
+ Canyonlands etc), that temp value printed in the bootup log was
+ incorrect.
+
+
+commit de5bfcf7b0425e032be12698252dbaa6b65a28c0
+Date: Fri May 30 16:55:06 2008 +0200
+
+ ppc4xx: Cleanup CPCI405 variant's config file
+
+ This patch removes some dead code from CPCI405 board's
+ config files. JFFS2 support is also removed. It's not used and
+ CPCI4052 does not build anymore without some size reduction.
+
+
+commit 2918eb9d42bc705fcbd18c9fcc39d15ff2843c65
+Date: Thu May 29 16:32:33 2008 +0200
+
+ Remove shell variable UNDEF_SYM.
+
+ UNDEF_SYM is a shell variable in the main Makefile used to force the
+ linker to add all u-boot commands to the final image. It has no use here.
+
+
+commit 8c66497e06bf803489c589df58ee591d71033274
+Date: Fri May 16 11:10:35 2008 +0200
+
+ Add support for environment in SPI flash
+
+ This is pretty incomplete...it doesn't handle reading the environment
+ before relocation, it doesn't support redundant environment, and it
+ doesn't support embedded environment. But apart from that, it does
+ seem to work.
+
+
+commit b6368467e6a97f225e0a5fd7bfc5c7598ef5ddc4
+Date: Fri May 16 11:10:34 2008 +0200
+
+ SPI Flash: Add "sf" command
+
+ This adds a new command, "sf" which can be used to manipulate SPI
+ flash. Currently, initialization, reading, writing and erasing is
+ supported.
+
+
+commit d25ce7d24cc0f93881559f4009175ea305af65e8
+Date: Fri May 16 11:10:33 2008 +0200
+
+ SPI Flash subsystem
+
+ This adds a new SPI flash subsystem.
+
+ Currently, only AT45 DataFlash in non-power-of-two mode is supported,
+ but some preliminary support for other flash types is in place as
+ well.
+
+
+commit 60445cb5c3eb77ed1a07f2d908eef09174483698
+Date: Fri May 16 11:10:32 2008 +0200
+
+ atmel_spi: Driver for the Atmel SPI controller
+
+ This adds a driver for the SPI controller found on most AT91 and AVR32
+ chips, implementing the new SPI API.
+
+ Changed in v4:
+ - Update to new API
+ - Handle zero-length transfers appropriately. The user may send a
+ zero-length SPI transfer with SPI_XFER_END set in order to
+ deactivate the chip select after a series of transfers with chip
+ select active. This is useful e.g. when polling the status
+ register of DataFlash.
+
+
+commit d255bb0e78d1cac5b7c8c98cb77a095f5f16de0d
+Date: Fri May 16 11:10:31 2008 +0200
+
+ SPI API improvements
+
+ This patch gets rid of the spi_chipsel table and adds a handful of new
+ functions that makes the SPI layer cleaner and more flexible.
+
+ Instead of the spi_chipsel table, each board that wants to use SPI
+ gets to implement three hooks:
+ * spi_cs_activate(): Activates the chipselect for a given slave
+ * spi_cs_deactivate(): Deactivates the chipselect for a given slave
+ * spi_cs_is_valid(): Determines if the given bus/chipselect
+ combination can be activated.
+
+ Not all drivers may need those extra functions however. If that's the
+ case, the board code may just leave them out (assuming they know what
+ the driver needs) or rely on the linker to strip them out (assuming
+ --gc-sections is being used.)
+
+ To set up communication parameters for a given slave, the driver needs
+ to call spi_setup_slave(). This returns a pointer to an opaque
+ spi_slave struct which must be passed as a parameter to subsequent SPI
+ calls. This struct can be freed by calling spi_free_slave(), but most
+ driver probably don't want to do this.
+
+ Before starting one or more SPI transfers, the driver must call
+ spi_claim_bus() to gain exclusive access to the SPI bus and initialize
+ the hardware. When all transfers are done, the driver must call
+ spi_release_bus() to make the bus available to others, and possibly
+ shut down the SPI controller hardware.
+
+ spi_xfer() behaves mostly the same as before, but it now takes a
+ spi_slave parameter instead of a spi_chipsel function pointer. It also
+ got a new parameter, flags, which is used to specify chip select
+ behaviour. This may be extended with other flags in the future.
+
+ This patch has been build-tested on all powerpc and arm boards
+ involved. I have not tested NIOS since I don't have a toolchain for it
+ installed, so I expect some breakage there even though I've tried
+ fixing up everything I could find by visual inspection.
+
+ I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
+ DataFlash drivers posted as a follow-up. I'd like some help testing
+ other boards that use the existing SPI API.
+
+ But most of all, I'd like some comments on the new API. Is this stuff
+ usable for everyone? If not, why?
+
+ Changed in v4:
+ - Build fixes for various boards, drivers and commands
+ - Provide common struct spi_slave definition that can be extended by
+ drivers
+ - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
+ - Make default bus and mode build-time configurable
+ - Override default SPI bus ID and mode on mx32ads and imx31_litekit.
+
+ Changed in v3:
+ - Add opaque struct spi_slave for controller-specific data associated
+ with a slave.
+ - Add spi_claim_bus() and spi_release_bus()
+ - Add spi_free_slave()
+ - spi_setup() is now called spi_setup_slave() and returns a
+ struct spi_slave
+ - soft_spi now supports four SPI modes (CPOL|CPHA)
+ - Add bus parameter to spi_setup_slave()
+ - Convert the new i.MX32 SPI driver
+ - Convert the new MC13783 RTC driver
+
+ Changed in v2:
+ - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
+ new API.
+
+
+commit 289011207d999b2e4085150d2aa30d547ad9b800
+Date: Fri May 16 11:10:30 2008 +0200
+
+ Move definition of container_of() to common.h
+
+ AVR32 and AT91SAM9 both have their own identical definitions of
+ container_of() taken from the Linux kernel. Move it to common.h so
+ that all architectures can use it.
+
+ container_of() is already used by some drivers, and will be used
+ extensively by the new and improved SPI API.
+
+
+commit 110e006fe67fb4a6e1719ae6956c79b7ffc0148b
+Date: Fri May 16 11:08:11 2008 +0200
+
+ soft_i2c: Pull SDA high before reading
+
+ Spotted by Dean Capindale.
+
+ Systems that support open-drain GPIO properly are allowed provide an
+ empty I2C_TRISTATE define. However, this means that we need to be
+ careful not to drive SDA low when the slave is expected to respond.
+
+ This patch adds a missing I2C_SDA(1) to read_byte() required to
+ tristate the SDA line on systems that support open-drain GPIO.
+
+
+commit 3c1de1a6d36be9eee284a6c596a86e94f19cc5b2
+Date: Mon May 19 11:34:53 2008 +0200
+
+ ppc4xx: Remove implementations of testdram()
+
+ This patch removes the used testdram() implementations of the board
+ that are maintained by myself.
+
+
+commit bbeff30cbd1c5d551eb0ad1c2239ec01844c0b0a
+Date: Mon Jun 2 17:37:28 2008 +0200
+
+ ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
+
+ Historically the 405 U-Boot port had a dram_init() call in early init
+ stage. This function was still called from start.S and most of the time
+ coded in assembler. This is not needed anymore (since a long time) and
+ boards should implement the common initdram() function in C instead.
+
+ This patch now removed the dram_init() call from start.S and removes the
+ empty implementations that are scattered through most of the 405 board
+ ports. Some older board ports really implement this dram_init() though.
+ These are:
+
+ csb272
+ csb472
+ ERIC
+ EXBITGEN
+ W7OLMC
+ W7OLMG
+
+ I changed those boards to call this assembler dram_init() function now
+ from their board specific initdram() instead. This *should* work, but please
+ test again on those platforms. And it is perhaps a good idea that those
+ boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
+ some time. So further patches welcome here.
+
+
+commit 192f90e272b3989ee7b4a666d1fdab831f20f8d2
+Date: Mon Jun 2 17:22:11 2008 +0200
+
+ ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
+
+
+commit 39b32be18cd33b53a84065edcd4e465165cc5564
+Date: Mon Jun 2 17:20:03 2008 +0200
+
+ ppc4xx: Fix common ECC generation code for 440GP style platforms
+
+ This patch makes the common 4xx ECC code really usable on 440GP style
+ platforms.
+
+ Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
+ compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
+ we need to make some processor dependant defines used later on by the
+ driver.
+
+
+commit ec724f883ee3f3925e6c55027e8ffa70ada83303
+Date: Mon Jun 2 17:13:55 2008 +0200
+
+ ppc4xx: Change Kilauea to use the common DDR2 init function
+
+ This patch changes the kilauea and kilauea_nand (for NAND booting)
+ board port to not use a board specific DDR2 init routine anymore. Now
+ the common code from cpu/ppc4xx is used.
+
+ Thanks to Grant Erickson for all his basic work on this 405EX early
+ bootup.
+
+
+commit 17ceb069b85fbb9269c4dc09b2c237f88334c5ba
+Date: Mon Jun 2 14:59:21 2008 +0200
+
+ ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2
+
+ This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all
+ ppc4xx related SDRAM/DDR/DDR2 controller defines.
+
+
+commit 36ea16f6a066ccb046e91ebce4f326b69f4c0569
+Date: Mon Jun 2 14:57:41 2008 +0200
+
+ ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1
+
+ This patch removes all SDRAM related defines from the PPC4xx headers
+ ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
+ the same SDRAM controller as 440 systems do (like 405EX and 440SP).
+
+ It also introduces new defines for the equipped SDRAM controller based on
+ which PPC variant is used. There new defines are:
+
+ used on 405GR/CR/EP and some Xilinx Virtex boards.
+
+ used on 440GP/GX/EP/GR.
+
+ used on 440EPx/GRx.
+
+ used on 405EX/r/440SP/SPe/460EX/GT.
+
+
+commit 64852d09e06dd6db2b2db2a3c59bc2db176a54d6
+Date: Mon Jun 2 14:35:44 2008 +0200
+
+ ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
+
+ This patch consolidates the 405 and 440 parts of the NAND booting code
+ selected via CONFIG_NAND_SPL. Now common code is used to initialize the
+ SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
+ Only *after* running from this location, nand_boot() is called.
+
+ Please note that the initsdram() call is now moved from nand_boot.c
+ to start.S. I experienced problems with some boards like Kilauea
+ (405EX), which don't have internal SRAM (OCM) and relocation needs to
+ be done to SDRAM before the NAND controller can get accessed. When
+ initdram() is called later on in nand_boot(), this can lead to problems
+ with variables in the bss sections like nand_ecc_pos[].
+
+
+commit 8a24c07ba5da2c72ad1f05e3eb8a463750200c98
+Date: Thu May 22 14:44:24 2008 -0700
+
+ ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
+
+ This patch (Part 2 of 2):
+
+ * Rolls up a suite of changes to enable correct primordial stack and
+ global data handling when the data cache is used for such a purpose
+ for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
+
+ * Related to the first, unifies DDR2 SDRAM and ECC initialization by
+ eliminating redundant ECC initialization implementations and moving
+ redundant SDRAM initialization out of board code into shared 4xx
+ code.
+
+ * Enables MCSR visibility on the 405EX(r).
+
+ * Enables the use of the data cache for initial RAM on
+ both AMCC's Kilauea and Makalu and removes a redundant
+ CFG_POST_MEMORY flag from each board's CONFIG_POST value.
+
+ - Removed, per Stefan Roese's request, defunct memory.c file for
+ Makalu and rolled sdram_init from it into makalu.c.
+
+ With respect to the 4xx DDR initialization and ECC unification, there
+ is certainly more work that can and should be done (file renaming,
+ etc.). However, that can be handled at a later date on a second or
+ third pass. As it stands, this patch moves things forward in an
+ incremental yet positive way for those platforms that utilize this
+ code and the features associated with it.
+
+
+commit c821b5f120bedf73867513466412587c6912a8f8
+Date: Thu May 22 14:44:14 2008 -0700
+
+ ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
+
+ This patch (Part 1 of 2):
+
+ * Rolls up a suite of changes to enable correct primordial stack and
+ global data handling when the data cache is used for such a purpose
+ for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
+
+ * Related to the first, unifies DDR2 SDRAM and ECC initialization by
+ eliminating redundant ECC initialization implementations and moving
+ redundant SDRAM initialization out of board code into shared 4xx
+ code.
+
+ * Enables MCSR visibility on the 405EX(r).
+
+ * Enables the use of the data cache for initial RAM on
+ both AMCC's Kilauea and Makalu and removes a redundant
+ CFG_POST_MEMORY flag from each board's CONFIG_POST value.
+
+ - Removed, per Stefan Roese's request, defunct memory.c file for
+ Makalu and rolled sdram_init from it into makalu.c.
+
+ With respect to the 4xx DDR initialization and ECC unification, there
+ is certainly more work that can and should be done (file renaming,
+ etc.). However, that can be handled at a later date on a second or
+ third pass. As it stands, this patch moves things forward in an
+ incremental yet positive way for those platforms that utilize this
+ code and the features associated with it.
+
+
+commit a439680019e06171d4a5694b7992accce87f590e
+Date: Wed May 21 13:28:30 2008 -0700
+
+ PPC4xx: Simplified post_word_{load, store}
+
+ This patch simplifies post_word_{load,store} by using the preprocessor
+ to eliminate redundant, copy-and-pasted code.
+
+
+commit f979690ee337450b2030aba128f95b7a8d9881c0
+Date: Thu May 15 15:13:08 2008 -0500
+
+ Fix warnings from gcc-4.3.0 build on a ppc host
+
+ * The cfi_flash.c memset fix actual allows the board to boot so there is
+ a bit more going on here than just resolving warnings associated with
+ uninitialized variables.
+
+ * include/asm/bitops.h:302: warning: '__swab32p' is static but used in
+ inline function 'ext2_find_next_zero_bit' which is not static
+
+
+commit 9b124a68346ce9605b6e1fcf79e1021541cdba9e
+Date: Wed May 14 13:09:51 2008 -0500
+
+ MPC512x: Change traps.c to not reference non-addressable memory
+
+ Currently, END_OF_RAM is used by the trap code to determine if
+ we should attempt to access the stack pointer or not. However,
+ on systems with a lot of RAM, only a subset of the RAM is
+ guaranteed to be mapped in and accessible. Change END_OF_RAM
+ to use get_effective_memsize() instead of using the raw ram
+ size out of the bd.
+
+
+commit 81673e9ae14b771cd13faf19947192599cae3959
+Date: Tue May 13 19:01:54 2008 -0500
+
+ Make sure common.h is the first include.
+
+ If common.h isn't first we can get CONFIG_ options defined in the
+ board config file ignored. This can cause an issue if any of those
+ config options impact the size of types of data structures
+ (eg CONFIG_PHYS_64BIT).
+
+
+commit 95d449ad4de79dd32b1705b8a4d3550f1e9081e3
+Date: Tue May 13 15:53:29 2008 +0200
+
+ Avoid initrd and logbuffer area overlaps
+
+ Add logbuffer to reserved LMB areas to prevent initrd allocation
+ from overlaping with it.
+
+ Make sure to use correct logbuffer base address.
+
+
+commit 6956d53d9934862507f83f0e3255dfd4662e7482
+Date: Tue May 13 13:29:54 2008 +0200
+
+ lwmon5: add memory-pattern-test to FPGA POST.
+
+commit e34a0e911b6a1568d0ca864234fbd0ee060d9b35
+Date: Thu May 8 19:02:51 2008 -0500
+
+ PPC: 86xx Add bat registers to reginfo command
+
+
+commit d5b9b8cdb8b6eb3a8b0f5d9909d69ccc9c703ed9
+Date: Fri May 9 15:41:35 2008 -0500
+
+ PPC: Add print_bats() to lib_ppc/bat_rw.c
+
+ This function prints the values of all the BAT register
+ pairs - I needed this for debug earlier this week; adding it to
+ lib_ppc so others can use it (and add it to reginfo commands
+ if so desired).
+
+
+commit c148f24c15743a02e855636e6bed013bd121f7f2
+Date: Thu May 15 21:29:04 2008 -0500
+
+ PPC: Change lib_ppc/bat_rw.c to use high bats
+
+ Currently, this code only deals with BATs 0-3, which makes
+ it useless on systems that support BATs 4-7. Add the
+ support for these registers.
+
+
+commit 31d826722434931e1152a09d140187dcf72f8aac
+Date: Thu May 8 19:02:12 2008 -0500
+
+ PPC: Create and use CONFIG_HIGH_BATS
+
+ Change all code that conditionally operates on high bat
+ registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
+ instead of the myriad ways this is done now. Define the option
+ for every config for which high bats are supported (and
+ enabled by early boot, on parts where they're not always
+ enabled)
+
+
+commit aa3b8bf9c30065bb2ea852799d32db5020598495
+Date: Wed May 28 19:55:19 2008 +0200
+
+ E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop Adapter
+
+
+commit ff36fbb2e7583fb808eef773f511489c7a9c2df3
+Date: Wed May 28 13:06:25 2008 -0500
+
+ ColdFire: Add 10 base ethernet support for mcf5445x
+
+
+commit 1a9fcc4b765599db24fa9c32293599f24c7a19ba
+Date: Fri May 30 00:53:38 2008 +0900
+
+ mips: Add an 'include/asm/errno.h', like all other architectures
+
+ All other u-boot architectures have an include/asm/errno.h, so
+ this change adds it to the mips include/asm-mips headers also.
+
+ Stolen from Linux 2.6.25.
+
+
+commit e2ad8426624bac457acc6925b6ff408e9bf20466
+Date: Fri May 30 00:53:38 2008 +0900
+
+ [MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
+
+
+commit 1a3adac81c292f2ee76e43cdeb2fbe8f915fe194
+Date: Fri May 30 00:53:38 2008 +0900
+
+ [MIPS] <asm/mipsregs.h>: Update register / bit field definitions
+
+
+commit bf462ae450a7f2eeeddc699ed345b391e3263540
+Date: Fri May 30 00:53:37 2008 +0900
+
+ [MIPS] <asm/mipsregs.h>: CodinygStyle cleanups
+
+ No functional changes.
+
+
+commit 89a1550ec6b74452274a7a23127936e2c7eec711
+Date: Fri May 30 00:53:37 2008 +0900
+
+ mips: If CONFIG_CMD_SPI is defined, call spi_init()
+
+ The mips architecture currently does not call 'spi_init()' in the generic
+ board initialization routine is CONFIG_CMD_SPI is defined.
+
+ This patch rectifies that problem.
+
+
+commit e996bc339b0f39f6c0b29b1455ba7eb318b023d3
+Date: Fri May 30 00:53:37 2008 +0900
+
+ [MIPS] lib_mips/board.c: Add nand_init
+
+ This patch adds the standard 'nand_init()' call to the mips generic
+ 'board_init_r()' call, bringing MIPS in line with the other architectures.
+
+
+commit d6ac2ed893c2168738aee01579d6283af8d37045
+Date: Thu May 22 10:49:46 2008 -0500
+
+ Remove prototypes of nand_init() in favor of including nand.h.
+
+ Likewise with onenand_init().
+
+
+commit 229c56f07a82eacda8c8720cb146fc9be0f6db54
+Date: Thu May 22 10:49:00 2008 -0500
+
+ Make onenand_uboot.h self-sufficient.
+
+ Don't assume types are provided by previously included headers.
+
+
+commit 9723bbb46abb7b2ca24eead5114a3faa58060c20
+Date: Wed Jan 16 14:26:59 2008 +0100
+
+ nand: Correct NAND erase percentage output
+
+ For NAND erase sizes smaller than one NAND erase block, erase
+ percentage output becomes grater than 100% e.g.
+
+ -- cut --
+ > nand info
+ Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB
+ > nand erase 0x100000 0x2000
+ NAND erase: device 0 offset 0x100000, size 0x2000
+ Erasing at 0x100000 -- 200% complete.
+ OK
+ >
+ -- cut --
+
+ Correct this and give user a warning that more is erased than specified:
+
+ -- cut --
+ > nand erase 0x100000 0x2000
+ NAND erase: device 0 offset 0x100000, size 0x2000
+ Warning: Erase size 0x00002000 smaller than one erase block 0x00004000
+ Erasing 0x00004000 instead
+ Erasing at 0x100000 -- 100% complete.
+ OK
+ >
+ -- cut --
+
+
+commit 5922db6c0948506be91e0de44e7a6863a18a417f
+Date: Tue May 13 17:31:24 2008 +0200
+
+ Cleanup nand_info[] declaration.
+
+ The nand_info array is declared as extern in several .c files.
+ Those days, nand.h contains a reference to the array, so there is
+ no need to declare it elsewhere.
+
+
+commit 135f0a7488af2947adbe4b40b79280bdfe5e9886
+Date: Mon May 19 09:30:43 2008 -0500
+
+ NAND: Provide a sane default for NAND_MAX_CHIPS.
+
+ This allows the header to be included regardless of whether a board's
+ config file provides NAND-related defininitions.
+
+
+commit a8092c021d27f27f4b323b7d49979ca01b3fc19d
+Date: Mon May 26 12:19:10 2008 +0200
+
+ avr32: Fix theoretical race in udelay()
+
+ If the specified delay is very short, the cycle counter may go past the
+ "end" time we are waiting for before we get around to reading it.
+
+ Fix it by checking the different between the cycle count "now" and the
+ cycle count at the beginning. This will work as long as the delay
+ measured in number of cycles is below 2^31.
+
+
+commit 48ea623eae8674793372e3e7c95e72e5a44d7a95
+Date: Wed May 21 13:01:09 2008 +0200
+
+ avr32: Compile atmel_mci.o conditionally
+
+ Remove #ifdef CONFIG_MMC from the source file and use conditional
+ compilation in the Makefile instead.
+
+
+commit e92a5bf8330654e33ac13f6b3058634e58f5d1c0
+Date: Thu May 22 12:28:25 2008 +0200
+
+ avr32: Fix wrong error flags in atmel_mci driver
+
+ Make sure we check for CRC errors when sending commands that use CRC
+ checking.
+
+
+commit 7a96ddadd13e6ac9a829affce9b6f8823f580e49
+Date: Wed May 21 11:10:59 2008 +0200
+
+ avr32: Fix two warnings in atmel_mci.c
+
+ The warnings are harmless but annoying. Let's fix them.
+
+
+commit a23e277c4a3a2bbc42d237aae29da3a8971e757f
+Date: Mon May 19 11:36:28 2008 +0200
+
+ avr32: Rework SDRAM initialization code
+
+ This cleans up the SDRAM initialization and related code a bit, and
+ allows faster booting.
+
+ * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
+ * Remove memory test from sdram_init() and make caller responsible
+ for verifying the SDRAM and determining its size.
+ * Remove base_address member from struct sdram_config (was sdram_info)
+ * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
+ * Add support for a common STK1000 hack: 16MB SDRAM instead of 8.
+
+
+commit 95107b7c028806919630bf02c653aa8f4f867c94
+Date: Mon May 19 11:27:37 2008 +0200
+
+ avr32: Do stricter stack checking in the exception handler
+
+ Don't do a stack dump if the stack pointer is outside the memory area
+ reserved for stack.
+
+
+commit caf83ea888a0220f41747d0b7748fa43b4a4bd49
+Date: Fri May 2 15:32:57 2008 +0200
+
+ avr32: Use the same entry point for reset and exception handling
+
+ Since the reset vector is always aligned to a very large boundary, we
+ can save a couple of KB worth of alignment padding by placing the
+ exception vectors at the same address.
+
+ Deciding which one it is is easy: If we're handling an exception, the
+ CPU is in Exception mode. If we're starting up after reset, the CPU is
+ in Supervisor mode. So this adds a very minimal overhead to the reset
+ path (only executed once) and the exception handling path (normally
+ never executed at all.)
+
+
+commit 0c16eed2189a190bd5655b33c029f809a9b31128
+Date: Fri May 2 15:24:22 2008 +0200
+
+ avr32: Put memset in its own section
+
+ All C code is compiled with -ffunction-sections -fdata-sections.
+ Assembly functions should get their own sections as well so that
+ everything looks consistent.
+
+
+commit 3ace2527ba80bd2fe1bceaab50d0b3c4fb5dd020
+Date: Fri May 2 15:21:40 2008 +0200
+
+ avr32: Rename pm_init() as clk_init() and make SoC-specific
+
+ pm_init() was always more about clock initialization than anything
+ else. Dealing with PLLs, clock gating and such is also inherently
+ SoC-specific, so move it into a SoC-specific directory.
+
+
+commit 4f5972c3b2454c22957f2842cfe64ec8118e015b
+Date: Wed Apr 30 16:15:57 2008 +0200
+
+ avr32: Use new-style Makefile for the at32ap platform
+
+ This makes it easier to avoid compiling certain files later.
+
+
+commit a9b2bb78a1bd8ebdb633509bdd1c8134d527b213
+Date: Wed Apr 30 14:36:47 2008 +0200
+
+ avr32: Remove unused file cpu/at32ap/pm.c
+
+
+commit 44453b25b06426eef0b7b2fa7c026fdf19ce34f2
+Date: Wed Apr 30 14:19:28 2008 +0200
+
+ avr32: Clean up the HMATRIX code
+
+ Rework the HMATRIX configuration interface so that it becomes easier
+ to configure the HMATRIX for boards with special needs, and add new
+ parts.
+
+ The HMATRIX header file has been split into a general,
+ chip-independent part with register definitions, etc. and a
+ chip-specific part with SFR bitfield definitions and master/slave
+ identifiers.
+
+
+commit 0a2e48792dd372c90b80059f3235e67a567e16fc
+Date: Thu Nov 22 12:14:11 2007 +0100
+
+ avr32: Add support for the ATSTK1006 board
+
+ This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on
+ board. It's currently in production and will be available soon.
+
+
+commit 781eb9a1e4af4bd34c138e6126ec5cc6dd4b5440
+Date: Tue Apr 29 12:53:05 2008 +0200
+
+ avr32: Get rid of the .flashprog section
+
+ The .flashprog section was only needed back when we were running
+ directly from flash, and it's even more useless on NGW100 since it
+ uses the CFI flash driver which never used this workaround in the
+ first place.
+
+ Remove it on STK1000 as well, and get rid of all the associated code and
+ annotations.
+
+
+commit cdd42c0c7a5205fc380912d83229069a71ea3abf
+Date: Wed Apr 30 13:09:56 2008 +0200
+
+ avr32: Use correct condition around macb clock accessors
+
+ get_macb_pclk_rate() and get_macb_hclk_rate() should be available when
+ the chip has a MACB controller, not when it has a USART.
+
+
+commit f793a3581901ff39c2abb94012d9bbc8573ccf02
+Date: Wed Apr 16 22:57:58 2008 -0700
+
+ avr32: Disable the AP7000 internal watchdog on startup
+
+ This patch forces the watchdog off in all cases. That will at least
+ get rid of the constant reboot cycle, though it won't let the watchdog
+ actually run in the new kernels: its probe() comes up with a polite
+ warning.
+
+
+commit 55ac7a7490b55da56659f95d82a0c83b9756df27
+Date: Fri Feb 22 12:54:39 2008 -0800
+
+ avr32: stk1002 and ngw100 convergence
+
+ Make STK1002 and NGW100 boards act more alike:
+ - STK boards can use as many arguments as NGW
+ - STK boards don't need to manage FPGAs either
+ - NGW commands should match STK ones
+
+ Also spell U-Boot right in prompts for STK1002 and NGW100.
+
+
+commit 5e1882df6a3efc7de5524d28cea4ecde7d163d54
+Date: Tue May 27 13:47:00 2008 +0200
+
+ Socrates: Fix PCI bus frequency report
+
+
+commit 791e1dba8de76ad8e762a7badb869f224a1f8b82
+Date: Tue May 27 11:49:13 2008 +0200
+
+ Socrates: Added USB support.
+
+
+commit 5a904e5637cff1d708dc67098004f83ba9e84c54
+Date: Tue May 27 11:35:02 2008 +0200
+
+ USB: add new configuration variable CONFIG_PCI_OHCI_DEVNO
+
+ In case of several PCI USB controllers on a board this variable
+ specifys which controller to use.
+ See doc/README.generic_usb_ohci for details.
+
+
+commit 2f7468aeba60e1288030a8d007c4e63bd3f13221
+Date: Tue May 27 10:36:07 2008 +0200
+
+ Socrates: add support for DS75 Digital Thermo Sensor on I2C bus.
+
+
+commit 83e9d7a2614d4006b92690afa3390c291734267e
+Date: Mon May 26 18:16:04 2008 +0200
+
+ Socrates: Config file cleanup.
+
+
+commit 602cac1389b755b223272f2328a47e6f8c240848
+Date: Sat May 24 12:47:46 2008 +0200
+
+ MAKEALL: add at91 list
+
+
+commit 290ef6436838b1cc013bd67e0e0495c9eb3e23c0
+Date: Fri May 23 15:37:05 2008 -0700
+
+ Add Marvell 88E1118 support for TSEC
+
+
+commit 557b377d8bfc8b833b6e749457bcdfa298331a24
+Date: Mon May 5 14:06:11 2008 +0200
+
+ smc911x: add 16 bit support
+
+
+commit 6324e5bec8825f7fee3026ffbd394454ae8b53fb
+Date: Wed May 21 21:29:10 2008 +0200
+
+ Fix endianess conversion in usb_ohci.c
+
+ Sorry, I forgot this line:
+
+
+ I think this must be swapped (result may be equal).
+
+commit c918261c6d9f265f88baf70f8a73dfe6f0cb9596
+Date: Wed May 21 22:12:00 2008 +0200
+
+ USB: replace old swap_ with proper endianess conversion macros
+
+
+commit fb63939b4fe140849cdba69f9e64a3e0e2f3ce1c
+Date: Wed May 21 21:29:10 2008 +0200
+
+ Fix endianess conversion in usb_ohci.c
+
+
+commit 477434c63c2ea5baa5c6c4e43500786f436511ff
+Date: Thu May 22 01:15:53 2008 +0200
+
+ USB: add support for multiple PCI OHCI controllers
+
+ Add new configuration variable CONFIG_PCI_OHCI_DEVNO.
+ In case of several PCI USB controllers on a board this variable
+ specifys which controller to use.
+
+ Also add USB support for sokrates board.
+
+ See doc/README.generic_usb_ohci for details.
+
+
+commit ce6754df61cbe23b5b73d095a00ac9a8504b3d77
+Date: Wed May 21 16:56:08 2008 +0200
+
+ Fix some whitespace issues
+
+ introduced by 53677ef18 "Big white-space cleanup."
+
+
+commit 4416603aeb06861b468b06a981e52c3ff805db7b
+Date: Mon May 12 14:36:39 2008 -0500
+
+ Make ads5121 out-of-tree compiling safe
+
+ Reuse the existing DIU driver in board/freescale/common.
+
+
+commit 0e1bad47cd345c76c91a64caf41011e431b62599
+Date: Mon May 5 10:20:01 2008 -0500
+
+ Adding DIU support for Freescale 5121ADS
+
+ Add DIU and cfb console support to FSL 5121ADS board.
+
+ Use #define CONFIG_VIDEO in config file to enable fb console.
+
+
+commit a48ff68d235e671176f6b496c44246dbe5e0a93f
+Date: Mon May 5 10:20:00 2008 -0500
+
+ Replace DPRINTF with debug
+
+ Remove DPRINTF macro and replace it with generic debug macro.
+
+
+commit 3b80c5f574ad7f6e1c55a68f42752b427fdf778d
+Date: Mon May 5 10:19:59 2008 -0500
+
+ Move pixel clock setting to board file
+
+ The clock divider has different format in 5121 and 8610. This patch moves it to
+ board specific code.
+
+
+commit 53677ef18e25c97ac613349087c5cb33ae5a2741
+Date: Tue May 20 16:00:29 2008 +0200
+
+ Big white-space cleanup.
+
+ This commit gets rid of a huge amount of silly white-space issues.
+ Especially, all sequences of SPACEs followed by TAB characters get
+ removed (unless they appear in print statements).
+
+ Also remove all embedded "vim:" and "vi:" statements which hide
+ indentation problems.
+
+
+commit 2f845dc2bdf461bfee9fa25823f769f5db9eba0b
+Date: Thu May 8 17:46:23 2008 +0200
+
+ socrates: fix second TSEC configuration (it is actually TSEC3)
+
+
+commit 793670c3c0f0f72caead62f0be9fc3d9fbc6060f
+Date: Thu May 8 14:17:08 2008 +0200
+
+ Fixed reset for socrates
+
+
+commit e18575d5f589a62e19c70d471d4b4e27cad3af56
+Date: Wed May 7 15:10:49 2008 +0200
+
+ socrates: changes to support FDT
+
+
+commit 5d108ac8f435924c624cd6aaacd44f35f5cf94c0
+Date: Wed Apr 30 11:42:50 2008 +0200
+
+ Initial support for "Socrates" board
+
+
+commit 0e15ddd11f1a84c465e434eb051d2ef08ef02b9b
+Date: Thu May 8 15:46:42 2008 +0200
+
+ POST: replace the LOGBUFF_INITIALIZED flag in gd->post_log_word (1 << 31) with the GD_FLG_LOGINIT flag in gd->flags.
+
+ This way we become able to utilize the full post_log_word for POST
+ activities (overwise, POST ECC, which has 0x8000 ID, could be
+ erroneously treated as started in post_output_backlog() even if there
+ was actually no POST ECC run (because of OCM POST failure, for
+ example).
+
+
+commit 7845d49094c81321021b50a4dbb8864d2f3777e4
+Date: Thu May 8 15:46:02 2008 +0200
+
+ POST: mark OCM test as POST_STOP
+
+
+commit 28a385065882d6cb6ac5f443311ff87887ed7c13
+Date: Thu May 8 15:45:26 2008 +0200
+
+ POST: add POST_STOP flag
+
+ Don't run futher tests in case of a test fails that is marked as
+ POST_STOP.
+
+
+commit a525145d8110d15b4389d23c3ea8a78f22509d3f
+Date: Thu May 8 15:44:16 2008 +0200
+
+ POST: switch CFG_POST_OCM with CFG_POST_CODEC (workaround)
+
+ Switch the OCM testid with the codec one. The reason is that current
+ implementation requires the POST_ROM testid to fit into lower 16
+ bits, and the codec test will never run with POST_ROM hopefully.
+
+
+commit 8b96c788d58f7cb85a89ee3f19c9b335d22443cd
+Date: Thu May 8 15:43:28 2008 +0200
+
+ lwmon5: enable OCM post test on lwmon5 board
+
+
+commit 6e8ec682268493b8d098f99e17b1ce71b4448977
+Date: Thu May 8 15:42:47 2008 +0200
+
+ POST: OCM test added.
+
+ Added OCM test to POST layer. This version runs before all other tests
+ but doesn't yet interrupt post sequence on failure.
+
+
+commit 6891260bdd935a382c95d9fa333922b0dfded68a
+Date: Thu May 8 15:40:39 2008 +0200
+
+ POST: typo fix
+
+
+commit 727f63334676e760877d43bfb8f0e9331ac8b101
+Date: Tue May 20 02:16:36 2008 -0700
+
+ common/usb.c: fix incorrect escape sequence
+
+
+commit 4ce1e23b5e12283579828b3d23e8fd6e1328a7aa
+Date: Thu May 15 15:26:27 2008 -0500
+
+ Fix 8313ERDB board configuration
+
+ Change LCRR clock ratio from 2 to 4 to commodate VSC7385.
+ Correct TSEC1 vs TSEC2 assignment.
+ Define ETHADDR and ETH1ADDR always.
+
+
+commit 2c289e320dcfb3760e99cf1d765cb067194a1202
+Date: Mon May 19 09:47:25 2008 -0500
+
+ mpc86xx: Removed unused and unconfigured memory test code.
+
+ Besides, other common code exists.
+
+
+commit 180a90abdae72587c0f679edf8991455e559440d
+Date: Mon May 19 12:47:11 2008 +0200
+
+ Release v1.3.3
+
+ Update CHANGELOG for release.
+
+
+commit 16bedc661de0dae767b1377d8413373a3fbcfa79
+Date: Mon May 19 07:14:38 2008 +0200
+
+ ppc4xx: Canyonlands: Disable PCIe0/SATA in dev-tree depending on selection
+
+ When SATA is selected (via jumper J6) we need to disable the first PCIe
+ node in the device tree, so that Linux doesn't initialize it. Otherwise
+ the Linux SATA driver will fail to detect the devices.
+
+ The same goes the other way around too. So if PCIe is selected we need
+ to disable the SATA node in the device tree.
+
+ This is because PCIe port 0 and SATA on 460EX share the same pins
+ (multiplexed) and we have to configure in U-Boot which peripheral is
+ enabled.
+
+
+commit 3cc27b426aeefe2930f911692e9df3143fb2565f
+Date: Sun May 18 19:09:58 2008 +0200
+
+ i386: Fix multiple definitions of __show_boot_progress
+
+
+commit 311f3446930c1e64c12026c1cfd00500b05be52d
+Date: Sun May 18 19:09:57 2008 +0200
+
+ sc530_spunk: add missing SOBJS entry
+
+
+commit a559317143b4f95927b08cd388707e6f077e95fa
+Date: Sun May 18 19:09:56 2008 +0200
+
+ sc520_spunk: Fix flash
+
+ flash.c:593: warning: dereferencing type-punned pointer will break strict-aliasing rules
+ flash.c:398: error: label at end of compound statement
+
+
+commit 91f221317af64191ee8caf303ea9305943158691
+Date: Sun May 18 19:09:49 2008 +0200
+
+ drivers/pcmcia: add missing i82365
+
+
+commit dd223944132f97ffa52977ea95e5a52428f5cc2f
+Date: Sun May 18 19:09:47 2008 +0200
+
+ i386/bootm: remove unused var
+
+
+commit a9da341df19b32ad2ecb58ce529f7e4fada7814e
+Date: Sun May 18 19:09:45 2008 +0200
+
+ example/gitignore: update with all generated examples
+
+
+commit a38dc3ea8614f8b0c41e432b445a9959b9711295
+Date: Thu May 15 00:42:45 2008 +0200
+
+ TQM8272: fix out-of-tree building
+
+ ...and add to MAKEALL script
+
+
+commit 4f805c1e3a60b9263da8ec3bcd1f45edcefa7dcf
+Date: Wed May 14 23:34:53 2008 +0200
+
+ environment: fix bug introduced by commit a8409f4f1ac8
+
+ env_get_char is not a function, but a pointer to one.
+
+
+commit 0c11935cd62ca1f65eeb228ff4c848440d4553bf
+Date: Wed May 14 13:39:22 2008 +0200
+
+ ppc4xx: QUAD100HD: Allow the environment to be put into flash.
+
+ After moving TEXT_BASE the value for CFG_ENV_ADDR was incorrect. Also
+ use a redundant environment.
+
+
+commit cda2a4a9961fd4341b7db305cb22fc05957e8b77
+Date: Wed May 14 13:55:30 2008 +0200
+
+ Fix config files for out-of-tree building
+
+ Several board/<...>/config.mk files include dynamically built (by
+ the Makefile) config files but used the wrong file name of
+ $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+ instead if the correct
+ $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ The bug is nasty because the build result is correct for the (normal)
+ in-tree builds, and because 'sinclude' is used no errors get raised
+ even for out-of-tree build tests. But out-of-tree builds use an
+ incomplete and thus usually incorrect configuration...
+
+
+commit 2dd7082e06d580404010b06fe4e0e8b7038a00c8
+Date: Wed May 14 13:40:03 2008 +0200
+
+ ppc4xx: Fix bogus Canyonlands config.mk
+
+ This patch fixes the canyonlands config.mk file to enable correct
+ out-of-tree builds. Thanks to Wolfgang Denk for spotting this.
+
+
+commit fdd1247a66d788a3446244f6fde9955a93c26322
+Date: Wed May 14 10:32:32 2008 +0200
+
+ ppc4xx: Individual handling of ddr2_fixed.c for canyonlands_nand build
+
+ Canyonlands has a file ddr2_fixed.c which needs special treatment when
+ building in separate directory. It has to be linked to build directory
+ otherwise it is not seen.
+
+
+commit a8409f4f1ac84c36273c1a1e341189662521bcfb
+Date: Wed May 14 12:22:49 2008 +0200
+
+ environment: cleanup prototype declarations of env functions.
+
+
+commit cf39b07948015c480b72a6e732cf7d839aa93a9e
+Date: Wed May 14 12:21:48 2008 +0200
+
+ linkstation_HGLAN: Fix out of tree building.
+
+
+commit 085551c05ca09e6c491ea11a1c6727a36776a545
+Date: Wed May 14 10:32:32 2008 +0200
+
+ ppc4xx: Individual handling of ddr2_fixed.c for canyonlands_nand build
+
+ Canyonlands has a file ddr2_fixed.c which needs special treatment when
+ building in separate directory. It has to be linked to build directory
+ otherwise it is not seen.
+
+
+commit 1510b82d50615f344e89d42533e8224cce067dc0
+Date: Tue May 13 23:15:52 2008 +0200
+
+ Makefile: fix "error: version_autogenerated.h: No such file or directory"
+
+
+commit 54694a91428f6c3280fe1ee0923488a1e7e8dbc4
+Date: Tue May 13 17:31:24 2008 +0200
+
+ Cleanup nand_info[] declaration.
+
+ The nand_info array is declared as extern in several .c files.
+ Those days, nand.h contains a reference to the array, so there is
+ no need to declare it elsewhere.
+
+
+commit 70fab1908fc1734a403711eaabbef546bc4b77dc
+Date: Tue May 13 20:22:01 2008 +0200
+
+ ppc4xx: Add 405EX(r) revision C PVR definitions and detection code
+
+
+commit 65dcfa79204f4750b905a173a5365e0b2eb6c2f6
+Date: Mon May 12 01:11:21 2008 +0200
+
+ Revert "pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option"
+
+ This reverts commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2
+ which broke many PowerPC boards.
+
+commit ee0cfa70803a3e629ea581a9b216f8ecef402bfc
+Date: Mon May 12 00:56:28 2008 +0200
+
+ Revert "Avoid initrd and logbuffer area overlaps"
+
+ This reverts commit 1b5605ca57fbb364f4d78eeee28b974ed875e888
+ which breaks building on all PPC boards that don't use a log buffer.
+
+commit 02b9b22446e3d7ad6a6382be17a1ce79a7de589b
+Date: Sat May 10 14:02:04 2008 -0700
+
+ Fix offset calculation for multi-type legacy images.
+
+ Calculation of tail was incorrect when size % 4 == 0.
+
+ New code removes the conditional and does the same thing but with arithmetic
+
+
+commit c9dca3c3f37d2647aec4509b24b16d15882ae3e4
+Date: Mon May 12 00:40:58 2008 +0200
+
+ Revert "Change env_get_char from a global function ptr to a function."
+
+ This reverts commit c0559be371b2a64b1a817088c3308688e2182f93
+ which is known to break booting from dataflash and NAND.
+
+commit 20e5ed137483823aaea5178169f3b144c7a4d9e0
+Date: Sun May 11 23:13:57 2008 +0200
+
+ API: remove duplicate syscall check
+
+
+commit 67e3beb52c320b0a31cf030716c99392cde2d532
+Date: Fri May 9 21:46:51 2008 +0200
+
+ AT91: Cleanup unused config header file definitions.
+
+ CONFIG_ENV_OVERWRITE is commented out in the config header files,
+ so let's cleanup the files by removing the whole definition.
+
+
+commit 19883aede2ac0a522493bfb2b35a7dbb200071b1
+Date: Thu May 8 14:52:34 2008 +0200
+
+ Support AT91CAP9 revC CPUs
+
+ The AT91CAP9 revC CPU has a few differences over the previous,
+ revB CPU which was distributed in small quantities only (revA was
+ an internal Atmel product only).
+
+ The revC silicon needs a special initialisation sequence to
+ switch from the internal (imprecise) RC oscillator to the
+ external 32k clock.
+
+
+commit 098b7b4b441b12c2a64dd517930f43c793542759
+Date: Thu May 8 14:52:33 2008 +0200
+
+ Use custom logo for Atmel boards
+
+ This patch adds a custom vendor logo for the Atmel AT91 boards.
+
+
+commit 761c70b80cdd3bead40146b96a8e713d6ae01632
+Date: Thu May 8 14:52:32 2008 +0200
+
+ AT91SAM9RLEK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91SAM9RLEK board.
+
+
+commit 56a2479cd7fecabdd91348a775b2801dd2e65c7f
+Date: Thu May 8 14:52:31 2008 +0200
+
+ AT91SAM9263EK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91SAM9263EK board.
+
+
+commit 820f2a958325061a446115f3035e48e4726b3390
+Date: Thu May 8 14:52:30 2008 +0200
+
+ AT91SAM9261EK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91SAM9261EK board.
+
+
+commit c139b17d20c8371c1e0a8d7fb27c11050cf86304
+Date: Thu May 8 14:52:29 2008 +0200
+
+ AT91CAP9ADK: hook up the ATMEL LCD driver
+
+ This patch makes the necessary adaptations (PIO configurations and
+ defines in config header file) to hook up the Atmel LCD driver to the
+ AT91CAP9ADK board.
+
+
+commit 39cf480484fcce5c04a590ee1c30be0c17b02c34
+Date: Fri May 9 21:57:18 2008 +0200
+
+ Add ATMEL LCD driver
+
+ This patch adds support for the ATMEL LCDC driver which is used on some
+ AT91 and AVR platforms.
+
+ Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and
+ AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy.
+
+
+commit 2118ebb44dc40f8117c94950fd95799a9ef821b2
+Date: Thu May 8 18:52:25 2008 +0200
+
+ AT91SAM9RLEK support
+
+ This patch adds support for the AT91SAM9RL chip and the AT91SAM9RLEK
+ board.
+
+
+commit 8e429b3eee23927c1222679f6b6f53667b21595c
+Date: Thu May 8 18:52:23 2008 +0200
+
+ AT91SAM9263EK support
+
+ This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK
+ board.
+
+
+commit d99a8ff66d8ae87e5c87590ed2e4ead629540607
+Date: Thu May 8 20:52:22 2008 +0200
+
+ AT91SAM9261EK support
+
+ This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
+ board.
+
+
+commit 86c8c8a414988c50104a3b02c29f50af2be738c0
+Date: Thu May 8 20:52:21 2008 +0200
+
+ AT91SAM9260EK: Fix dataflash offsets in CONFIG_BOOTCOMMAND
+
+ This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
+ in order to cope with the changes in DataFlash partitionning scheme
+ (cset c3a60cb3).
+
+
+commit 96996ac25d5222611a8888968db6e53a6d3726da
+Date: Thu May 8 20:52:20 2008 +0200
+
+ AT91SAM9260EK: Normalize BOOTARGS
+
+ This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
+ DataFlash or from NAND), and gives to Linux a fully specified mtdparts
+ variable.
+
+
+commit 79f0cb6e9c54d31a1d9e3f5e226a9bebc3c3a47a
+Date: Thu May 8 20:52:19 2008 +0200
+
+ AT91SAM9260EK: Normalize SPI timings
+
+ This patch changes the SPI timings to closely match the ones
+ used by the Linux kernel and the Atmel's own bootstrap project.
+
+
+commit c1212b2f5c5ed440bf8e9ebc8e4fd7488858b935
+Date: Thu May 8 20:52:18 2008 +0200
+
+ AT91SAM9260EK: Handle 8 or 16 bit NAND
+
+ The Atmel boards can handle 8 or 16 bit NAND memories. This patch
+ makes the support configurable in the board config header file
+ (CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
+
+
+commit ab52640fc01624e208424e527af0b7b3a5a65a12
+Date: Thu May 8 20:52:17 2008 +0200
+
+ AT91CAP9ADK: Fix dataflash offsets in CONFIG_BOOTCOMMAND
+
+ This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
+ in order to cope with the changes in DataFlash partitionning scheme
+ (cset c3a60cb3).
+
+
+commit 3267508ec4c9e74c39ee41c9ae6951ad185fe270
+Date: Thu May 8 20:52:16 2008 +0200
+
+ AT91CAP9ADK: Normalize BOOTARGS
+
+ This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
+ DataFlash or from NAND), and gives to Linux a fully specified mtdparts
+ variable.
+
+
+commit 93da48b910511911ce110656e17ed733c8ac4c45
+Date: Thu May 8 20:52:15 2008 +0200
+
+ AT91CAP9ADK: Normalize SPI timings
+
+ This patch changes the SPI timings to closely match the ones
+ used by the Linux kernel and the Atmel's own bootstrap project.
+
+
+commit 1c90df3e148ce0a3e2c86c63b38b19d47772f2a0
+Date: Thu May 8 20:52:14 2008 +0200
+
+ AT91CAP9ADK: Handle 8 or 16 bit NAND
+
+ The Atmel boards can handle 8 or 16 bit NAND memories. This patch
+ makes the support configurable in the board config header file
+ (CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
+
+
+commit 11b162bae058e96c7929e358d4adff2bee6c2cc4
+Date: Thu May 8 20:52:13 2008 +0200
+
+ Use a common u-boot.lds file across all AT91CAP9/AT91SAM9 platforms
+
+ All the AT91CAP9/AT91SAM9 boards have the same linker script. The patch
+ below avoids the duplication of u-boot.lds by putting the file in the
+ cpu directory instead of the board one.
+
+
+commit d48abea4b89adaf5e45ea75b5e38c0d8de179ece
+Date: Thu May 8 20:52:12 2008 +0200
+
+ Add proper copyright notices in Atmel boards Makefiles
+
+ The Makefiles for the AT91CAP9/AT91SAM9 boards have an incomplete
+ copyright notice. This patch adds the missing pieces.
+
+
+commit e817a042cef6164bf26fee86f90326f2ec9e6745
+Date: Thu May 8 20:52:11 2008 +0200
+
+ Add copyright information in Atmel boards partition.c
+
+ When Ulf did the dataflash.c cleanup, he didn't add his copyright on
+ the new created files. This patch fixes the problem.
+
+
+commit 4f6c810106f4f76d83cfc57d98f4540cd45f9a19
+Date: Thu May 8 20:52:10 2008 +0200
+
+ Update origin and copyright information in arch-at91sam9 header files
+
+ When doing the AT91CAP9/AT91SAM9 port, a number of header files were
+ copied from the Linux kernel sources. This patch explicitly specifies
+ this origin for all the copied headers, and for those missing copyright
+ information, adds it.
+
+ Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
+ in the latest kernel sources by 'at91sam9_smc.h'.
+
+ The copyright information has been confirmed by the AT91 Linux kernel
+
+
+commit 79dd1712689d6a5031d7cbff54957049680751c7
+Date: Thu May 8 16:00:55 2008 +0200
+
+ ppc4xx: Kilauea: Add CONFIG_BOOTP_SUBNETMASK to Kilauea board config
+
+ When using dhcp/bootp the "netmask" environment variable is not set
+ because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is
+ desireable, so the following patch adds this this option to the board
+ config.
+
+
+commit 869d14b4cc2e47de2ddcb117bad0407a44436684
+Date: Sat May 10 10:30:36 2008 +0200
+
+ ppc4xx: Update Makalu defconfig to use device-tree booting as default
+
+ This patch reworks the default environment on Makalu. Now "net_nfs" for
+ example uses the device-tree style booting formerly know as "net_nfs_fdt".
+ Also the addresses in RAM were changed because of the new image booting
+ support, which check for image overwriting. So the addresses needed to
+ get adjusted.
+
+
+commit f3612a7b199cab3942f60d9c1392eb39d58cc699
+Date: Wed May 7 13:28:16 2008 -0500
+
+ PPC: fix map_physmem build warning
+
+ map_physmem currently generates a warning when CONFIG_PHYS_64BIT is
+ enabled. This quiets the warning.
+
+
+commit 36f32675f40292002ee1fed252c180a43022d2d4
+Date: Wed May 7 13:24:57 2008 -0500
+
+ Update pci code to use phys_addr_t
+
+ Physical addrs need to be represented by phys_addr_t, not
+ unsigned long. Otherwise, systems that use CONFIG_PHYS_64BIT
+ are going to fail mightily.
+
+
+commit 91a616741fc128cdb88f39bddcd4d72fe17466d0
+Date: Thu May 8 22:32:22 2008 -0700
+
+ Support legacy multi-type images without FDT section.
+
+ This patch enables legacy multi-type images containing only a Linux kernel
+ and root file system to be loaded, maintaining compatibility with previous
+ versions of u-boot.
+
+ This is required when using old image files such as a Linux 2.4 kernel /
+ filesystem.
+
+
+commit 881031d9732783b7aeae2198fc7eb480ae8974a6
+Date: Sat May 10 00:38:02 2008 +0200
+
+ Update CHANGELOG.
+
+
+commit e5e9d6c9c08160be7e5a36e04d125ccce99b8774
+Date: Sat May 10 00:36:09 2008 +0200
+
+ post/cpu/ppc4xx/Makefile: line length cleanup
+
+
+commit cce9cfdabcf416ecd2aacc3681c91e5378c75a3d
+Date: Thu May 8 22:52:09 2008 +0200
+
+ Fix @ -> <at> substitution
+
+ When applying the AT91CAP9 patches upstream, something transformed
+ the '@' character into the ' <at> ' sequence.
+
+ The patch below restores the original form in all the places where
+ it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
+ were copied from AT91CAP9, and a couple of other files where the
+ ' <at> ' sequence was present).
+
+
+commit 9606b3c81b3c47a1d58514e9a232c6f461a17597
+Date: Thu May 8 22:52:10 2008 +0200
+
+ Update origin and copyright information in arch-at91sam9 header files
+
+ When doing the AT91CAP9/AT91SAM9 port, a number of header files were
+ copied from the Linux kernel sources. This patch explicitly specifies
+ this origin for all the copied headers, and for those missing copyright
+ information, adds it.
+
+ Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
+ in the latest kernel sources by 'at91sam9_smc.h'.
+
+ The copyright information has been confirmed by the AT91 Linux kernel
+
+
+commit ceb6b4fbe1dcc40bb672ef8133ddf4813e97cbb1
+Date: Thu May 8 22:52:11 2008 +0200
+
+ Add copyright information in Atmel boards partition.c
+
+ When Ulf did the dataflash.c cleanup, he didn't add his copyright on
+ the new created files. This patch fixes the problem.
+
+
+commit 2ab02fd456d8ef92ae9f5439618d1fa7ca16e5f3
+Date: Thu May 8 10:09:27 2008 +0200
+
+ mx31ads: fix 32kHz clock handling
+
+ According to schematics and to RedBoot sources, the MX31ADS uses a 32768Hz
+ oscillator as a SKIL source. Fix previously wrongly assumed 32000Hz value.
+ Also fix a typo when verifying a jumper configuration. While at it, make
+ two needlessly global functions static.
+
+
+commit 1b5605ca57fbb364f4d78eeee28b974ed875e888
+Date: Wed May 7 13:10:04 2008 +0200
+
+ Avoid initrd and logbuffer area overlaps
+
+ Add logbuffer to reserved LMB areas to prevent initrd allocation
+ from overlaping with it.
+
+ Make sure to use correct logbuffer base address.
+
+
+commit c59518e15949b3403df5c5b0c2c48ea0e5bea24b
+Date: Wed May 7 13:08:54 2008 +0200
+
+ ppc: Cleanup get_effective_memsize() use
+
+ Removed duplicated effective memory size calculation code.
+
+
+commit 273c37d843d5b581090378016cd12dd9c586907b
+Date: Wed May 7 09:03:53 2008 +0200
+
+ Fix build errors when CONFIG_LOGBUFFER and CONFIG_FIT are enabled
+
+ Recent modifcations to LOGBUFFER handling code were incorrecly
+ introduced to fit_check_kernel() routine during
+ "Merge branch 'new-image' of git://www.denx.de/git/u-boot-testing",
+ commit 27f33e9f45ef7f9685cbdc65066a1828e85dde4f.
+
+ This patch cleans up this merge issue.
+
+
+commit bc11756daff89a3de09ca80adac962b88cf06e6e
+Date: Tue May 6 20:16:15 2008 -0700
+
+ Propagate Error Status to the Shell on fw_printenv Errors
+
+ Changed implementation such that fw_printenv returns failure status
+ when one or more specified variables do not exist or when incorrect
+ command syntax is used.
+
+ This aids scripting fw_printenv such that the script can key of the
+ return status rather than relying on standard error "scraping".
+
+
+commit f3b6d528e4dd719640a4bfcd954f4e4c7f5db0d6
+Date: Tue May 6 16:18:00 2008 -0700
+
+ Fix Compilation Errors with 'tools/env/fw_printenv'
+
+ In the current top-of-tree, 1.3.3.-rc2, the optional tool
+ 'tools/env/fw_printenv' fails to compile for two reasons:
+
+ 1) The header watchdog.h cannot be found.
+ 2) The header zlib.h is picked up from the tool chain rather than the
+ project causing a prototype conflict for crc32.
+
+ This patch addresses both of these issues.
+
+ Platforms Tested On:
+ - AMCC "Kilauea"
+
+
+commit 597f6c26a18b389903a64692bacbf9a1ca69355b
+Date: Mon May 5 10:22:53 2008 -0500
+
+ Fix readline_into_buffer() with CONFIG_CMDLINE_EDITING before relocating
+
+ When CONFIG_CMDLINE_EDITING is enabled, readline_into_buffer() doesn't
+ work before relocating to RAM because command history is written into
+ a global array that is not writable before relocation. This patch
+ defers to the no-editing and no-history code in readline_into_buffer()
+ if it is called before relocation.
+
+
+commit 726c0f1e5f108dccea052965123b95837d2bd402
+Date: Mon May 5 16:11:22 2008 +0200
+
+ cosmetic: Adjust coding style for switch statements to be consistent
+
+
+commit 574b319512b13e10800f0045e39b993f4ca25e42
+Date: Mon May 5 16:11:21 2008 +0200
+
+ Fix disk type output in disk/part.c
+
+
+commit 045b4d2d7168ef09c7349dcf6ecebe7432b74171
+Date: Mon May 5 14:20:03 2008 +0300
+
+ Mail address change, documentation modified
+
+
+commit 4d49b28038e2819088e8356a77212fc95a89ce5a
+Date: Sun May 4 15:42:41 2008 +0200
+
+ microblaze: Repare intc handling
+
+
+commit 878b3b1e193e570caf3e96ad8e31e561f68d0287
+Date: Sun May 4 15:17:52 2008 +0200
+
+ include/gitignore: update to all architectures
+
+
+commit 1df368aed3b8bc240fe1595d290b0e91b22961da
+Date: Mon May 5 02:12:06 2008 +0200
+
+ ide: Remove spurious second include of io.h
+
+ Removed the second include, with all the #ifdef around as suggested by Wolfgang.
+
+
+commit 8fbc985bdad09b23b7eb4df1d2ea589619d8db4c
+Date: Tue May 6 16:46:37 2008 -0400
+
+ Fix some typos
+
+ This patch fixes three typos.
+ The first is a repetition of CONFIG_CMD_BSP.
+ The second makes the #endif comment match its #if.
+ The third is a spelling error.
+
+
+commit e419e12d04ae3b280c99a87a2ea4ad7a40628bcb
+Date: Sun May 4 16:45:01 2008 -0700
+
+ Recognize 'powerpc' As an Alias for IH_ARCH_PPC
+
+ Add support for the recognition of 'powerpc' as an alias for the PowerPC
+ architecture type since Linux is already trending in that direction,
+ preferring 'powerpc' to 'ppc'.
+
+
+commit f5a24259190c388c2527bdc49fee34577d862cc7
+Date: Fri May 2 13:35:15 2008 -0700
+
+ 7450 and 86xx L2 cache invalidate bug corrections
+
+ The 7610 and related parts have an L2IP bit in the L2CR that is
+ monitored to signal when the L2 cache invalidate is complete whereas the
+ 7450 and related parts utilize L2I for this purpose. However, the
+ current code does not account for this difference. Additionally the 86xx
+ L2 cache invalidate code used an "andi" instruction where an "andis"
+ instruction should have been used.
+
+ This patch addresses both of these bugs.
+
+
+commit 4d31cdc45d3592a5545a649fb5a24b458a4e4b72
+Date: Fri May 9 10:16:13 2008 +0200
+
+ Avoid infinite loop "Generating include/autoconf.mk"
+
+ Fix a bogus circular dependency that caused an infinite loop of
+ "Generating include/autoconf.mk" again and again.
+
+
+commit 567fb852178dbf59529d7301620a3f3732a4b02d
+Date: Thu May 8 22:52:09 2008 +0200
+
+ Fix @ -> <at> substitution
+
+ When applying the AT91CAP9 patches upstream, something transformed
+ the '@' character into the ' <at> ' sequence.
+
+ The patch below restores the original form in all the places where
+ it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
+ were copied from AT91CAP9, and a couple of other files where the
+ ' <at> ' sequence was present).
+
+
+commit 73ccb3410a0785593cda7aee455dfc51f790e281
+Date: Mon Apr 28 14:04:32 2008 +0200
+
+ ppc4xx: Add the Harris QUAD100HD AMCC 405EP-based board
+
+
+commit ef2642625cbfb1c3695e3478d08ae515052a4950
+Date: Thu May 8 11:10:46 2008 +0200
+
+ ppc4xx: Kilauea: Fix incorrect FPGA FIFO address
+
+
+commit a00eccfebc954ad9485161efeca7d9aaf626d530
+Date: Thu May 8 11:05:15 2008 +0200
+
+ ppc4xx: Add fdt support to all remaining AMCC PPC4xx eval boards
+
+ This patch adds fdt (flattened device tree) support to all remaining AMCC
+ eval boards. Most newer boards already support device tree. With this patch,
+ all AMCC boards now enable device tree passing from U-Boot to Linux
+ arch/powerpc kernels.
+
+
+commit cb5d88b9611e0c35c53543ad3b4ab99fa82203e3
+Date: Thu May 8 11:01:09 2008 +0200
+
+ ppc4xx: Add weak default ft_board_setup() routine
+
+ This patch adds a default ft_board_setup() routine to the 4xx fdt code.
+ This routine is defined as weak and can be overwritten by a board specific
+ one if needed.
+
+
+commit d1c1ba85c7915053adf6a8d14a08ac6fcb750d01
+Date: Thu May 8 10:48:58 2008 +0200
+
+ ppc4xx: acadia: Add fdt support and fix section overlap problem
+
+ This patch adds fdt (flattened device tree) support to the AMCC
+ Acadia eval board. This increases the image size and it doesn't
+ fit anymore into 256kByte. Since we didn't want to remove features
+ from the configuration, we decided to increase the U-Boot image size
+ (add one flash sector).
+
+ Also changed the default environment definition to make it
+ independent of such changes.
+
+
+commit 4adb3023de75bc150f088c8935db340930ad38c8
+Date: Tue Apr 29 11:18:54 2008 -0700
+
+ ppc4xx: Add device tree support to AMCC Yosemite
+
+ Add support for booting with a device tree blob. This is needed to boot
+ ARCH=powerpc kernels. Also add support for setting the eth0 mac address
+ via the ethaddr variable.
+
+
+commit b9bbefce1a653ea35f74a66ec117cdda2e043a4b
+Date: Wed May 7 09:00:23 2008 -0700
+
+ ppc4xx: Fix typos in 460GT/EX FBDV array
+
+ Corrected two typos in the 460GT/EX FBDV array.
+
+
+commit 66f5fa9263629271edc86178b1f224e3c9aab2b3
+Date: Wed May 7 16:54:31 2008 -0500
+
+ 85xx: Limit CPU2 workaround to parts that have the errata
+
+
+commit a5fe514e8ace564300d2c1d73846ddff49654243
+Date: Fri Apr 25 15:44:45 2008 -0500
+
+ mpc83xx: system performance settings for MPC8349EMDS.
+
+ These same settings are used on MPC8349ITX, and
+ improve performance on MPC8349EMDS.
+
+
+commit 49387dba910e485640b575e920ee463b7e611dc3
+Date: Tue May 6 13:22:52 2008 +0900
+
+ [MIPS] cpu/mips/cache.S: Fix build warning
+
+ Some old GNU assemblers, such as v2.14 (ELDK 3.1.1), v2.16 (ELDK 4.1.0),
+ warns illegal global symbol references by bal (and jal also) instruction.
+ This does not happen with the latest binutils v2.18.
+
+ Here's an example on gth2_config:
+
+ mips_4KC-gcc -D__ASSEMBLY__ -g -Os -D__KERNEL__ -DTEXT_BASE=0x90000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isy
+ stem /opt/eldk311/usr/bin/../lib/gcc-lib/mips-linux/3.3.3/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4k
+ c -EB -c -o cache.o cache.S
+ cache.S: Assembler messages:
+ cache.S:243: Warning: Pretending global symbol used as branch target is local.
+ cache.S:250: Warning: Pretending global symbol used as branch target is local.
+
+ In principle, gas might be sensitive to global symbol references in PIC
+ code because they should be processed through GOT (global offset table).
+ But if `bal' instruction is used, it results in PC-based offset jump.
+ This is the cause of this warning.
+
+ In practice, we know it doesn't matter whether PC-based reference or GOT-
+ based. As for this case, both will work before/after relocation. But let's
+ fix the code.
+
+ This patch explicitly sets up a target address, then jump there.
+ Here's an example of disassembled code with/without this patch.
+
+ 90000668: 1485ffef bne a0,a1,90000628 <mips_cache_reset+0x20>
+ 9000066c: ac80fffc sw zero,-4(a0)
+ 90000670: 01402821 move a1,t2
+ -90000674: 0411ffba bal 90000560 <mips_init_icache>
+ -90000678: 01803021 move a2,t4
+ -9000067c: 01602821 move a1,t3
+ -90000680: 0411ffcc bal 900005b4 <mips_init_dcache>
+ -90000684: 01a03021 move a2,t5
+ -90000688: 03000008 jr t8
+ -9000068c: 00000000 nop
+ +90000674: 01803021 move a2,t4
+ +90000678: 8f8f83ec lw t7,-31764(gp)
+ +9000067c: 01e0f809 jalr t7
+ +90000680: 00000000 nop
+ +90000684: 01602821 move a1,t3
+ +90000688: 01a03021 move a2,t5
+ +9000068c: 8f8f81e0 lw t7,-32288(gp)
+ +90000690: 01e0f809 jalr t7
+ +90000694: 00000000 nop
+ +90000698: 03000008 jr t8
+ +9000069c: 00000000 nop
+
+
+commit 0f8c62a14b523c56874ebcb67c1a16c99aad48b3
+Date: Mon May 5 14:04:00 2008 +0300
+
+ Allow building mips versions with ELDK 3.1.1
+
+ .gpword works only with local symbols on certain binutils versions
+
+
+commit 12a67a9e51f6b3ec26cb0f077fb5685a447c359d
+Date: Mon May 5 12:52:36 2008 +0200
+
+ MAKEALL: add inka4x0 board
+
+
+commit b83dcc13ae7b2dab394bfef6f699750d11490ee2
+Date: Sun May 4 21:34:23 2008 +0200
+
+ kb9202 board: fix build problem.
+
+
+commit 6adf61dc4cb5c53a2df990cbc8df2bceacbfd869
+Date: Sun May 4 12:10:33 2008 +0200
+
+ Prepare for v1.3.3-rc3
+
+ Update ChNAGELOG, minor white space cleanup.
+
+
+commit 7c0773fde6100b61be2558cb5d8c442a3194aecb
+Date: Sun May 4 00:35:15 2008 +0200
+
+ drivers/net/tsec.c: Fix typo.
+
+
+commit aa737945e6f37a5de5dbad550a7694e0cb2a8120
+Date: Fri May 2 21:45:12 2008 -0400
+
+ version_autogenerated.h: use printf rather than echo -n
+
+ Some systems are dumb and do not implement the -n flag to echo (like OS X).
+ Convert the Makefile to use printf as this should work everywhere.
+
+
+commit 4acc2a108ad0a669165924704a6cb083f9138242
+Date: Fri May 2 18:17:50 2008 -0400
+
+ fix building when saveenv is disabled in some setups
+
+ If you enable environment in the flash, but disable the embedded
+ option, and you disable the saveenv command, then the #if nested
+ logic will trigger a compile failure:
+ env_flash.c: In function 'env_relocate_spec':
+ env_flash.c:399: error: 'flash_addr' undeclared (first use in this function)
+ The fix is to add CMD_SAVEENV ifdef protection like everywhere else.
+
+
+commit ccf1ad535ae1c0dc2d466235c668adbdfe3a55b7
+Date: Fri May 2 16:10:04 2008 -0400
+
+ SBC8548: fix address mask to allow 64M flash
+
+ Fix incorrect mask to enable all 64MB of onboard flash.
+ Previously U-Boot incorrectly mapped only 8MB of flash, this
+ patch correctly maps all the available flash.
+
+
+commit 3648085c464c8c22ef76fab006ca4344d3796124
+Date: Fri May 2 19:48:56 2008 +0200
+
+ qemu_mips: add README
+
+
+commit 6fdd002689190a0022c7b3dbab37fcba724580ce
+Date: Fri May 2 02:35:59 2008 +0200
+
+ Fix misspelled comment
+
+
+commit fa956fde60b7ec4dd66bd62f9910fd341b5049a1
+Date: Thu May 1 04:13:05 2008 -0400
+
+ mkimage: make mmap() checks consistent
+
+ The mmap() related code is full of inconsistent casts/constants when
+ it comes to error checking, and may break when building on some
+ systems (like ones that do not implicitly define the caddr_t type).
+ Let's just avoid the whole mess by writing the code nice and clean in
+ the first place.
+
+
+commit 8e90cd0447a0f0ccf529ef86f0e6b56187d3b82a
+Date: Thu May 1 09:05:34 2008 +0200
+
+ Fix defined but not used build warning
+
+ - warning: 'srom' defined but not used
+
+
+commit b71190f3250aaffcc81c35f6cfd3498cb7c48013
+Date: Thu May 1 09:05:26 2008 +0200
+
+ Fix implicit declaration build warnings
+
+ - warning: implicit declaration of function ‘serial_initialize’
+
+
+commit 9acde129cc3f9c1b3bc11a821480dd446774d618
+Date: Tue Apr 29 19:18:32 2008 +0200
+
+ TSEC: add config options for VSC8601 RGMII PHY
+
+ The Vitesse VSC8601 RGMII PHY has internal delay for both Rx
+ and Tx clock lines. They are configured using 2 bits in extended
+ register 0x17.
+ Therefore CFG_VSC8601_SKEW_TX and CFG_VSC8601_SKEW_RX have
+ been introduced with valid values 0-3 giving 0.0, 1.4,1.7 and 2.0ns delay.
+
+ --
+
+ drivers/net/tsec.c | 6 ++++++
+ drivers/net/tsec.h | 3 +++
+ 2 files changed, 9 insertions(+), 0 deletions(-)
+
+commit bd98ee60df43ee6dd6f5ebe32c67d03e90513ff8
+Date: Sat May 3 23:07:15 2008 +0200
+
+ Revert "ColdFire: Get information from the correct GCC"
+
+ This reverts commit b7166e05a513c0806b63b9dfb6f1d77645cede2a
+ (replaced by commit c4e5f52a58d278eebb87f476e353972c5dacea40).
+
+commit c4e5f52a58d278eebb87f476e353972c5dacea40
+Date: Sat May 3 22:25:00 2008 +0200
+
+ config.mk: use correct (cross) compiler
+
+ Some config.mk files reference $(CC) to test for specific tool chain
+ features, so make sure $(CC) gets set before including any such
+ config files.
+
+ This patch replaces commit b7166e05a5 ("ColdFire: Get information from
+ the correct GCC").
+
+
+commit 27c38689d0cfde0e444239345f97b5eecc9f4067
+Date: Thu May 1 02:13:44 2008 +0200
+
+ pxa: fix previous definition on cpu init
+
+ start.S:183:1: warning: "ICMR" redefined
+ In file included from start.S:33:
+ include/asm/arch/pxa-regs.h:935:1: warning: this is the location of the previous definition
+ start.S:187:1: warning: "RCSR" redefined
+ ...
+
+
+commit 6d12e697de794d700767f22f950e3026ccf4daf6
+Date: Thu May 1 02:13:43 2008 +0200
+
+ pxa: fix pcmcia operation on 'i' may be undefined
+
+
+commit 4d77f5102dfeaa36cd58d9a9f083bd2cc491526f
+Date: Wed Apr 30 16:24:35 2008 -0500
+
+ MPC8610HPCD: Drop -O2 from the build flags
+
+ Make the flags use -Os like all other boards
+
+
+commit 0072b78be2b41e5a0ca3ddc39335574dc2e855bd
+Date: Wed Apr 30 15:50:39 2008 +0200
+
+ RTC: Fix month offset by one problem in M41T62 RTC driver
+
+ This patch fixes a problem with the month being read and written
+ incorrectly (offset by one). This only gets visible by also using
+ the Linux driver (rtc-m41t80).
+
+ Tested on AMCC Canyonlands.
+
+
+commit 141ba1cad8e6598a2466e7e2976c6a12285df619
+Date: Sat May 3 13:51:44 2008 +0900
+
+ [MIPS] cpu/mips/config.mk: Fix GNU assembler minor version picker
+
+ Current trick to pick up GNU assembler minor version uses a dot(.) as a
+ delimiter, and take the second field to obtain minor version number. But
+ as can be expected, this doesn't work with a version string which has
+ dots more than needs.
+
+ Here's an example:
+
+ $ mips-linux-gnu-as --version | grep 'GNU assembler'
+ GNU assembler (Sourcery G++ Lite 4.2-129) 2.18.50.20080215
+ $ mips-linux-gnu-as --version | grep 'GNU assembler' | cut -d. -f2
+ 2-129) 2
+ $
+
+ This patch restricts the version format to 2.XX.XX... This will work
+ in most cases.
+
+ $ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+'
+ 2.18.50.20080215
+ $ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2
+ 18
+ $
+
+
+commit ea638951acead7f1086c908c0b9f086beab82a22
+Date: Sat May 3 13:51:28 2008 +0900
+
+ [MIPS] cpu/mips/cache.S: Add dcache_enable
+
+ Recent bootelf command fixes (017e9b7925f74878d0e9475388cca9bda5ef9482,
+ "allow ports to override bootelf behavior") requires ports to have this
+ function.
+
+
+commit d2c6fbec4397c936b18cd42482b6973cd6781bdf
+Date: Thu May 1 21:30:16 2008 +0200
+
+ onenand: rename 16 bit memory copy into memcpy_16() to avoid conflicts
+
+ Onenand needs a version of memcpy() which performs 16 bit accesses
+ only; make sure the name does not conflict with the standard
+ function.
+
+
+commit 12bc4e94251c369c529ffa505cf58b148c372f7f
+Date: Wed Apr 30 22:38:17 2008 +0200
+
+ cmd_nand: fix warning: str2long ncompatible pointer type
+
+
+commit 1b9ed2574a38c93cb03dad41885fc06be4bfc9dd
+Date: Fri Apr 4 11:16:11 2008 -0500
+
+ Fix calculation of I2C clock for some 86xx chips
+
+ Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2.
+ There is no pattern that can be used to determine which chips use which
+ frequency, so the only way to determine is to look up the actual SOC
+ designation and use the right value for that SOC.
+
+
+commit f32f7fe7bd3a5bda3a476520f00e1aca7c2103a9
+Date: Wed Apr 30 12:11:19 2008 -0500
+
+ ColdFire: Fix ethernet hang issue for mcf547x_8x
+
+ The ethernet hang is caused by receiving buffer in DRAM is not
+ yet ready due to access cycles require longer time in DRAM.
+ Relocate DMA buffer descriptors from DRAM to internal SRAM.
+
+
+commit 886d90176fc257e0ab4d0db05d11d0749bbed3ca
+Date: Wed Apr 30 12:10:47 2008 -0500
+
+ ColdFire: Fix compilation issue caused by new changes in fsl_i2c.c
+
+
+commit b7166e05a513c0806b63b9dfb6f1d77645cede2a
+Date: Wed Apr 30 12:10:23 2008 -0500
+
+ ColdFire: Get information from the correct GCC
+
+
+commit 378e7ec95da4751ec8fe461baacab2bf7d2512a9
+Date: Wed Apr 30 18:02:59 2008 +0200
+
+ Fix warning in env_nand.c if compiled for DaVinci Schmoogie
+
+ Fix warnings
+
+ nv_nand.c: In function 'saveenv':
+ env_nand.c:200: warning: passing argument 3 of 'nand_write' from incompatible pointer type
+ env_nand.c: In function 'env_relocate_spec':
+ env_nand.c:275: warning: passing argument 3 of 'nand_read' from incompatible pointer type
+
+ if compiled for davinci_schmoogie_config.
+
+
+commit 33a4a70d48d622cc4950c60a84fec23b9421f23e
+Date: Wed Apr 30 13:34:40 2008 +0200
+
+ Fix warnings while compiling net/net.c for MPC8610HPCD board
+
+ MPC8610HPCD board adds -O2 gcc option to PLATFORM_CPPFLAGS
+ causing overriding default -Os option. New gcc (ver. 4.2.2)
+ produces warnings while compiling net/net.c file with -O2
+ option. The patch is an attempt to fix this.
+
+
+commit 58b575e575c25fdf8c88141e145db201f3092149
+Date: Wed Apr 30 15:23:38 2008 +0200
+
+ lwmon5: fix offset error in sysmon0 POST
+
+
+commit e7419b243a373de4ee042f7d4f45f66de787240d
+Date: Wed Apr 30 15:16:35 2008 +0200
+
+ lwmon5: fix manual merge error in POST
+
+
+commit 42ffcec3f9eba010a662d5b42981812b6bebfb9a
+Date: Wed Apr 30 17:46:26 2008 +0200
+
+ cmd_nand.c: fix another 'incompatible pointer type' warning.
+
+
+commit de109d909707e2dfe806be5efc3cdb103b47c8ad
+Date: Wed Apr 30 17:25:07 2008 +0200
+
+ Makefile: fix parallel builds
+
+ This problem shows up with parallel builds only; it results in
+ somewhat cryptic error messages like
+
+ $ JOBS=-j6 MAKEALL netstar
+ Configuring for netstar board...
+ arm-linux-ld: cannot find -lgeneric
+ make[1]: *** [eeprom.srec] Error 1
+
+ A few boards (like netstar and voiceblue) need some libraries for
+ building; however, the board Makefile does not contain any such
+ dependencies which may cause problems with parallel builds. Adding
+ such dependencies is difficult as we would also have to provide build
+ rules, which already exist in the respective library Makefiles.
+
+ To solve this, we make sure that all libraries get built before the
+ board code.
+
+
+commit 4f27098e5b0736989b13cd61d7bca94b3574cf5f
+Date: Wed Apr 30 14:51:36 2008 +0200
+
+ ppc4xx: Adapt Canyonlands fixed DDR2 setup to new DIMM module
+
+ This patch changes the Canyonlands/Glacier fixed DDR2 controller setup
+ used for NAND booting to match the values needed for the new 512MB
+ DIMM modules shipped with the productions boards:
+
+ Crucial: CT6464AC667.8FB
+
+
+commit ea9202a659dc75996facf1475f1866a19a9d3129
+Date: Wed Apr 30 10:49:43 2008 +0200
+
+ ppc4xx: Fix problem with DIMMs with 8 banks in 44x_spd_ddr2.c
+
+ This patch fixes a problem with DIMMs that have 8 banks. Now the
+ MCIF0_MBxCF register will be setup correctly for this setup too.
+
+ This was noticed with the 512MB DIMM on Canyonlands/Glacier.
+
+
+commit 76617299358ebba260ecc02d33e8e75d8d13dd3b
+Date: Tue Apr 29 23:41:06 2008 +0200
+
+ Prepare v1.3.3-rc2, again.
+
+
+commit b7fcc4c13993782342cf5cd20d237a6281648a0b
+Date: Tue Apr 29 23:35:24 2008 +0200
+
+ Prepare v1.3.3-rc2
+
+
+commit f7b16a0a4d571dd33b2b5185a54f7ddc311f89d4
+Date: Tue Apr 29 23:32:20 2008 +0200
+
+ common/env_nand.c: fix one more incompatible pointer type issue
+
+
+commit ea6f66894f952229eebfc4ad03cd21fe5c8b3f0f
+Date: Tue Apr 29 21:33:08 2008 +0200
+
+ post/board/lwmon5/sysmon.c: fix manual merge error.
+
+
+commit 70a0f81412b0b18a6fd0bea960451bc6c2cca49a
+Date: Tue Apr 29 12:54:59 2008 -0500
+
+ 85xx: Add -mno-spe to e500/85xx builds
+
+ Newer gcc's might be configured to enable autovectorization by default.
+ If we happen to build with one of those compilers we will get SPE
+ instructions in random code.
+
+ -mno-spe disables the compiler for automatically generating SPE
+ instructions without our knowledge.
+
+
+commit 8ea08e5be69436abcc95d3da114de4a2ff8a6ab5
+Date: Tue Apr 29 10:18:34 2008 -0500
+
+ Update .gitignore for zlib.h
+
+
+commit 45239cf4152109caa925145ccd433529902df887
+Date: Tue Apr 29 10:27:08 2008 -0500
+
+ 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
+
+ All the 85xx and 86xx UM describe the register as timing_cfg_3
+ not as ext_refrec.
+
+
+commit ef7d30b14394e4c4a153118f5845760cadada02a
+Date: Tue Apr 29 10:28:34 2008 -0500
+
+ 85xx/86xx: Rename DDR init address and init extended address register
+
+ Rename init_addr and init_ext_addr to match the docs between
+ 85xx and 86xx. Both now use 'init_addr' and 'init_ext_addr'.
+
+
+commit cf6cc014270549684873a5972d2595052c468cb6
+Date: Mon Apr 28 02:24:04 2008 -0500
+
+ 85xx: Additional fixes and cleanup of MP code
+
+ * adjust __spin_table alignment to match ePAPR v0.94 spec
+ * loop over all cpus when determing who is up. This fixes an issue if
+ the "boot cpu" isn't core0. The "boot cpu" will already be in the
+ cpu_up_mask so there is no harm
+ * Added some protection in the code to ensure proper behavior. These
+ changes are explicitly needed but don't hurt:
+ - Added eieio to ensure the "hot word" of the table is written after
+ all other table updates have occurred.
+ - Added isync to ensure we don't prefetch loading of table entries
+ until we a released
+
+ These issues we raised by Dave Liu.
+
+
+commit b2d527a8b9fb50afccbaf79b5540952585cdc760
+Date: Tue Apr 29 15:06:41 2008 +0200
+
+ lwmon5: minor clean-up to include/configs/lwmon5.h
+
+ LWMON5 DSPIC POST uses the watch-dog scratch register. So, make
+ the CFG_DSPIC_TEST_ADDR definition more readable.
+
+
+commit f4c4d21a885ccc222fd0acdf653b683249e85117
+Date: Tue Apr 29 16:08:05 2008 +0200
+
+ ppc4xx: Fix CFG_MONITOR_LEN on Katmai failsave this time
+
+
+commit 138105efe1d2b1a40a3a97b4c1f85c2111bea2d8
+Date: Tue Apr 29 13:32:45 2008 +0200
+
+ ppc flush_cache: add watch-dog triggering into the loops.
+
+ Some boards (e.g. lwmon5) need rather a frequent watch-dog
+ kicking. Since the time it takes for the flush_cache() function
+ to complete its job depends on the size of data being flushed, one
+ may encounter watch-dog resets on such boards when, for example,
+ download big files over ethernet.
+
+
+commit cab99d6f3281ab6784feccf98b9b425daa58418a
+Date: Tue Apr 29 14:44:54 2008 +0200
+
+ ppc4xx: Fix compilation warning in denali_spd_ddr2.c
+
+
+commit 4ec9d78fe5cd585d2868731fa108ca1e62730e70
+Date: Tue Apr 29 14:12:07 2008 +0200
+
+ ppc4xx: Fix Katmai CFG_MONITOR_LEN
+
+
+commit 85ad184b3b2b0f8af9228477303c55dca1b52ed7
+Date: Tue Apr 29 13:57:07 2008 +0200
+
+ ppc4xx: Complete remove bogus dflush()
+
+ Since the current dflush() implementation is know to have some problems
+ (as seem on lwmon5 ECC init) this patch removes it completely and replaces
+ it by using clean_dcache_range().
+
+ Tested on Katmai with ECC DIMM.
+
+
+commit 135846d6ecaad255ad28d93ebbb78b3d5da68cdc
+Date: Tue Apr 29 13:36:51 2008 +0200
+
+ ppc4xx: Change ECC initialization on lwmon5 to use clean_dcache_range()
+
+ As it seems the "old" ECC initialization routine by using dflush() didn't
+ write all lines in the dcache back to memory on lwmon5. This could lead
+ to ECC error upon Linux booting. This patch changes the program_ecc()
+ routine to now use clean_dcache_range() instead of dflush().
+ clean_dcache_range() uses dcbst which is exactly what we want in this
+ case.
+
+ Since dflush() is known is cause problems, this routine will be
+ removed completely and replaced by clean_dcache_range() with an
+ additional patch.
+
+
+commit 18ec19e4aa1a045dfbf2c7c2e33963488e92d757
+Date: Mon Apr 28 18:19:34 2008 +0200
+
+ POST: fix Makefiles for mpc8xx, lwmon, and netta POSTs.
+
+
+commit eea5a743a2193ef2a05b9bc6dc447ba241416f35
+Date: Mon Apr 28 08:47:47 2008 +0200
+
+ ppc4xx: Fixup ebc clock in FDT for 405GP/EP
+
+ On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb
+ and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc
+ doesn't exist.
+
+
+commit 2ef7503a593c77a80c2a054011970227c4b62774
+Date: Thu Apr 24 07:57:17 2008 +0200
+
+ NE2000: Fix regresssion introduced by e710185aae90 on non AX88796
+
+ Move non-inlied functions into specific drivers file
+ Set get_prom as weak
+
+
+commit 40cb90ee2b97db1f697e1b54f19a548ffc96d71b
+Date: Thu Apr 3 17:04:19 2008 +0200
+
+ net: make ARP timeout configurable
+
+ Currently the timeout waiting for an ARP reply is hard set to 5 seconds.
+ On i.MX31ADS due to a hardware "strangeness" up to four first IP packets
+ to the boards get lost, which typically are ARP replies. By configuring
+ the timeout to a lower value we significantly improve the first network
+ transfer time on this board. The timeout is specified in milliseconds,
+ later internally it is converted to deciseconds, because it has to be
+ converted to hardware ticks, and CFG_HZ ranges from 900 to 27000000 on
+ different boards.
+
+
+commit 13e0b8f7ca9d29267bf01d7a01e521a0517adce1
+Date: Thu Apr 3 13:36:18 2008 +0200
+
+ minor cs8900 driver clean up
+
+ Remove a redundant register definition, clean up some coding style
+ violations.
+
+
+commit 707fa917cca24c0f22776f48ac4a6fa5e5189b10
+Date: Mon Apr 28 22:01:04 2008 +0200
+
+ jffs2_1pass.c: fix incompatible pointer type warning
+
+
+commit 6aee00f5e6a1cf29d8fe8fdc9b7252fbd31115d9
+Date: Tue Apr 1 10:10:18 2008 +0200
+
+ lwmon5: update dsPIC POST spezification
+
+ The specification for the lwmon5 board dsPIC POST got changed.
+ Also add defines for the temperatures and voltages.
+
+
+commit 3e4615ab7ff38781a5dd80d0f49b9af55b4fe0b7
+Date: Tue Apr 1 15:13:03 2008 +0200
+
+ Fix watchdog POST for lwmon5
+
+ If the hardware watchdog detects a voltage error, the watchdog sets
+ GPIO62 to low. The watchdog POST has to detect this low level.
+
+
+commit dd5748bcd669f46aeb6686c1b341323843738ccc
+Date: Mon Apr 28 14:37:14 2008 +0200
+
+ rtl8169: fix compiler warnings
+
+ Fix multiple compiler warnings related to argument type mismatch.
+
+
+commit 413bf586266f86c6bdbc6c6d140f67a15af4c4f1
+Date: Mon Apr 28 14:36:06 2008 +0200
+
+ IDE: fix compiler warnings
+
+ The IDE driver can use 32-bit addresses in LBA mode, in which case it
+ spits multiple warnings during compilation. Fix them.
+
+
+commit db9084de28c46ac81c8f681722cb0d7411be4d7f
+Date: Mon Apr 28 14:35:57 2008 +0200
+
+ LinkStation: fix compiler warning, add a maintainer
+
+ out_8 wants a pointer to an unsigned as the first argument. Add a
+ maintainer for Linkstation boards.
+
+
+commit c71abba3cb67b063f789f17abf6c7447727c0cd5
+Date: Mon Apr 28 14:55:12 2008 +0200
+
+ cmd_nand.c: fix "differ in signedness" problem
+
+
+commit f2c288a35341ad02ac03b1563d786763c9c8f159
+Date: Mon Apr 28 12:48:47 2008 +0200
+
+ pcnet.c: fix a merge issue
+
+
+commit 4ca79f477ebd25a6872e6196d80e2f5eff441376
+Date: Mon Apr 28 12:08:18 2008 +0200
+
+ NAND: fix some strict-aliasing compiler warnings
+
+
+commit 5cd0130ecc79d6dcde1b1ac253abc457ca8c3115
+Date: Mon Apr 28 11:37:14 2008 +0200
+
+ ppc4xx: Fix compile warning of hcu4 board
+
+
+commit 5379cd15dd6c74ac51499bce3455bf6e0cdbe9f1
+Date: Mon Apr 28 11:31:23 2008 +0200
+
+ MPC8323ERDB: fix implicit declaration of function 'mac_read_from_eeprom'
+
+
+commit 7602ed50a2f0ef3dc8d7da93f116de50288f5b59
+Date: Mon Apr 28 00:25:32 2008 +0200
+
+ mx31ads: fix loadaddr environment variable define
+
+ Arithmetic expressions do not get evaluated under stringification. Remove
+ default network configuration, add DHCP command support. Thanks to Felix
+ Radensky for reporting.
+
+
+commit 144eec777ac07bcb12bd38245a5a289f694a7f98
+Date: Mon Apr 28 10:55:24 2008 +0200
+
+ katmai: fix section overlap problem
+
+ Since we didn't want to remove features from the configuration, we
+ decided to increase the U-Boot image size (add one flash sector).
+
+ Also changed the default environment definition to make it
+ independent of such changes.
+
+
+commit 941d696d25624e3cc65ebf924199541acf52d74e
+Date: Mon Apr 28 10:55:24 2008 +0200
+
+ katmai: fix section overlap problem
+
+ Since we didn't want to remove features from the configuration, we
+ decided to increase the U-Boot image size (add one flash sector).
+
+ Also changed the default environment definition to make it
+ independent of such changes.
+
+
+commit 03c6cd39f9184143fd8c537872b3d4b2e03f1466
+Date: Sat Apr 26 11:44:44 2008 -0500
+
+ post: Fix building with O=
+
+
+commit fd7531c1e9d56b9e5e06d2c0e02b798dab72f70c
+Date: Sat Apr 26 01:55:00 2008 +0200
+
+ Prepare v1.3.3-rc1
+
+
+commit 19cf2ec90d8ce52da60c1693693c4048cb810967
+Date: Sat Apr 26 01:25:39 2008 +0200
+
+ post/Makefile: make sure to use the correct flags
+
+ ARFLAGS was not set, which caused "ppc_8xx-ar: creating libgenpost.a"
+ messages to be printed.
+
+
+commit 7ed4011733e7dca8f64d21291e4294662f7dc3e2
+Date: Sat Apr 26 00:34:42 2008 +0200
+
+ Coding Style cleanup, update CHANGELOG
+
+
+commit f9204e15173834ff8d123e36279ce49c3c6c74fc
+Date: Sun Apr 20 10:38:12 2008 +0200
+
+ i.MX31: Enable SPI and MC13783/RTC support for the Litekit board
+
+ This patch enables SPI and MC13783/RTC support for the Litekit board.
+
+
+commit f97abbfb47d9e407354e157cae3f6369e460cd37
+Date: Fri Apr 25 01:08:32 2008 -0500
+
+ MPC8544DS: decode pcie3 end-point configuration correctly.
+
+
+commit 292188e15523c165c4269403fdcd33c26d89176e
+Date: Fri Apr 25 00:55:09 2008 -0500
+
+ MPC8544DS: Removes the unknown flash message information
+
+ This patch removes the unknown flash message information:
+ '## Unknown FLASH on Bank 1 - Size = 0xdeadbeef = -286261248 MB'
+ This unknown flash message is caused by PromJet.
+ Some of the board user is unhappy with this information.
+
+
+commit b2115757403beef0ac6bc2c6c3b24f31256a75d2
+Date: Thu Apr 24 14:07:38 2008 -0500
+
+ mpc83xx: bump loadaddr over fdtaddr to 0x500000
+
+ this seems as a good compromise between human memory, typing,
+ and last but not least, to accommodate for current and future kernel bloat.
+
+
+commit be5a7190265a34d968578ff266549c60f6f57654
+Date: Tue Apr 15 13:12:23 2008 +0800
+
+ mpc83xx: clean up the readme for 83xx boards
+
+ 1. correct the typo
+ 2. correct the memory map for 837xerdb board
+
+
+commit bcae52a6819ee9dad5d0d96cd7daeb20108d45ff
+Date: Tue Apr 15 13:11:11 2008 +0800
+
+ mpc83xx: remove the unused CPM's stuff
+
+ The MPC83xx family never have CPM block, so remove it from 83xx.
+
+
+commit c63ad6325a8ac0097a54b418a3288926b0484b18
+Date: Fri Apr 18 16:29:40 2008 +0200
+
+ cfi-flash: Add CFG_FLASH_AUTOPROTECT_LIST
+
+ This patch adds a configurable flash auto protection list that can be used
+ to make U-Boot protect flash regions in flash_init().
+
+ The idea has been discussed on the u-boot mailing list starting
+ on Nov 18th, 2007.
+
+ Even this patch brings a new feature it is used as a bugfix for 4xx
+ platforms where flash_init() does not completely protect the
+ monitor's flash range in all situations.
+
+ U-Boot protects the flash range from CFG_MONITOR_BASE to
+ (CFG_MONITOR_BASE + monitor_flash_len - 1) by default. This does not
+ include the reset vector at 0xfffffffc.
+
+ Example:
+ #define CFG_FLASH_AUTOPROTECT_LIST {{0xfff80000, 0x80000}}
+
+ This config option will auto protect the last 512k of flash that
+ contains the bootloader on board like APC405 and PMC405.
+
+
+commit d0d91ae3acb4f29d1a2a3a766747478ed54e2848
+Date: Fri Apr 25 13:59:03 2008 +0200
+
+ ppc4xx: Remove double defines in lwmon5.h
+
+ introduced with latest lwmon5/POST merge
+
+
+commit 7590378fb9c686709492ceb142825cd058255956
+Date: Fri Apr 25 13:54:02 2008 +0200
+
+ Use watchdog-aware functions when calculating hashes of images - take two
+
+ Some files didn't get updated properly with the "Use watchdog-aware
+ functions when calculating hashes of images" commit, this commit
+ fixes this.
+
+
+commit 8e048c438e20ec89b49da5f085f8f756eba6e587
+Date: Fri Apr 25 12:01:39 2008 +0200
+
+ ppc4xx: Add bootcount limit handling for APC405 boards
+
+
+commit 1de6b28be5d107ae90ad7a8a43653c49966e8afe
+Date: Fri Apr 25 12:10:09 2008 +0200
+
+ Use watchdog-aware functions when calculating hashes of images
+
+
+commit d00ce09040d3100e2c7998ef56db62c2d20d9ee3
+Date: Fri Apr 25 12:44:08 2008 +0200
+
+ USB: fix more GCC 4.2.x aliasing warnings
+
+
+commit aff4f86448f6586930f0a3be7fc4b0ddcf450980
+Date: Fri Apr 25 12:41:53 2008 +0200
+
+ lib_generic/crc32.c: add missing #include <watchdog.h>
+
+
+commit 03ccdbcd5602610cea4bd0db7e48e1ef881a51ef
+Date: Fri Apr 25 11:52:21 2008 +0200
+
+ lib_generic/crc32.c: fix compile problem
+
+
+commit 24bfedbd0be4dcaa94861407820d6a70fea7e03b
+Date: Tue Apr 22 12:20:32 2008 +0200
+
+ ppc4xx: Pass PCIe root-complex/endpoint configuration to Linux via the fdt
+
+ The PCIe root-complex/endpoint setup as configured via the "pcie_mode"
+ environment variable will now get passed to the Linux kernel by setting
+ the device_type property of the PCIe device tree node. For normal root-
+ complex configuration it will keep its defaults value of "pci" and for
+ endpoint configuration it will get changed to "pci-endpoint".
+
+
+commit eb0615bf600d2caf5aa2958f47f5ba364c52d5e7
+Date: Thu Apr 24 10:30:53 2008 +0200
+
+ lwmon5: watchdog POST fix
+
+ Use the GPT0_MASKx registers as the temporary storage for watch-dog
+ timer POST test instead of GPT0_COMPx. The latter
+ (GPT0_COMP1..GPT0_COMP5) are used for the log-buffer header.
+
+
+commit 78e488298824bc150b5f3ebf7958cd71fa2af1b9
+Date: Mon Apr 21 18:10:14 2008 -0500
+
+ lib_ppc: Revert "Make MPC83xx one step closer to full relocation."
+
+ This reverts commit 70431e8a7393b6b793f77957f95b999fc9a269b8 which has
+ proven problematic getting right from the start at least on 83xx and
+ 4xx.
+
+
+commit a99715b8ebfc500f3f40e01b36b64d473938443d
+Date: Fri Apr 18 14:50:01 2008 +0200
+
+ Realining some header definitions.
+
+
+commit 4acbc6c7f993cae409c424615415a3e76820f13d
+Date: Thu Apr 24 07:57:16 2008 +0200
+
+ NE2000: coding style cleanup
+
+
+commit b4aff1ffaf7120032c653357c007faa14f74d29d
+Date: Wed Apr 23 00:11:47 2008 +0900
+
+ qemu-mips.h: Add CFI support
+
+ CONFIG_ENV_OVERWRITE is also added.
+
+ This patch is originally created by Jean-Christophe PLAGNIOL-VILLARD.
+
+
+commit 4a1f11b45a82908e5b0df602d703082413a6b7ed
+Date: Tue Apr 22 22:47:27 2008 +0900
+
+ doc/README.mips: Add MIPS notes
+
+
+commit 215b01bba8bc662d35f72b084700b192d367dfb4
+Date: Tue Apr 22 12:27:56 2008 +0200
+
+ Add support for calculating hashes with watchdog triggering
+
+ Implement watchodg-aware variants of hash calculation functions:
+ - crc32_wd()
+ - md5_wd()
+ - sha1_csum_wd()
+ The above functions calculate the hash of the input buffer in chunks,
+ triggering the watchdog after processing each chunk. The chunk size
+ is given as a function call parameter.
+
+
+commit 8875e3abab986df930167ce5c1ac4f95dcacc81c
+Date: Wed Apr 23 11:02:12 2008 +0900
+
+ qemu-mips: Cleanup whitespace, indentation, etc.
+
+ No functional change.
+
+ This patch was originally submitted by Jean-Christophe PLAGNIOL-VILLARD.
+ Then I re-created from scratch, and changed more lines than the original.
+
+
+commit 386563197e3a50b0e97ad9aae87f57d9aab909ab
+Date: Wed Oct 10 23:02:09 2007 +0300
+
+ Fixed pcnet io_base
+
+ Bus and phys address are not always the same
+
+
+commit 11ea26fd1cb63c91403fe04a6eea975cd418603f
+Date: Thu Apr 24 23:44:26 2008 +0200
+
+ drivers/net/pcnet.c: Coding Style cleanup.
+
+
+commit 899ef7b84578b7cafadfd78488c2fd2aac93f636
+Date: Wed Oct 10 23:04:23 2007 +0300
+
+ Added Am79C970A chip id to pcnet
+
+
+commit 17c9de6bb33f676eb776dcbfc46fc1b14c3871a5
+Date: Sun Apr 20 10:35:03 2008 +0200
+
+ i.MX31: Fix architecture numbers for ADS and Litekit boards
+
+ Correct the Linux architecture number for i.MX31 Litekit and ADS boards.
+
+
+commit e7ae84d6c7288790e88639f57cb60daf89c11369
+Date: Sun Apr 20 10:36:36 2008 +0200
+
+ i.MX31: Use symbolic names for Litekit membases.
+
+ Use symbolic names instead of hard coded addresses for Litekit membases.
+
+
+commit 2ef1d9b6030d02f576b1bcd9fec948e602522012
+Date: Sat Apr 19 17:59:20 2008 +0200
+
+ Fix show_boot_progress prototype
+
+ in commit fad634071 "make show_boot_progress () weak."
+ show_boot_progress is supposed to be declared as weak but declared as
+ inline instead.
+
+
+commit edbed247a14d70b94958010f736621212285de91
+Date: Fri Apr 18 12:39:23 2008 +0200
+
+ Memory footprint optimizations
+
+ As suggested by Wolfgang Denk:
+ - image printing functions:
+ - remove wrappers
+ - remove indentation prefix from functions' signatures
+ - merge getenv_verify and getenv_autostart into one parametrized function
+
+
+commit 0a0b606faaec4afb3f750b09aa4df1e40a39dcb8
+Date: Tue Apr 15 13:33:11 2008 +0200
+
+ MX31ADS environment variable update, spi and rtc support
+
+ Update MX31ADS default environment to better match the flash layout and
+ the memory map, support SPI and RTC.
+
+
+commit 022f12163595b9a55380c6d77c3119b93d6a9a4b
+Date: Mon Apr 21 09:28:36 2008 -0500
+
+ 85xx: Round up frequency calculations to get reasonable output
+
+ eg. because of rounding error we can get 799Mhz instead of 800Mhz.
+
+ Introduced DIV_ROUND_UP and roundup taken from linux kernel.
+
+
+commit 876b8f978982216ab4a22dcd9efddfcd9b0e04e6
+Date: Wed Apr 23 16:58:04 2008 -0500
+
+ fsl_pci: Only modify registers if we have them
+
+ pme_msg_det exists only on PCIe controllers only set it if we are a "bridge".
+
+
+commit 83fe32334337def160b302aa9d152d808bfcc68e
+Date: Wed Apr 23 10:57:33 2008 +0200
+
+ USB: remove a cpu bug workaround for an unsupported architecture.
+
+
+commit f957576cb53e6cfab412709cfc8db1afd39d21c3
+Date: Wed Apr 23 10:53:23 2008 +0200
+
+ USB: fix those pesky aliasing warnings issued by gcc-4.2
+
+
+commit 89cdab788f3716b335fefb60b836ebcf975aceab
+Date: Mon Mar 31 11:02:01 2008 -0400
+
+ crc32: use uint32_t rather than unsigned long
+
+ The envcrc.c does sizeof(unsigned long) when calculating the crc, but
+ this is done with the build toolchain instead of the target tool
+ chain, so if the build is a 64bit system but the target is 32bits,
+ the size will obviously be wrong. This converts all unsigned long
+ stuff related to crc32 to uint32_t types. Compile tested only: output
+ of ./tools/envcrc when run on a 32bit build system matches that of a
+ 64bit build system.
+
+
+commit 80c40b765b3642ddb9f3392b7898715aab44a29c
+Date: Wed Mar 26 09:53:29 2008 +0100
+
+ ARM: Davinci: Fix DM644x timer overflow handling and cleanup
+
+ Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code.
+
+ Changes:
+
+ - Remove *_masked() functions as noted by Wolfgang
+
+ - Adapt register naming to recent TI spec (sprue26, March 2007)
+
+ - Fix reset_timer() handling
+
+ - As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this.
+
+ [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
+
+ - Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV).
+
+
+ Patch is compile tested with davinci_dvevm & sonata & schmoogie configuration and tested by Pieter on DaVinci EVM hardware.
+
+
+commit a6e6fc610e39dec41b79680413d4ed38145bd3c8
+Date: Wed Apr 9 16:09:41 2008 +0200
+
+ Added watchdog triggering calls in the "mtest" test function.
+
+
+commit d32a874b9b4c1e949ee38be7790f6bf6d6143451
+Date: Sun Apr 6 19:19:14 2008 +0200
+
+ lwmon5 watchdog: limit trigger rate
+
+ Limit the rate of h/w watch-dog triggering on the LWMON5 board by
+ the CONFIG_WD_MAX_RATE value.
+
+ Note that an earlier version of this patch which used microseconds
+ instead of ticks dis not work. The problem was that we used
+ usec2ticks() to convert microseconds into ticks. usec2ticks() uses
+ get_tbclk(), which in turn calls get_sys_info(). It turns out that
+ this function does a lot of prolonged operations (like divisions)
+ which take too much time so we do not trigger the watchdog in time,
+ and it resets the system.
+
+
+commit 2d2b994a30bb100774dc747ae9865b7f95285a88
+Date: Mon Mar 31 10:51:37 2008 +0200
+
+ POST: move CONFIG_POST to Makefiles
+
+ Introduce the new logical option CONFIG_HAS_POST which is set when the
+ platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles
+ to determine should the POST libs be compiled for the selected target
+ platform, or not.
+
+ To avoid breaking u-boot linking process, the empty post/libpost.a file is
+ created for platforms which do not have POSTs.
+
+
+commit 0a51e9248e2d27e0a02ef1e740c576ce90a39ee1
+Date: Mon Mar 31 10:49:34 2008 +0200
+
+ POST: preparations for moving CONFIG_POST to Makefiles
+
+ Remove CONFIG_POST ifdefs from the post/ source files.
+
+
+commit 5d40d4430d9ebc8434c6f0798594836e1efa7a1e
+Date: Tue Apr 22 14:14:20 2008 +0200
+
+ ppc4xx: Fix Canyonlands and Glacier default environment for fdt usage
+
+ This patch fixes the Canyonlands and Glacier default environment to better
+ fit to the arch/powerpc device-tree kernels. The variables dealing with
+ arch/ppc booting are removed, since these boards are supported only in
+ arch/powerpc. Glacier uses the same config file as Canyonlands.
+
+ Also, the Glacier now uses non-FPU rootpath, since 460GT has no FPU.
+
+
+commit b789cb4a4c0c1deff82053539cfe29a9c6e23f8b
+Date: Tue Apr 22 14:06:42 2008 +0200
+
+ ppc4xx: Small coding style cleanup for the latest esd patches
+
+
+commit 79941d63bc03aed8c48d7602f18217cc200ee931
+Date: Mon Apr 21 18:01:07 2008 +0200
+
+ ppc4xx: Update CPU strapping for PMC440 boards
+
+ This patch removes the temporary 'test' strapping option
+ of the sbe command. The '667' strapping option now uses
+ a PLB/PCI divider of 3.
+
+
+commit f00cf3193a6635355b121e90debb2f54e777e7da
+Date: Mon Apr 21 14:42:21 2008 +0200
+
+ ppc4xx: Remove unused APC405 strataflash driver
+
+ The APC405 board support has been migrated to use the common
+ CFI flash driver.
+
+
+commit 1c686676a86473bbd92151f0544e109413f6ed06
+Date: Mon Apr 21 14:42:17 2008 +0200
+
+ ppc4xx: Update APC405 configuration
+
+ - enable esd's auto_update mechanism
+ - support alternative flash layout on rev. 1.8 boards
+ - update default environment
+ - use common CFI flash driver
+ - coding style cleanup
+
+
+commit 0b9872515a521bf7866dc24b85ddce708e60d702
+Date: Mon Apr 21 14:42:11 2008 +0200
+
+ ppc4xx: Update APC405 board support
+
+ - enable esd's auto_update mechanism
+ - fix LCD support on latest hardware revision (uses other LCD controller)
+ - support alternative flash layout on rev. 1.8 boards
+ - coding style cleanup
+
+
+commit 83975d02e225e231960784972e7820a8b303756b
+Date: Mon Apr 21 14:42:06 2008 +0200
+
+ ppc4xx: update esd's common auto_update code for 405 boards
+
+ - Coding style cleanup (long lines)
+ - improve handling of protected flash regions
+ - remove dead code
+
+
+commit b9233fe5d59cb25d975071616bd1035d6f4c2285
+Date: Mon Apr 21 14:41:59 2008 +0200
+
+ ppc4xx: Update esd's common LCD code for 405 boards
+
+ - Coding style cleanup (long lines)
+ - Add s1d13505 support
+ - Make some functions return a result code instead of void
+
+
+commit dea68189424c3f1242427a8146a3861bf093173c
+Date: Mon Apr 21 11:36:55 2008 +0200
+
+ ppc4xx: Update FPGA image for APC405 boards
+
+
+commit 2a05b152924acfcec3b037693329e517e6d3578f
+Date: Mon Apr 21 11:36:08 2008 +0200
+
+ ppc4xx: Update bootlogo for APC405 boards
+
+
+commit 8deafdc6ad368368cf03b58cab4bd39f45d64b5c
+Date: Fri Apr 18 16:41:31 2008 +0200
+
+ ppc4xx: Add dcache_enable() for 440
+
+ dcache_enable() was missing for 440 and the patch
+ 017e9b7925f74878d0e9475388cca9bda5ef9482 ["allow ports to override bootelf
+ "] behavior uses this function.
+
+ Note: Currently the cache handling functions like
+ d/icache_disable/enable() are NOP's on 440. This may be changed in the
+ future.
+
+
+commit a49e0d177a0749614b316ec847fb623f09c82c07
+Date: Mon Apr 21 11:19:04 2008 +0200
+
+ video: Add missing free for logo memory
+
+ This patch adds two missing free()s.
+
+
+commit 84c01d3a05ae3aca5f7c0c13a31ca72ba1199a42
+Date: Mon Sep 24 16:41:43 2007 -0700
+
+ PATCH - Fix oob data copied into supplied buffer
+
+ This patch correctly sets the oobavail variable
+ and fixes a bug where the oob data was not valid when
+ there where multiple groups in oobfree.
+
+ First segment fixes a typo
+ Second segment fixes a bug where oob data may be copied incorrectly.
+ Third segment adds an error message when exiting due to write protect.
+ Forth segment fixes a bug where oobavail may be set incorrectly.
+
+
+commit e1d09680f64b452adde89ed9fe28a77c56bedc9a
+Date: Fri Apr 18 17:24:32 2008 +0200
+
+ ppc4xx: Fix sys_get_info() for 405GP(r)
+
+ This patch assigns the correct EBC clock for 405GP(r) CPUs
+ to PPC4xx_SYS_INFO structure. Without this patch U-Boot
+ uses an uninitialized EBC clock in its startup message.
+
+
+commit dc7746d86d2a3dfe01ab9a70cb427f92adc303c7
+Date: Sun Apr 20 15:39:38 2008 -0700
+
+ Makefile: remove nand_spl/System.map when cleaning up.
+
+commit d9a42c0ace4d4f9cb061d62a7265d1780f90447b
+Date: Sun Apr 20 15:35:52 2008 -0700
+
+ MAKEALL: sort entries / lists.
+
+
+commit 0878af169b181868a105b5c33f3a6423e2c9fd60
+Date: Fri Apr 18 11:29:01 2008 -0500
+
+ 85xx: Fix size of cpu-release-addr property
+
+ The cpu-release-addr is defined as always being a 64-bit quanity regardless
+ if we are running on a 32-bit or 64-bit machine.
+
+commit 88353a985109562a639b2f8a0c90d77011bfe374
+Date: Fri Apr 4 11:15:58 2008 -0500
+
+ Fix calculation of I2C clock for some 85xx chips
+
+ Some 85xx chips use CCB as the base clock for the I2C. Some use CCB/2, and
+ some use CCB/3. There is no pattern that can be used to determine which
+ chips use which frequency, so the only way to determine is to look up the
+ actual SOC designation and use the right value for that SOC.
+
+ Update immap_85xx.h to include the GUTS PORDEVSR2 register.
+
+
+commit 1e01477aeaf409ddb97e2633aab9cf8c9c60612e
+Date: Fri Apr 18 11:44:27 2008 -0700
+
+ Fix build breakage casued by commit c0559be371b2
+
+ Change env_get_char from a global function ptr to a function.
+
+
+commit 268a804d7e2fa07b64211fd2f9a9615db4539f23
+Date: Fri Apr 18 10:53:41 2008 -0700
+
+ Coding Style cleanup, update CHANGELOG.
+
+
+commit 92bad20ad74b70adf3839df9a0a47cce000ac3d7
+Date: Tue Apr 8 14:00:57 2008 -0400
+
+ Add support for u-boot in svn and localversion-* files
+
+
+commit d23ff6827decf121461fbc5622612fd7effe207e
+Date: Thu Apr 3 17:04:22 2008 +0200
+
+ MX31ADS network and flash updates
+
+ This patch allows U-Boot to use buffered writes to the Spansion NOR
+ flash installed on this board, and eliminates long delays in network
+ transfers after the board startup.
+
+ Also modify flash layout to embed main and redundant environment
+ blocks in the U-Boot image.
+
+
+commit b5dc9b304d289831f291843ff88a45cbdf1a6290
+Date: Mon Apr 14 10:53:12 2008 +0200
+
+ Support for the MX31ADS evaluation board from Freescale
+
+ This patch adds support for the MX31ADS evaluation board from Freescale,
+ initialization code is copied from RedBoot sources, also provided by
+ Freescale.
+
+
+commit 499e7831e1baaac6bfb959213f1950c216fbc5ba
+Date: Tue Apr 8 10:33:29 2008 +0200
+
+ ppc4xx: Change Canyonlands to support booting from 2k page NAND devices
+
+
+commit 5e182dce04d68cc94407a1b1fa09307f2bb96719
+Date: Tue Apr 8 10:33:28 2008 +0200
+
+ ppc4xx: Adjust Canyonlands fixed DDR2 setup (NAND booting) to 512MB SODIMM
+
+
+commit fe7c0db6b2a9004f96c2a2d4fff2849e19c2d825
+Date: Tue Apr 8 10:33:27 2008 +0200
+
+ ppc4xx: Add Glacier NAND booting target
+
+
+commit 46f373838e384a4c23d13581b1dfa5acb66b5810
+Date: Tue Apr 8 10:31:00 2008 +0200
+
+ nand_spl: Update nand_spl to support 2k page size NAND devices
+
+ This patch adds support for booting from 2k page sized NAND device
+ (e.g. Micron 29F2G08AAC).
+
+ Tested on AMCC Canyonlands.
+
+
+commit 5e3dca577b7c1bf58bd2b48449b18b7e7dcd8e04
+Date: Thu Apr 17 18:18:00 2008 +0200
+
+ Fix crash on sequoia in ppc_4xx_eth_init
+
+ Currently U-Boot crashes in ppc_4xx_eth_init on sequoia
+ with cache enabled (TLB Parity exeption). This patch
+ fixes the problem.
+
+
+commit accf7355767dc7f6b85d88bb1c75c9d95e84ba5b
+Date: Thu Apr 17 18:15:27 2008 +0200
+
+ ppc4xx: Fix crash on sequoia with cache enabled
+
+ Currently U-Boot crashes on sequoia board in CPU POST if
+ cache is enabled (CONFIG_4xx_DCACHE defined). The cache
+ won't be disabled by change_tlb before CPU POST because
+ there is an insufficient adress range check since
+ CFG_MEM_TOP_HIDE was introduced. This patch tries to fix
+ this problem.
+
+
+commit 43c509254fab375c49936498da944658117ed07c
+Date: Thu Apr 17 23:35:13 2008 +0900
+
+ Use jr as register jump instruction
+
+ Current assembler codes are inconsistent in the way of register jump
+ instruction usage; some use jr, some use j. Of course GNU as allows both
+ usages, but as can be expected from `Jump Register' the mnemonic `jr' is
+ more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
+ at all.
+
+
+commit 7ce63709828d37b08866e537339a169bd0db2bd3
+Date: Tue Apr 15 14:15:30 2008 +0200
+
+ RTC driver for MC13783
+
+ MC13783 is a multifunction IS with an SPI interface to the host. This
+ driver handles the RTC controller in this chip.
+
+
+commit 38254f45b0b412332726c90d3184ad47479fcffb
+Date: Tue Apr 15 14:14:25 2008 +0200
+
+ New i.MX31 SPI driver
+
+ This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
+ only implemented and tested on i.MX31, can with a modified register layout
+ and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
+ controllers too.
+
+
+commit 7064122c2eef92f02a03ef37a1a1c07e70cd4e38
+Date: Tue Apr 15 19:09:10 2008 +0200
+
+ Fix name of i.MX31 boards in config file header
+
+ Correct the name of the i.MX31 Litekit and phyCORE boards in config files.
+
+
+commit a49864593e083a5d0779fb9ca98e5a0f2053183d
+Date: Sun Apr 13 19:42:19 2008 -0400
+
+ allow ports to override go behavior
+
+ Split the arch-specific logic out of the common go code and into a dedicated
+ weak function called do_go_exec() that lives in cpu directories. This will
+ need review from i386/nios people to make sure I didn't break them.
+
+commit 017e9b7925f74878d0e9475388cca9bda5ef9482
+Date: Sun Apr 13 19:42:18 2008 -0400
+
+ allow ports to override bootelf behavior
+
+ Change the bootelf setup function into a dedicated weak function called
+ do_bootelf_exec. This way ports can control the behavior however they
+ like before/after calling the ELF entry point.
+
+commit a4b46ed6b3502335c3f3a5d672abe0bcb44f20b7
+Date: Sat Apr 12 20:56:03 2008 +0200
+
+ Reorder ARM boards in Makefile
+
+ Rearrange ARM boards in Makefile so that ARM926EJ-S boards
+ are no longer under ARM92xT header.
+
+
+commit c3a60cb3bd67e120fc99b6ba88d9295c3c07f688
+Date: Sat Apr 12 20:29:44 2008 +0200
+
+ Clean up dataflash partitioning
+
+ This patch removes the board dependent parts from
+ "drivers/mtd/dataflash.c".
+ Each board relying on this, will have the appropriate
+ code in a new file, "partition.c" in the board directory.
+ board Makefiles updated to use the file.
+
+ The dataflash partitions are aligned on sector/page boundaries.
+
+ The CONFIG_NEW_DF_PARTITION was used to create named partitions
+ This is now the default operation, and the CONFIG variable is removed.
+
+
+commit 51ecde946fec511a16346e498204ca10ad71080d
+Date: Sat Apr 12 14:08:45 2008 +0200
+
+ gitignore: udpate stgit generated and .patch file
+
+
+commit 66e39818e95f51ee1c1dd2094407a8929543fa6d
+Date: Fri Apr 18 00:15:36 2008 -0700
+
+ Get rid of redundant copy of renamed header file.
+
+
+commit c3aafd8cf814e33a77de81c2f22b8c772216a3cc
+Date: Fri Apr 11 21:20:14 2008 +0300
+
+ Fix dependency generation for older gcc versions
+
+ With gcc 3.3.3 at least, compilation fails with
+
+ Generating include/autoconf.mk
+ gcc: compilation of header file requested
+ make: *** [include/autoconf.mk] Error 1
+
+ since commit 16fe77752eee099b9fb61ed73460e51cc94b37ba.
+
+
+commit cb1c4896905ab22fcd982e6a8a539f0031942e71
+Date: Fri Apr 11 11:07:49 2008 +0200
+
+ Restore the ability to continue booting after legacy image overwrite
+
+ Before new uImage code was merged, bootm code allowed for the kernel image to
+ get overwritten during decompresion. new uImage introduced a check for image
+ overwrites and refused to boot the image that got overwritten. This patch
+ restores the old behavior. It also adds a warning when the image overwriten is
+ a multi-image file, because in such case accessing componentes other than the
+ first one will fail.
+
+
+commit de2b3216e6b4f3b2fe93759c05b17504f9dfe036
+Date: Fri Apr 11 11:07:43 2008 +0200
+
+ ppc: Fix ftd_blob variable init when processing raw blob
+
+ Set fdt_blob variable before its value is printed out.
+
+
+commit 3d36be030043cd841a2551d00a395135e363a64b
+Date: Thu Apr 10 14:30:16 2008 -0500
+
+ Remove all the search paths from the .lds files.
+
+ The cross compiler is responsible for providing the correct libraries
+ and the logic to find the linking libraries.
+
+
+commit 7d721e34ae6be7d7db63e8d060a246278bb7ae58
+Date: Mon Apr 14 15:44:16 2008 +0200
+
+ Boot-related documentation update
+
+ - document 'bootm_low' and 'bootm_size' environment variables
+ - update inaccurate CFG_BOOTMAPSZ entry
+
+
+commit a6f0bd9f2b1971e2a61ac0fd1fc2c96cb7a4b67a
+Date: Wed Apr 9 17:34:08 2008 +0200
+
+ Fix regression introduced by a typo in "Tidied other cpu/arm920t/start.S code"
+
+ Restore logic reverted by commit
+
+ commit 80767a6cead9990d9e77e62be947843c2c72f469
+ Date: Wed Sep 5 16:04:41 2007 +0100
+
+ Changed API name to coloured_led.h
+ Removed code using deprecated ifdef CONFIG_BOOTBINFUNC
+ Tidied other cpu/arm920t/start.S code
+
+
+commit e25cb8d3f4fcc265a9cdf8e9d577b59bdb64bbaf
+Date: Tue Apr 8 10:24:24 2008 -0400
+
+ Remove conflicting NAND ID
+
+ There are two NAND entries with ID 0xDC and this obviously causes problems.
+ In the kernel, they punted the first entry, so we should do the same.
+
+ See this upstream e-mail for more info:
+ http://lists.infradead.org/pipermail/linux-mtd/2007-July/018795.html
+
+
+commit 188e94c370621708d13547d58dbc6ed3c5602aa8
+Date: Tue Apr 8 16:20:35 2008 +0900
+
+ cpu/mips/cpu.c: Fix flush_cache bug
+
+ Cache operations have to take line address (addr), not start_addr.
+ I noticed this bug when debugging ping failure.
+
+
+commit 8f2a68a07c058fca1d413e54f71c2e7e78a74ed4
+Date: Thu Apr 3 14:29:01 2008 +0200
+
+ TQM5200: fix default IDE reset level
+
+ Before the first call of ide_reset(), the level of the IDE reset
+ signal on the TQM5200 is low (reset asserted). This patch sets the
+ default value to high (reset not asserted).
+
+ Currently this patch fixes no real problem, but it is cleaner to
+ assert the reset signal only on demand, and not permanently.
+
+
+commit c61e033d6e8abb7b4060ee36060961e1399f6079
+Date: Thu Apr 3 14:18:48 2008 +0200
+
+ mgcoge, mgsuv: realign CONFIG_EXTRA_ENV_SETTING
+
+
+commit f308572e19eb7fe63aa3d41f214cde4c23c9800f
+Date: Thu Apr 3 14:18:47 2008 +0200
+
+ mgcoge, mgsuv: rename 'addcon' to 'addcons'
+
+ The latter name with 13 users is already established, so we will use
+ that.
+
+
+commit e175eacc87c3a9e4dad0799fee0e95732520afc7
+Date: Thu Apr 3 13:37:56 2008 +0200
+
+ IDE: fix bug in reset sequence
+
+ According to the ata (ata5) specification the RESET- signal
+ shall be asserted for at least 25 us. Without this patch,
+ the RESET- signal is asserted on some boards for only < 1 us
+ (e. g. on the TQM5200). This patch adds a general delay of
+ 25 us to the RESET- signal.
+
+ Without this patch a Platinum 4 GiB CF card is not recognised
+ properly on boards with a TQM5200 (STK52xx, TB5200).
+
+
+commit 813bea96a960916c72b4a3a7df840151529c26ce
+Date: Thu Apr 3 14:43:11 2008 +0200
+
+ lwmon5: disable CONFIG_ZERO_BOOTDELAY
+
+
+commit 53eec6f1d25932e76d63ccb14082792b0b96bf41
+Date: Wed Apr 2 08:03:58 2008 +0200
+
+ ds174x: Fix warning on return in rtc_get and rtc_set functions
+
+
+commit a253b38bf50c85227c33ca0febc870ee49d1588e
+Date: Wed Apr 2 08:03:57 2008 +0200
+
+ cmd_log.c: Fix assignment differ in signedness
+
+ In function 'logbuff_init_ptrs':
+ cmd_log.c:79: warning: pointer targets in assignment differ in signedness
+
+
+commit 6c0e9a8f1cc090fbfbc6f86b6b4fd17a1628f3df
+Date: Wed Apr 2 11:04:43 2008 +0530
+
+ Remove duplicate #undef SHOW_INFO in drivers/usb/usb_ohci.c
+
+
+commit 478d5ec9ae3cbcc6040241d2d73dbbc61fe9b49d
+Date: Tue Apr 1 14:07:10 2008 +0200
+
+ s3c4510b_eth: fix 'packed' attribute ignored for fields of MACFrame
+
+
+commit c08fb3ea36d19b1640b7906264581e9105534399
+Date: Tue Apr 15 10:24:14 2008 +0200
+
+ Additional PCI IDs for IDE and network controllers
+
+ These PCI IDs are required by the Linkstation platforms.
+
+
+commit c0559be371b2a64b1a817088c3308688e2182f93
+Date: Mon Apr 14 23:01:50 2008 +0200
+
+ Change env_get_char from a global function ptr to a function.
+
+ This avoids an early global data reference.
+
+
+commit 3e0f331c05d72f140715c1e9fca991927e44d422
+Date: Tue Apr 29 12:35:08 2008 +0000
+
+ Clean up smsc911x driver
+
+ Replace direct register address derefencing with accessor functions.
+ Restrict explicitly 32-bit bus-width, extend affected configurations
+ respectively.
+
+
+commit de1b686b763aa8b87a86f6748ce9169e7fc0e4cd
+Date: Tue Apr 15 00:08:20 2008 -0400
+
+ This patch adds a driver for the following smsc network controllers:
+ LAN9115
+ LAN9116
+ LAN9117
+ LAN9215
+ LAN9216
+ LAN9217
+
+
+commit 3dfd4aab929cccddb63d9ea509967861e1333b52
+Date: Tue Apr 1 15:13:03 2008 +0200
+
+ Fix watchdog POST for lwmon5
+
+ If the hardware watchdog detects a voltage error, the watchdog sets
+ GPIO62 to low. The watchdog POST has to detect this low level.
+
+
+commit 24b448448a917e52806f82660a5c9d47608894fb
+Date: Tue Apr 1 15:22:11 2008 +0800
+
+ ata: update the libata.h from ata.h of linux kernel
+
+ Current libata.h of u-boot is out of sync from linux kernel,
+ this patch make it be consistent with linux kernel.
+
+
+commit f8f9dc98883f66f59eb0601da65808e6b139c87c
+Date: Mon Mar 31 11:59:27 2008 -0500
+
+ Allow use of ARCH=powerpc when building
+
+ The linux kernel is now mostly ARCH=powerpc, so to make life easier
+ allow use to use ARCH=powerpc and convert it to ARCH=ppc.
+
+
+commit 8af657d2c6d1ca4f2f76973531394d4578ba2ef0
+Date: Mon Mar 31 10:40:54 2008 +0900
+
+ Add apollon board MAINTAINERS entry
+
+
+commit 77e475cc0ed1832160017d364be32a0be9ff02a9
+Date: Mon Mar 31 10:40:36 2008 +0900
+
+ Fix OneNAND read
+
+ It should access with 16-bit instead of 8-bit
+
+ Now it uses the generic memcpy with 8-bit access. It means it reads wrong data from OneNAND.
+
+
+commit a9da2b41079d230db3a5641625311983f85ce1fb
+Date: Mon Mar 31 10:40:19 2008 +0900
+
+ Fix OneNAND erase command
+
+ It mis-calculates the block address.
+ Also fix DECLARE_GLOBAL_DATA_PTR in env_onenand.
+
+
+commit 61525f2ffa156665a66908fda47dbf29d65ea579
+Date: Mon Mar 31 01:32:15 2008 +0200
+
+ Support for LinkStation / KuroBox HD and HG PPC models
+
+ This patch is based on the port by Mihai Georgian (see linkstation.c for
+ Copyright information) and implements support for LinkStation / KuroBox HD
+ and HG PPC models from Buffalo Technology, whereby HD is deactivated at
+ the moment, pending network driver fixing.
+
+ Notice to users: this is pretty much a barebone port. Support for network
+ on HG models is already in the U-Boot mainline, but you might also want
+ patches to switch fan / phy modes depending on the negotiated ethernet
+ parameters. This patch also doesn't support console switching, booting EM
+ mode, Buffalo specific ext2 magic number. So, if you want to use any of
+ those, you need additional patches. Otherwise this patche provides a fully
+ functional u-boot with a network console on your system.
+
+
+commit 0f3ba7e9783f352318f197a3148f6d5cc3d75bea
+Date: Sun Mar 30 01:22:13 2008 -0500
+
+ Add CONFIG_MII_INIT support to related boards
+
+ Replace CONFIG_8xx and CONFIG_MCF532x to CONFIG_MII_INIT in
+ cmd_init.c. Add CONFIG_MII_INIT to board configuration files
+ that use mii_init() in cmd_init.c.
+
+
+commit f33fca22e76f20e4e4793810ca7a06a4805a6cf4
+Date: Sun Mar 30 01:19:06 2008 -0500
+
+ Update CONFIG_PCIAUTO_SKIP_HOST_BRIDGE to related boards
+
+ Remove test for CONFIG_MPC5200 in drivers/pci/pci_auto.c and define
+ CONFIG_PCIAUTO_SKIP_HOST_BRIDGE in related board configuration files.
+
+
+commit e99ccb488181d012248c6be30b2093e950319fc5
+Date: Thu Mar 27 11:46:38 2008 -0500
+
+ Introduce phys_size_t and move phys_addr_t into asm/types.h
+
+ Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
+ that have larger physical addresses like 44x, 85xx, and 86xx.
+
+
+commit 20a14a42a25f72e379f38460b8a8484667536795
+Date: Wed Apr 2 16:19:07 2008 -0500
+
+ Rename include/md5.h to include/u-boot/md5.h
+
+ Some systems have md5.h installed in /usr/include/. This isn't the
+ desired file (we want the one in include/md5.h). This will avoid the
+ conflict. This fixes the host tools building problem by creating a new
+ directory for U-Boot specific header files.
+
+ [Patch by Andy Fleming, modified to use separate directory by Wolfgang
+ Denk]
+
+
+commit f297b7a1ec87433f66320d89d993e1bc738c66b8
+Date: Thu Mar 27 18:51:17 2008 +0800
+
+ drivers: code clean up
+
+
+commit 0ff7cba4a2e51c90827f6d21a0b28b4d67109597
+Date: Thu Mar 27 18:50:41 2008 +0800
+
+ drivers: clean up the ata_piix.h
+
+
+commit e8f7ba404f1409606962815ecc955a06984b08b3
+Date: Thu Mar 27 18:49:56 2008 +0800
+
+ doc: english polishing for README.sata
+
+ according to gvb's suggestion, polishing for the doc.
+
+
+commit 3e3f766a5274d204780460e1879723b565296d34
+Date: Wed Mar 26 18:53:28 2008 -0500
+
+ Fix warnings introduced by I2C bus speed setting patch
+
+
+commit 3c735e7437150e8615f26930c7819db85634276d
+Date: Thu Mar 27 00:50:49 2008 +0100
+
+ Altera Stratix II support
+
+ Adds Support for Altera's Stratix II.
+
+ Within your board specific init file you will have to call
+
+ 1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off);
+ 2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc);
+
+ Altera_desc* contines (for example):
+ {
+ Altera_StratixII, /* part type */
+ passive_serial, /* interface type */
+ 1, /* bytes of data part can accept */
+ (void *)(&funcs), /* interface function table */
+ 0L, /* base interface address */
+ 0 /* implementation specific cookie */
+ }
+
+ funcs is the interface. It is of type altera_board_specific_func.
+ It looks like this:
+ altera_board_specific_func func = {
+ pre_fn,
+ config_fn,
+ status_fn,
+ done_fn,
+ clk_fn,
+ data_fn,
+ abort_fn,
+ post_fn,
+ };
+
+ you will have to implement these functions, which is usually bit
+ banging some gpio.
+
+
+commit 5ece9ec9f6cd52950ab848e2fe422dacf1d3a335
+Date: Sun Apr 13 14:32:54 2008 -0700
+
+ Update CHANGELOG
+
+
+commit 5ad862166aa24d62a69aa9c708f6b2f5c0d28fb7
+Date: Wed Mar 26 20:41:17 2008 +0100
+
+ Phytec Phycore-i.MX31 support
+
+ This patch adds support for the Phytec Phycore-i.MX31 board
+
+
+commit caebc95be3b42e5147b5fac7672ac4b2693ef7e1
+Date: Wed Mar 26 20:41:09 2008 +0100
+
+ mx31 litekit support
+
+ This patch adds support for the mx31 litekit board
+
+
+commit cdace0661208754a53019ea0dc7b803a040e0939
+Date: Wed Mar 26 20:40:49 2008 +0100
+
+ add an i2c driver for mx31
+
+ This patch adds an i2c driver for Freescale i.MX processors
+
+
+commit 9b56f4f0306f3940b0aafd823ed6ecfc2d75d6c6
+Date: Wed Mar 26 20:40:42 2008 +0100
+
+ core support for Freescale mx31
+
+ This patch adds the core support for Freescale mx31
+
+
+commit 7ec68862a27c8f6f6d566228de8f6724d964a939
+Date: Sun Apr 13 14:19:23 2008 -0700
+
+ Fix compile error
+
+ ...as suggested by Peter Pearse
+
+
+commit 5252ed95204bdf55bec5a90ea69860bf2f78c643
+Date: Wed Mar 26 20:40:36 2008 +0100
+
+ Separate omap24xx specific code from arm1136
+
+ Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136
+ to cpu/arm1136/omap24xx.
+
+
+commit 1f1d88dd40815332df32982e739f2ddd2da6fe1a
+Date: Tue Jan 29 18:21:05 2008 -0500
+
+ disable caches before booting an app for Blackfin apps
+
+ It isn't generally save to execute applications outside of U-Boot with caches
+ enabled due to the way the Blackfin processor handles caches (requires
+ software assistance). This patch disables caches before booting an ELF or
+ just booting raw code. The previous discussion on the patch was that we
+ wanted to use weaks instead, but that proved to not be feasible when multiple
+ symbols are involved, which puts us back at the ifdef solution. I've
+ minimized the ugliness by moving the setup step outside of the main function.
+
+
+commit e6dfed705efa44ebf00d21bb1588c6ccc8f3ad32
+Date: Sun Apr 13 10:03:54 2008 -0700
+
+ ppc: Get rid of unused machine type definitions
+
+
+commit 1aeed8d71acb3290cf2446f316d6ba437e7881c4
+Date: Sun Apr 13 09:59:26 2008 -0700
+
+ Coding Style cleanup; update CHANGELOG
+
+
+commit 7754f33c6fb7a2c050388d20bf3847038558bdcf
+Date: Thu Feb 21 13:58:11 2008 -0500
+
+ LM73 bug fix for negative temperatures and cleanup
+
+ When the LM73 temperature sensor measures a temperature below 0 C, the
+ current driver does not perform sign extension, so the result returned is
+ 512 C too high. This patch fixes the problem, and does general cleanup
+ of the code.
+
+
+commit 96ef831f713289afba19da0c8f905e99da2b23e0
+Date: Thu Apr 3 13:36:02 2008 +0200
+
+ cfi_flash: Support buffered writes on non-standard Spansion NOR flash
+
+ Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
+ series require different addresses for buffered write commands. Define a
+ configuration option to support buffered writes on those chips. A more
+ elegant solution would be to automatically detect those chips by parsing
+ their CFI records, but that would require introduction of a fixup table
+ into the cfi_flash driver.
+
+
+commit 3f9c542d3d69b1a10a5e193e779133a0454d1f44
+Date: Thu Apr 10 09:35:06 2008 -0500
+
+ mpc83xx: Update DIMM data bus width test to support 40-bit width
+
+ 32-bit wide ECC memory modules report 40-bit width.
+ Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'.
+
+
+commit 5fb5a689d822ca61e814bd523fc930af335242fa
+Date: Mon Mar 31 17:05:12 2008 +0800
+
+ mpc83xx: Fix the bug of serdes initialization
+
+ Currently the serdes will not be initializated due to the
+ partid's error.
+
+
+commit 2000784818f043db7ca60e2846a72d097766b894
+Date: Thu Apr 3 16:28:29 2008 +0800
+
+ mpc83xx: Fix the SATA clock setting of 837x targets
+
+ Currently the SATA controller clock is configured as CSB clock,
+ usually the CSB clock is 400/333/266MHz.
+
+ However, The SATA IP block is only guaranteed to operate up to
+ 200 MHz as stated in the HW spec.
+
+
+ This patch makes the SATA clock as half of CSB clock.
+
+
+commit 1ac4f320bf0b593aa0a741f2d649a8ece8838672
+Date: Wed Apr 2 13:41:21 2008 +0200
+
+ mpc837xerdb: Fix warning: implicit declaration of function 'fdt_fixup_dr_usb'
+
+
+commit 97b3ecb575a92fa34c1765229dbc06f2b662f139
+Date: Wed Apr 9 04:20:57 2008 -0500
+
+ 85xx: Fix detection of MP cpu spin up
+
+ We were looking at the wrong memory offset to determine of a secondary
+ cpu had been spun up or not. Also added a warning message if the
+ all the secondary cpus we expect don't spin up.
+
+
+commit f3e04bdc3f360c66801a9048956e61e41a16edba
+Date: Tue Apr 8 10:45:50 2008 -0500
+
+ 85xx: Use SVR_SOC_VER instead of SVR_VER
+
+ The recent change introduced by 'Update SVR numbers to expand support'
+ now requires that we use SVR_SOC_VER instead of SVR_VER if we want
+ to compare against a particular processor id.
+
+
+commit 5b2052e5f5fcce5dbd4d2750a29c0e45bce806e7
+Date: Fri Apr 11 10:00:35 2008 -0400
+
+ ppc4xx: Fix power mgt definitions for PPC440
+
+ Corrected DCR addresses of PPC440EP power management registers.
+
+
+commit 950a392464e616b4590bc4501be46e2d7d162dea
+Date: Fri Apr 11 15:11:26 2008 +0200
+
+ Revert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18:
+
+ Reverting became necessary after it turned out that the patches in
+ the u-boot-arm repo were modified, and in some cases corrupted.
+
+ This reverts the following commits:
+
+ 066bebd6353e33af3adefc3404560871699e9961
+ 7a837b7310166ae8fc8b8d66d7ef01b60a80f9d6
+ c88ae20580b2b01487b4cdcc8b2a113f551aee36
+ a147e56f03871bba4f05058d5e04ce7deb010b04
+ d6674e0e2a6a1f033945f78838566210d3f28c95
+ 8c8463cce44d849e37744749b32d38e1dfb12e50
+ c98b47ad24b2d91f41c09a3d62d7f70ad84f4b7d
+ 8bf69d81782619187933a605f1a95ee1d069478d
+ 8c16cb0d3b971f46fbe77c072664c0f2dcd4471d
+ a574a73852a527779234e73e17e7597fd8128882
+ 1377b5583a48021d983e1fd565f7d40c89e84d63
+ 1704dc20917b4f71e373e2c888497ee666d40380
+
+
+commit 64e541f4c1b413dd84c7e409f5c2bf328db2ac13
+Date: Fri Apr 11 07:02:29 2008 +0200
+
+ ppc4xx: Update Kilauea defconfig to use device-tree booting as default
+
+ This patch reworks the default environment on Kilauea/Haleakala. Now
+ "net_nfs" for exmaple uses the device-tree style booting formerly know
+ as "net_nfs_fdt". Also the addresses in RAM were changed because of the
+ new image booting support, which check for image overwriting. So the
+ addresses needed togeet adjusted.
+
+
+commit 756f5dacda3810b094b94bcceffd3ce6c7ff9a28
+Date: Wed Apr 9 11:58:02 2008 +0200
+
+ ppc4xx: Fix Canyonlands default environment to work with new image support
+
+ Since the new image support checks for image overwriting, the default
+ environment needs to get adjusted to use correct addresses.
+
+
+commit dfc6c7b647dba7ab86749616f0e9e5740deed422
+Date: Wed Apr 9 11:54:11 2008 +0200
+
+ ppc: Revert patch 70431e8a that used _start instead of CFG_MONITOR_BASE
+
+ The patch 70431e8a7393b6b793f77957f95b999fc9a269b8 (Make MPC83xx one step
+ closer to full relocation.) doesn't use CFG_MONITOR_BASE anymore. But
+ on 4xx systems _start currently cannot be used for this calculation.
+ So revert back to the original version for now.
+
+
+commit f91374f65eae8b42cac329e06ba1c54728278efb
+Date: Fri Mar 28 12:49:52 2008 +0100
+
+ microblaze: Sort microblaze boards in MAKEALL script
+
+commit 62032deb7214c6d9b4396297e2aaa559bc2f8495
+Date: Fri Mar 28 11:58:45 2008 +0100
+
+ microblaze: clean microblaze_config.mk
+
+ FLAGS are generated by U-BOOT generator.
+ Board specific FLAGS are in board directory
+
+
+commit cf5c679ca04a6b54bf53a55b8b9c29335b387287
+Date: Fri Mar 28 12:47:19 2008 +0100
+
+ microblaze: xupv2p fix config file for supporting FDT
+
+commit 188dc16b189143573b1ed90e584bf866d75cdd12
+Date: Fri Mar 28 11:53:02 2008 +0100
+
+ microblaze: ml401 fix config file for supporting FDT
+
+
+commit 4c6a6f02e239236261333759997eeaf86b30b54c
+Date: Fri Mar 28 11:22:48 2008 +0100
+
+ microblaze: ml401 - add ifdef for GPIO
+
+
+commit af7ae1a411c67ee9d17a66d17ce50b374f3dd4e7
+Date: Fri Mar 28 12:13:03 2008 +0100
+
+ microblaze: clean uart16550 and uartlite handling
+
+
+commit 0b20f250877441460fb79d72192954abe8498834
+Date: Fri Mar 28 11:08:31 2008 +0100
+
+ microblaze: Add Emaclite driver to Makefile
+
+
+commit 868cde5310f88234b774878e4f06e79df10a88b3
+Date: Fri Mar 28 11:08:01 2008 +0100
+
+ microblaze: Add Emac driver to Makefile
+
+
+commit 6f961b4f461f6cbb83a467d468a02e6078c2b327
+Date: Fri Mar 28 12:42:29 2008 +0100
+
+ microblaze: add Emac ethernet driver
+
+commit 89c53891b18cbafd29ab8931b40e27ad231b6085
+Date: Fri Mar 28 12:41:56 2008 +0100
+
+ microblaze: add Emaclite ethernet driver
+
+commit e5845e21224dbe2fe47b11f1cdf95de7f84be7cb
+Date: Fri Mar 28 11:04:01 2008 +0100
+
+ microblaze: ML401 and XUPV2P remove emac and emaclite reference
+
+
+commit 6bf3e982aefdb1daf9f5462d482c8f9d1cc90a57
+Date: Fri Mar 28 10:59:32 2008 +0100
+
+ microblaze: remove old setting for emac driver
+
+
+commit cd2b75efb9cc037c74ecee9b3586f9bf9e1d4e57
+Date: Fri Mar 28 10:58:15 2008 +0100
+
+ microblaze: Clean Makefile from ancient emac driver
+
+
+commit ab68f921d9c741830f721c3d879c13a0c5597183
+Date: Fri Mar 28 10:20:43 2008 +0100
+
+ SPARC/LEON2: added support for Gaisler simulator GRSIM/TSIM for SPARC/LEON2 targets. See www.gaisler.com for information.
+
+
+commit 6ed8a43a19bb0275501bc286007daafa923552cf
+Date: Wed Mar 26 23:38:48 2008 +0100
+
+ SPARC/LEON3: added support for GR-CPCI-AX2000 FPGA AX board. The FPGA is exchangeable but a standard LEON3 design is assumed. See www.gaisler.com for information.
+
+
+commit 6940383d9ec1bfe2f13e339e6f723e8d34af2b12
+Date: Wed Mar 26 23:34:47 2008 +0100
+
+ SPARC/LEON3: added support for Altera NIOS Development kit (STRATIX II Edition) with GRLIB template design. See www.gaisler.com for information.
+
+
+commit 823edd8a66ed50af5aaba0c79567f67061e4d79a
+Date: Fri Mar 28 10:06:52 2008 +0100
+
+ SPARC/LEON3: added support for Gaisler GRSIM/TSIM2 SPARC/LEON3 simulatorn. See www.gaisler.com for information.
+
+
+commit 71d7e4c0489e5ed8fc69382236aaa2a1e510c135
+Date: Wed Mar 26 23:26:48 2008 +0100
+
+ SPARC/LEON3: added support for GR-XC3S-1500 board with GRLIB template design. See www.gaisler.com for board information.
+
+
+commit b330990c2f36ee4a8bb318360e1c8ba965269ab6
+Date: Fri Mar 28 10:00:33 2008 +0100
+
+ SPARC: Added support for SPARC LEON2 SOC Processor.
+
+
+commit 2a2fa797e63b1e3cd4d570318ca5fbf8723ef53a
+Date: Wed Mar 26 23:00:38 2008 +0100
+
+ SPARC/LEON3: Added AMBA Bus Plug&Play information print command (ambapp). It can print available cores (type: AHB Master, AHB Slave, APB Slave), their address ranges, IRQ number and version.
+
+
+commit 1e9a164e22976933002c5e4b0b79b09fcede9cd4
+Date: Wed Mar 26 22:51:29 2008 +0100
+
+ SPARC: Added support for SPARC LEON3 SOC processor.
+
+
+commit bf3d8b31169546fcddb4737391e1893fb12d033a
+Date: Fri Mar 28 08:29:26 2008 +0100
+
+ SPARC: added SPARC support for new uimage in common code.
+
+
+commit 00ab32c85405a4fe65fd4128243086210fc90a21
+Date: Wed Mar 26 22:36:03 2008 +0100
+
+ SPARC: added SPARC board information to the command bdinfo.
+
+
+commit c2f02da21a3f37f0878554eebc785e04fdc4e128
+Date: Fri Mar 28 09:47:00 2008 +0100
+
+ SPARC: Added generic support for SPARC architecture.
+
+
+commit e54ec0f016803e4d9524ff71f7971bda0c51b287
+Date: Thu Apr 3 14:50:34 2008 +0200
+
+ ppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3
+
+ This patch fixes a problem with the RGMII setup of the 460GT. The 460GT
+ has 2 RGMII instances and we need to configure the 2nd RGMII instance
+ for the EMAC2+3 channels.
+
+
+commit c2a545ce33b26d80337f80b533828839249fb1c9
+Date: Wed Apr 2 08:03:56 2008 +0200
+
+ MPC8xx: Fix libfdt support introduced in commit 77ff7b74
+
+ fdt.c: In function 'ft_cpu_setup':
+ fdt.c:33: warning: implicit declaration of function 'do_fixup_by_prop_u32'
+ fdt.c:39: warning: implicit declaration of function 'do_fixup_by_compat_u32'
+ fdt.c:43: warning: implicit declaration of function 'fdt_fixup_ethernet'
+ fdt.c:45: warning: implicit declaration of function 'fdt_fixup_memory'
+
+
+commit 4abd844d8eb108736e1cf8fbf3dbf61f2d5fc11b
+Date: Mon Mar 31 20:45:56 2008 -0500
+
+ Fix fdt set command to conform to dts spec
+
+ The fdt set command was treating properties specified as <00> and <0011>
+ as byte streams, rather than as an array of cells. As we already have
+ syntax for expressing the desire for a stream of bytes ([ xx xx ...]),
+ we should use the <> syntax to describe arrays of cells, which are always
+ 32-bits per element. If we imagine this likely (IMHO) scenario:
+
+ > fdt set /ethernet-phy@1 reg <1>
+
+ With the old code, this would create a bad fdt, since the reg cell would be
+ made to be one byte in length. But the cell must be 4 bytes, so this would
+ break mysteriously.
+
+ Also, the dts spec calls for constants inside the angle brackets (<>)
+ to conform to C constant standards as they pertain to base.
+ Take this scenario:
+
+ > fdt set /ethernet@f00 reg <0xe250000\ 0x1000>
+
+ The old fdt command would complain that it couldn't parse that. Or, if you
+ wanted to specify that a certain clock ran at 33 MHz, you'd be required to
+ do this:
+
+ > fdt set /mydev clock <1f78a40>
+
+ Whereas the new code will accept decimal numbers.
+
+ While I was in there, I extended the fdt command parser to handle property
+ strings which are split across multiple arguments:
+
+ > fdt set /ethernet@f00 interrupts < 33 2 34 2 36 2 >
+ > fdt p /ethernet@f00
+ ethernet@f00 {
+ interrupts = <0x21 0x2 0x22 0x2 0x24 0x2>;
+ };
+
+ Lastly, the fdt print code was rearranged slightly to print arrays of cells
+ if the length of the property is a multiple of 4 bytes, and to not print
+ leading zeros.
+
+
+commit 1c2926abdd7db89296a8cc7f224dd9d5d4e37a56
+Date: Wed Apr 2 08:39:33 2008 +0200
+
+ ppc4xx: Canyonlands: Init SATA/PCIe port correctly
+
+ Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
+ interface. This usage can be configured with the jumper J6. This patch
+ correctly configures the SATA/PCIe PHY for SATA usage when this jumper
+ is installed.
+
+
+commit 6fe2946f198481254a6ee9600d7456b8316a4083
+Date: Fri Mar 28 17:37:49 2008 -0500
+
+ remove remaining CONFIG_OF_HAS_{UBOOT_ENV,BD_T} code
+
+ finish off what commit 43ddd9c820fec44816188f53346b464e20b3142d,
+ "Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T"
+ started.
+
+
+commit b5873f1732b92a25690e1513b90dfb0d644f6697
+Date: Tue Apr 1 07:30:51 2008 +0200
+
+ dataflash: Move CONFIG_HAS_DATAFLASH to Makefile
+
+
+commit 2d934ea51f276522b532f870a820e844ff480b5b
+Date: Fri Mar 28 15:29:45 2008 +0100
+
+ Add Vitesse 8601 support to TSEC driver
+
+ Add phy_info for Vitesse VSC8601.
+ Add config option, CFG_VSC8601_SKEWFIX, to enable RGMII skew timing compensation.
+
+
+commit 3eac6402a508b0f68a21cc9cbc2cc49347de0c31
+Date: Mon Mar 31 14:25:00 2008 +0000
+
+ SPARC: added SMC91111 driver in and out macros for LEON processors.
+
+ This patch makes SPARC/LEON processors able to read and write
+ to the SMC91111 chip using the chip external I/O bus of the memory
+ controller. This patchs defines the standard in and out macros
+ expected by the SMC9111 driver.
+
+ To access that I/O bus one must set up the memory controller
+ (MCTRL or FTMCTRL) correctly. It is assumed that the user sets
+ up this correctly when the other MCTRL parameters are set up. It
+ can be set up from the board configuration header file.
+
+
+commit 3ca7c558eba36332556bc470d45e2f5d42bd0ca6
+Date: Wed Mar 26 18:52:34 2008 +0100
+
+ Add maintainership information for AT91CAP9ADK and AT91SAM9260EK boards
+
+
+commit 4e03dde84dd2c91e327cdc23ae119d432559a7a3
+Date: Mon Mar 31 21:31:04 2008 +0200
+
+ AT91SAM9260EK: Move CONFIG_CMD_NAND to Makefile
+
+
+commit 0176d43e759a6e00cacc85eff26fd60f74b4f6b7
+Date: Wed Mar 26 18:52:33 2008 +0100
+
+ Add support for AT91SAM9260EK
+
+ Support for booting from internal DataFlash, external DataFlash card
+ or NAND flash is available.
+
+
+commit 1762f13b4aab88b685b1722f17dada247945624b
+Date: Mon Mar 31 21:20:49 2008 +0200
+
+ AT91SAM9: Move CONFIG_HAS_DATAFLASH to Makefile
+
+
+commit 761712188b353494defb2b644491ff73d0daaa6f
+Date: Mon Mar 31 21:12:17 2008 +0200
+
+ AT91CAP9ADK: Move CONFIG_CMD_NAND to Makefile
+
+
+commit 983c1db04c1dd0f92e02f06d29f0c65a3d9a2687
+Date: Wed Mar 26 20:52:32 2008 +0100
+
+ Port AT91CAP9 to the new headers
+
+ Adapt the existing AT91CAP9 code to the new headers and APIs.
+
+
+commit 177e8a5ac81bbc531a1d54abdb47f2860266c3aa
+Date: Wed Mar 26 19:52:31 2008 +0100
+
+ Finish header files reworking
+
+ Replace AT91CAP9.h file with several splitted header files coming
+ from the Linux kernel.
+
+ This is part 2 of the replacement: more header imports and edits.
+
+
+commit 6d1dbbbf9fdf727384002e553e615c15d8b967f4
+Date: Wed Mar 26 19:52:30 2008 +0100
+
+ Import several header files from Linux
+
+ Replace AT91CAP9.h file with several splitted header files coming
+ from the Linux kernel.
+
+ This is part 1 of the replacement: pristine header files import.
+
+
+commit a8a78f2d99dc1bd30dc3595da118539b506c6118
+Date: Wed Mar 26 20:52:28 2008 +0100
+
+ Move at91cap9 specific files to at91sam9 directory
+
+ AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a
+ common infrastructure can be used. Let this infrastructure be
+ named after the AT91SAM9 family, and move the existing AT91CAP9
+ files to the new place.
+
+
+commit 61106a565870ff503f92b251b94bd7afef889a04
+Date: Wed Mar 26 21:52:27 2008 +0100
+
+ Use timer_init() instead of board supplied interrupt_init()
+
+ The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by
+ the board, so use timer_init() instead of interrupt_init().
+
+
+commit 5604e2178c5218fbfdba2e4293ca7652e829ac25
+Date: Wed Mar 26 21:52:36 2008 +0100
+
+ Cleanup DataFlash partition handling
+
+ DataFlash partition information has become a mess. This patch
+ defines a single partition scheme for Atmel DataFlashes. This partition
+ scheme will be used by all AT91CAP9 and AT91SAM9 boards.
+
+
+commit 9b46432fc65ce0f0826b32e4f15c15b33ccb8d42
+Date: Fri Mar 28 08:47:45 2008 -0500
+
+ ColdFire: Fix alignment issue after CONFIG_IDENT_STRING in start.S
+
+ When the version_string function in start.S is not 4-byte align,
+ it will cause the compiler generates "unaligned opcodes detected
+ in executable segment". This issue affects all ColdFire CPUs.
+ By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if
+ it is not aligned.
+
+
+commit bae61eefe15b4d454060a7140e49ae58322be803
+Date: Tue Mar 25 15:41:15 2008 -0500
+
+ ColdFire: Add dspi and serial flash support for MCF5445x
+
+
+commit 48ead7a7a922fceaf494e352abfab8216a41b417
+Date: Tue Mar 18 17:37:01 2008 -0500
+
+ ColdFire: Remove R5200 board
+
+ This board never went into production
+
+
+commit 545c8e0a7cd3ca9d3846668f69b0d201250abea8
+Date: Thu Jan 24 14:02:32 2008 -0600
+
+ ColdFire: Added M5275EVB support.
+
+
+commit f71d9d91a2cd9c30b2b6369f15c1a46c11537c2b
+Date: Mon Feb 4 15:38:20 2008 -0600
+
+ ColdFire: Added MCF5275 cpu support.
+
+
+commit 44e5b9edab077aba6e9b849afa4b7fbd8fd7b02b
+Date: Mon Mar 17 12:14:11 2008 -0500
+
+ ColdFire: Define bootdelay in configuration file for M52277EVB
+
+
+commit 77878f16cedee17161ff2336990970fffc6cea35
+Date: Mon Mar 17 12:09:07 2008 -0500
+
+ ColdFire: Fix second memory Chipselect for M5475EVB
+
+
+commit 43d60642395a550956cb21d287c8cfa563913d28
+Date: Thu Mar 13 14:26:32 2008 -0500
+
+ ColdFire: Update correct FLASHBAR and RAMBAR1 for MCF5282
+
+
+commit eb14ebe813a0cb5d47905228da446a5ad692473b
+Date: Sun Mar 30 20:33:04 2008 -0500
+
+ ppc4xx: Add CFG_MEM_TOP_HIDE to Denali SPD-based SDRAM setup
+
+
+commit 02e3892021112f21067d9ed1d04ae4182725ba52
+Date: Mon Mar 31 12:20:48 2008 +0200
+
+ ppc4xx: Small whitespace fix of esd patches
+
+
+commit 034394abb524785047c815f00dde8cdbdc1593c5
+Date: Sun Mar 30 18:52:44 2008 +0200
+
+ ppc4xx: Cleanup PMC440 board support
+
+
+commit a6cc6c37188d85c25d167a4515da86f48d9a583e
+Date: Sun Mar 30 18:52:06 2008 +0200
+
+ ppc4xx: Add ptm configuration variables for PMC440
+
+ Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms
+ environment variables.
+
+ Cleanup pci_target_init.
+
+
+commit 7c91f51a2fe296909147f1646a1412729dd10b1d
+Date: Sun Mar 30 18:01:15 2008 +0200
+
+ ppc4xx: Minor updates for DU440 boards
+
+
+commit d5bffeb868d6b4d462f558dac43011027b6644b7
+Date: Tue Feb 19 00:54:20 2008 -0500
+
+ Blackfin: cleanup and overhaul common board init functions
+
+
+commit b86b3416f874358acaf07519e7620cdb2145f75b
+Date: Tue Feb 19 00:50:58 2008 -0500
+
+ Blackfin: cleanup lib_blackfin/cache.c
+
+
+commit 9171fc81722c20fdb5a829a58b17c9eaadd5fb44
+Date: Sun Mar 30 15:46:13 2008 -0400
+
+ Blackfin: unify cpu and boot modes
+
+ All of the duplicated code for Blackfin processors and boot modes have been
+ unified. After all, the core is the same for all processors, just the
+ peripheral set differs (which gets handled in the drivers).
+
+
+commit 880cc4381ea8360248cddcdf87a64566745a5724
+Date: Wed Mar 26 22:52:35 2008 +0100
+
+ Fix CFG_NO_FLASH compilation.
+
+ Many Atmel boards have no "real" (NOR) flash on board, and rely only
+ on DataFlash and NAND memories. This patch enables CFG_NO_FLASH to
+ be present in a board configuration file, while still enabling flash
+ commands like 'flinfo', 'protect', etc.
+
+
+commit 9ce7e53abd039decea1af67aec81bbd5df7a2593
+Date: Tue Feb 19 00:58:13 2008 -0500
+
+ Blackfin: BF537-stamp: cleanup spi flash driver
+
+ This punts the old spi flash driver for a new/generalized one until the
+ common one can be integrated.
+
+
+commit bb8e3cf25bc0b04936c0c1a075985dd8700a244b
+Date: Sun Mar 30 11:34:34 2008 -0400
+
+ Fix macro typo in common/cmd_mii.c
+
+ This typo was introduced in commit 233a8bcd94997f3f345833a3b82e836222f2a206. I
+ actually applied the wrong patch.
+
+
+commit f1b985f2d724ccaa4d3def07917f0caaf18fa77d
+Date: Sun Mar 30 16:39:53 2008 +0200
+
+ use correct at91rm9200 register name in m501sk board
+
+ This fixes a naming bug for at91rm9200 lowlevel init code:
+ NOR boot flash is on chipselect 0, not chipselect 2. This
+ makes code use the register name from chip datasheets.
+
+
+commit 480ed1dea103a1c8f4591afc77d2de3c7868d983
+Date: Fri Jan 18 12:55:00 2008 -0800
+
+ use correct at91rm9200 register name
+
+ This fixes a naming bug for at91rm9200 lowlevel init code:
+ NOR boot flash is on chipselect 0, not chipselect 2. This
+ makes code use the register name from chip datasheets.
+
+
+commit a3543d6dc52b0ba9c64016687cf32d600b31a476
+Date: Fri Jan 18 12:45:45 2008 -0800
+
+ add missing ARM boards to MAKEALL
+
+ Add some missing ARM boards to MAKEALL. These build correctly,
+ unlike several of the boards already listed.
+
+
+commit 066bebd6353e33af3adefc3404560871699e9961
+Date: Sun Mar 30 11:34:09 2008 +0100
+
+ Bracket READ_TIMER macro in cpu/arm1136/omap24xx/interrupts.c
+ to prevent compilation error.
+
+
+commit 7a837b7310166ae8fc8b8d66d7ef01b60a80f9d6
+Date: Sun Mar 30 11:32:30 2008 +0100
+
+ Support for the MX31ADS evaluation board from Freescale
+
+ This patch adds support for the MX31ADS evaluation board from Freescale,
+ initialization code is copied from RedBoot sources, also provided by Freescale.
+
+
+commit c88ae20580b2b01487b4cdcc8b2a113f551aee36
+Date: Sun Mar 30 11:32:27 2008 +0100
+
+ Phytec Phycore-i.MX31 support
+
+ This patch adds support for the Phytec Phycore-i.MX31 board
+
+
+commit a147e56f03871bba4f05058d5e04ce7deb010b04
+Date: Sun Mar 30 11:32:24 2008 +0100
+
+ mx31 litekit support
+
+ This patch adds support for the mx31 litekit board
+
+
+commit d6674e0e2a6a1f033945f78838566210d3f28c95
+Date: Sun Mar 30 11:32:21 2008 +0100
+
+ add SMSC LAN9x1x Network driver
+
+ This patch adds a driver for the following smsc network controllers:
+ LAN9115
+ LAN9116
+ LAN9117
+ LAN9215
+ LAN9216
+ LAN9217
+
+
+commit 8c8463cce44d849e37744749b32d38e1dfb12e50
+Date: Sun Mar 30 11:32:16 2008 +0100
+
+ add an i2c driver for mx31
+
+ This patch adds an i2c driver for Freescale i.MX processors
+
+
+commit c98b47ad24b2d91f41c09a3d62d7f70ad84f4b7d
+Date: Sun Mar 30 11:30:43 2008 +0100
+
+ core support for Freescale mx31
+
+ This patch adds the core support for Freescale mx31
+
+
+commit 8bf69d81782619187933a605f1a95ee1d069478d
+Date: Sun Mar 30 11:28:46 2008 +0100
+
+ Separate omap24xx specific code from arm1136
+
+ Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx.
+
+
+commit 8c16cb0d3b971f46fbe77c072664c0f2dcd4471d
+Date: Sun Mar 30 11:23:05 2008 +0100
+
+ Add pmdra into MAKEALL
+
+
+commit a574a73852a527779234e73e17e7597fd8128882
+Date: Sun Mar 30 11:21:58 2008 +0100
+
+ Adds support for the Prodrive PMDRA board, based on a DM6441
+
+
+commit 1377b5583a48021d983e1fd565f7d40c89e84d63
+Date: Sun Mar 30 11:11:34 2008 +0100
+
+ Removes all board specific code from the arch. part for DM644x (DaVinci) boards
+
+
+commit 1704dc20917b4f71e373e2c888497ee666d40380
+Date: Sun Mar 30 11:09:01 2008 +0100
+
+ - Remove *_masked() functions as noted by Wolfgang
+ - Adapt register naming to recent TI spec (sprue26, March 2007)
+ - Fix reset_timer() handling
+ - As reported by Pieter [1] the overflow fix introduced a
+ delay of factor 16 (e.g 2 seconds became 32). While the
+ overflow fix is basically okay, it missed to divide udelay by
+ 16, too. Fix this.
+ [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
+ - Remove software division of timer count value (DIV(x)
+ macro) and do it in hardware (TIM_CLK_DIV).
+ the hints & testing!
+
+
+
+commit ac3315c26e143c31680750c9c13f027efbcc887e
+Date: Thu Mar 6 16:45:44 2008 +0100
+
+ new PHY @ e1000 - 2nd try
+
+ Add 82541ER device with latest integrated IGP2 PHY.
+ Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.
+
+
+commit c2b7da552293b50c9c9e46ed71267b02c2de9ea8
+Date: Fri Mar 28 20:22:53 2008 +0100
+
+ SPARC/LEON3: Added GRETH Ethernet 10/100/1000 driver.
+
+ GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
+ a debug link (EDCL). The GRETH core is documented in GRIP.pdf
+ available at www.gaisler.com.
+
+ If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
+ offloading etc.) can be determined by a bit in the control register.
+ The GBIT MAC is supported by operating in GRTEH 10/100 legacy mode.
+
+
+commit 233a8bcd94997f3f345833a3b82e836222f2a206
+Date: Mon Mar 17 17:08:22 2008 -0500
+
+ Add CONFIG_MII_INIT in cmd_mii.c
+
+ Provide common configuration in do_mii() to execute mii_init()
+ for all cpu architectures
+
+
+commit f605479de2deb11e834f31dfdb0af107c86aced6
+Date: Mon Mar 17 17:08:16 2008 -0500
+
+ ColdFire: Fix FEC transmit issue for MCF5275
+
+
+commit d9a2f416d6ac6058cd7845033ae4dc32ef1c0746
+Date: Wed Mar 26 09:43:57 2008 +1100
+
+ DHCP request fix for Windows Server 2003
+
+ Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional
+ delay before sending "DHCP Request" in net/bootp.c. Required to overcome
+ interoperability problems with Windows Server 200x DHCP server when U-Boot
+ client responds too fast for server to handle.
+
+
+commit 97bf85d784fbed485e652eb907589ad0d5cb7262
+Date: Fri Mar 28 20:40:19 2008 +0100
+
+ MTD/CFI: flash_read64 is defined a weak function (for SPARC)
+
+ SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
+ SPARC CPUs implement flash_read64 which calls __raw_readq.
+
+ For current SPARC architectures (LEON2 and LEON3) each read from the
+ FLASH must lead to a cache miss. This is because FLASH can not be set
+ non-cacheable since program code resides there, and alternatively disabling
+ cache is poor from performance view, or doing a cache flush between each
+ read is even poorer.
+
+ Forcing a cache miss on a SPARC is done by a special instruction "lda" -
+ load alternative space, the alternative space number (ASI) is processor
+ implementation spcific and can be found by including <asm/processor.h>.
+
+
+commit 70431e8a7393b6b793f77957f95b999fc9a269b8
+Date: Fri Mar 28 15:41:25 2008 +0100
+
+ Make MPC83xx one step closer to full relocation.
+
+ Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
+ and use GOT relative reference.
+
+
+commit 5b2793a3f3de34d439232b05acc8af67a028fd35
+Date: Thu Mar 27 14:34:43 2008 -0400
+
+ mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
+
+ This patch fixes eeprom page size so that you can now write more than
+ 64 bytes at a time.
+
+ It also makes the board take MAC addresses, if found, from EEPROM.
+
+ User should place up to 4 addresses at offset 0x7f00, for
+ eth{,1,2,3}addr. Any unused addresses should be zero. This group of
+ four six-byte values should have it's CRC at the end. crc32 and
+ eeprom commands can be used to accomplish this.
+
+ If CRC fails, MAC addresses come from the environment. If CRC
+ succeeds, the environment is overwritten at startup.
+
+
+commit 8f325cff31f6e745e6540014b131b9a97f61944c
+Date: Fri Mar 28 15:15:38 2008 -0400
+
+ mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
+
+ Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB
+ controller on the PCI bus in Linux on the MPC8323ERDB.
+
+ This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
+ config file.
+
+
+commit e5c4ade4db1e16d3e5d4a7887f34e10e516ed3a9
+Date: Fri Mar 28 10:19:07 2008 -0500
+
+ mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code
+
+ in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6,
+ 85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
+ and processor ID display. Add REVID_{MAJ,MIN}OR macros to make
+ REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR
+ convenience macros.
+
+
+commit 81fd52c6c8fd19f0b7856b98217ce37c46c521af
+Date: Fri Mar 28 10:18:53 2008 -0500
+
+ mpc83xx: display ddr frequency in board_add_ram_info banner
+
+
+commit 35cf155c5ec1ceab2849fa5b6aa3d9a3e9e6f482
+Date: Fri Mar 28 10:18:40 2008 -0500
+
+ mpc83xx: unreinvent mem_clk
+
+ delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to
+ mem_*_clk for consistency's sake.
+
+
+commit 730e792926ca3fe4dd1b734a3bf44e55afa6f536
+Date: Fri Mar 28 14:31:23 2008 -0500
+
+ mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boards
+
+
+commit 2eeb3e4fc54ef2f5d574dafd42c6ce93afa30393
+Date: Wed Mar 26 22:57:19 2008 +0800
+
+ mpc83xx: enable the SATA interface on mpc837xemds board
+
+ Enable the first two SATA interfaces on MPC837xEMDS board,
+ The two SATA ports are on LYNX1. (SATA0/1 on J4/5)
+
+
+commit 6f8c85e8d1865730c158d9ef5a06c70c3a10600a
+Date: Wed Mar 26 22:56:36 2008 +0800
+
+ mpc83xx: initialize serdes for MPC837xEMDS boards
+
+ This patch is stolen from Anton Vorontsov's patch
+ for mpc837xerdb boards.
+
+ The reference clk and xcorevdd voltage of serdes1/2
+ is same between mpc837xemds and mpc837xerdb.
+
+ 8377E: LYNX1- 2 SATA LYNX2- 2 PCIE
+ 8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE
+ 8379E: LYNX1- 2 SATA LYNX2- 2 SATA
+
+
+commit cc8e839abc80887ae832767b5930d40edd6d7eb7
+Date: Fri Mar 28 14:09:04 2008 +0100
+
+ ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision
+
+ Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
+ interface. This usage can be configured with the jumper J6. This patch
+ displays the current configuration upon bootup and changes the PCIe
+ init loop, to only initialize the availabel PCIe slots.
+
+
+commit 90447ecbbac8572457b6d8903073ac3f120995ba
+Date: Fri Mar 28 11:29:10 2008 +0100
+
+ MTD/CFI: Add support for 16bit legacy AMD flash
+
+ Add entry for 512Kx16 AMD flash to jedec_table.
+ Read out 16bit device id if chipwidth is 16bit.
+ Fixed coding style after Stefans feedback
+
+
+commit 5e12e75d17c4b15a310a45cd78fe71b7698a8a8e
+Date: Fri Mar 28 11:02:53 2008 +0100
+
+ ppc: Small change to CFG_MEM_TOP_HIDE description
+
+
+commit 280df59a8d62c6e74c281b1cb7e2052df4d6cb00
+Date: Thu Mar 27 15:44:12 2008 +0900
+
+ sh: Add support stat structure and stat.h
+
+
+commit 4be9eb789e72b845d6693cc36b70a0b3529b3f09
+Date: Sat Mar 22 19:27:52 2008 +0100
+
+ sh: Removed warning when compiling drivers/serial/serial_sh.c.
+
+
+commit f309fa38929ffba71230c02330ffa42f4bba6333
+Date: Wed Mar 12 18:02:57 2008 +0900
+
+ sh: Remove disable_ctrlc function from R7780MP
+
+
+commit 6f4b266ff2a4fcc2bff985d6a217852469afddb3
+Date: Wed Mar 12 17:55:15 2008 +0900
+
+ sh: Add maintainer of R7780MP to MAINTAINER file
+
+ Update MAINTAINER entry for R7780MP. And fix maintainer's name.
+
+
+commit f5e2466f7baa887a7df0c536333eea8231333497
+Date: Tue Mar 25 17:11:24 2008 +0900
+
+ sh: Add support Renesas Solutions R2D plus board
+
+ R2D plus is SH reference board used with SH7751R.
+ This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
+ one PCI bus, VGA, and two Ethernet controller.
+
+
+commit e92c95180bb5bc5fd4051598a9d60beaba48988d
+Date: Wed Mar 12 12:15:29 2008 +0900
+
+ sh: Add support SH4 cache control
+
+ Add support SH4 cache control and flash_cache function
+
+
+commit 28e5efde4d925fcb34901d0030d0648de2da7e89
+Date: Mon Mar 24 01:53:01 2008 +0900
+
+ sh: Add support PCI host driver for SH7751/SH7751R
+
+
+commit ab8f4d40d069cd3cbe7563ddfe3e5f03b0c7c721
+Date: Mon Mar 24 02:11:26 2008 +0900
+
+ sh: Move SuperH PCI driver from cpu/sh4 to drivers/pci
+
+
+commit 566933278101c144d75361ea682678a326c1290d
+Date: Wed Mar 12 12:10:28 2008 +0900
+
+ sh: Add support SuperH SH7751/SH7751R
+
+
+commit 3313e0e26224fc9a0c445124f3455058c696df84
+Date: Mon Mar 10 11:37:10 2008 +0100
+
+ sh: Added support for SH7720 based board MPR2.
+
+
+commit 3ecff1d70ae93e628fe65b3fe1fc7c9c76cdf99f
+Date: Thu Mar 6 14:05:53 2008 +0900
+
+ sh: Fix receive FIFO level register of SH4A
+
+ Receive FIFO level register is different in SH4A.
+ Because register is different, cannot occasionally receive data.
+
+
+commit c133c1fb0b590662206b0eba70f4478ee0300a9a
+Date: Tue Mar 11 12:55:12 2008 +0900
+
+ sh: Add support Renesas Solutions R7780MP
+
+ Renesas Solutions R7780MP is a reference board on SH7780.
+ This board has serial, 10/100 base Ethernet deivice, CF slot
+ and VGA devices. This board can set extension board.
+ Extension board has 10/100/1000 base Ethernet device, PCI slot,
+ S-ATA, iDVR slot.
+
+
+commit 1a2334a4eb6386d7cd35d9de5fa39af2c764ad28
+Date: Wed Mar 5 14:30:02 2008 +0900
+
+ sh: Add support PCI of SuperH and SH7780
+
+ This patch add support PCI of SuperH base code and SH7780 specific code.
+
+
+commit b55523efff2ae11f0b9ae3cc405893c32eb78156
+Date: Wed Mar 5 14:23:26 2008 +0900
+
+ sh: Add support SH7780
+
+ SH7780 is CPU of Renesas Technology.
+ This CPU has
+ - CPU clock 400MHz
+ - PCI support
+ - DDR-SDRAM controller
+ - etc ...
+
+
+commit c2042f5952a686c414031309b8f244513bf578f0
+Date: Fri Jan 25 20:46:36 2008 +0900
+
+ sh: Add support Renesas Solutions Migo-R board
+
+ Migo-R is a board based on SH7722 and has may devices.
+ In this patch, supported SCIF, NOR flash and Ethernet.
+
+
+commit 74d1e66d22dac91388bc538b2fe19f735edc5b82
+Date: Thu Mar 27 15:06:40 2008 +0100
+
+ Fix host tool build breakage, take two
+
+ Revert commit 87c8431f and fix build breakage so that the build continues
+ to work on FC systems.
+
+
+commit 7e4a0d25ed18f6437bdf59ebfa49bb0edc2f24e6
+Date: Wed Mar 19 09:36:47 2008 +0100
+
+ ppc4xx: Enable ECC on LWMON5
+
+ Since all ECC related problems seem to be resolved on LWMON5, this patch
+ now enables ECC support.
+
+ We have to write the ECC bytes by zeroing and flushing in smaller
+ steps, since the whole 256MByte takes too long for the external
+ watchdog.
+
+
+commit 6433fa202a91a6594dd48f06807ac38ba27fa0bb
+Date: Mon Mar 17 11:10:35 2008 -0500
+
+ ppc4xx: Updates to Korat-specific code
+
+ This patch contains updates for changes for the Korat PPC440EPx board.
+ These changes include:
+
+ (1) Support for "permanent" and "upgradable" copies of U-Boot, as
+ described in the new "doc/README.korat" file;
+
+ (2) a new memory map for the registers in the board's CPLD;
+
+ (3) a revised format for manufacturer's data in serial EEPROM; and
+
+ (4) changes to track updates to U-Boot for the Sequoia board.
+
+
+commit f766cdf89b3a2a7634b8c5869f606150e332036c
+Date: Thu Mar 27 10:46:25 2008 +0100
+
+ ppc4xx: PPC405EP Set EMAC noise filter bits
+
+ This bug was introduced with commit aee747f19b460a0e9da20ff21e90fdaac1cec359
+ which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
+ disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.
+
+
+commit f66e2c8b25c04b79e5fb385bc8989c2de7f63991
+Date: Wed Feb 20 11:54:20 2008 -0500
+
+ ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPx
+
+ On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
+ after startup to change the speed of the clocks. This patch adds the
+ option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
+ initialization code will reconfigure the PLL to run the system with a CPU
+ frequency of 667MHz and PLB frequency of 166MHz, without the need for an
+ external EEPROM.
+
+
+commit 87c8431fe24d48121f053fe67cff4ccfe097d4d1
+Date: Thu Mar 27 09:12:40 2008 +0100
+
+ new-image: Fix host tool build breakage
+
+
+commit 6fb4b640562a10daff0dbe537638d511b5b48650
+Date: Thu Mar 27 10:24:03 2008 +0100
+
+ ppc: Set CFG_MEM_TOP_HIDE to 0 if not already defined
+
+
+commit 9462732a3ec551c11862450902cd8ee1bedea6d9
+Date: Wed Mar 19 10:23:43 2008 +0100
+
+ ppc4xx: Add fdt support to Prodrive alpr
+
+ Since this board will probably be ported to arch/powerpc in the
+ near future, we add device tree support now. This way we are
+ "ready" for arch/powerpc from now on.
+
+
+commit 511e4f9e7f7b6719e4d91d7f0fc89412b13b5150
+Date: Mon Mar 17 09:27:56 2008 +0100
+
+ ppc4xx: Enable cache support on the ALPR board
+
+
+commit 14f73ca679f6fdb44cff0b7304d419db41a0ab69
+Date: Wed Mar 26 10:14:11 2008 +0100
+
+ ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"
+
+ If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
+ memory area will get subtracted from the top (end) of ram and won't get
+ "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
+ should gets passed the now "corrected" memory size and won't touch it
+ either. This should work for arch/ppc and arch/powerpc. Only Linux board
+ ports in arch/powerpc with bootwrapper support, which recalculate the
+ memory size from the SDRAM controller setup, will have to get fixed
+ in Linux additionally.
+
+ This patch enables this config option on some PPC440EPx boards as a workaround
+ for the CHIP 11 errata. Here the description from the AMCC documentation:
+
+ CHIP_11: End of memory range area restricted access.
+ Category: 3
+
+ Overview:
+ The 440EPx DDR controller does not acknowledge any
+ transaction which is determined to be crossing over the
+ end-of-memory-range boundary, even if the starting address is
+ within valid memory space. Any such transaction from any PLB4
+ master will result in a PLB time-out on PLB4 bus.
+
+ Impact:
+ In case of such misaligned bursts, PLB4 masters will not
+ retrieve any data at all, just the available data up to the
+ end of memory, especially the 440 CPU. For example, if a CPU
+ instruction required an operand located in memory within the
+ last 7 words of memory, the DCU master would burst read 8
+ words to update the data cache and cross over the
+ end-of-memory-range boundary. Such a DCU read would not be
+ answered by the DDR controller, resulting in a PLB4 time-out
+ and ultimately in a Machine Check interrupt. The data would
+ be inaccessible to the CPU.
+
+ Workaround:
+ Forbid any application to access the last 256 bytes of DDR
+ memory. For example, make your operating system believe that
+ the last 256 bytes of DDR memory are absent. AMCC has a patch
+ that does this, available for Linux.
+
+ This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
+ lwmon5, korat, sequoia
+
+ The other remaining 440EPx board were intentionally not included
+ since it is not clear to me, if they use the end of ram for some
+ other purpose. This is unclear, since these boards have CONFIG_PRAM
+ defined and even comments like this:
+
+ PMC440.h:
+ /* esd expects pram at end of physical memory.
+ * So no logbuffer at the moment.
+ */
+
+ It is strongly recommended to not use the last 256 bytes on those
+ boards too. Patches from the board maintainers are welcome.
+
+
+commit c664bf8c3c9bb9e236891f0d8dfda883e86d159b
+Date: Thu Mar 27 10:09:05 2008 +0100
+
+ ppc4xx: Fix Canyonlands linker script (remove bogus ASSERT)
+
+
+commit d56a3ce179688cde61073a3690e21703d68fafd7
+Date: Tue Mar 25 17:51:13 2008 +0100
+
+ ppc4xx: Correctly pass phyiscal FLASH base address into dtb
+
+ The routine ft_board_setup() configures the EBC NOR mappings for the
+ Linux physmap_of driver. Since on 460EX/GT we remap the FLASH from
+ 0x4.fc00.0000 to 0x4.cc00.0000 because of the max. 16MByte boot-CS
+ problem, we need to pass the corrected address here too.
+
+
+commit 9ad31989de12ce5c67b07c4867ead47465655c4b
+Date: Wed Mar 19 16:35:12 2008 +0100
+
+ ppc4xx: Fix compilation warning in 4xx_enet.c
+
+
+commit 4c9e855734c523900322a7c3cdd9099b4f51b51d
+Date: Wed Mar 19 16:20:49 2008 +0100
+
+ ppc4xx: Add AMCC Glacier 406GT eval board support
+
+ This patch adds support for the AMCC Glacier 460GT eval board.
+ The main difference to the Canyonlands board are listed here:
+
+ - 4 ethernet ports instead of 2
+ - no SATA port
+ - no USB port
+
+ Currently EMAC2+3 are not working. This will be fixed in a later
+ release.
+
+
+commit d8bd643141af4710d7f1b69bbab6b760de0af0a1
+Date: Thu Mar 27 08:47:26 2008 +0100
+
+ ppc4xx: Mask 'vec' with 0x1f in uic_interrupt() for bit set/clear
+
+
+commit b9670dd85be6e0496ef2e231043c23cad9b1d903
+Date: Wed Mar 26 21:05:43 2008 +0100
+
+ Fix out of tree building issue
+
+ Currently U-Boot building in some external directory
+ doesn't work. This patch tries to fix the problem.
+
+
+commit d4ee711d8a5c366ee3f857c26b927d12e66614ff
+Date: Wed Mar 26 18:13:33 2008 +0100
+
+ README: update documentation (availability, links, etc.)
+
+ Fix typo in README
+
+
+commit e813eae3bfeba9c0bda9d1bf9fc3d081f790972f
+Date: Wed Mar 26 17:47:44 2008 +0100
+
+ Fix compilation error in cmd_usb.c
+
+ This patch fixes compilation error
+ cmd_usb.c: In function 'do_usb':
+ cmd_usb.c:552: error: void value not ignored as it ought to be
+
+
+commit d8c82db482d6b535d12b419d6440b88bf7091c9b
+Date: Fri Mar 14 17:45:29 2008 -0500
+
+ Add support for setting the I2C bus speed in fsl_i2c.c
+
+ Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying
+ the I2C bus speed. Current 8[356]xx boards define the CFG_I2C_SPEED macro,
+ but fsl_i2c.c ignores it and uses conservative value when programming the
+ I2C bus speed.
+
+
+commit d049cc7f71c0d875e8f5099d1ed23666a82b8f8e
+Date: Thu Mar 27 00:03:57 2008 +0100
+
+ Coding style cleanup, update CHANGELOG
+
+
+commit fd0b1fe3c388a77e8fe00cdd930ca317a91198d4
+Date: Wed Mar 26 22:55:32 2008 +0800
+
+ drivers: add the support for Freescale SATA controller
+
+ Add the Freescale on-chip SATA controller driver to u-boot,
+ The SATA controller is used on the 837x and 8315 targets,
+ The driver can be used to load kernel, fs and dtb.
+
+ The features list:
+ - 1.5/3 Gbps link speed
+ - LBA48, LBA28 support
+ - DMA and FPDMA support
+ - Two ports support
+
+
+commit bede87f4c87c3ccd868cc60ebf792e0560c6d024
+Date: Wed Mar 26 22:54:44 2008 +0800
+
+ ata: add the readme for SATA command line
+
+
+commit cd54081cd479e542fc399b8a40651ff11a1ad849
+Date: Wed Mar 26 22:53:24 2008 +0800
+
+ ata: enable the sata initialize on boot up
+
+
+commit 69386383c5c2b323c66495b0b0cef6a9714d83bf
+Date: Wed Mar 26 22:52:36 2008 +0800
+
+ ata: add the fis struct for SATA
+
+
+commit ffc664e80dfb2e17de0df5ad39e91a02e9c361bc
+Date: Wed Mar 26 22:51:44 2008 +0800
+
+ ata: add the libata support
+
+ add simple libata support in u-boot
+
+
+commit 8e9bb43429e50df55fa41932cbe65841ff579220
+Date: Wed Mar 26 22:50:45 2008 +0800
+
+ ata: make the ata_piix driver using new SATA framework
+
+ original ata_piix driver is using IDE framework, not real
+ SATA framework. For now, the ata_piix driver is only used
+ by x86 sc520_cdp board. This patch makes the ata_piix driver
+ use the new SATA framework, so
+
+ - remove the duplicated command stuff
+ - remove the CONFIG_CMD_IDE define in the sc520_cdp.h
+ - add the CONFIG_CMD_SATA define to sc520_cdp.h
+
+
+commit c7057b529c3c3cb9c0ac9060686a4068f1491bbe
+Date: Wed Mar 26 22:49:44 2008 +0800
+
+ ata: add the support for SATA framework
+
+ - add the SATA framework
+ - add the SATA command line
+
+
+commit 83c7f470a4ce94f33600f11ae85ce4dcf00aa90c
+Date: Wed Mar 26 22:48:18 2008 +0800
+
+ ata: merge the header of ata_piix driver
+
+ move the sata.h from include/ to drivers/block/ata_piix.h
+
+
+commit 9eef62804d9695425b24c87b46a61a7fa74afee0
+Date: Wed Mar 26 22:47:06 2008 +0800
+
+ ata: merge the ata_piix driver
+
+ move the cmd_sata.c from common/ to drivers/ata_piix.c,
+ the cmd_sata.c have some part of ata_piix controller drivers.
+ consolidate the driver to have better framework.
+
+
+commit b9e749e95354f33eb5dc6653c6db7d502adb95fe
+Date: Wed Mar 26 18:26:43 2008 +0100
+
+ USB, Storage: fix a bug introduced in commit
+ f6b44e0e4d18fe507833a0f76d24a9aa72c123f1 that will cause usb_stor_info
+ to only print only information on one storage device, but not for
+ multiple.
+
+
+commit 841e5edd1623f3fecb6bffc5c2f938ed7a947360
+Date: Wed Mar 26 17:47:44 2008 +0100
+
+ Fix compilation error in cmd_usb.c
+
+ This patch fixes compilation error
+ cmd_usb.c: In function 'do_usb':
+ cmd_usb.c:552: error: void value not ignored as it ought to be
+
+
+commit dd6c910aadf27c822f17b87eae1a9bd0b2e3aa15
+Date: Wed Mar 26 08:53:53 2008 -0500
+
+ 85xx: Add cpu_mp_lmb_reserve helper to reserve boot page
+
+ Provide a board_lmb_reserve helper function to ensure we reserve
+ the page of memory we are using for the boot page translation code.
+
+
+commit 79679d80021ab095e639e250ca472fe526da02e2
+Date: Wed Mar 26 08:34:25 2008 -0500
+
+ 85xx: Update multicore boot mechanism to ePAPR v0.81 spec
+
+ The following changes are needed to be inline with ePAPR v0.81:
+
+ * r4, r5 and now always set to 0 on boot release
+ * r7 is used to pass the size of the initial map area (IMA)
+ * EPAPR_MAGIC value changed for book-e processors
+ * changes in the spin table layout
+ * spin table supports a 64-bit physical release address
+
+
+commit 25eedb2c1958a13110c7de1fc809b624053cc69c
+Date: Wed Mar 19 15:02:07 2008 -0500
+
+ FSL: Clean up board/freescale/common/Makefile
+
+ Each file that can be built here now follows some
+ CONFIG_ option so that they are appropriately built
+ or not, as needed. And CONFIG_ defines were added
+ to various board config files to make sure that happens.
+
+ The other board/freescale/*/Makefiles no longer need
+ to reach up and over into ../common to build their
+ individually needed files any more.
+
+ Boards that are CDS specific were renamed with cds_ prefix.
+
+
+commit a5af4b358a7caa9c0aa374d4d894bf762ec37669
+Date: Wed Feb 27 22:00:27 2008 -0600
+
+ 85xx: Fix merge duplication
+
+ ft_fixup_cpu() got duplicated in some merge snafu. Remove the duplicate.
+
+
+commit 5893b3d0a4084f87a06a5d3dc03db91206818941
+Date: Tue Feb 12 16:35:07 2008 -0600
+
+ 85xx: Expand CCSR space with more DDR controller registers.
+
+
+commit a3e77fa5359b3f9f59e4e946b46d57a53057cc85
+Date: Fri Feb 8 18:05:08 2008 -0600
+
+ 85xx: Speed up get_ddr_freq() and get_bus_freq()
+
+ get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were
+ called. However, get_sys_info() recalculates extraneous information when
+ called each time. Have get_ddr_freq() and get_bus_freq() return memoized
+ values from global_data instead.
+
+
+commit e9ea679918fbc9a53fa2f2a904aac874ea736036
+Date: Fri Feb 8 16:46:27 2008 -0600
+
+ 85xx: Show DDR memory data rate in addition to the memory clock frequency.
+
+ Show the DDR memory data rate in addition to the memory clock
+ frequency. For DDR/DDR2 memories the memory data rate is 2x the
+ memory clock.
+
+
+commit 591933ca6eabc440e6ed6967233aaf56fce464a3
+Date: Fri Feb 8 16:44:53 2008 -0600
+
+ 85xx: get_tbclk() speed up and rounding fix
+
+ Speed up get_tbclk() by referencing pre-computed bus clock
+ frequency value from global data instead of sys_info_t. Fix
+ rounding of result to nearest; previously it was rounding
+ upwards.
+
+
+commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6
+Date: Wed Feb 6 01:19:40 2008 -0600
+
+ Update SVR numbers to expand support
+
+ FSL has taken to using SVR[16:23] as an SOC sub-version field. This
+ is used to distinguish certain variants within an SOC family. To
+ account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
+ constants to reflect the larger value. We also add SVR numbers for all
+ of the current variants. Finally, to make things neater, rather than
+ use an enormous switch statement to print out the CPU type, we create
+ and array of SVR/name pairs (using a macro), and print out the CPU name
+ that matches the SVR SOC version.
+
+
+commit b83eef440cf3cef816172ccbb5897ccd8e403cf3
+Date: Wed Feb 6 01:12:57 2008 -0600
+
+ Add the Freescale PCI device IDs
+
+
+commit 7aff0c051ad0613171cf2b9941ee48675c62e7cd
+Date: Thu Feb 14 11:04:23 2008 -0600
+
+ 85xx: Added support for multicore boot mechanism
+
+ Added the cpu command that provides a generic mechanism to get status,
+ reset, and release secondary cores in multicore processors.
+
+ Added support for using the ePAPR defined spin-table mechanism on 85xx.
+
+
+commit ec2b74ffd36f02c6123725e7c2533dd2deaf4b64
+Date: Thu Jan 17 16:48:33 2008 -0600
+
+ 85xx: Added support for multicore boot mechanism
+
+ Added the cpu command that provides a generic mechanism to get status,
+ reset, and release secondary cores in multicore processors.
+
+ Added support for using the ePAPR defined spin-table mechanism on 85xx.
+
+
+commit f69766e4b5d47ecd3aa58677a8da875694f364f2
+Date: Wed Jan 30 14:55:14 2008 -0600
+
+ 85xx: Add the concept of CFG_CCSRBAR_PHYS
+
+ When we go to 36-bit physical addresses we need to keep the concept of
+ the physical CCSRBAR address seperate from the virtual one.
+
+ For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR
+
+
+commit 5b5eb9ca5b778f763bcf332697b35cc1e747626e
+Date: Wed Mar 26 15:38:47 2008 +0100
+
+ Coding style cleanup.
+
+
+commit da8808df7a9cef5a3d2ee286ef9ebf9de1780660
+Date: Wed Mar 26 13:02:13 2008 +0100
+
+ Add CFG_RTC_DS1337_NOOSC to turn off OSC output
+
+ The default settings for RTC DS1337 keeps the OSC
+ output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to
+ turn it off.
+
+
+commit 438a4c11260b4ea9805039b0b4f92f9df5306b02
+Date: Wed Mar 26 11:48:46 2008 +0100
+
+ Cleanup coding style, update CHANGELOG
+
+
+commit 218ca724c08ca8a649f0917cf201cf23d4b33f39
+Date: Wed Mar 26 10:40:12 2008 +0100
+
+ README: update documentation (availability, links, etc.)
+
+
+commit f6b44e0e4d18fe507833a0f76d24a9aa72c123f1
+Date: Tue Mar 25 12:09:07 2008 +1100
+
+ USB Storage, add meaningful return value
+
+ This patch changes the "usb storage" command to return success if it
+ finds a USB storage device, otherwise it returns error.
+
+
+commit 18e69a35efbb078403db0c0063986470dad7d082
+Date: Fri Mar 14 23:20:18 2008 +0300
+
+ 83xx/fdt_support: let user specifiy FSL USB Dual-Role controller role
+
+ Linux understands "host" (default), "peripheral" and "otg" (broken).
+ Though, U-Boot doesn't restrict dr_mode variable to these values (think
+ of renames in future).
+
+
+commit c7604783b236e368f225efb7b3efb418fe20b404
+Date: Fri Mar 14 23:20:30 2008 +0300
+
+ tsec: fix link detection for the RTL8211B PHY
+
+ RTL8211B sets link state register after autonegotiation complete,
+ so with bootdelay=0 RTL8211B will report lack of the link.
+
+ To fix this, we should wait for aneg to complete, even if the
+ link is currently down.
+
+
+commit 7fa9cbb00dc83fcf175042b6f20c2c9bce9a15f4
+Date: Mon Mar 24 20:47:09 2008 +0300
+
+ mpc83xx: add "fsl,soc" and "fsl,immr" compatible fixups
+
+ device_type = "soc" is being deprecated, newer device trees will use
+ "fsl,soc" and/or "fsl,immr" for the soc nodes.
+
+ This patch also adds clock-frequency property for soc nodes (the same
+ value as bus-frequency).
+
+
+commit 507e2d79c91441a0bb2cd3d0c31c8bfe3f8cec07
+Date: Mon Mar 24 13:00:59 2008 -0400
+
+ Modified the DDR SDRAM clock control register to delay MCK/MCK_B 3/4 clock
+
+ With the original value of 1/2 clock cycle delay, the system ran relatively
+ stable except when we run benchmarks that are intensive users of memory.
+ When I run samba connected disk with a HDBENCH test, the system locks-up
+ or reboots sporadically.
+
+
+commit a7ba32d480a86db5db8dcd8ca66b21b4cadda923
+Date: Mon Mar 24 12:44:13 2008 -0500
+
+ mpc83xx: Set PCI I/O bus-address base to zero.
+
+ The device trees for these boards describe PCI I/O as starting from
+ address zero from the device's perspective.
+
+ Placing I/O elsewhere may cause problems with certain PCI boards, and may
+ cause problems with Linux.
+
+
+commit f700e7df7fecf2d3765ae568ce77ce788cde4f3e
+Date: Mon Mar 24 20:47:05 2008 +0300
+
+ mpc83xx: MPC8360E-RDK: use 33.3(3)MHz CLKIN/SYS_CLK
+
+ At least on the "33MHz Pilot" board crystal is actually 33.3MHz.
+ This patch fixes "system time drifting" problem.
+
+
+commit 3a0cfdd576dc9b16d1468d37339182607c697fb7
+Date: Mon Mar 24 20:47:02 2008 +0300
+
+ mpc83xx: MPC8360E-RDK: define CONFIG_OF_STDOUT_VIA_ALIAS
+
+ This is needed to update /choosen/linux,stdout-path properly.
+
+
+commit 3419eb62f088d7a22f1d2a3cebf76b77e408b5b9
+Date: Mon Mar 24 20:47:00 2008 +0300
+
+ mpc83xx: MPC8360E-RDK: add dhcp command
+
+ Plus modify environment to use it and remove bootfile env variable,
+ it is internal and CONFIG_BOOTFILE is used for these purposes.
+
+
+commit d892b2dbb4087a26778bfd42470c3ea7d0e2b6aa
+Date: Mon Mar 24 20:46:57 2008 +0300
+
+ mpc83xx: MPC8360E-RDK: rework ddr setup, enable ecc
+
+ Current DDR setup easily causes memory corruption, this patch fixes it.
+
+ Also fix TIMING_CFG0_MRS_CYC definition.
+
+
+commit d47d49cc37a38f2719a3e1b9bbe08ac810cf2d9a
+Date: Mon Mar 24 20:46:53 2008 +0300
+
+ mpc83xx: MPC8360E-RDK: configure pario pins for AD7843 and FHCI
+
+ This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
+ controller and FHCI (QE USB).
+
+
+commit 7ad959490962e6842648d87d4bd795ea6cdcce67
+Date: Mon Mar 24 20:46:51 2008 +0300
+
+ mpc83xx: MPC8360E-RDK: add support for NAND
+
+
+commit 9a3e832aeb491861d029991241572ebdf4b5b61b
+Date: Mon Mar 24 20:46:46 2008 +0300
+
+ mpc83xx: MPC8360E-RDK: use RGMII_RXID interface mode
+
+ This is needed for BCM PHYs to work on this board.
+
+
+commit 300615dc5d9b0a2022fbc6af0c13159e33fd752e
+Date: Mon Mar 24 20:46:34 2008 +0300
+
+ uec: add support for Broadcom BCM5481 Gigabit PHY
+
+ This patch adds basic support for Broadcom BCM5481 PHY.
+
+ RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is
+
+
+commit 6a600c3a1876bc203445df4f0fd6b12648259666
+Date: Mon Mar 24 20:46:28 2008 +0300
+
+ uec: add support for RGMII_RXID interface mode
+
+ PHY drivers will use it to setup software delay between RXD and RXC
+ signals.
+
+
+commit 91cdaa3a9d7562b869d96774e9c9ddf142c0848d
+Date: Mon Mar 24 20:46:24 2008 +0300
+
+ uec: add support for gbit mii status readings
+
+
+commit aabce7fb505ffe55ebf3bf4dcafdae97a581558d
+Date: Mon Mar 24 17:40:47 2008 +0300
+
+ 83xx: define CONFIG_OF_STDOUT_VIA_ALIAS for the MPC837XERDB boards
+
+ This is primarily for the early console support.
+
+
+commit 2bd7460e9283ec98565189b3cdbcfb2bcdcdd635
+Date: Mon Mar 24 17:40:43 2008 +0300
+
+ 83xx: initialize serdes for MPC837XRDB boards
+
+ On the MPC8377ERDB: 2 SATA and 2 PCI-E.
+ On the MPC8378ERDB: 2 PCI-E
+ On the MPC8379ERDB: 4 SATA
+
+
+commit 453316a2a19642d8afcbca7452e40a6b44a197b1
+Date: Mon Mar 24 17:40:32 2008 +0300
+
+ 83xx: serdes setup routines
+
+ This patch adds few routines to configure serdes on 837x targets.
+
+
+commit a796cdf9c377cb4e5d61d1079a296608f8fbd903
+Date: Mon Mar 24 17:40:27 2008 +0300
+
+ 83xx: split COBJS onto separate lines
+
+ ..plus get rid of some #ifdefs in the .c files.
+
+
+commit 46a3aeea73c13ab04ebf7a8739afb87ac5da94a3
+Date: Mon Mar 24 17:40:23 2008 +0300
+
+ 83xx: nand support for MPC837XRDB boards
+
+
+commit 82e45a204190593e8613145a928f998fb8c909c4
+Date: Tue Mar 18 21:44:41 2008 -0400
+
+ Enable CONFIG_FLASH_SHOW_PROGRESS on the MPC8360EMDS.
+
+
+commit 0fa7a1b4719e325fce332689fb8754ec166191ff
+Date: Thu Mar 20 13:15:39 2008 -0400
+
+ mpc8323erdb: remove RTC and add EEPROM
+
+ There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.
+
+
+commit 5bbeea86eb6afb872374cd23217cb3c1018443ed
+Date: Thu Mar 20 13:15:34 2008 -0400
+
+ mpc8323erdb: Improve the system performance
+
+ The following changes are based on kernel UCC ethernet performance:
+
+ 1. Make the CSB bus pipeline depth as 4, and enable the repeat mode
+ 2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT
+ switch to enable this setting.
+
+ The following changes are based on the App Note AN3369 and
+ verified to improve memory latency using LMbench:
+
+ 3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0
+ 4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting
+ previously.
+ 5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on
+ Twr=15ns, and this was already the setting in DDR_MODE)
+ 6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
+ Trp=15ns)
+ 7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
+ Tras=40ns)
+ 8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
+ Trcd=15ns)
+ 9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on
+ Trfc=75ns)
+ 10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based
+ on Tfaw=50ns)
+ 11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
+ on CL=3 and WL=2).
+
+
+commit fc549c871f43933396a5b3e21d897023d4b31b8d
+Date: Thu Mar 20 13:15:28 2008 -0400
+
+ mpc8323erdb: use readable DDR config macros
+
+ Use available shift/mask macros to define DDR configuration.
+
+
+commit 89c7784ed90ba50301eec521144f95111e472906
+Date: Fri Feb 8 13:15:55 2008 -0600
+
+ 83xx: Add Vitesse VSC7385 firmware uploading
+
+ Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
+ the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
+ Cleaned up the board header files to make selecting the VSC7385 easier to
+ control.
+
+
+commit b55d98c6d5b8694e560a0e727b14cb6921d7cfcc
+Date: Fri Feb 8 13:15:54 2008 -0600
+
+ NET: Add Vitesse VSC7385 firmware uploading
+
+ The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX
+ and other boards. A small firwmare must be uploaded to its on-board memory
+ before it can be enabled. This patch adds the code which uploads firmware
+ (but not the firmware itself).
+
+ Previously, this feature was provided by a U-Boot application that was
+ made available only on Freescale BSPs. The VSC7385 firmware must still
+ be obtained separately, but at least there is no longer a need for a separate
+ application.
+
+
+commit aa6f6d171a1f9f46ee4f03ad6acb97a6bfb71855
+Date: Wed Mar 26 00:52:10 2008 +0100
+
+ Coding Style cleanyp; update CHANGELOG
+
+
+commit 43ddd9c820fec44816188f53346b464e20b3142d
+Date: Sat Mar 22 14:23:49 2008 -0400
+
+ Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T
+
+ These defines embedded the u-boot env variables and/or the bd_t structure
+ in the fdt blob. The conclusion of discussion on the u-boot email list
+ was that embedding these in the fdt blob is not useful: there are better
+ ways of passing the data (in fact, the fdt blob itself replaces the
+ bd_t struct).
+
+ The only board that enables these is the stxxtc and they don't appear
+ to be used by linux.
+
+
+commit 22ed2285743359fd1fe73e411dff914b2256e68f
+Date: Mon Mar 17 10:49:25 2008 +0100
+
+ rtc: Remove 2nd reference to max6900.o in drivers/rtc/Makefile
+
+
+commit 1bb707c39a0833e91d9f797dd862aaaaf4af264d
+Date: Mon Mar 17 08:54:06 2008 +0900
+
+ Add Flex-OneNAND booting support
+
+ Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
+ using a NOR Flash interface. This on-chip integration enables system designers
+ to reduce external system logic and use high-density NAND Flash
+ in applications that would otherwise have to use more NOR components.
+
+ Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
+ in more flexible way. While MLC area of Flex-OneNAND can be used to store data
+ that require low reliability and high density, SLC area of Flex-OneNAND
+ to store data that need high reliability and high performance. Flex-OneNAND
+ can let users take advantage of storing these two different types of data
+ into one chip, which is making Flex-OneNAND more cost- and space-effective.
+
+
+commit c512389cc4a10253249271ff6c887c6dab1f0db2
+Date: Thu Mar 13 13:50:52 2008 +0100
+
+ MPC5200: support setup without FEC
+
+ Include FEC specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
+ defined. Systems without FEC, i.e. no FEC node in DTB, should be possible.
+
+
+commit aa3511e422946041ef626f80a05ae5e8bfc700e6
+Date: Wed Mar 5 18:05:46 2008 -0600
+
+ FSL: Move board/mpc8266ads under board/freescale
+
+
+commit 7f1d846e5c5754449c286587d099d85246062772
+Date: Wed Mar 5 18:05:47 2008 -0600
+
+ FSL: Move board/mpc7448hpc2 under board/freescale
+
+
+commit b7e24d283e34727c2a6cdfdac2e09a426c579b73
+Date: Wed Mar 5 18:05:45 2008 -0600
+
+ FSL: Move board/mpc8260ads under board/freescale
+
+
+commit 6a8a5dc4759867c45aa95580deb8bf26669a5d97
+Date: Wed Mar 5 17:08:33 2008 +0900
+
+ net: Add support AX88796L ethernet device
+
+ AX88796L is device of NE2000 compatible.
+ This patch support AX88796L ethernet device.
+
+
+commit e0a6140dd381e1eed1ada2291166ef2616d8822b
+Date: Tue Mar 25 22:50:41 2008 +0100
+
+ ne2000 driver: change #ifdef to Makefile conditional compilation
+
+
+commit e710185aae90c64d39c2d453e40e58ceefe4f250
+Date: Wed Mar 5 17:08:20 2008 +0900
+
+ net: Divided code of NE2000 ethernet driver
+
+ There are more devices of the NE2000 base.
+ A present code is difficult for us to support more devices.
+ To support more NE2000 clone devices, separated the function.
+
+
+commit 395bce4f59a507a60a475f7ee46bed47de9482df
+Date: Sun Feb 24 23:58:13 2008 -0500
+
+ net/Blackfin: move on-chip MAC driver into drivers/net/
+
+ The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board
+ directory, but it is not board specific, so relocate it to the drivers dir
+ so that other Blackfin ports can utilize it.
+
+
+commit 8a30b4700942f37495d2e67f5998cdffb6e3ba8a
+Date: Sun Feb 24 23:52:35 2008 -0500
+
+ smc91111: use SSYNC() rather than asm(ssync) for Blackfin
+
+ Since the "ssync" instruction may have hardware anomalies associated with
+ it, have the smc91111 driver use the SSYNC macro rather than invoking it
+ directly. We workaround all the anomalies via this macro.
+
+
+commit 77ff7b7444ceb8022b46114f3d0b6d18e2fd1138
+Date: Sun Feb 17 22:57:47 2008 +0000
+
+ 8xx: Update OF support on 8xx
+
+ This patch does some shifting around of OF support on 8xx.
+
+
+commit 9c666a7db0b2285a270c68810889ce7d5dba304b
+Date: Fri Feb 15 15:16:18 2008 -0600
+
+ ppc: Allow boards to specify how much memory they can map
+
+ For historical reasons we limited the stack to 256M because some boards
+ could only map that much via BATS. However newer boards are capable of
+ mapping more memory (for example 85xx is capble of doing up to 2G).
+
+
+commit a6f5f317cd074bbbfa2aab4fca05904c811c19fb
+Date: Fri Feb 15 01:05:58 2008 +0000
+
+ 8xx : Add OF support to Adder875 board port - resubmit
+
+
+commit d058698fd2d9f769ff38ac53c8708b3fdd314f2d
+Date: Thu Feb 14 20:44:42 2008 -0600
+
+ Add setexpr command
+
+ Add a simple expr style command that will set an env variable as the result
+ of the command. This allows us to do simple math in shell. The following
+ operations are supported: &, |, ^, +, -, *, /.
+
+
+commit 3f105faa64b9826e088711fdfcaa70cb1230397a
+Date: Wed Mar 5 17:27:48 2008 -0600
+
+ FSL: Move board/mpc7448hpc2 under board/freescale
+
+
+commit 449c703374a8868453425e15da7e2f76221b72e4
+Date: Wed Mar 5 17:21:43 2008 -0600
+
+ FSL: Move board/mpc8266ads under board/freescale
+
+
+commit 5863577989ad689427bb750107e9a75f1c1645d2
+Date: Wed Mar 5 16:41:41 2008 -0600
+
+ FSL: Move board/mpc8260ads under board/freescale
+
+
+commit 8a773983957ee6c4aa344469b742f29c7d26afbd
+Date: Tue Mar 25 21:30:08 2008 +0900
+
+ [MIPS] Move gth2_config from ARM section to MIPS
+
+
+commit 373b16fc0c5ae34d28b9027f809ae3cbf45cdd15
+Date: Tue Mar 25 21:30:07 2008 +0900
+
+ [MIPS] Extend MIPS_MAX_CACHE_SIZE upto 64kB
+
+
+commit d98e348e2ed5aab8f7a6471ff628ab0688b8a459
+Date: Tue Mar 25 21:30:07 2008 +0900
+
+ [MIPS] Fix dcache_status()
+
+ You can't judge UNCACHED by Config.K0 LSB.
+
+
+commit b0c66af53ec9385ac2d1cc2e5d7d1ecdc81caf34
+Date: Tue Mar 25 21:30:07 2008 +0900
+
+ [MIPS] Introduce _machine_restart
+
+ Handles machine specific functions by using weak functions.
+
+
+commit decaba6f5cf386d569ac3997bebb871b966c6b18
+Date: Tue Mar 25 21:30:07 2008 +0900
+
+ [MIPS] Cleanup CP0 Status initialization
+
+ Add setup_c0_status from Linux. For the moment we disable interrupts, set
+ CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
+ reset-time configuration and will work well across most processors.
+
+
+commit d43d43ef2845af309c25a64bb9c2c5fb3261bc23
+Date: Tue Mar 25 21:30:07 2008 +0900
+
+ [MIPS] Initialize CP0 Cause before setting up CP0 Status register
+
+ Without this change, we'll be suffering from deffered WATCH exception
+ once Status.EXL is cleared. Make sure Cause.WP is cleared.
+
+
+commit 26138623230ca2bad3c78e05a65527ea70c8b688
+Date: Tue Mar 25 21:30:07 2008 +0900
+
+ [MIPS] INCA-IP: Move watchdog init code from start.S to lowlevel_init()
+
+ Move things to appropriate place.
+
+
+commit ccf8f824ef67df028dedb29f8ea5d71a5a88d895
+Date: Tue Mar 25 21:30:06 2008 +0900
+
+ [MIPS] Implement flush_cache()
+
+ We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you
+ don't need to do Hit_Invalidate_I, but flush_cache() needs it since this
+ function is used not only in U-Boot specfic programs but also at loading
+ target binaries.
+
+
+commit 2e0e5271aac917812a76c72030a2b2c6f1d3387d
+Date: Tue Mar 25 21:30:06 2008 +0900
+
+ [MIPS] Fix I-/D-cache initialization loops
+
+ Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I
+ again per a loop for I-cache initialization. But according to 'See MIPS
+ Run', we're encouraged to use three separate loops rather than combining
+ them *for both I- and D-cache*. This patch tries to fix this.
+
+ In accordance with fixing above, mips_init_[id]cache are separated from
+ mips_cache_reset(), and rewrite cache loops are completely rewritten with
+ useful macros.
+
+
+commit 1898840797c7f50799377bd5b285a8a93a82c419
+Date: Tue Mar 25 21:30:06 2008 +0900
+
+ [MIPS] Replace memory clearance code with f_fill64
+
+ This routine fills memory with zero by 64 bytes, and is 64-bit capable.
+
+
+commit 2f5d414ccb4024dd0992ff6b22561732dbc73590
+Date: Tue Mar 25 21:30:06 2008 +0900
+
+ [MIPS] cpu/mips/cache.S: Introduce NESTED/LEAF/END macros
+
+ This patch replaces the current function definitions with NESTED, LEAF
+ and END macro. They specify some more additional information about the
+ function; an alignment of symbol, type of symbol, stack frame usage, etc.
+ These information explicitly tells the assembler and the debugger about
+ the types of code we want to generate.
+
+
+commit 282223a607c611425fa33f5428f8eae6636972bb
+Date: Tue Mar 25 11:43:17 2008 +0900
+
+ [MIPS] asm headers' updates
+
+ Make some asm headers adjusted to the latest Linux kernel.
+
+
+commit e1390801a3c1a2b6d12fa90be368efc19f5b9bfd
+Date: Tue Mar 25 11:39:29 2008 +0900
+
+ [MIPS] Request for the 'mips_cache_lock()' removal
+
+ The initial intension of having mips_cache_lock() was to use the cache
+ as memory for temporary stack use so that a C environment can be set up
+ as early as possible.
+
+ But now mips_cache_lock() follow lowlevel_init(). We've already have the
+ real memory initilaized at this point, therefore we could/should use it.
+ No reason to lock at all.
+
+ Other problems:
+
+ Cache locking is not consistent across MIPS implementaions. Some imple-
+ mentations don't support locking at all. The style of locking varies -
+ some support per line locking, others per way, etc. Some parts use bits
+ in status registers instead of cache ops. Current mips_cache_lock() is
+ not necessarily general-purpose.
+
+ And this is worthy of special mention; once U-Boot/MIPS locks the lines,
+ they are never get unlocked, so the code relies on whatever gets loaded
+ after U-Boot to re-initialize the cache and clear the locks. We're sup-
+ posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
+ but leave the situation as it is for a long time.
+
+ For these reasons, I proposed the removal of mips_cache_lock() from the
+ global start-up code.
+
+ This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
+ *things have changed*. If he wants the same behavior as before, he needs
+ to have CFG_INIT_RAM_LOCK_MIPS in his config file.
+
+ If we don't have any regression report through several releases, then
+ we'll remove codes entirely.
+
+
+commit 0d48926c87ec96f974a6ac4034f4a2f2eab3255f
+Date: Mon Mar 24 11:30:54 2008 +0100
+
+ lwmon5 SYSMON POST: fix backlight control
+
+ If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be
+ run on the board, then the SYSMON POST controls the display backlight
+ (doesn't switch backlight ON if POST FAILED, and does switch the
+ backlight ON if PASSED).
+
+ If not, then the video driver controls the display backlight (just
+ switch ON the backlight upon initialization).
+
+
+commit ff2bdfb2c1e073f65c065011f1e18d0a130bd3d8
+Date: Mon Mar 24 11:29:14 2008 +0100
+
+ lwmon5 SYSMON POST: fix handling of negative temperatures
+
+ Fix errors in the LWMON5 Sysmon POST for negative temperatures.
+
+
+commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2
+Date: Fri Mar 7 16:04:25 2008 +0900
+
+ pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option
+
+ In current source code, when the device number of PCI is 0, process PCI
+ bridge without fail. However, when the device number is 0, it is not PCI
+ always bridge. There are times when device of PCI allocates.
+
+ When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
+ use this patch.
+
+
+commit 86aea3eaefa248ffb9328e2b50c64720489cdbeb
+Date: Fri Mar 21 09:18:40 2008 +0100
+
+ LWMON5: fix dsPIC POST
+
+ Add test for DPIC_SYS_ERROR_REG to be zero in the LWMON5 dsPIC POST.
+
+
+commit 388b82fddc7c05596f3f615f190da0448227dc82
+Date: Thu Mar 20 23:23:13 2008 +0100
+
+ [new uImage] Enable new uImage support for the pcs440ep board.
+
+
+commit 95f4ec2b9c910c7261e6f060ea530d58b039692d
+Date: Thu Mar 20 23:23:13 2008 +0100
+
+ [new uImage] Do not compile new uImage format support by default
+
+ Disable default building of new uImage format support in preparation
+ for merge with the master. Support for new format can be enabled on
+ a per-board basis, by defining the following in the board's config file:
+
+ #define CONFIG_FIT 1
+ #define CONFIG_OF_LIBFDT 1
+
+ This can be optionally defined to give more verbose output:
+
+ #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
+
+
+commit dafaede8a46c7159310239e036c93e31c6374487
+Date: Thu Mar 20 23:20:31 2008 +0100
+
+ [new uImage] Disable debuging output in preparation for merge with master
+
+
+commit fbe7a155027beacebaee9b32e1ada781fe924bca
+Date: Thu Mar 20 19:38:45 2008 +0100
+
+ [new uImage] Compilation and new uImage handling fixes for imxtract
+
+ Fix imxtract command not being compiled-in despite CONFIG_CMD_XIMG being in
+ include/config_cmd_default.h. Fix few warnings and handling of new format
+ images.
+
+
+commit 36cc8cbb3379d5166f882641123521735c469f92
+Date: Thu Mar 20 23:10:19 2008 +0100
+
+ [new uImage] Fix autoscr command used with new uImage format
+
+
+commit 43142e817f0597be412e7cbe19413f5532eafa5d
+Date: Thu Mar 20 23:10:19 2008 +0100
+
+ [new uImage] Fix *.its files location in documentation
+
+
+commit 81a0ac62ea29f8252d0a714709d0ecfdbba2a15e
+Date: Thu Mar 20 22:01:38 2008 +0100
+
+ lwmon5 POST: remove unreachable code
+
+ plus some coding style cleanup
+
+
+commit b73a19e1609d0f705cbab8014ca17aefe89e4c76
+Date: Thu Mar 20 17:56:04 2008 +0300
+
+ LWMON5: POST RTC fix
+
+ Modify the RTC API to provide one a status for the time reported by
+ the rtc_get() function:
+ 0 - a reliable time is guaranteed,
+ < 0 - a reliable time isn't guaranteed (power fault, clock issues,
+ and so on).
+
+ The RTC chip drivers are responsible for providing this info if the
+ corresponding chip supports such functionality. If not - always
+ report that the time is reliable.
+
+ The POST RTC test was modified to detect the RTC faults utilizing
+ this new rtc_get() feature.
+
+
+commit a5cc5555ccee596908a7d8cf22a104f6b993bfd5
+Date: Wed Mar 19 14:25:14 2008 +0100
+
+ TQM5200B: update MTD partition layout
+
+ - insert partition for dtb blob to TQM5200B MTD layout
+ - set env variables dependent on the configured board
+ (TQM5200 or TQM5200B)
+
+
+commit f0105727d132f56a21fa3ed8b162309cca6cac44
+Date: Wed Mar 19 07:09:26 2008 +0100
+
+ CFI: Small cleanup for FLASH_SHOW_PROGRESS
+
+ With this patch we don't need that many #ifdef's in the code. It moves
+ the subtraction into the macro and defines a NOP-macro when
+ CONFIG_FLASH_SHOW_PROGRESS is not defined.
+
+
+commit 9a042e9ca512beaaa2cb450274313fc477141241
+Date: Sat Mar 8 13:48:01 2008 -0500
+
+ Flash programming progress countdown.
+
+
+commit 5e339fd9ed539a7d7fec59cfc88f0857ab26a53f
+Date: Wed Mar 19 10:00:06 2008 +0100
+
+
+
+commit 11abe45c48ec3485a6c1a5168ce8d79c3288adc1
+Date: Mon Feb 18 18:09:04 2008 +1100
+
+ libfdt: Remove no longer used code from fdt_node_offset_by_compatible()
+
+ Since fdt_node_offset_by_compatible() was converted to the new
+ fdt_next_node() iterator, a chunk of initialization code became
+ redundant, but was not removed by oversight. This patch cleans it up.
+
+
+commit d0ccb9b140b472039732de102fc14597eedb14df
+Date: Mon Feb 18 18:06:31 2008 +1100
+
+ libfdt: Trivial cleanup for CHECK_HEADER)
+
+ Currently the CHECK_HEADER() macro is defined local to fdt_ro.c.
+ However, there are a handful of functions (fdt_move, rw_check_header,
+ fdt_open_into) from other files which could also use it (currently
+ they open-code something more-or-less identical). Therefore, this
+ patch moves CHECK_HEADER() to libfdt_internal.h and uses it in those
+ places.
+
+
+commit fe30a354cdbb808b5f15366a935b151a4ccee74f
+Date: Wed Feb 20 14:32:36 2008 -0600
+
+ Fix fdt boardsetup command parsing
+
+ The introduciton of the 'fdt bootcpu' broke parsing for 'fdt boardsetup'.
+
+
+commit 804887e6001e2f00bea11431bf34d6d472512cda
+Date: Fri Feb 15 03:34:36 2008 -0600
+
+ Add sub-commands to fdt
+
+ fdt header - Display header info
+ fdt bootcpu <id> - Set boot cpuid
+ fdt memory <addr> <size> - Add/Update memory node
+ fdt rsvmem print - Show current mem reserves
+ fdt rsvmem add <addr> <size> - Add a mem reserve
+ fdt rsvmem delete <index> - Delete a mem reserves
+
+
+commit f84d65f9b085ffbed464d1d58e8aaa8f5a2efc07
+Date: Thu Feb 14 16:50:34 2008 +1100
+
+ libfdt: Fix NOP handling bug in fdt_add_subnode_namelen()
+
+ fdt_add_subnode_namelen() has a bug if asked to add a subnode to a
+ node which has NOP tags interspersed with its properties. In this
+ case fdt_add_subnode_namelen() will put the new subnode before the
+ first NOP tag, even if there are properties after it, which will
+ result in an invalid blob.
+
+ This patch fixes the bug, and adds a testcase for it.
+
+
+commit ae0b5908de3b9855f8931bc9b32c9fc4962df5a9
+Date: Tue Feb 12 11:58:31 2008 +1100
+
+ libfdt: Add and use a node iteration helper function.
+
+ This patch adds an fdt_next_node() function which can be used to
+ iterate through nodes of the tree while keeping track of depth. This
+ function is used to simplify the iteration code in a lot of other
+ functions, and is also exported for use by library users.
+
+
+commit 9eaeb07a7185d852c7aa10735ecd4e9edf24fb5d
+Date: Fri Jan 11 14:55:05 2008 +1100
+
+ libfdt: Add fdt_set_name() function
+
+ This patch adds an fdt_set_name() function to libfdt, mirroring
+ fdt_get_name(). This is a r/w function which alters the name of a
+ given device tree node.
+
+
+commit 23e20aa6488e6c0622496549861bfdc74108debe
+Date: Tue Mar 18 13:33:30 2008 +0100
+
+ lwmon5: Fix register test logic to match the specific GDC h/w.
+
+
+commit 46bc0a938779aa1d664b847d36b08aa00f22e539
+Date: Tue Mar 18 13:27:57 2008 +0100
+
+ Fix backlight in the lwmon5 POST.
+
+ Backlight was switched on even when temperature was too low.
+
+
+commit 3d61018643a2cd38c145aa6dde53f3f5f1a0e9cf
+Date: Wed Feb 6 18:48:36 2008 +0100
+
+ The patch introduces the alternative configuration of the log buffer for the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory), the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ..., PPC440EPX_GPT0_COMP5).
+
+ To enable this, alternative, configuration the U-Boot board configuration
+ file for lwmon5 includes the definitions of alternative addresses for header
+ (CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).
+
+ The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
+ and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
+ lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).
+
+
+commit 0f009f781b5b88f25769e154ea4d42db13baf0c6
+Date: Mon Feb 4 17:11:53 2008 +0100
+
+ Add support for the lwmon5 board reset via GPIO58.
+
+
+commit f694e32f93565ec1fa8d0226c584d6b89e931ed9
+Date: Mon Feb 4 17:09:55 2008 +0100
+
+ Some fixes to dspic, fpga, and gdc post tests for lwmon5. Disable external watch-dog for now.
+
+
+commit b428f6a8c65c5303e5f96db8d24f2f699d94a98c
+Date: Mon Feb 4 14:11:03 2008 +0100
+
+ The patch introduces the CRITICAL feature of POST tests. If the test marked as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode.
+
+
+commit 8f15d4addd49c956412e1e3bfc764a0c8b1f3184
+Date: Mon Feb 4 14:10:42 2008 +0100
+
+ The patch adds new POST tests for the Lwmon5 board. These are:
+
+ * External Watchdog test;
+ * dsPIC tests;
+ * FPGA test;
+ * GDC test;
+ * Sysmon tests.
+
+
+commit c2ed33efbfff5767bca236828e021c55fd547b6c
+Date: Mon Feb 4 14:10:01 2008 +0100
+
+ Enable CODEC POST with CFG_POST_CODEC rather than with CFG_POST_DSP.
+
+
+commit 3a5d1e7f1309998791702b2a559e3126781746b9
+Date: Tue Mar 18 13:33:30 2008 +0100
+
+ lwmon5: Fix register test logic to match the specific GDC h/w.
+
+
+commit 0f855a1f056a8c22116a2103a3900cbfb669df0b
+Date: Tue Mar 18 13:27:57 2008 +0100
+
+ Fix backlight in the lwmon5 POST.
+
+ Backlight was switcehd on even when temperature was too low.
+
+
+commit 2d991958b1e420fbfe17b128bd26ade74be5efcc
+Date: Wed Feb 6 18:48:36 2008 +0100
+
+ The patch introduces the alternative configuration of the log buffer for
+ the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory),
+ the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ...,
+ PPC440EPX_GPT0_COMP5).
+
+ To enable this, alternative, configuration the U-Boot board configuration
+ file for lwmon5 includes the definitions of alternative addresses for header
+ (CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).
+
+ The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
+ and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
+ lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).
+
+
+commit ff818b21b069f4bc9cb73373cc5a16014be101b7
+Date: Mon Feb 4 17:11:53 2008 +0100
+
+ Add support for the lwmon5 board reset via GPIO58.
+
+
+commit 603f194e5ad81bb2ef42d6d8aaa74de175bcb411
+Date: Mon Feb 4 17:09:55 2008 +0100
+
+ Some fixes to dspic, fpga, and gdc post tests for lwmon5.
+ Disable external watch-dog for now.
+
+
+commit e262efe35742c1ad4b0966ff501efc26f34a0aec
+Date: Mon Feb 4 14:11:03 2008 +0100
+
+ The patch introduces the CRITICAL feature of POST tests. If the test
+ marked as POST_CRITICAL fails then the alternative, post_critical,
+ boot-command is used. If this command is not defined then U-Boot
+ enters into interactive mode.
+
+
+commit 65b20dcefc89618193fa51947968dada91e4c778
+Date: Mon Feb 4 14:10:42 2008 +0100
+
+ The patch adds new POST tests for the Lwmon5 board.
+ These are:
+
+ * External Watchdog test;
+ * dsPIC tests;
+ * FPGA test;
+ * GDC test;
+ * Sysmon tests.
+
+
+commit 8dc3b2303d2b57c774b609ca0e7043ed8f9b88c1
+Date: Mon Feb 4 14:10:01 2008 +0100
+
+ Enable CODEC POST with CFG_POST_CODEC rather than with CFG_POST_DSP.
+
+
+commit 3515fd18d4e8e44f863ac7142b55e22b109e9af2
+Date: Tue Mar 18 17:35:51 2008 +0100
+
+ HMI1001: fix compile problem.
+
+
+commit 1f2a9970109cebf7446e0503b10b71f8673045ee
+Date: Mon Feb 18 05:32:30 2008 -0500
+
+ Blackfin: BF537-stamp: drop board-specific flash driver for CFI
+
+ The parallel flash on the BF537-STAMP is CFI compliant, so there is no need
+ for the board specific driver at all. Just use the common CFI driver.
+
+
+commit 5b22163fef865af2b6bfb6b75f1b7bf443ce170c
+Date: Tue Feb 19 00:36:14 2008 -0500
+
+ Blackfin: add proper ELF markings to some assembly functions
+
+
+commit cf675d3b2b9c3511c1d99bc8f8f38fd2f08bfcaf
+Date: Tue Feb 19 00:35:17 2008 -0500
+
+ Blackfin: new cplbinfo command for viewing cplb tables
+
+
+commit aadb72503cd1602349a5fe53356d5f55ecc1b900
+Date: Mon Feb 18 05:37:51 2008 -0500
+
+ Blackfin: update MAINTAINERS list
+
+ Add maintainer information for the Blackfin boards.
+
+
+commit f7ce12cb65a30c6e152eecf26f0304b7d78cf39d
+Date: Mon Feb 18 05:26:48 2008 -0500
+
+ Blackfin: convert BFIN_CPU to CONFIG_BFIN_CPU
+
+ Stop tying things to the processor that should be tied to other defines and
+ change BFIN_CPU to CONFIG_BFIN_CPU so that it can be used in the build
+ system to select the -mcpu option.
+
+
+commit 86a20fb920bd198105acf7b1191117f566d637ed
+Date: Sat Feb 16 07:40:36 2008 -0500
+
+ Blackfin: move bootldr command to common code
+
+ This moves the Blackfin-common bootldr command out of the BF537-STAMP
+ specific board directory and into the common directory so that all Blackfin
+ boards may utilize it.
+
+
+commit decbe029b2a9d3333d02c433389b1c821eea96d7
+Date: Fri Mar 14 11:05:20 2008 +0100
+
+ mgcoge: update configuration
+
+ Fix configuration for mgcoge board
+
+
+commit c136724cda0219c49f1d4b346f00da29b14fdf14
+Date: Sun Mar 16 01:22:59 2008 +0100
+
+ drivers/rtc/Makefile: keep list sorted
+
+
+commit 9536dfcce03e7be4ccbceb47a08d9ba07ada362f
+Date: Sat Mar 15 15:40:26 2008 +0100
+
+ Add support for Intersil isl1208 RTC
+
+
+commit 0210cff3d079d97b2156b13685ee8de368e68a1a
+Date: Sat Mar 15 17:36:41 2008 +0100
+
+ cramfs: Fix ifdef
+
+
+commit 0b8f2a27861a9fd06eb55a34f855ec9c5102aab4
+Date: Sun Mar 16 01:12:58 2008 +0100
+
+ Conding style cleanup
+
+
+commit 41712b4e8c95dff23354bcd620e1f9477160c190
+Date: Wed Mar 5 12:31:53 2008 +0100
+
+ ppc4xx: Add USB OHCI support to AMCC Canyonlands 460EX eval board
+
+ This patch adds USB OHCI support to the Canyonlands board port. It also
+ enables EXT2 support.
+
+
+commit 2596f5b9d353ff3e4387a3325d05740f16958038
+Date: Wed Mar 5 12:29:32 2008 +0100
+
+ usb: Add CFG_OHCI_USE_NPS to common USB-OHCI driver
+
+ This patch adds CFG_OHCI_USE_NPS to the common USB-OHCI driver. This
+ way a board just needs to define this new option to enable the "force
+ NoPowerSwitching mode" instead of adding new CPU/architecture defines
+ to the USB source itself.
+
+ This new option will be used first with the new AMCC 460EX Canyonlands
+ board port, which will be posted in a few days.
+
+ This patch also fixes a small compilation problem when DEBUG is enabled.
+
+
+commit 71665ebf88408ff2acb762af47989fd4365b321a
+Date: Mon Mar 3 17:27:02 2008 +0100
+
+ ppc4xx: Add Canyonlands NAND booting support
+
+ 460EX doesn't support a fixed bootstrap option to boot from 512 byte page
+ NAND devices. The only bootstrap option for NAND booting is option F for
+ 2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
+ EEPROM needs to be programmed accordingly.
+
+ This patch adds basic NAND booting support for the AMCC Canyonlands aval
+ board and also adds support to the "bootstrap" command, to enable NAND
+ booting I2C setting.
+
+ Tested with 512 byte page NAND device (32MByte) on Canyonlands.
+
+
+commit c813f1f835a7edfdb929f2843b09db72cd5cd2f2
+Date: Tue Mar 11 16:53:00 2008 +0100
+
+ ppc4xx: Add AMCC Canyonlands support (460EX) (3/3)
+
+ This patch adds support for the AMCC Canyonlands 460EX evaluation
+ board.
+
+
+commit 6983fe21f774a924d3adb263a270bc2f301f2aa2
+Date: Tue Mar 11 16:52:24 2008 +0100
+
+ ppc4xx: Add AMCC Canyonlands support (460EX) (2/3)
+
+ This patch adds support for the AMCC Canyonlands 460EX evaluation
+ board.
+
+
+commit 8e1a3fe545bbcfceafe183344ebc9f1ad03819c1
+Date: Tue Mar 11 16:51:17 2008 +0100
+
+ ppc4xx: Add AMCC Canyonlands support (460EX) (1/3)
+
+ This patch adds support for the AMCC Canyonlands 460EX evaluation
+ board.
+
+
+commit 43c60992cdf72496e7eaaa3fbd37ebbe75835f69
+Date: Tue Mar 11 15:11:43 2008 +0100
+
+ ppc4xx: Add basic support for AMCC 460EX/460GT (5/5)
+
+ This patch adds basic support for the AMCC 460EX/460GT PPC's.
+
+
+commit 6f2eb3f3d8ea2dbb224d0da5a12038693bab9945
+Date: Tue Mar 11 15:11:18 2008 +0100
+
+ ppc4xx: Add basic support for AMCC 460EX/460GT (4/5)
+
+ This patch adds basic support for the AMCC 460EX/460GT PPC's.
+
+
+commit 999ecd5aca381984d8ebbeb207ece82a1c275577
+Date: Tue Mar 11 15:07:10 2008 +0100
+
+ ppc4xx: Add basic support for AMCC 460EX/460GT (3/5)
+
+ This patch adds basic support for the AMCC 460EX/460GT PPC's.
+
+
+commit 2801b2d2a9906f206ab9ee8d0b6e746d2b7fe05a
+Date: Tue Mar 11 15:05:50 2008 +0100
+
+ ppc4xx: Add basic support for AMCC 460EX/460GT (2/5)
+
+ This patch adds basic support for the AMCC 460EX/460GT PPC's.
+
+
+commit 8ac41e3e37c3080c6b1d9461d654161cfe2aa492
+Date: Tue Mar 11 15:05:26 2008 +0100
+
+ ppc4xx: Add basic support for AMCC 460EX/460GT (1/5)
+
+ This patch adds basic support for the AMCC 460EX/460GT PPC's.
+
+
+commit 56e410178375d9f20be25fb24e180974f0ae120b
+Date: Tue Feb 19 22:07:57 2008 +0100
+
+ ppc4xx: interrupt.c reworked
+
+ This patch is a rework of the 4xx interrupt handling done while
+ adding the 460EX/GT support. Interrupts are needed on 4xx for the
+ EMAC driver.
+
+
+commit 84a999b6cdd0b02dc7de2cacc306eaa84afe2b46
+Date: Tue Feb 19 22:01:57 2008 +0100
+
+ ppc4xx: program_tlb now uses 64bit physical addess
+
+ This patch changes the physical addess parameter from 32bit to 64bit.
+ This is needed for 36bit 4xx platforms to access areas located
+ beyond the 4GB border, like SoC peripherals (EBC etc.).
+
+
+commit c3307fa186af85771924c434997089b8104c0a46
+Date: Tue Feb 19 21:58:25 2008 +0100
+
+ ppc4xx: miiphy.c reworked
+
+ While adding the 460EX/GT support I reworked the 4xx miiphy code. It
+ badly neede some cleanup.
+
+
+commit 88aff62df39c0756241ea9f9b5a7b3ade26cb82b
+Date: Tue Feb 19 16:21:49 2008 +0100
+
+ rtc: Add M41T62 support
+
+ This patch add support for the STM M41T62 RTC. It is used and tested
+ on the AMCC Canyonlands 406EX platform.
+
+
+commit 217d383e201adc7f2271145ae345ea5eae2b7170
+Date: Mon Feb 25 18:46:43 2008 +0100
+
+ ppc4xx: Add 405GPr based MCU25 board specific files
+
+
+commit 75a66dcdb383863ad33f0534cfc27b7a86947dad
+Date: Mon Feb 25 18:46:42 2008 +0100
+
+ ppc4xx: Add 405GPr based MCU25 board config file
+
+
+commit b05f35436b733a240559e77e46bed8439665ecc5
+Date: Mon Feb 25 18:46:41 2008 +0100
+
+ ppc4xx: Add 405GPr based MCU25 board. Global files
+
+
+commit 14c27b35ac812a71abce6e3e2f4129d5e9313660
+Date: Mon Feb 25 18:37:02 2008 +0100
+
+ ppc4xx: HCU4/5. remove obsolete hcu_flash.c
+
+
+commit a079494853cc2bfeddb26673219db0b4b2b31566
+Date: Mon Feb 25 18:37:01 2008 +0100
+
+ ppc4xx: HCU4/5. Use FLASH_CFI_LEGACY
+
+ Cleanup: Remove custom flash driver for 8 bit boot-eprom and replace it with
+ the FLASH_CFI_LEGACY et al. config options.
+
+
+commit e4170e5a50c8110f792bc37472833ae669d69951
+Date: Tue Mar 11 13:52:25 2008 +0100
+
+ ppc4xx: Fix comment in 405EX DDR2 init code
+
+
+commit 766529fccc860ecb9e955b4239dff69cd9e4ea09
+Date: Fri Mar 14 16:22:34 2008 +0100
+
+ Add MD5 support to the new uImage format
+
+
+commit 0ede0c383530a418cf98be9122371a86573cd0db
+Date: Fri Mar 14 16:22:34 2008 +0100
+
+ Add the MD5 algorithm
+
+ MD5 supoprt is turned on by defining CONFIG_MD5, the digest can be then
+ calculated using the md5() function -- see include/md5.h for details.
+
+
+commit b8aa57b5d4d69e8f0810a5e632c0ce41c0f46ee0
+Date: Fri Mar 14 16:04:54 2008 +0100
+
+ tools/setlocalversion: use a git-describe-ish format
+
+ Change the automatic local version to have the form -nnnnn-gSHA1SUMID,
+ where 'nnnnn' is the number of commits since the last tag (i.e.,
+ 1.3.2-rc3). This makes it much easier to recognize "newer" versions
+ and to see how much has been changed since the referenced tag.
+
+ Stolen from Linux kernel's scripts/setlocalversio, see commit d882421f.
+
+
+commit c6dc21c84de0f159a1752c5ebd33cff843f63609
+Date: Thu Mar 13 14:32:03 2008 +0100
+
+ HMI1001: add support for MPC5200 Rev. B processors.
+
+
+commit 90f13dce7a7a9a84d5730576c9a24d0dbb07cb3a
+Date: Thu Mar 13 14:29:49 2008 +0100
+
+ TQM5200: remove dead code
+
+ This board never used a MGT5100 processor.
+
+
+commit afe45c87e3c5d77bad76b1a57dccd20764d45b5d
+Date: Wed Mar 12 12:14:15 2008 +0100
+
+ [new uImage] Fix build issue on ARM
+
+ ARM platforms don't have a bd->bi_memsize so use bd->bi_dram[0].size instead.
+
+
+commit 3310c549a73a949430bfda90876df7552a1dab0c
+Date: Wed Mar 12 12:13:13 2008 +0100
+
+ [new uImage] Add new uImage format documentation and examples
+
+ Create doc/uImage.FIT documentation directory with the following files:
+ - command_syntax_extensions.txt : extended command syntax description
+ - howto.txt : short usage howto
+ - source_file_format.txt : internal new uImage format description
+
+ Add example image source files:
+ - kernel.its
+ - kernel_fdt.its
+ - multi.its
+
+ Update README appropriately.
+
+
+commit 1ec73761d2e247078f4520a265d463e8b73391a2
+Date: Wed Mar 12 10:35:52 2008 +0100
+
+ [new uImage] Fix definition of common bootm_headers_t fields
+
+ verify, autostart and lmb fields are used regardless of CONFIG_FIT
+ setting, move their definitions to common section.
+
+
+commit 1d1cb4270edc6a99276834064069717f9782c491
+Date: Wed Mar 12 10:35:51 2008 +0100
+
+ [new uImage] Fix build problems on trab board
+
+
+commit f773bea8e11f4a11c388dcee956b2444203e6b65
+Date: Wed Mar 12 10:35:46 2008 +0100
+
+ [new uImage] Add proper ramdisk/FDT handling when FIT configuration is used
+
+ Save FIT configuration provied in the first bootm argument and use it
+ when to get ramdisk/FDT subimages when second and third (ramdisk/FDT)
+ arguments are not specified.
+
+
+commit 2682ce8a4225f23d72bb7fed069e928dd39d34ae
+Date: Wed Mar 12 10:33:01 2008 +0100
+
+ [new uImage] More verbose kernel image uncompress error message
+
+
+commit 1372cce2b9040fb640e5032b84e3a033a22d6ff0
+Date: Wed Mar 12 10:33:01 2008 +0100
+
+ [new uImage] Use show_boot_progress() for new uImage format
+
+ This patch allocates a set of show_boot_progress() IDs for new uImage format
+ and adds show_boot_progress() calls in new uImage format handling code.
+
+
+commit c28c4d193dbfb20b2dd3a5447640fd6de7fd0720
+Date: Wed Mar 12 10:33:01 2008 +0100
+
+ [new uImage] Add new uImage fromat support to fpga command
+
+
+commit 09475f7527460e426c0e0628fc5b8f3754fbaa23
+Date: Wed Mar 12 10:33:01 2008 +0100
+
+ [new uImage] Add new uImage format handling to other bootm related commands
+
+ Updated commands:
+
+ docboot - cmd_doc.c
+ fdcboot - cmd_fdc.c
+ diskboot - cmd_ide.c
+ nboot - cmd_nand.c
+ scsiboot - cmd_scsi.c
+ usbboot - cmd_usb.c
+
+
+commit 1b7897f28d49a80d78d760ec6f6f11dc0f914338
+Date: Wed Mar 12 10:33:00 2008 +0100
+
+ [new uImage] Add new uImage format support to imgextract command
+
+
+commit 424c4abdd175d2c470510df8ce0e32d3f463ec16
+Date: Wed Mar 12 10:33:00 2008 +0100
+
+ [new uImage] Add new uImage format support to autoscript routine
+
+ autoscript() routine is updated to accept second argument, which
+ is only used for FIT images and provides a FIT subimage unit name.
+
+ autoscript() routine callers must now pass two arguments. For
+ non-interactive use (like in cmd_load.c, cmd_net.c), new environment
+ variable 'autoscript_uname' is introduced and used as a FIT
+ subimage unit name source.
+
+ autoscript command accepts extended syntax of the addr argument:
+ addr:<subimg_uname>
+
+
+commit cd7c596e9f561dbbc17b717277438aee78cde14f
+Date: Wed Mar 12 10:33:00 2008 +0100
+
+ [new uImage] Add new uImage format support to arch specific do_bootm_linux() routines
+
+ This patch updates architecture specific implementations of
+ do_bootm_linux() adding new uImage format handling for
+ operations like get kernel entry point address, get kernel
+ image data start address.
+
+
+commit 3dfe110149311425919e6d6a14b561b4207498f1
+Date: Wed Mar 12 10:32:59 2008 +0100
+
+ [new uImage] Add node offsets for FIT images listed in struct bootm_headers
+
+ This patch adds new node offset fields to struct bootm_headers
+ and updates bootm_headers processing code to make use of them.
+ Saved node offsets allow to avoid repeating fit_image_get_node() calls.
+
+
+commit bc8ed486b125452ba3bd8344f052f437329150c5
+Date: Wed Mar 12 10:32:53 2008 +0100
+
+ [new uImage] ppc: Add new uImage format support to FDT handling routines
+
+ Support for new (FIT) format uImages is added to powerpc specific
+ boot_get_fdt() routine which now recognizes, sanity checks FIT image
+ and is able to access data sections of the requested component image.
+
+
+commit a44a269a905f924b420020506a4d7d7eedcc0eaf
+Date: Wed Mar 12 10:14:57 2008 +0100
+
+ [new uImage] Re-enable interrupts for non automatic booting
+
+ Re-enable interrupts if we return from do_bootm_<os> and 'autostart'
+ environment variable is not set to 'yes'.
+
+
+commit d985c8498c4e47095820da97aa722381d39172c5
+Date: Wed Mar 12 10:14:38 2008 +0100
+
+ [new uImage] Remove unnecessary arguments passed to ramdisk routines
+
+ boot_get_ramdisk() and image_get_ramdisk() do not need all
+ cmdtp, flag, argc and argv arguments. Simplify routines definition.
+
+
+commit c87796483bc7c2900470dc747c367f602577608d
+Date: Wed Mar 12 10:12:37 2008 +0100
+
+ [new uImage] Add new uImage format support for ramdisk handling
+
+ This patch updates boot_get_ramdisk() routine adding format
+ verification and handling for new (FIT) uImages.
+
+
+commit 6986a385671749ecb3f60cf99e9cbae8e47bb50e
+Date: Wed Mar 12 10:01:05 2008 +0100
+
+ [new uImage] Add new uImage format support for kernel booting
+
+ New format uImages are recognized by the bootm command,
+ validity of specified kernel component image is checked and
+ its data section located and used for further processing
+ (uncompress, load, etc.)
+
+
+commit e32fea6adb620ecf2bd70acf2dd37e53df9d1547
+Date: Tue Mar 11 12:35:20 2008 +0100
+
+ [new uImage] Add new uImage format support for imls and iminfo commands
+
+ imls and iminfo can now recognize nad print out contents of the new (FIT)
+ format uImages.
+
+
+commit 9d25438fe7d70cf35a8a293ea5e392fefc672613
+Date: Tue Mar 11 12:34:47 2008 +0100
+
+ [new uImage] Add support for new uImage format to mkimage tool
+
+ Support for the new uImage format (FIT) is added to mkimage tool.
+ Commandline syntax is appropriately extended:
+
+ mkimage [-D dtc_options] -f fit-image.its fit-image
+
+ mkimage (together with dtc) takes fit-image.its and referenced therein
+ binaries (like vmlinux.bin.gz) as inputs, and produces fit-image file -- the
+ final image that can be transferred to the target (e.g., via tftp) and then
+ booted using the bootm command in U-Boot.
+
+
+commit eb6175edd6c120d8b89678243e5a2be362ee8e40
+Date: Mon Mar 10 17:53:49 2008 +0100
+
+ [new uImage] Make node unit names const in struct bootm_headers
+
+
+commit 5dfb52138688ccbf0146f62683fe6217b3ce1b05
+Date: Fri Feb 29 21:24:06 2008 +0100
+
+ [new uImage] New uImage low-level API
+
+ Add FDT-based functions for handling new format component images,
+ configurations, node operations, property get/set, etc.
+
+ fit_ - routines handling global new format uImage operations
+ like get/set top level property, process all nodes, etc.
+ fit_image_ - routines handling component images subnodes
+ fit_conf_ - routines handling configurations node
+
+
+commit 30f1806f60978d707b0cff2d7bf89d141fc24290
+Date: Sun Mar 9 16:20:02 2008 +0100
+
+ Release v1.3.2
+
+ Update CHANGELOG for release.
+
+
+commit 5b464c289ba715d0979b6e1f94947bb8f1068d16
+Date: Sun Mar 9 14:52:11 2008 +0100
+
+ SCM: fix 'packed' attribute ignored for field of type 'can_msg_t' warnings
+
+
+commit db695b78515ddb88a2d4f3357c120345efbf59ec
+Date: Sun Mar 9 10:44:01 2008 +0100
+
+ scb9328: Fix flash warning: type qualifiers ignored on function return type
+
+
+commit 2b3e7e61d6a72f16aee93f870bc6af67f30758c4
+Date: Sun Mar 9 10:50:41 2008 +0100
+
+ esd/common/fpga.c: fix indentation.
+
+
+commit cc3843e36453e2b8db65d7e56de938ba045016a0
+Date: Sun Mar 9 10:33:31 2008 +0100
+
+ common/kgdb.c: fix 'dereferencing type-punned pointer' warning
+
+ and get rid of a couple of unneeded casts.
+
+
+commit 8d4f4a838d7dc7cf4de17e3e9a67e2f222b6a1c8
+Date: Sun Mar 9 10:09:53 2008 +0100
+
+ esd/common/fpga.c: fix 'assignment of read-only location' error
+
+
+commit c6fe4dabac066e8758345d249032768496983a3e
+Date: Sun Mar 9 02:13:19 2008 +0100
+
+ Makefile: make build silently again.
+
+
+commit 76babc86576f092573599334c85ec543fdbc6015
+Date: Sun Mar 9 02:07:49 2008 +0100
+
+ m501sk: Fix out of tree building
+
+
+commit 210ed2004e062fdd03f25ab4925998aa1bd08a07
+Date: Sun Mar 9 00:06:09 2008 +0100
+
+ ADS5121: fix out of tree build
+
+ and simplify Makefile a bit.
+
+
+commit 46cb5074a3f74de64ebd97dd0c4ec7eb3d768b93
+Date: Sat Mar 8 22:35:31 2008 +0100
+
+ Release v1.3.2
+
+
+commit 78a90f827df74520e939c794fc7413dace21c4db
+Date: Sat Mar 8 22:35:04 2008 +0100
+
+ Update CHANGELOG
+
+
+commit 58f3c57c6008b42e01f551d3be6efd88c14ac87f
+Date: Sat Mar 8 21:30:04 2008 +0100
+
+ esd: Fix warning: passing argument 1 of 'fpga_boot' discards qualifiers from pointer target type
+
+
+commit d75469d48c05795144f4b8ba76addbb4920a7bba
+Date: Sat Mar 8 09:25:49 2008 +0900
+
+ net: rtl8169: Add processing when OWNbit did't enable in rtl_recv()
+
+ When rtl_recv() of rtl8169 is called, OWNbit of status register
+ is not enable occasionally.
+ rtl_recv() doesn't work normally when the driver doesn't do
+ appropriate processing.
+ This patch fix this problem.
+
+
+commit 82afabfeb8ae6a27c7b396011ea99f4712aa73fa
+Date: Fri Mar 7 08:15:28 2008 +0100
+
+ mgsuvd: update board configuration
+
+ initialize the UPIOx controller.
+
+
+commit e492c90c26215e459aec0fdf0f8ef1fd204988f5
+Date: Fri Mar 7 08:13:41 2008 +0100
+
+ mgcoge: update board configuration
+
+ add support for the config Flash.
+ initialize the UPIOx controller.
+
+
+commit 270fe261b7f9292800b2b3d1bf19ae7cbc880258
+Date: Fri Mar 7 12:27:31 2008 -0600
+
+ mpc83xx: make dtb basename file references equal those of linux
+
+ the dts file basenames were updated in linux - this helps avoid
+ inadvertently loading any old dtbs laying around.
+
+
+commit f30b6154f16f5ffa4a9f5bfca5e114d72b6ef675
+Date: Wed Feb 27 16:08:22 2008 -0600
+
+ net: uec_phy: actually increment the timeout counter
+
+ allow u-boot to recover (and, e.g., switch to another interface) in the
+ case where a PHY does not report autonegotiation is complete within its
+ two second timeout value.
+
+
+commit 772003e43957ee0c895abed7cd82cbe72820cbb8
+Date: Wed Mar 5 21:38:12 2008 +0100
+
+ fix taihu soft spi_read
+
+ The taihu board used gpio_read_out_bit which reads the output register and not
+ the pin state.
+
+
+commit fc84a8495ac750f6b4adae81f8c4f100f65b6340
+Date: Fri Mar 7 08:01:43 2008 +0100
+
+ ppc4xx: Sequoia: Add device tree (fdt) Linux booting default env variables
+
+
+commit bd4458cb47abecabd406b1210457be96c69fc49d
+Date: Tue Mar 4 16:59:22 2008 +0800
+
+ 837xEMDS: Improve the system performance
+
+ 1. Make the CSB bus pipeline depth as 4, and enable
+ the repeat mode;
+ 2. Raise the eTSEC emergency priority;
+ 3. Use the highest IP blocks clock.
+
+
+commit d8ab58b212481b1c57947ea21aa96c4ce800d0b4
+Date: Thu Mar 6 16:45:53 2008 +0100
+
+ Replace "run load; run update" with conditionalized "run load update".
+
+ The latter version stops when "run load" fails for whatever reasons
+ rendering the combination *a lot* more secure.
+
+
+commit 6bc113886d7d316df1a4e459bec8baf027518551
+Date: Tue Mar 4 17:40:41 2008 +0100
+
+ net: Print error message upon net usage when no ethernet-interface is found
+
+ This patch fixes a problem seen on PPC4xx boards, when no MAC address is
+ defined. Then no ethernet interface is available but a simple "tftp"
+ command will return without any error message which is quite confusing.
+
+
+commit a30a549a3553032d809e0356306b62de0b125901
+Date: Tue Mar 4 10:03:03 2008 -0600
+
+ Remove erroneous or extra spd.h #includers.
+
+ Many of the spd.h #includers don't need it,
+ and wanted to have spd_sdram() declared instead.
+ Since they didn't get that, some also had open
+ coded extern declarations of it instead or as well.
+ Fix it all up by using spd_sdram.h where needed.
+
+
+commit a4475386cef14af3fd88f0518b688e755669486d
+Date: Tue Mar 4 17:41:28 2008 +0100
+
+ PCS440EP: fix build problems (redundant #define)
+
+
+commit e85e2fa85ec09a6fac2846d1d881d8737e2bbda9
+Date: Tue Mar 4 17:39:25 2008 +0100
+
+ net: Print error message upon net usage when no ethernet-interface is found
+
+ This patch fixes a problem seen on PPC4xx boards, when no MAC address is
+ defined. Then no ethernet interface is available but a simple "tftp"
+ command will return without any error message which is quite confusing.
+
+
+commit 384faaafb999cae3ce447c93e28a0b7e2e5fef53
+Date: Tue Mar 4 17:38:50 2008 +0100
+
+ W7OLMC/W7OLMG: fix build problems (redundant #define)
+
+
+commit f9301e1cda296245ba052d7b08321199c3d0af9d
+Date: Tue Mar 4 14:58:31 2008 +0100
+
+ Makefile: fix problem with out-of-tree builds introduced by 5013c09f
+
+ Commit 5013c09f (Makefile: cleanup "clean" target) introduced a
+ problem for out-of-tree builds which caused "make clean" to fail.
+
+
+commit dfece9500556bed5d8244b1c15d973cec7c25bfe
+Date: Tue Mar 4 11:58:26 2008 +0100
+
+ examples/Makefile: build "hello_world" on 8xx, too.
+
+
+commit 74eb0222594fd23aafdf168e60e872814eea8b62
+Date: Mon Mar 3 15:27:05 2008 -0500
+
+ PPC4xx (Sequoia): Fix Ethernet "remote fault" problems
+
+ Every now and then a Sequoia board (or equivalent hardware) had
+ problems connecting to a Gigabit capable network interface.
+
+ There were differences in the PHY setup between Linux and U-Boot.
+
+ This patch fixes the problem. Apparently "remote fault" is being set,
+ which signals to some devices (on the other end of the cable) that a
+ fault has occurred, while other devices ignore it. I believe the RF bit
+ was causing the issue, but I removed T4 also, to match up with Linux.
+
+
+commit 491fb6dea9f52fdb9cb5996e8e978b9e9685179f
+Date: Mon Mar 3 09:58:52 2008 -0600
+
+ fix QE firmware uploading limit
+
+ Fix a typo in qe_upload_firmware() that prevented uploading firmware on
+ systems with more than one RISC core.
+
+
+commit 42ba58e0c302b339a3c2faa6006a013c6f186b7a
+Date: Mon Mar 3 11:57:23 2008 +0000
+
+ Fix endianess problem in cramfs code (cramfs is always host-endian in Linux)
+
+ see http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/22846
+
+ Signed-off-by: Bernhard Nemec <bnemec <at> ganssloser.com>
+
+commit 84d0c2f1e39caff58bf765a7ab7c72da23c25ec8
+Date: Mon Mar 3 10:39:13 2008 +0200
+
+ fix copy from ram to dataflash
+
+ If I try to "cp.b <ram> <dataflash>", u-boot selects normal flash
+ routines instead of dataflash. This is because it checks "if source
+ address is not dataflash" instead of target address.
+
+
+commit 32bf3d143a888f8deacfdcc97e898f6c06d0aea4
+Date: Mon Mar 3 12:16:44 2008 +0100
+
+ Fix quoting problem (preboot setting) in many board config files.
+
+
+commit 5b0b2b6fc9fe22e3864c2a57316d91a2507ec215
+Date: Mon Mar 3 12:36:49 2008 +0100
+
+ ADS5121: Fix default environment.
+
+
+commit 91c82076ae492bb1f9d9c47a481314631d32dc8e
+Date: Sun Mar 2 16:12:31 2008 +0100
+
+ Makefile: Fix missing unconfig and mkconfig use
+
+
+commit 8ce4e5c2c02cb7e8adddf7b651d3050d81ce4c1d
+Date: Sun Mar 2 23:33:46 2008 +0100
+
+ Fix checking fat32 cluster size.
+
+ This fixes the cluster size tests in the FAT32 file system.
+ The current implementation of VFAT support doesn't work if the
+ referred cluster has an offset > 16bit representation, causing
+ "fatload" and "fatls" commands etc. to fail.
+
+
+commit 661bad63a076a96c39c64f136915f146725af92b
+Date: Sun Mar 2 22:57:23 2008 +0100
+
+ Prepare v1.3.2-rc2 release candidate
+
+
+commit 76957cb3d621bf664311908e5962e151c633c285
+Date: Sat Mar 1 12:11:40 2008 +0100
+
+ ppc4xx: EMAC: Fix 405EZ fifo size setup in EMAC_MR1
+
+ The 405EZ only supports 512 bytes of rx-/tx-fifo EMAC sizes. But
+ currently 4k/2k is configured. This patch fixes this issue.
+
+
+
+commit 118978c8eb43803e2794233922df4249fa278b83
+Date: Fri Feb 29 17:34:35 2008 -0600
+
+ Fix alignment error on ARM for modules
+
+ Fix alignment fault on ARM when running modules. With out an explicit
+ linker file gcc4.2.1 will half word align __bss_start's value. The word
+ dereference will crash hello_world.
+
+
+commit ce1120dd703e6f12c59e4eba9962356a0300b832
+Date: Fri Feb 29 17:45:31 2008 +0800
+
+ fs: Fix ext2 read issue
+
+ The ext2 aligned process will corrupt the key
+ data struct, the patch fix this.
+
+
+commit 5013c09f7a5675952a3ca88b6bc6c924e63af33e
+Date: Sun Mar 2 22:45:33 2008 +0100
+
+ Makefile: cleanup "clean" target
+
+ Make sure CDPATH settings cannot interfere.
+ Update CHANGELOG.
+
+
+commit ffda586fc1373243c9794babde69500f6293a8d8
+Date: Fri Feb 29 11:46:05 2008 +0800
+
+ add cscope build target
+
+ Add cscope build target to generate cscope database for code browsing.
+
+
+commit f655adef65e4cf6b929054b049ee19ae9b5ccbe2
+Date: Wed Feb 27 15:06:39 2008 -0600
+
+ net: uec_phy: handle 88e1111 rev.B2 erratum 5.6
+
+ erratum 5.6 states the autoneg completion bit is functional only if the
+ autoneg bit is asserted.
+
+ This fixes any secondarily-issued networking commands on non-gigabit
+ links on the mpc8360 mds board.
+
+
+commit 5f91db7f582ca17b1f19f10189c025696f333d2e
+Date: Tue Feb 26 09:38:14 2008 -0700
+
+ MPC5121e ADS PCI support take 3
+
+ Adds PCI support for MPC5121
+
+ Tested with drivers/net/rtl8139.c
+
+ Support is conditional since PCI on old silicon does not work.
+
+ ads5121_PCI_config turns on PCI
+
+ In this version, condition compilation of PCI code has been moved
+ from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as
+ suggested by Jean-Christophe PLAGNIOL-VILLARD
+
+
+commit 44b4dbed4133f657705b7c5193209da9978243a7
+Date: Mon Feb 25 23:53:07 2008 +0100
+
+ Fix warnings while compilation of post/drivers/memory.c
+
+ Fix warnings while compilation with new gcc in eldk-4.2
+
+
+commit 4fae35a53b3e958254d6574a1cc7e10811fc6726
+Date: Mon Feb 25 20:54:04 2008 +0100
+
+ ppc4xx: Fix problem in 4xx_enet.c driver
+
+ U-Boot crashes in the net loop if CONFIG_4xx_DCACHE is
+ enabled. To reproduce the problem ensure that 'ethrotate'
+ environment variable isn't set to "no" and then run
+ "tftp 200000 not_existent_file".
+ This patch tries to fix the issue.
+
+
+commit 60ec654c5eb80d0fe0c38a3bd42140215bc06484
+Date: Mon Feb 25 20:04:20 2008 +0100
+
+ POST: Disable cache while SPR POST
+
+ Currently (since commit b2e2142c) u-boot crashes on
+ sequoia board while SPR test if CONFIG_4xx_DCACHE is
+ enabled. This patch disables the cache while SPR test.
+
+
+commit c313b2c6c555e7d89ec59bd51c59ab164ad0105d
+Date: Mon Feb 25 17:52:40 2008 +0100
+
+ TQM5200: use automatic fdt memory fixup (part 2)
+
+ Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S,
+ TB5200 and TB5200_B to fixup the /memory node with the memory values
+ detected by U-Boot.
+
+
+commit 44ceec253ea941b301abf4b079d52324def69d92
+Date: Mon Feb 25 15:17:05 2008 +0100
+
+ TQM5200: use automatic fdt memory fixup
+
+ Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S,
+ TB5200 and TB5200_B to fixup the /memory node with the memory values
+ detected by U-Boot.
+
+
+commit f3a329acb26017d8e10e9c93e1e726c2a5ac634a
+Date: Mon Feb 25 13:27:52 2008 +0100
+
+ TQM5200: fix bug in SDRAM initialization code
+
+ This patch fixes a bug in the SDRAM initialization code for the
+ TQM5200. The hi_addr bit is now set correctly. Without this patch
+ the hi_addr bit is always set to 1, if the second SDRAM bank is
+ not populated.
+
+ For other MPC5200 boards a correspondig patch has already been applied
+ some time ago, see commit a63109281ad41b0fb489fdcb901171f76bcdbc2c.
+
+ --
+ Forget the first patch please. I confused flash with SDRAM in
+ the comment ...
+
+commit 217bf6b6a313d9ccb619a4dbc09f73f77cd48df1
+Date: Mon Feb 25 00:03:12 2008 +0100
+
+ mx1fs2/flash: Fix multiple compiler warnings
+
+ "pointer targets in assignment differ in signedness"
+
+
+commit 5599c28cef55be42a8ca6fa8086b1a44e56a85d2
+Date: Mon Feb 25 00:03:11 2008 +0100
+
+ arm-imx: Fix register definitions
+
+ Sync register definitions with linux
+
+
+commit c9bcf75fecc58886af77d2a571cff2eab39eab6f
+Date: Mon Feb 25 00:03:10 2008 +0100
+
+ actua1/actua2/actua3: Fix multiple unused variable warnings
+
+ - actua1:
+ actux1.c: In function 'checkboard':
+ actux1.c:92: warning: unused variable 'revision'
+
+ - actua2:
+ actux2.c: In function 'checkboard':
+ actux2.c:100: warning: unused variable 's'
+ actux2.c:99: warning: unused variable 'revision'
+ actux2.c: In function 'reset_phy':
+ actux2.c:130: warning: unused variable 'i'
+
+ - actua3:
+ actux3.c: In function 'checkboard':
+ actux3.c:114: warning: unused variable 'revision'
+
+
+commit f8fa6368a6a0c02164da8e2f52f18d457c6977bd
+Date: Sun Feb 24 11:44:29 2008 +0900
+
+ Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit targets.
+
+ The previous patch was lacking of i386, microblaze, nios and nios2. This
+ patch tries to fix them.
+
+
+commit 05e07b1ea22844e946cfcf7d5e8a0199d18d2a95
+Date: Fri Feb 29 22:22:46 2008 +0100
+
+ [new uImage] Fix FDT blob totalsize calculation in boot_relocate_fdt()
+
+ Do not use global fdt blob pointer, calculate blob size from routine
+ argument blob pointer.
+
+
+commit d1cc52879c8966507dad9fb575481e6d3985e64e
+Date: Tue Feb 12 00:58:31 2008 +1100
+
+ libfdt: Add and use a node iteration helper function.
+
+ This patch adds an fdt_next_node() function which can be used to
+ iterate through nodes of the tree while keeping track of depth. This
+ function is used to simplify the iteration code in a lot of other
+ functions, and is also exported for use by library users.
+
+
+commit 8cf30809a82902a471866d2f07725ce3b8a22291
+Date: Fri Feb 29 16:00:24 2008 +0100
+
+ [new uImage] Add libfdt support to mkimage
+
+
+commit a6e530f00d31a8494a0422799b2b9a692a9c0eb9
+Date: Fri Feb 29 16:00:23 2008 +0100
+
+ [new uImage] Add sha1.o object to mkimage binary build
+
+
+commit df6f1b895c997978f03afe04502ee76b7ba34ab9
+Date: Fri Feb 29 16:00:06 2008 +0100
+
+ [new uImage] Fix component handling for legacy multi component images
+
+ Use uint32_t when accessing size table in image_multi_count() and
+ image_multi_getimg() for multi component images.
+
+ Add missing uimage_to_cpu() endianness conversion.
+
+
+commit 570abb0ad120f6002bcaa3cf6f32bd4ca2e1b248
+Date: Fri Feb 29 15:59:59 2008 +0100
+
+ [new uImage] Share common uImage code between mkimage and U-boot
+
+ This patch adds the following common routines:
+
+ 1) Dedicated mkimage print_header() is replaced with common
+ image_print_contents()
+ image_print_contents_noindent()
+
+ 2) Common os/arch/type/comp fields name <--> id translation routines
+ genimg_get_os_name()
+ genimg_get_arch_name()
+ genimg_get_type_name()
+ genimg_get_comp_name()
+ genimg_get_os_id()
+ genimg_get_arch_id()
+ genimg_get_type_id()
+ genimg_get_comp_id()
+
+
+commit 9a4daad0a35eb5143037eea9f786a3e9d672bdd6
+Date: Fri Feb 29 14:58:34 2008 +0100
+
+ [new uImage] Update naming convention for bootm/uImage related code
+
+ This patch introduces the following prefix convention for the
+ image format handling and bootm related code:
+
+ genimg_ - dual format shared code
+ image_ - legacy uImage format specific code
+ fit_ - new uImage format specific code
+ boot_ - booting process related code
+
+ Related routines are renamed and a few pieces of code are moved around and
+ re-grouped.
+
+
+commit 75fa002c47171b73fb4c1f2c2fe4d6391c136276
+Date: Wed Feb 27 21:51:51 2008 -0600
+
+ [new uImage] Respect autostart setting in linux bootm
+
+
+commit d3f2fa0d278467b2232e4eb2372f905c3febfbeb
+Date: Wed Feb 27 21:51:50 2008 -0600
+
+ [new uImage] Provide ability to restrict region used for boot images
+
+ Allow the user to set 'bootm_low' and 'bootm_size' env vars as a way
+ to restrict what memory range is used for bootm.
+
+
+commit e822d7fc4dd4755d4d0a22f05e33f33d1a0481da
+Date: Wed Feb 27 21:51:49 2008 -0600
+
+ [new uImage] Use lmb for bootm allocations
+
+ Convert generic ramdisk_high(), get_boot_cmdline(), get_boot_kbd()
+ functions over to using lmb for allocation of the ramdisk, command line
+ and kernel bd info.
+
+ Convert PPC specific fdt_relocate() to use lmb for allocation of the device
+ tree.
+
+ Provided a weak function that board code can call to do additional
+ lmb reserves if needed.
+
+ Also introduce the concept of bootmap_base to specify the offset in
+ physical memory that the bootmap is located at. This is used for
+ allocations of the cmdline, kernel bd, and device tree as they should
+ be contained within bootmap_base and bootmap_base + CFG_BOOTMAPSZ.
+
+
+commit f5614e7926863bf0225ec860d9b319741a9c4004
+Date: Wed Feb 27 21:51:48 2008 -0600
+
+ [new uImage] Add autostart flag to bootm_headers structure
+
+ The autostart env variable was dropped as part of the initial new uImage
+ cleanup. Add it back here so the arch specific code can decide if it
+ wants to really boot or not.
+
+
+commit 4ed6552f715983bfc7d212c1199a1f796f1144ad
+Date: Wed Feb 27 21:51:47 2008 -0600
+
+ [new uImage] Introduce lmb from linux kernel for memory mgmt of boot images
+
+ Introduce the LMB lib used on PPC in the kernel as a clean way to manage
+ the memory spaces used by various boot images and structures. This code
+ will allow us to simplify the code in bootm and its support functions.
+
+
+commit 4648c2e7a173b0d7f17bef4adaa0623090c9e904
+Date: Tue Feb 19 22:03:47 2008 -0600
+
+ [new uImage] ppc: Allow boards to specify effective amount of memory
+
+ For historical reasons we limited the stack to 256M because some boards
+ could only map that much via BATS. However newer boards are capable of
+ mapping more memory (for example 85xx is capable of doing up to 2G).
+
+
+commit 274cea2bddbca10cdad7daa518951b75c44ef6bc
+Date: Wed Feb 27 21:51:46 2008 -0600
+
+ [new uImage] rework error handling so common functions don't reset
+
+ Changed image_get_ramdisk() to just return NULL on error and have
+ get_ramdisk() propogate that error to the caller. It's left to the
+ caller to call do_reset() if it wants to.
+
+ Also moved calling do_reset() in get_fdt() and fdt_relocate() on ppc
+ to a common location. In the future we will change get_fdt() and
+ fdt_relocate() to return success/failure and not call do_reset() at all.
+
+
+commit d2bc095a639672def11d5d043b5688d0dbd692ec
+Date: Wed Feb 27 21:51:45 2008 -0600
+
+ [new uImage] ppc: Re-order ramdisk/fdt handling sequence
+
+ Doing the fdt before the ramdisk allows us to grow the fdt w/o concern
+ however it does mean we have to go in and fixup the initrd info since
+ we don't know where it will be.
+
+
+commit 27953493ef025fb698d68c5dee39b36f01f4d530
+Date: Wed Feb 27 21:51:44 2008 -0600
+
+ [new uImage] ppc: Determine if we are booting an OF style
+
+ If we are bootin OF style than we can skip setting up some things
+ that are used for the old boot method.
+
+
+commit a6612bdfe7ef37b9787b66800cf02aaded05fbeb
+Date: Wed Feb 27 21:51:43 2008 -0600
+
+ [new uImage] Don't pass kdb to ramdisk_high since we may not have one
+
+ We don't actually need the kdb param as we are just using it to get
+ bd->bi_memsize which we can get from gd->bd->bi_memsize. Also, if we
+ boot via OF we might not actually fill out a kdb.
+
+
+commit 2b22fa4baee51e6b467c44ea1be0d1ecd86e8775
+Date: Wed Feb 27 16:30:47 2008 -0600
+
+ 85xx: Don't icbi when unlocking the cache
+
+ There is no reason to icbi when invalidating the temporary stack in
+ the d-cache. Its impossible on e500 to have the i-cache contain
+ any addresses in the temp stack and it can be problematic in generating
+ transactions on the bus to non-valid addresses.
+
+
+commit 534ea6b6f86f8b75ef2ac061ef110a98f103d7d6
+Date: Wed Feb 27 15:50:50 2008 -0600
+
+ Fix source for ECM error IVPR
+
+ The source vector for the ECM was being set to 2,
+ but that's what the source vector for DDR was being
+ set to. Change it to 1.
+
+
+commit 21fae8b2b4e4e6e648796e07e20ab13e9cb18923
+Date: Wed Feb 27 14:29:58 2008 -0600
+
+ Invalidate INIT_RAM TLB mappings
+
+ Commit 0db37dc... (and some others) changed the INIT_RAM TLB
+ mappings to be unguarded. This collided with an existing "bug"
+ where the mappings for the INIT_RAM were being kept around.
+ This meant that speculative loads to those addresses were
+ succeeding in the TLB, and going out to the bus, where they
+ were causing an exception (there's nothing at that address). The
+ Flash code was coincidentally causing such a speculative load.
+ Rather than go back to mapping the INIT RAM as guarded, we fix
+ it so that the entries for the INIT_RAM are invalidated. Thus
+ the speculative loads will fail in the TLB, and have no effect.
+
+
+commit 347b7938d3e561eb215aa386c37fb5acb5a383c6
+Date: Sun Feb 17 22:56:17 2008 +0100
+
+ sbc8548: Fix Revision reading and unused variable 'path'
+
+
+commit 495d162374c472f46454453553382ad0735dc725
+Date: Sun Feb 17 22:56:16 2008 +0100
+
+ sbc8548: Fix cfi flash bank declaration
+
+
+commit 4efbe9dbb129f857f27856936112c8c02f016be6
+Date: Wed Feb 27 11:02:26 2008 +0100
+
+ [new uImage] Correct raw FDT blob handlig when CONFIG_FIT is disabled
+
+ Dual format image code must properly handle all three FDT passing methods:
+ - raw FDT blob passed
+ - FDT blob embedded in the legacy uImage
+ - FDT blob embedded in the new uImage
+
+ This patch enables proper raw FDT handling when no FIT imaeg support
+ is compiled in. This is a bit tricky as we must dected FIT format even
+ when FIT uImage handling is not enabled as both FIT uImages and raw FDT
+ blobs use tha same low level format (libfdt).
+
+
+commit ff0734cff0fb5397ce2f4602f4f3e5ec9c8a36e8
+Date: Wed Feb 27 11:02:26 2008 +0100
+
+ [new uImage] POWERPC: Add image_get_fdt() routine
+
+ FDT blob may be passed either: (1) raw (2) or embedded in the legacy uImage
+ (3) or embedded in the new uImage. For the (2) case embedding image must be
+ verified before we get FDT from it. This patch factors out legacy image
+ specific verification routine to the separate helper routine.
+
+
+commit 1efd43601f90de21ec6c0ebb9880823e822927b1
+Date: Wed Feb 27 11:02:07 2008 +0100
+
+ [new uImage] Add image_get_kernel() routine
+
+ Legacy image specific verification is factored out to a separate helper
+ routine to keep get_kernel() generic and simple.
+
+
+commit 8a5ea3e6168fe6a2780eeaf257a3b19f30dec658
+Date: Wed Feb 27 11:01:04 2008 +0100
+
+ [new uImage] Move image verify flag to bootm_headers structure
+
+ Do not pass image verification flag directly to related routines.
+ Simplify argument passing and move it to the bootm_header structure which
+ contains curently processed image specific data and is already being passed
+ on the argument list.
+
+
+commit 823afe7cefe00dafefc6696c1cc7aa828c394234
+Date: Wed Feb 27 11:00:47 2008 +0100
+
+ [Makefile] Sort COBJS in lib_<arch> Makefiles
+
+
+commit 6f0f9dfc4ee880fbf400a2ebe14238181a6c3f91
+Date: Wed Feb 27 11:00:47 2008 +0100
+
+ [new uImage] Optimize gen_get_image() flow control
+
+ When CONFIG_HAS_DATAFLASH is not defined gen_get_image() routine has nothing
+ to do, update its control flow to better reflect that simple case.
+
+
+commit d2ced9eb19ec74f4a359949dbe353427fa6d55ca
+Date: Mon Feb 4 08:28:17 2008 +0100
+
+ [new uImage] POWERPC: Split get_fdt() into get and relocate routines
+
+ PPC specific FDT blob handling code is divided into two separate routines:
+
+ get_fdt() - find and verify a FDT blob (either raw or image embedded)
+ fdt_relocate() - move FDT blob to within BOOTMAP if needed
+
+
+commit 33fa5c0bfaf465de8ceb23fcd6b397f68b35a817
+Date: Mon Feb 25 13:13:37 2008 -0600
+
+ 86xx: Fix renamed GUR symbols in sbc8641d board.
+
+ Back in commit a551cee99ad1d1da20fd23ad265de47448852f56
+ (86xx: Fix GUR PCI config registers properly), we should have
+ changed the MPC86xx_PORBMSR_HA and MPC86xx_PORDEVSR_IO_SEL
+ symbols in the sbc8641d board as well. Fix this oversight.
+
+
+commit 64cd594e623c39f73964d18787763e4533f791f7
+Date: Mon Feb 25 16:50:48 2008 +0100
+
+ ppc4xx: Fix acadia_nand build problem
+
+ Don't include testdram() on NAND-booting target acadia_nand. This saves
+ a few bytes and makes the target build clean again.
+
+
+commit 14e099e698d41e8179d05c2b2dbcf704a236f748
+Date: Sun Feb 24 23:03:12 2008 +0000
+
+ mx1fs2/flash: Fix multiple pointertargets in assignment differ in signedness
+
+
+commit 724902c8464e610642b3a170278b99710325888e
+Date: Sun Feb 24 23:03:11 2008 +0000
+
+ arm-imx: Fix registers definition
+
+ Sync registers definition with linux
+
+
+commit 4cd288b589ea1178947c6e364453c32b3dede6b7
+Date: Sun Feb 24 23:03:10 2008 +0000
+
+ actua1/actua2/actua3: Fix multipleunused variable
+
+ - actua1:
+ actux1.c: In function 'checkboard':
+ actux1.c:92: warning: unused variable 'revision'
+
+ - actua2:
+ actux2.c: In function 'checkboard':
+ actux2.c:100: warning: unused variable 's'
+ actux2.c:99: warning: unused variable 'revision'
+ actux2.c: In function 'reset_phy':
+ actux2.c:130: warning: unused variable 'i'
+
+ - actua3:
+ actux3.c: In function 'checkboard':
+ actux3.c:114: warning: unused variable 'revision'
+
+
+commit d5934ad7756f038a393a9cfab76a4fe306d9d930
+Date: Mon Feb 4 08:28:09 2008 +0100
+
+ [new uImage] Add dual format uImage support framework
+
+ This patch adds framework for dual format images. Format detection is added
+ and the bootm controll flow is updated to include cases for new FIT format
+ uImages.
+
+ When the legacy (image_header based) format is detected appropriate
+ legacy specific handling is invoked. For the new (FIT based) format uImages
+ dual boot framework has a minial support, that will only print out a
+ corresponding debug messages. Implementation of the FIT specific handling will
+ be added in following patches.
+
+
+commit b29661fc1151077776454288051bc9a488351ce8
+Date: Sun Feb 24 15:21:36 2008 +0100
+
+ Coding style cleanup. Prepare v1.3.2-rc2 release candidate
+
+
commit 00b48a48424894daa589d166d73277830b1c6ac4
Date: Sat Feb 23 12:15:56 2008 +0100
+commit 5583cbf736474ef754e128a54fb78632f57b48fd
+Date: Thu Feb 21 17:27:49 2008 +0100
+
+ [new uImage] Fix erroneous use of image_get_magic() in fdc/usb cmds
+
+
+commit 2242f5369822bc7780db95c47985bb408ea9157b
+Date: Thu Feb 21 17:27:41 2008 +0100
+
+ [new uImage] Rename and move print_image_hdr() routine
+
+
+commit f50433d670ec2ee9e96abac67cdc6e5e061a810d
+Date: Thu Feb 21 17:20:20 2008 +0100
+
+ [new uImage] Add fit_parse_conf() and fit_parse_subimage() routines
+
+ Introducing routines for parsing new uImage format bootm arguments:
+ [<addr>]#<conf> - configuration specification
+ [<addr>]:<subimg> - subimage specification
+
+ New format images can contain multiple subimages of the same type. For example
+ a single new format image file can contain three kernels, two ramdisks and a
+ couple of FDT blobs. Subimage and configuration specifications are extensions
+ to bootm (and other image-related commands) arguments' syntax that allow to
+ specify which particular subimage should be operated on.
+
+ Subimage specification is used to denote a particular subimage. Configurations
+ are a bit more complex -- they are used to define a particualr booting setup,
+ for example a (kernel, fdt blob) pair, or a (kernel, ramdisk, fdt blob) tuple,
+ etc.
+
+
+commit fff888a1997ff7de9b29e24050fc4a0fd403ba16
+Date: Thu Feb 21 17:20:19 2008 +0100
+
+ [new uImage] Add gen_get_image() routine
+
+ This routine assures that image (whether legacy or FIT) is not
+ in a special dataflash storage.
+
+ If image address is a dataflash address image is moved to system RAM.
+
+
+commit 75d3e8fbd93c14d9929d024c75af2d742c76db70
+Date: Thu Feb 21 17:20:18 2008 +0100
+
+ [new uImage] Pull in libfdt if CONFIG_FIT is enabled
+
+ New uImage format (Flattened Image Tree) requires libfdt
+ functionality, print out error message if CONFIG_OF_LIBFDT
+ is not defined.
+
+ New uImage support is enabled by defining CONFIG_FIT (and CONFIG_OF_LIBFDT).
+ This commit turns it on by default.
+
+
commit 1ba639da5604a64b3ed884a2cbb1c5414a9fa728
Date: Mon Feb 18 23:16:35 2008 +0100
+commit 5cf746c303710329f8040d9c62ee354313e3e91f
+Date: Thu Jan 31 13:59:09 2008 +0100
+
+ [new uImage] Move kernel data find code to get_kernel() routine
+
+ Verification of the kernel image (in old format) and finding kernel
+ data is moved to a dedicated routine. The routine will also hold
+ support for, to be added, new image format.
+
+
+commit 7b325454fd231d4273de3fe373850f777fb086bf
+Date: Thu Jan 31 13:58:20 2008 +0100
+
+ [new uImage] Cleanup FDT handling in PPC do_boot_linux()
+
+ Move FDT blob finding and relocation to a dedicated
+ get_fdt() routine. It increases code readability and
+ will make adding support for new uImage format easier.
+
+
+commit b6b0fe6460b7063ac60b9a3531ef210aedb31451
+Date: Thu Jan 31 13:58:13 2008 +0100
+
+ [new uImage] Cleanup do_botm_linux() boot allocations
+
+ This patch moves common pre-boot allocation steps shared between PPC
+ and M68K to a helper routines:
+
+ common:
+ - get_boot_sp_limit()
+ - get_boot_cmline()
+ - get_boot_kbd()
+
+ platform:
+ - set_clocks_in_mhz()
+
+
+commit ceaed2b1e54ebf14d600e02fef016c8df5cc4d40
+Date: Thu Jan 31 13:57:17 2008 +0100
+
+ [new uImage] Move ramdisk loading to a common routine
+
+ Ramdisk loading code, including initrd_high variable handling,
+ was duplicated for PPC and M68K platforms. This patch creates
+ common helper routine that is being called from both platform
+ do_bootm_linux() routines.
+
+
+commit 68d4f05e6b2383a442fb71f80f2a9fbb3d8def68
+Date: Thu Jan 31 13:55:53 2008 +0100
+
+ [new uImage] Removed dead ramdisk code on microblaze architectures
+
+ Microblaze do_bootm_linux() includes ramdisk processing code but
+ the ramdisk does not get used anywhere later on.
+
+
+commit 5ad03eb3854c162684222a718b44c0716ea0db03
+Date: Thu Jan 31 13:55:39 2008 +0100
+
+ [new uImage] Factor out common image_get_ramdisk() routine
+
+ Architecture specific do_bootm_linux() routines share common
+ ramdisk image processing code. Move this code to a common
+ helper routine.
+
+
+commit d3c5eb6dd1f4ed3c3388386cf1d1bf82aa51d56b
+Date: Thu Jan 31 13:20:08 2008 +0100
+
+ [new uImage] Move FDT error printing to common fdt_error() routine
+
+ FDT error handling in PPC do_bootm_linux() shares the same message format.
+ This patch moves error message printing to a helper fdt_error() routine.
+
+
+commit 42b73e8ee00d48004791dea64b8093fb974c57e1
+Date: Thu Jan 31 13:20:07 2008 +0100
+
+ [new uImage] Factor out common routines for getting os/arch/type/comp names
+
+ Move numeric-id to name translation for image os/arch/type/comp header
+ fields to a helper routines: image_get_os_name(), image_get_arch_name(),
+ image_get_type_name(), image_get_comp_name().
+
+
+commit e99c26694a384221d336f6448c06a57479c0baa4
+Date: Thu Jan 31 13:20:07 2008 +0100
+
+ [new uImage] Remove standalone applications handling from boootm
+
+ Standalone applications are supposed to be run using the "go" command.
+ This patch removes standalone images handling from the do_bootm().
+
+
+commit 4a2ad5ff6400698433dd7203d34939c3c9cc9bff
+Date: Thu Jan 31 13:20:07 2008 +0100
+
+ [new uImage] Remove OF_FLAT_TREE support from PPC bootm code
+
+ Support for OF_FLAT_TREE is to be obsoleted in the near future,
+ remove related code from the bootm routines.
+
+
+commit 82850f3d32a2661868ec6876bed7a22c55cef718
+Date: Thu Jan 31 13:20:06 2008 +0100
+
+ [new uImage] Use image API in SH do_bootm_linux() routine
+
+ Introduce image handling API for lately added Hitachi SH architecture.
+
+
+commit 4a995edec1ac163d9326d143ffe2b47e7543407f
+Date: Thu Jan 31 13:20:06 2008 +0100
+
+ [new uImage] Rename architecture specific bootm code files
+
+ Implementation of the do_bootm_linux() and other bootm helper routines is
+ architecture specific code. As such it resides in lib_<arch> directories
+ in files named <arch>_linux.c
+
+ This patch renames those files to a more clear and accurate
+ lib_<arch>/bootm.c form.
+
+ List of the renamed files:
+ lib_arm/armlinux.c -> lib_arm/bootm.c
+ lib_avr32/avr32_linux.c -> lib_avr32/bootm.c
+ lib_blackfin/bf533_linux.c -> lib_blackfin/bootm.c
+ lib_i386/i386_linux.c -> lib_i386/bootm.c
+ lib_m68k/m68k_linux.c -> lib_m68k/bootm.c
+ lib_microblaze/microblaze_linux.c -> lib_microblaze/bootm.c
+ lib_mips/mips_linux.c -> lib_mips/bootm.c
+ lib_nios/nios_linux.c -> lib_nios/bootm.c
+ lib_nios2/nios_linux.c -> lib_nios2/bootm.c
+ lib_ppc/ppc_linux.c -> lib_ppc/bootm.c
+ lib_sh/sh_linux.c -> lib_sh/bootm.c
+
+
+commit 7582438c285bf0cef82909d0f232de64ec567a8a
+Date: Thu Jan 31 13:20:06 2008 +0100
+
+ [new uImage] Return error on image move/uncompress overwrites
+
+ Check for overwrites during image move/uncompress, return with error
+ when the original image gets corrupted. Report clear message to the user
+ and prevent further troubles when pointer to the corrupted images is passed
+ to do_bootm_linux routine.
+
+
+commit f13e7b2e993c61fed1f607962501e051940d6e80
+Date: Tue Jan 8 18:12:17 2008 +0100
+
+ [new uImage] Cleanup image header pointer use in bootm code
+
+ - use single image header pointer instead of a set of auxilliary variables.
+ - add multi component image helper routines: get component size/data address
+
+
+commit 1ee1180b6e93e56d0282ac8d943e448e9d0eab20
+Date: Tue Jan 8 18:17:10 2008 +0100
+
+ [new uImage] Cleanup cmd_bootm.c
+
+ - sort and cleanup headers, declarations, etc.
+ - group related routines
+ - cleanup indentation, white spaces
+
+
+commit af13cdbc01eaf88880978bfb4f603e012818ba24
+Date: Tue Jan 8 18:11:45 2008 +0100
+
+ [new uImage] Add memmove_wd() common routine
+
+ Move common, watchdog sensible memmove code to a helper memmmove_wd() routine.
+
+
+commit 958fc48abddeab513ea4847e34f22a2e9fe67fe1
+Date: Tue Jan 8 18:11:44 2008 +0100
+
+ [new uImage] Fix FDT header verification in PPC do_boot_linux() routine
+
+
+commit 15158971f49255ccef54f0979a942cfd3de2ae52
+Date: Tue Jan 8 18:11:44 2008 +0100
+
+ [new uImage] Fix uImage header pointer use in i386 do_bootm_linux()
+
+ Use image header copy instead of a (possibly corrupted) pointer to
+ a initial image location.
+
+
+commit 261dcf4624b25f3c551efcf8634e9194fabba9c3
+Date: Tue Jan 8 18:11:44 2008 +0100
+
+ [new uImage] Remove I386 uImage fake_header() routine
+
+ I386 targets are not using a uImage format, instead fake header
+ is added to ram image before it is further processed by bootm.
+
+ Remove this fixup and force proper uImage use for I386.
+
+
+commit 559316faf7eae0614c91d77f509b57d6c4c091ba
+Date: Tue Jan 8 18:11:44 2008 +0100
+
+ [new uImage] Move CHUNKSZ definition to image.h
+
+ CHUNKSZ defined for PPC and M68K is set to the same value of 64K,
+ move this definition to a common header.
+
+
+commit 321359f20823e0b8c5ad38b64d007a6c48cda16e
+Date: Tue Jan 8 18:11:43 2008 +0100
+
+ [new uImage] Move gunzip() common code to common/gunzip.c
+
+ Move gunzip(), zalloc() and zfree() to a separate file.
+ Share zalloc() and zfree() with cramfs uncompress routine.
+
+
+commit d45d5a18b6b36688f2365623f9d550566c664b5b
+Date: Tue Jan 8 18:11:43 2008 +0100
+
+ [new uImage] Cleanup OF/FDT #if/#elif/#endif use in do_bootm_linux()
+
+ Make CONFIG_OF_LIBFDT and CONFIG_OF_FLAT_TREE use more
+ readable in PPC variant of do_bootm_linux() routine.
+
+
+commit 5d3cc55ecbae277e08f5ff771da20b1d6a36ec36
+Date: Tue Jan 8 18:11:43 2008 +0100
+
+ [new uImage] Move PPC do_bootm_linux() to lib_ppc/ppc_linux.c
+
+ PPC implementation of do_bootm_linux() routine is moved to
+ a dedicated file lib_ppc/ppc_linux.c
+
+
+commit b97a2a0a21f279d66de8a9bdbfe21920968bcb1c
+Date: Tue Jan 8 18:14:09 2008 +0100
+
+ [new uImage] Define a API for image handling operations
+
+ - Add inline helper macros for basic header processing
+ - Move common non inline code common/image.c
+ - Replace direct header access with the API routines
+ - Rename IH_CPU_* to IH_ARCH_*
+
+
+commit ed29bc4e8142b46b626f67524207b36e43d9aad6
+Date: Thu Jan 31 13:19:58 2008 +0100
+
+ Add missing cmd_ximg.o to common/Makefile
+
+
commit 37e3c62fa07a823e7569c872e3a9395d227ed8e3
Date: Mon Jan 28 10:15:02 2008 +0100
projects / J-u-boot.git / blobdiff