+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2008-2014 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
*/
#ifndef FSL_DDR_MAIN_H
#include <common_timing_params.h>
+struct cmd_tbl;
+
#ifndef CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
/* All controllers are for main memory */
-#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_NUM_DDR_CONTROLLERS
+#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_NUM_DDR_CTLRS
#endif
#ifdef CONFIG_SYS_FSL_DDR_LE
*
* All data structures have to be on the stack
*/
-#define CONFIG_SYS_NUM_DDR_CTLRS CONFIG_NUM_DDR_CONTROLLERS
#define CONFIG_SYS_DIMM_SLOTS_PER_CTLR CONFIG_DIMM_SLOTS_PER_CTLR
typedef struct {
const dimm_params_t *dimm_params,
common_timing_params_t *outpdimm,
unsigned int number_of_dimms);
-unsigned int populate_memctl_options(int all_dimms_registered,
+unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num);
void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl);
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr);
void board_add_ram_info(int use_default);
/* processor specific function */
void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
unsigned int ctrl_num, int step);
+void remove_unused_controllers(fsl_ddr_info_t *info);
/* board specific function */
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
void update_spd_address(unsigned int ctrl_num,
unsigned int slot,
unsigned int *addr);
+
+void erratum_a009942_check_cpo(void);
#endif