]> Git Repo - J-u-boot.git/blobdiff - board/atmel/sama5d3xek/sama5d3xek.c
Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
[J-u-boot.git] / board / atmel / sama5d3xek / sama5d3xek.c
index cae6e245ddbc90e28b76f7f179f4f8f12817a844..f2e1242fcb0fff4d44d55211982be28fedab7f93 100644 (file)
@@ -1,11 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2012 - 2013 Atmel Corporation
  * Bo Shen <[email protected]>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#include <common.h>
+#include <config.h>
+#include <init.h>
+#include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/arch/sama5d3_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
 #include <debug_uart.h>
-#include <lcd.h>
+#include <env.h>
 #include <linux/ctype.h>
-#include <atmel_hlcdc.h>
-#include <phy.h>
-#include <micrel.h>
 #include <spl.h>
 #include <asm/arch/atmel_mpddrc.h>
 #include <asm/arch/at91_wdt.h>
@@ -132,80 +130,6 @@ static void sama5d3xek_mci_hw_init(void)
 }
 #endif
 
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
-       .vl_col = 800,
-       .vl_row = 480,
-       .vl_clk = 24000000,
-       .vl_bpix = LCD_BPP,
-       .vl_tft = 1,
-       .vl_hsync_len = 128,
-       .vl_left_margin = 64,
-       .vl_right_margin = 64,
-       .vl_vsync_len = 2,
-       .vl_upper_margin = 22,
-       .vl_lower_margin = 21,
-       .mmio = ATMEL_BASE_LCDC,
-};
-
-void lcd_enable(void)
-{
-}
-
-void lcd_disable(void)
-{
-}
-
-static void sama5d3xek_lcd_hw_init(void)
-{
-       gd->fb_base = CONFIG_SAMA5D3_LCD_BASE;
-
-       /* The higher 8 bit of LCD is board related */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0);  /* LCDD16 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0);  /* LCDD17 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0);  /* LCDD18 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0);  /* LCDD19 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0);  /* LCDD20 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0);  /* LCDD21 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0);  /* LCDD22 */
-       at91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0);  /* LCDD23 */
-
-       /* Configure lower 16 bit of LCD and enable clock */
-       at91_lcd_hw_init();
-}
-
-#ifdef CONFIG_LCD_INFO
-#include <nand.h>
-#include <version.h>
-
-void lcd_show_board_info(void)
-{
-       ulong dram_size;
-       uint64_t nand_size;
-       int i;
-       char temp[32];
-
-       lcd_printf("%s\n", U_BOOT_VERSION);
-       lcd_printf("(C) 2013 ATMEL Corp\n");
-       lcd_printf("[email protected]\n");
-       lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
-                  strmhz(temp, get_cpu_clk_rate()));
-
-       dram_size = 0;
-       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
-               dram_size += gd->bd->bi_dram[i].size;
-
-       nand_size = 0;
-#ifdef CONFIG_NAND_ATMEL
-       for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-               nand_size += nand_info[i]->size;
-#endif
-       lcd_printf("%ld MB SDRAM, %lld MB NAND\n",
-                  dram_size >> 20, nand_size >> 20);
-}
-#endif /* CONFIG_LCD_INFO */
-#endif /* CONFIG_LCD */
-
 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
 void board_debug_uart_init(void)
 {
@@ -216,9 +140,6 @@ void board_debug_uart_init(void)
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
-#ifdef CONFIG_DEBUG_UART
-       debug_uart_init();
-#endif
        return 0;
 }
 #endif
@@ -226,7 +147,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+       gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_NAND_ATMEL
        sama5d3xek_nand_hw_init();
@@ -239,18 +160,14 @@ int board_init(void)
 #endif
 #ifdef CONFIG_GENERIC_ATMEL_MCI
        sama5d3xek_mci_hw_init();
-#endif
-#ifdef CONFIG_LCD
-       if (has_lcdc())
-               sama5d3xek_lcd_hw_init();
 #endif
        return 0;
 }
 
 int dram_init(void)
 {
-       gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-                                   CONFIG_SYS_SDRAM_SIZE);
+       gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+                                   CFG_SYS_SDRAM_SIZE);
        return 0;
 }
 
@@ -267,7 +184,10 @@ int board_late_init(void)
                *p = tolower(*p);
 
        strcat(name, "ek.dtb");
-       setenv("dtb_name", name);
+       env_set("dtb_name", name);
+#endif
+#ifdef CONFIG_VIDEO
+       at91_video_show_board_info();
 #endif
        return 0;
 }
@@ -277,7 +197,7 @@ int board_late_init(void)
 #ifdef CONFIG_SPL_BUILD
 void spl_board_init(void)
 {
-#if CONFIG_SYS_USE_NANDFLASH
+#if CONFIG_NAND_BOOT
        sama5d3xek_nand_hw_init();
 #endif
 }
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