config ARM_PL180_MMCI
bool "ARM AMBA Multimedia Card Interface and compatible support"
- depends on DM_MMC && OF_CONTROL
help
This selects the ARM(R) AMBA(R) PrimeCell Multimedia Card
Interface (PL180, PL181 and compatible) support.
help
Some cards and hosts may sometimes behave unexpectedly (quirks).
This option enable workarounds to handle those quirks. Some of them
- are enabled by default, other may require additionnal flags or are
+ are enabled by default, other may require additional flags or are
enabled by the host driver.
config MMC_HW_PARTITIONING
config SPL_MMC_HS400_SUPPORT
bool "enable HS400 support in SPL"
+ select SPL_MMC_HS200_SUPPORT
help
The HS400 mode is support by some eMMC. The bus frequency is up to
200MHz. This mode requires tuning the IO.
The HS200 mode is support by some eMMC. The bus frequency is up to
200MHz. This mode requires tuning the IO.
-
config SPL_MMC_HS200_SUPPORT
bool "enable HS200 support in SPL"
help
block, this provides host support for SD and MMC interfaces, in both
PIO, internal DMA mode and external DMA mode.
+config MMC_DW_CORTINA
+ bool "Cortina specific extensions for Synopsys DW Memory Card Interface"
+ depends on DM_MMC
+ depends on MMC_DW
+ depends on BLK
+ default n
+ help
+ This selects support for Cortina SoC specific extensions to the
+ Synopsys DesignWare Memory Card Interface driver. Select this option
+ for platforms based on Cortina CAxxxx Soc's.
+
config MMC_DW_EXYNOS
bool "Exynos specific extensions for Synopsys DW Memory Card Interface"
depends on ARCH_EXYNOS
depends on ARCH_RMOBILE
depends on BLK && DM_MMC
depends on OF_CONTROL
+ select BOUNCE_BUFFER
help
This selects support for the Matsushita SD/MMC Host Controller on
Renesas R-Car SoCs.
This enables support for the ADMA (Advanced DMA) defined
in the SD Host Controller Standard Specification Version 3.00 in SPL.
+config MMC_SDHCI_ASPEED
+ bool "Aspeed SDHCI controller"
+ depends on ARCH_ASPEED
+ depends on DM_MMC
+ depends on MMC_SDHCI
+ help
+ Enables support for the Aspeed SDHCI 2.0 controller present on Aspeed
+ SoCs. This device is compatible with SD 3.0 and/or MMC 4.3
+ specifications. On the AST2600, the device is also compatible with
+ MMC 5.1 and eMMC 3.0.
+
config MMC_SDHCI_ATMEL
bool "Atmel SDHCI controller support"
depends on ARCH_AT91
If unsure, say N.
-config MMC_SDHCI_K3_ARASAN
- bool "Arasan SDHCI controller for TI's K3 based SoCs"
+config MMC_SDHCI_AM654
+ bool "SDHCI Controller on TI's Am654 devices"
depends on ARCH_K3
depends on MMC_SDHCI
depends on DM_MMC && OF_CONTROL && BLK
+ depends on REGMAP
help
- Support for Arasan SDHCI host controller on Texas Instruments'
- K3 family based SoC platforms
+ Support for Secure Digital Host Controller Interface (SDHCI)
+ controllers present on TI's AM654 SOCs.
+
+config MMC_SDHCI_IPROC
+ bool "SDHCI support for the iProc SD/MMC Controller"
+ depends on MMC_SDHCI
+ help
+ This selects the iProc SD/MMC controller.
+
+ If you have a Broadcom IPROC platform with SD or MMC devices,
+ say Y or M here.
+
+ If unsure, say N.
config MMC_SDHCI_KONA
bool "SDHCI support on Broadcom KONA platform"
config MMC_SDHCI_TEGRA
bool "SDHCI platform support for the Tegra SD/MMC Controller"
- depends on TEGRA
+ depends on ARCH_TEGRA
select BOUNCE_BUFFER
default y
help
If unsure, say N.
+config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
+ bool "Disable external clock loopback"
+ depends on MMC_SDHCI_TEGRA && TEGRA124
+ help
+ Disable the external clock loopback and use the internal one on SDMMC3
+ as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
+ being set to 0xfffd according to the TRM.
+
+ approach once proper kernel integration made it mainline.
+
config MMC_SDHCI_ZYNQ
bool "Arasan SDHCI controller support"
depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
help
Set the minimum frequency of the controller.
+config ZYNQ_HISPD_BROKEN
+ bool "High speed broken for Zynq SDHCI controller"
+ depends on MMC_SDHCI_ZYNQ
+ help
+ Set if high speed mode is broken.
+
config MMC_SUNXI
bool "Allwinner sunxi SD/MMC Host Controller support"
depends on ARCH_SUNXI && !UART0_PORT_F
config MMC_MTK
bool "MediaTek SD/MMC Card Interface support"
- depends on ARCH_MEDIATEK
+ depends on ARCH_MEDIATEK || ARCH_MTMIPS
depends on BLK && DM_MMC
depends on OF_CONTROL
help
endif
-config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
- bool "Disable external clock loopback"
- depends on MMC_SDHCI_TEGRA && TEGRA124
- help
- Disable the external clock loopback and use the internal one on SDMMC3
- as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
- being set to 0xfffd according to the TRM.
-
- approach once proper kernel integration made it mainline.
-
config FSL_ESDHC
bool "Freescale/NXP eSDHC controller support"
help
This selects support for the eSDHC (Enhanced Secure Digital Host
Controller) found on numerous Freescale/NXP SoCs.
+config FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND
+ bool "enable eSDHC workaround for 3.3v IO reliability issue"
+ depends on FSL_ESDHC && DM_MMC
+ default n
+ help
+ When eSDHC operates at 3.3v, damage can accumulate in an internal
+ level shifter at a higher than expected rate. The faster the interface
+ runs, the more damage accumulates. This issue now is found on LX2160A
+ eSDHC1 for only SD card. The hardware workaround is recommended to use
+ an on-board level shifter that is 1.8v on SoC side and 3.3v on SD card
+ side. For boards without hardware workaround, this option could be
+ enabled, ensuring 1.8v IO voltage and disabling eSDHC if no card.
+ This option assumes no hotplug, and u-boot has to make all the way to
+ to linux to use 1.8v UHS-I speed mode if has card.
+
config FSL_ESDHC_IMX
bool "Freescale/NXP i.MX eSDHC controller support"
help
This selects support for the i.MX eSDHC (Enhanced Secure Digital Host
Controller) found on numerous Freescale/NXP SoCs.
+config FSL_USDHC
+ bool "Freescale/NXP i.MX uSDHC controller support"
+ depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMXRT || TARGET_S32V234EVB
+ select FSL_ESDHC_IMX
+ help
+ This enables the Ultra Secured Digital Host Controller enhancements
+
endmenu
config SYS_FSL_ERRATUM_ESDHC111