lmb: Rename _lmb_alloc_addr() to lmb_alloc_addr_flags()

[J-u-boot.git] / include / pci_ids.h

diff --git a/include/pci_ids.h b/include/pci_ids.h
index b63bf45168d95802104e072c141f38efafa25e0a..a8939b105f144f1ac56f3befce73662f1e0e43b9 100644 (file)
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1535,7 +1535,6 @@
 #define PCI_VENDOR_ID_ZIATECH          0x1138
 #define PCI_DEVICE_ID_ZIATECH_5550_HC  0x5550
 
-
 #define PCI_VENDOR_ID_SYSKONNECT       0x1148
 #define PCI_DEVICE_ID_SYSKONNECT_TR    0x4200
 #define PCI_DEVICE_ID_SYSKONNECT_GE    0x4300
@@ -2601,6 +2600,15 @@
 #define PCI_DEVICE_ID_DCI_PCCOM2       0x0004
 
 #define PCI_VENDOR_ID_INTEL            0x8086
+#define PCI_DEVICE_ID_INTEL_EHL_RGMII1G       0x4b30
+#define PCI_DEVICE_ID_INTEL_EHL_SGMII1        0x4b31
+#define PCI_DEVICE_ID_INTEL_EHL_SGMII2G5      0x4b32
+#define PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G  0x4ba0
+#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G  0x4ba1
+#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5 0x4ba2
+#define PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G  0x4bb0
+#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G  0x4bb1
+#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5 0x4bb2
 #define PCI_DEVICE_ID_INTEL_EESSC      0x0008
 #define PCI_DEVICE_ID_INTEL_SNB_IMC    0x0100
 #define PCI_DEVICE_ID_INTEL_IVB_IMC    0x0154
@@ -2701,6 +2709,11 @@
 #define PCI_DEVICE_ID_INTEL_82441      0x1237
 #define PCI_DEVICE_ID_INTEL_82380FB    0x124b
 #define PCI_DEVICE_ID_INTEL_82439      0x1250
+#define PCI_DEVICE_ID_INTEL_I226_LM                    0x125b
+#define PCI_DEVICE_ID_INTEL_I226_V                     0x125c
+#define PCI_DEVICE_ID_INTEL_I226_IT                    0x125d
+#define PCI_DEVICE_ID_INTEL_I221_V                     0x125e
+#define PCI_DEVICE_ID_INTEL_I226_UNPROGRAMMED          0x125f
 #define PCI_DEVICE_ID_INTEL_I210_UNPROGRAMMED          0x1531
 #define PCI_DEVICE_ID_INTEL_I211_UNPROGRAMMED          0x1532
 #define PCI_DEVICE_ID_INTEL_I210_COPPER                        0x1533
@@ -2710,6 +2723,8 @@
 #define PCI_DEVICE_ID_INTEL_I211_COPPER                        0x1539
 #define PCI_DEVICE_ID_INTEL_I210_COPPER_FLASHLESS      0x157b
 #define PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS      0x157c
+#define PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED          0x15fd
+#define PCI_DEVICE_ID_INTEL_I225_IT                    0x0d9f
 #define PCI_DEVICE_ID_INTEL_80960_RP   0x1960
 #define PCI_DEVICE_ID_INTEL_82840_HB   0x1a21
 #define PCI_DEVICE_ID_INTEL_82845_HB   0x1a30
@@ -2928,6 +2943,7 @@
 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2  0x2db1
 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2  0x2db2
 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2    0x2db3
+#define PCI_DEVICE_ID_INTEL_I226_K     0x3102
 #define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
 #define PCI_DEVICE_ID_INTEL_IOAT_TBG4  0x3429
 #define PCI_DEVICE_ID_INTEL_IOAT_TBG5  0x342a
@@ -2999,6 +3015,7 @@
 #define PCI_DEVICE_ID_INTEL_UNC_R3QPI1 0x3c45
 #define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX      0x3ce0
 #define PCI_DEVICE_ID_INTEL_IOAT_SNB   0x402f
+#define PCI_DEVICE_ID_INTEL_I226_LMVP  0x5503
 #define PCI_DEVICE_ID_INTEL_5100_16    0x65f0
 #define PCI_DEVICE_ID_INTEL_5100_19    0x65f3
 #define PCI_DEVICE_ID_INTEL_5100_21    0x65f5