mpc83xx: Migrate BATS config to Kconfig

[J-u-boot.git] / include / configs / kmcoge5ne.h

diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index a45ea521acaf008c1d19986b042561e5eaebd0f5..a4a0fb222bccd4d0356931f7b7b789a57d0bdeb6 100644 (file)
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -234,51 +234,6 @@
                                         HID0_ENABLE_INSTRUCTION_CACHE)
 #define CONFIG_SYS_HID2                        HID2_HBE
 
-/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L      (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
-                               BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U      (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
-                                       BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L      CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U      CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L      (CONFIG_SYS_IMMR | BATL_PP_RW | \
-                               BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U      (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
-                                       | BATU_VP)
-#define CONFIG_SYS_DBAT1L      CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U      CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY:  icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L      (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
-                               BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U      (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
-                               BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L      (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
-                                BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U      CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L      (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
-                                       BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U      (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
-                                       BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L      (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
-                                BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U      CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L      (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U      (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
-                                       BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L      CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U      CONFIG_SYS_IBAT4U
-
 /*
  * Internal Definitions
  */
@@ -434,62 +389,6 @@
        OR_GPCM_TRLX |\
        OR_GPCM_EAD)
 
-/*
- * MMU Setup
- */
-
-/* PAXE:  icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (\
-       CONFIG_SYS_PAXE_BASE | \
-       BATL_PP_10 | \
-       BATL_MEMCOHERENCE)
-
-#define CONFIG_SYS_IBAT5U (\
-       CONFIG_SYS_PAXE_BASE | \
-       BATU_BL_256M | \
-       BATU_VS | \
-       BATU_VP)
-
-#define CONFIG_SYS_DBAT5L (\
-       CONFIG_SYS_PAXE_BASE | \
-       BATL_PP_10 | \
-       BATL_CACHEINHIBIT | \
-       BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_DBAT5U      CONFIG_SYS_IBAT5U
-
-/* BFTIC3:  icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT6L (\
-       CONFIG_SYS_BFTIC3_BASE | \
-       BATL_PP_10 | \
-       BATL_MEMCOHERENCE)
-
-#define CONFIG_SYS_IBAT6U (\
-       CONFIG_SYS_BFTIC3_BASE | \
-       BATU_BL_256M | \
-       BATU_VS | \
-       BATU_VP)
-
-#define CONFIG_SYS_DBAT6L (\
-       CONFIG_SYS_BFTIC3_BASE | \
-       BATL_PP_10 | \
-       BATL_CACHEINHIBIT | \
-       BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_DBAT6U      CONFIG_SYS_IBAT6U
-
-/* DDR/LBC SDRAM next 256M: cacheable */
-#define CONFIG_SYS_IBAT7L (\
-       CONFIG_SYS_SDRAM_BASE2 |\
-       BATL_PP_10 |\
-       BATL_CACHEINHIBIT |\
-       BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_IBAT7U (\
-       CONFIG_SYS_SDRAM_BASE2 |\
-       BATU_BL_256M |\
-       BATU_VS |\
-       BATU_VP)
 /* enable POST tests */
 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS)
 #define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
@@ -497,7 +396,4 @@
 #define CONFIG_TESTPIN_REG  gprt3      /* for kmcoge5ne */
 #define CONFIG_TESTPIN_MASK 0x20       /* for kmcoge5ne */
 
-#define CONFIG_SYS_DBAT7L      CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U      CONFIG_SYS_IBAT7U
-
 #endif /* CONFIG */