riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled

[J-u-boot.git] / arch / riscv / cpu / start.S

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index a4433fbd6ba1b3689961c8bc64b4c2f0f0aa26c5..60ac8c621e4d20df2d1a6662725091983a6f5e5d 100644 (file)
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -98,6 +98,7 @@ call_board_init_f_0:
        mv      sp, a0
 #endif
 
+#ifndef CONFIG_XIP
        /*
         * Pick hart to initialize global data and run U-Boot. The other harts
         * wait for initialization to complete.
@@ -106,15 +107,21 @@ call_board_init_f_0:
        li      s2, 1
        amoswap.w s2, t1, 0(t0)
        bnez    s2, wait_for_gd_init
+#else
+       bnez    tp, secondary_hart_loop
+#endif
 
+#ifdef CONFIG_OF_PRIOR_STAGE
        la      t0, prior_stage_fdt_address
        SREG    s1, 0(t0)
+#endif
 
        jal     board_init_f_init_reserve
 
        /* save the boot hart id to global_data */
        SREG    tp, GD_BOOT_HART(gp)
 
+#ifndef CONFIG_XIP
        la      t0, available_harts_lock
        fence   rw, w
        amoswap.w zero, zero, 0(t0)
@@ -141,6 +148,7 @@ wait_for_gd_init:
         * secondary_hart_loop.
         */
        bnez    s2, secondary_hart_loop
+#endif
 
        /* Enable cache */
        jal     icache_enable